Commit | Line | Data |
---|---|---|
a80b95ba | 1 | /* Darwin support for GDB, the GNU debugger. |
0b302171 | 2 | Copyright 1997-2002, 2008-2012 Free Software Foundation, Inc. |
a80b95ba TG |
3 | |
4 | Contributed by Apple Computer, Inc. | |
5 | ||
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | #include "defs.h" | |
22 | #include "frame.h" | |
23 | #include "inferior.h" | |
24 | #include "target.h" | |
25 | #include "symfile.h" | |
26 | #include "symtab.h" | |
27 | #include "objfiles.h" | |
28 | #include "gdbcmd.h" | |
29 | #include "regcache.h" | |
30 | #include "gdb_assert.h" | |
31 | #include "i386-tdep.h" | |
a80b95ba TG |
32 | #include "i387-tdep.h" |
33 | #include "gdbarch.h" | |
34 | #include "arch-utils.h" | |
acdb24a9 | 35 | #include "gdbcore.h" |
a80b95ba TG |
36 | |
37 | #include "darwin-nat.h" | |
38 | #include "i386-darwin-tdep.h" | |
39 | ||
5cd226f2 TG |
40 | #ifdef BFD64 |
41 | #include "amd64-nat.h" | |
46187dff | 42 | #include "amd64-tdep.h" |
5cd226f2 TG |
43 | #include "amd64-darwin-tdep.h" |
44 | #endif | |
45 | ||
a80b95ba TG |
46 | /* Read register values from the inferior process. |
47 | If REGNO is -1, do this for all registers. | |
48 | Otherwise, REGNO specifies which register (so we can save time). */ | |
49 | static void | |
28439f5e PA |
50 | i386_darwin_fetch_inferior_registers (struct target_ops *ops, |
51 | struct regcache *regcache, int regno) | |
a80b95ba TG |
52 | { |
53 | thread_t current_thread = ptid_get_tid (inferior_ptid); | |
54 | int fetched = 0; | |
55 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
56 | ||
5cd226f2 | 57 | #ifdef BFD64 |
a80b95ba TG |
58 | if (gdbarch_ptr_bit (gdbarch) == 64) |
59 | { | |
60 | if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno)) | |
61 | { | |
62 | x86_thread_state_t gp_regs; | |
63 | unsigned int gp_count = x86_THREAD_STATE_COUNT; | |
64 | kern_return_t ret; | |
65 | ||
66 | ret = thread_get_state | |
67 | (current_thread, x86_THREAD_STATE, (thread_state_t) & gp_regs, | |
68 | &gp_count); | |
69 | if (ret != KERN_SUCCESS) | |
70 | { | |
1777feb0 MS |
71 | printf_unfiltered (_("Error calling thread_get_state for " |
72 | "GP registers for thread 0x%ulx"), | |
73 | current_thread); | |
a80b95ba TG |
74 | MACH_CHECK_ERROR (ret); |
75 | } | |
76 | amd64_supply_native_gregset (regcache, &gp_regs.uts, -1); | |
77 | fetched++; | |
78 | } | |
79 | ||
80 | if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno)) | |
81 | { | |
82 | x86_float_state_t fp_regs; | |
83 | unsigned int fp_count = x86_FLOAT_STATE_COUNT; | |
84 | kern_return_t ret; | |
85 | ||
86 | ret = thread_get_state | |
87 | (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs, | |
88 | &fp_count); | |
89 | if (ret != KERN_SUCCESS) | |
90 | { | |
1777feb0 MS |
91 | printf_unfiltered (_("Error calling thread_get_state for " |
92 | "float registers for thread 0x%ulx"), | |
93 | current_thread); | |
a80b95ba TG |
94 | MACH_CHECK_ERROR (ret); |
95 | } | |
46187dff | 96 | amd64_supply_fxsave (regcache, -1, &fp_regs.ufs.fs64.__fpu_fcw); |
a80b95ba TG |
97 | fetched++; |
98 | } | |
99 | } | |
100 | else | |
5cd226f2 | 101 | #endif |
a80b95ba TG |
102 | { |
103 | if (regno == -1 || regno < I386_NUM_GREGS) | |
104 | { | |
105 | i386_thread_state_t gp_regs; | |
106 | unsigned int gp_count = i386_THREAD_STATE_COUNT; | |
107 | kern_return_t ret; | |
108 | int i; | |
109 | ||
110 | ret = thread_get_state | |
111 | (current_thread, i386_THREAD_STATE, (thread_state_t) & gp_regs, | |
112 | &gp_count); | |
113 | if (ret != KERN_SUCCESS) | |
114 | { | |
1777feb0 MS |
115 | printf_unfiltered (_("Error calling thread_get_state for " |
116 | "GP registers for thread 0x%ulx"), | |
117 | current_thread); | |
a80b95ba TG |
118 | MACH_CHECK_ERROR (ret); |
119 | } | |
120 | for (i = 0; i < I386_NUM_GREGS; i++) | |
121 | regcache_raw_supply | |
122 | (regcache, i, | |
123 | (char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]); | |
124 | ||
125 | fetched++; | |
126 | } | |
127 | ||
128 | if (regno == -1 | |
129 | || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS)) | |
130 | { | |
131 | i386_float_state_t fp_regs; | |
132 | unsigned int fp_count = i386_FLOAT_STATE_COUNT; | |
133 | kern_return_t ret; | |
134 | ||
135 | ret = thread_get_state | |
136 | (current_thread, i386_FLOAT_STATE, (thread_state_t) & fp_regs, | |
137 | &fp_count); | |
138 | if (ret != KERN_SUCCESS) | |
139 | { | |
1777feb0 MS |
140 | printf_unfiltered (_("Error calling thread_get_state for " |
141 | "float registers for thread 0x%ulx"), | |
142 | current_thread); | |
a80b95ba TG |
143 | MACH_CHECK_ERROR (ret); |
144 | } | |
145 | i387_supply_fxsave (regcache, -1, &fp_regs.__fpu_fcw); | |
146 | fetched++; | |
147 | } | |
148 | } | |
149 | ||
150 | if (! fetched) | |
151 | { | |
152 | warning (_("unknown register %d"), regno); | |
153 | regcache_raw_supply (regcache, regno, NULL); | |
154 | } | |
155 | } | |
156 | ||
157 | /* Store our register values back into the inferior. | |
158 | If REGNO is -1, do this for all registers. | |
159 | Otherwise, REGNO specifies which register (so we can save time). */ | |
160 | ||
161 | static void | |
28439f5e PA |
162 | i386_darwin_store_inferior_registers (struct target_ops *ops, |
163 | struct regcache *regcache, int regno) | |
a80b95ba TG |
164 | { |
165 | thread_t current_thread = ptid_get_tid (inferior_ptid); | |
166 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
167 | ||
5cd226f2 | 168 | #ifdef BFD64 |
a80b95ba TG |
169 | if (gdbarch_ptr_bit (gdbarch) == 64) |
170 | { | |
171 | if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno)) | |
172 | { | |
173 | x86_thread_state_t gp_regs; | |
174 | kern_return_t ret; | |
175 | unsigned int gp_count = x86_THREAD_STATE_COUNT; | |
176 | ||
177 | ret = thread_get_state | |
178 | (current_thread, x86_THREAD_STATE, (thread_state_t) &gp_regs, | |
179 | &gp_count); | |
180 | MACH_CHECK_ERROR (ret); | |
181 | gdb_assert (gp_regs.tsh.flavor == x86_THREAD_STATE64); | |
182 | gdb_assert (gp_regs.tsh.count == x86_THREAD_STATE64_COUNT); | |
183 | ||
184 | amd64_collect_native_gregset (regcache, &gp_regs.uts, regno); | |
185 | ||
186 | ret = thread_set_state (current_thread, x86_THREAD_STATE, | |
187 | (thread_state_t) &gp_regs, | |
188 | x86_THREAD_STATE_COUNT); | |
189 | MACH_CHECK_ERROR (ret); | |
190 | } | |
191 | ||
192 | if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno)) | |
193 | { | |
194 | x86_float_state_t fp_regs; | |
195 | kern_return_t ret; | |
196 | unsigned int fp_count = x86_FLOAT_STATE_COUNT; | |
197 | ||
198 | ret = thread_get_state | |
199 | (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs, | |
200 | &fp_count); | |
201 | MACH_CHECK_ERROR (ret); | |
202 | gdb_assert (fp_regs.fsh.flavor == x86_FLOAT_STATE64); | |
203 | gdb_assert (fp_regs.fsh.count == x86_FLOAT_STATE64_COUNT); | |
204 | ||
46187dff | 205 | amd64_collect_fxsave (regcache, regno, &fp_regs.ufs.fs64.__fpu_fcw); |
a80b95ba TG |
206 | |
207 | ret = thread_set_state (current_thread, x86_FLOAT_STATE, | |
208 | (thread_state_t) & fp_regs, | |
209 | x86_FLOAT_STATE_COUNT); | |
210 | MACH_CHECK_ERROR (ret); | |
211 | } | |
212 | } | |
213 | else | |
5cd226f2 | 214 | #endif |
a80b95ba TG |
215 | { |
216 | if (regno == -1 || regno < I386_NUM_GREGS) | |
217 | { | |
218 | i386_thread_state_t gp_regs; | |
219 | kern_return_t ret; | |
220 | unsigned int gp_count = i386_THREAD_STATE_COUNT; | |
221 | int i; | |
222 | ||
223 | ret = thread_get_state | |
224 | (current_thread, i386_THREAD_STATE, (thread_state_t) & gp_regs, | |
225 | &gp_count); | |
226 | MACH_CHECK_ERROR (ret); | |
227 | ||
228 | for (i = 0; i < I386_NUM_GREGS; i++) | |
229 | if (regno == -1 || regno == i) | |
230 | regcache_raw_collect | |
231 | (regcache, i, | |
232 | (char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]); | |
233 | ||
234 | ret = thread_set_state (current_thread, i386_THREAD_STATE, | |
235 | (thread_state_t) & gp_regs, | |
236 | i386_THREAD_STATE_COUNT); | |
237 | MACH_CHECK_ERROR (ret); | |
238 | } | |
239 | ||
240 | if (regno == -1 | |
241 | || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS)) | |
242 | { | |
243 | i386_float_state_t fp_regs; | |
244 | unsigned int fp_count = i386_FLOAT_STATE_COUNT; | |
245 | kern_return_t ret; | |
246 | ||
247 | ret = thread_get_state | |
248 | (current_thread, i386_FLOAT_STATE, (thread_state_t) & fp_regs, | |
249 | &fp_count); | |
250 | MACH_CHECK_ERROR (ret); | |
251 | ||
252 | i387_collect_fxsave (regcache, regno, &fp_regs.__fpu_fcw); | |
253 | ||
254 | ret = thread_set_state (current_thread, i386_FLOAT_STATE, | |
255 | (thread_state_t) & fp_regs, | |
256 | i386_FLOAT_STATE_COUNT); | |
257 | MACH_CHECK_ERROR (ret); | |
258 | } | |
259 | } | |
260 | } | |
261 | ||
262 | ||
263 | /* Support for debug registers, boosted mostly from i386-linux-nat.c. */ | |
264 | ||
a80b95ba TG |
265 | static void |
266 | i386_darwin_dr_set (int regnum, uint32_t value) | |
267 | { | |
268 | int current_pid; | |
269 | thread_t current_thread; | |
270 | x86_debug_state_t dr_regs; | |
271 | kern_return_t ret; | |
272 | unsigned int dr_count = x86_DEBUG_STATE_COUNT; | |
273 | ||
274 | gdb_assert (regnum >= 0 && regnum <= DR_CONTROL); | |
275 | ||
276 | current_thread = ptid_get_tid (inferior_ptid); | |
277 | ||
278 | dr_regs.dsh.flavor = x86_DEBUG_STATE32; | |
279 | dr_regs.dsh.count = x86_DEBUG_STATE32_COUNT; | |
280 | dr_count = x86_DEBUG_STATE_COUNT; | |
281 | ret = thread_get_state (current_thread, x86_DEBUG_STATE, | |
282 | (thread_state_t) &dr_regs, &dr_count); | |
283 | ||
284 | if (ret != KERN_SUCCESS) | |
285 | { | |
1777feb0 MS |
286 | printf_unfiltered (_("Error reading debug registers " |
287 | "thread 0x%x via thread_get_state\n"), | |
288 | (int) current_thread); | |
a80b95ba TG |
289 | MACH_CHECK_ERROR (ret); |
290 | } | |
291 | ||
292 | switch (regnum) | |
293 | { | |
294 | case 0: | |
295 | dr_regs.uds.ds32.__dr0 = value; | |
296 | break; | |
297 | case 1: | |
298 | dr_regs.uds.ds32.__dr1 = value; | |
299 | break; | |
300 | case 2: | |
301 | dr_regs.uds.ds32.__dr2 = value; | |
302 | break; | |
303 | case 3: | |
304 | dr_regs.uds.ds32.__dr3 = value; | |
305 | break; | |
306 | case 4: | |
307 | dr_regs.uds.ds32.__dr4 = value; | |
308 | break; | |
309 | case 5: | |
310 | dr_regs.uds.ds32.__dr5 = value; | |
311 | break; | |
312 | case 6: | |
313 | dr_regs.uds.ds32.__dr6 = value; | |
314 | break; | |
315 | case 7: | |
316 | dr_regs.uds.ds32.__dr7 = value; | |
317 | break; | |
318 | } | |
319 | ||
320 | ret = thread_set_state (current_thread, x86_DEBUG_STATE, | |
321 | (thread_state_t) &dr_regs, dr_count); | |
322 | ||
323 | if (ret != KERN_SUCCESS) | |
324 | { | |
1777feb0 MS |
325 | printf_unfiltered (_("Error writing debug registers " |
326 | "thread 0x%x via thread_get_state\n"), | |
327 | (int) current_thread); | |
a80b95ba TG |
328 | MACH_CHECK_ERROR (ret); |
329 | } | |
330 | } | |
331 | ||
332 | static uint32_t | |
333 | i386_darwin_dr_get (int regnum) | |
334 | { | |
335 | thread_t current_thread; | |
336 | x86_debug_state_t dr_regs; | |
337 | kern_return_t ret; | |
338 | unsigned int dr_count = x86_DEBUG_STATE_COUNT; | |
339 | ||
340 | gdb_assert (regnum >= 0 && regnum <= DR_CONTROL); | |
341 | ||
342 | current_thread = ptid_get_tid (inferior_ptid); | |
343 | ||
344 | dr_regs.dsh.flavor = x86_DEBUG_STATE32; | |
345 | dr_regs.dsh.count = x86_DEBUG_STATE32_COUNT; | |
346 | dr_count = x86_DEBUG_STATE_COUNT; | |
347 | ret = thread_get_state (current_thread, x86_DEBUG_STATE, | |
348 | (thread_state_t) &dr_regs, &dr_count); | |
349 | ||
350 | if (ret != KERN_SUCCESS) | |
351 | { | |
1777feb0 MS |
352 | printf_unfiltered (_("Error reading debug registers " |
353 | "thread 0x%x via thread_get_state\n"), | |
354 | (int) current_thread); | |
a80b95ba TG |
355 | MACH_CHECK_ERROR (ret); |
356 | } | |
357 | ||
358 | switch (regnum) | |
359 | { | |
360 | case 0: | |
361 | return dr_regs.uds.ds32.__dr0; | |
362 | case 1: | |
363 | return dr_regs.uds.ds32.__dr1; | |
364 | case 2: | |
365 | return dr_regs.uds.ds32.__dr2; | |
366 | case 3: | |
367 | return dr_regs.uds.ds32.__dr3; | |
368 | case 4: | |
369 | return dr_regs.uds.ds32.__dr4; | |
370 | case 5: | |
371 | return dr_regs.uds.ds32.__dr5; | |
372 | case 6: | |
373 | return dr_regs.uds.ds32.__dr6; | |
374 | case 7: | |
375 | return dr_regs.uds.ds32.__dr7; | |
376 | default: | |
377 | return -1; | |
378 | } | |
379 | } | |
380 | ||
381 | void | |
382 | i386_darwin_dr_set_control (unsigned long control) | |
383 | { | |
384 | i386_darwin_dr_set (DR_CONTROL, control); | |
385 | } | |
386 | ||
387 | void | |
388 | i386_darwin_dr_set_addr (int regnum, CORE_ADDR addr) | |
389 | { | |
390 | gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR); | |
391 | ||
392 | i386_darwin_dr_set (DR_FIRSTADDR + regnum, addr); | |
393 | } | |
394 | ||
7b50312a PA |
395 | CORE_ADDR |
396 | i386_darwin_dr_get_addr (int regnum) | |
a80b95ba | 397 | { |
7b50312a | 398 | return i386_darwin_dr_get (regnum); |
a80b95ba TG |
399 | } |
400 | ||
401 | unsigned long | |
402 | i386_darwin_dr_get_status (void) | |
403 | { | |
404 | return i386_darwin_dr_get (DR_STATUS); | |
405 | } | |
406 | ||
7b50312a PA |
407 | unsigned long |
408 | i386_darwin_dr_get_control (void) | |
409 | { | |
410 | return i386_darwin_dr_get (DR_CONTROL); | |
411 | } | |
412 | ||
a80b95ba TG |
413 | void |
414 | darwin_check_osabi (darwin_inferior *inf, thread_t thread) | |
415 | { | |
a97b0ac8 | 416 | if (gdbarch_osabi (target_gdbarch) == GDB_OSABI_UNKNOWN) |
a80b95ba TG |
417 | { |
418 | /* Attaching to a process. Let's figure out what kind it is. */ | |
419 | x86_thread_state_t gp_regs; | |
420 | struct gdbarch_info info; | |
421 | unsigned int gp_count = x86_THREAD_STATE_COUNT; | |
422 | kern_return_t ret; | |
423 | ||
424 | ret = thread_get_state (thread, x86_THREAD_STATE, | |
425 | (thread_state_t) &gp_regs, &gp_count); | |
426 | if (ret != KERN_SUCCESS) | |
427 | { | |
428 | MACH_CHECK_ERROR (ret); | |
429 | return; | |
430 | } | |
431 | ||
432 | gdbarch_info_init (&info); | |
433 | gdbarch_info_fill (&info); | |
a97b0ac8 | 434 | info.byte_order = gdbarch_byte_order (target_gdbarch); |
a80b95ba TG |
435 | info.osabi = GDB_OSABI_DARWIN; |
436 | if (gp_regs.tsh.flavor == x86_THREAD_STATE64) | |
437 | info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386, | |
438 | bfd_mach_x86_64); | |
439 | else | |
440 | info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386, | |
441 | bfd_mach_i386_i386); | |
442 | gdbarch_update_p (info); | |
443 | } | |
444 | } | |
445 | ||
446 | #define X86_EFLAGS_T 0x100UL | |
447 | ||
acdb24a9 TG |
448 | /* Returning from a signal trampoline is done by calling a |
449 | special system call (sigreturn). This system call | |
450 | restores the registers that were saved when the signal was | |
451 | raised, including %eflags/%rflags. That means that single-stepping | |
452 | won't work. Instead, we'll have to modify the signal context | |
453 | that's about to be restored, and set the trace flag there. */ | |
454 | ||
455 | static int | |
456 | i386_darwin_sstep_at_sigreturn (x86_thread_state_t *regs) | |
457 | { | |
e17a4113 | 458 | enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch); |
acdb24a9 TG |
459 | static const gdb_byte darwin_syscall[] = { 0xcd, 0x80 }; /* int 0x80 */ |
460 | gdb_byte buf[sizeof (darwin_syscall)]; | |
461 | ||
462 | /* Check if PC is at a sigreturn system call. */ | |
463 | if (target_read_memory (regs->uts.ts32.__eip, buf, sizeof (buf)) == 0 | |
464 | && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0 | |
465 | && regs->uts.ts32.__eax == 0xb8 /* SYS_sigreturn */) | |
466 | { | |
467 | ULONGEST uctx_addr; | |
468 | ULONGEST mctx_addr; | |
469 | ULONGEST flags_addr; | |
470 | unsigned int eflags; | |
471 | ||
e17a4113 UW |
472 | uctx_addr = read_memory_unsigned_integer |
473 | (regs->uts.ts32.__esp + 4, 4, byte_order); | |
474 | mctx_addr = read_memory_unsigned_integer | |
475 | (uctx_addr + 28, 4, byte_order); | |
acdb24a9 TG |
476 | |
477 | flags_addr = mctx_addr + 12 + 9 * 4; | |
478 | read_memory (flags_addr, (gdb_byte *) &eflags, 4); | |
479 | eflags |= X86_EFLAGS_T; | |
480 | write_memory (flags_addr, (gdb_byte *) &eflags, 4); | |
481 | ||
482 | return 1; | |
483 | } | |
484 | return 0; | |
485 | } | |
486 | ||
5cd226f2 | 487 | #ifdef BFD64 |
acdb24a9 TG |
488 | static int |
489 | amd64_darwin_sstep_at_sigreturn (x86_thread_state_t *regs) | |
490 | { | |
e17a4113 | 491 | enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch); |
acdb24a9 TG |
492 | static const gdb_byte darwin_syscall[] = { 0x0f, 0x05 }; /* syscall */ |
493 | gdb_byte buf[sizeof (darwin_syscall)]; | |
494 | ||
495 | /* Check if PC is at a sigreturn system call. */ | |
496 | if (target_read_memory (regs->uts.ts64.__rip, buf, sizeof (buf)) == 0 | |
497 | && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0 | |
498 | && (regs->uts.ts64.__rax & 0xffffffff) == 0x20000b8 /* SYS_sigreturn */) | |
499 | { | |
500 | ULONGEST mctx_addr; | |
501 | ULONGEST flags_addr; | |
502 | unsigned int rflags; | |
503 | ||
e17a4113 UW |
504 | mctx_addr = read_memory_unsigned_integer |
505 | (regs->uts.ts64.__rdi + 48, 8, byte_order); | |
acdb24a9 TG |
506 | flags_addr = mctx_addr + 16 + 17 * 8; |
507 | ||
508 | /* AMD64 is little endian. */ | |
509 | read_memory (flags_addr, (gdb_byte *) &rflags, 4); | |
510 | rflags |= X86_EFLAGS_T; | |
511 | write_memory (flags_addr, (gdb_byte *) &rflags, 4); | |
512 | ||
513 | return 1; | |
514 | } | |
515 | return 0; | |
516 | } | |
5cd226f2 | 517 | #endif |
acdb24a9 | 518 | |
a80b95ba TG |
519 | void |
520 | darwin_set_sstep (thread_t thread, int enable) | |
521 | { | |
522 | x86_thread_state_t regs; | |
523 | unsigned int count = x86_THREAD_STATE_COUNT; | |
524 | kern_return_t kret; | |
525 | ||
526 | kret = thread_get_state (thread, x86_THREAD_STATE, | |
527 | (thread_state_t) ®s, &count); | |
528 | if (kret != KERN_SUCCESS) | |
529 | { | |
530 | printf_unfiltered (_("darwin_set_sstep: error %x, thread=%x\n"), | |
531 | kret, thread); | |
532 | return; | |
533 | } | |
acdb24a9 | 534 | |
a80b95ba TG |
535 | switch (regs.tsh.flavor) |
536 | { | |
537 | case x86_THREAD_STATE32: | |
538 | { | |
539 | __uint32_t bit = enable ? X86_EFLAGS_T : 0; | |
540 | ||
acdb24a9 TG |
541 | if (enable && i386_darwin_sstep_at_sigreturn (®s)) |
542 | return; | |
a80b95ba TG |
543 | if ((regs.uts.ts32.__eflags & X86_EFLAGS_T) == bit) |
544 | return; | |
1777feb0 MS |
545 | regs.uts.ts32.__eflags |
546 | = (regs.uts.ts32.__eflags & ~X86_EFLAGS_T) | bit; | |
a80b95ba TG |
547 | kret = thread_set_state (thread, x86_THREAD_STATE, |
548 | (thread_state_t) ®s, count); | |
549 | MACH_CHECK_ERROR (kret); | |
550 | } | |
551 | break; | |
5cd226f2 | 552 | #ifdef BFD64 |
a80b95ba TG |
553 | case x86_THREAD_STATE64: |
554 | { | |
555 | __uint64_t bit = enable ? X86_EFLAGS_T : 0; | |
556 | ||
acdb24a9 TG |
557 | if (enable && amd64_darwin_sstep_at_sigreturn (®s)) |
558 | return; | |
a80b95ba TG |
559 | if ((regs.uts.ts64.__rflags & X86_EFLAGS_T) == bit) |
560 | return; | |
1777feb0 MS |
561 | regs.uts.ts64.__rflags |
562 | = (regs.uts.ts64.__rflags & ~X86_EFLAGS_T) | bit; | |
a80b95ba TG |
563 | kret = thread_set_state (thread, x86_THREAD_STATE, |
564 | (thread_state_t) ®s, count); | |
565 | MACH_CHECK_ERROR (kret); | |
566 | } | |
567 | break; | |
5cd226f2 | 568 | #endif |
a80b95ba | 569 | default: |
b37520b6 | 570 | error (_("darwin_set_sstep: unknown flavour: %d"), regs.tsh.flavor); |
a80b95ba TG |
571 | } |
572 | } | |
573 | ||
574 | void | |
575 | darwin_complete_target (struct target_ops *target) | |
576 | { | |
5cd226f2 | 577 | #ifdef BFD64 |
a80b95ba TG |
578 | amd64_native_gregset64_reg_offset = amd64_darwin_thread_state_reg_offset; |
579 | amd64_native_gregset64_num_regs = amd64_darwin_thread_state_num_regs; | |
580 | amd64_native_gregset32_reg_offset = i386_darwin_thread_state_reg_offset; | |
581 | amd64_native_gregset32_num_regs = i386_darwin_thread_state_num_regs; | |
5cd226f2 | 582 | #endif |
a80b95ba TG |
583 | |
584 | target->to_fetch_registers = i386_darwin_fetch_inferior_registers; | |
585 | target->to_store_registers = i386_darwin_store_inferior_registers; | |
586 | } |