gdb/
[deliverable/binutils-gdb.git] / gdb / i386-darwin-nat.c
CommitLineData
a80b95ba 1/* Darwin support for GDB, the GNU debugger.
0b1afbb3 2 Copyright (C) 1997-2013 Free Software Foundation, Inc.
a80b95ba
TG
3
4 Contributed by Apple Computer, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21#include "defs.h"
22#include "frame.h"
23#include "inferior.h"
24#include "target.h"
25#include "symfile.h"
26#include "symtab.h"
27#include "objfiles.h"
28#include "gdbcmd.h"
29#include "regcache.h"
30#include "gdb_assert.h"
31#include "i386-tdep.h"
a80b95ba
TG
32#include "i387-tdep.h"
33#include "gdbarch.h"
34#include "arch-utils.h"
acdb24a9 35#include "gdbcore.h"
a80b95ba 36
bc884eba 37#include "i386-nat.h"
a80b95ba
TG
38#include "darwin-nat.h"
39#include "i386-darwin-tdep.h"
40
5cd226f2
TG
41#ifdef BFD64
42#include "amd64-nat.h"
46187dff 43#include "amd64-tdep.h"
5cd226f2
TG
44#include "amd64-darwin-tdep.h"
45#endif
46
a80b95ba
TG
47/* Read register values from the inferior process.
48 If REGNO is -1, do this for all registers.
49 Otherwise, REGNO specifies which register (so we can save time). */
50static void
28439f5e
PA
51i386_darwin_fetch_inferior_registers (struct target_ops *ops,
52 struct regcache *regcache, int regno)
a80b95ba
TG
53{
54 thread_t current_thread = ptid_get_tid (inferior_ptid);
55 int fetched = 0;
56 struct gdbarch *gdbarch = get_regcache_arch (regcache);
57
5cd226f2 58#ifdef BFD64
a80b95ba
TG
59 if (gdbarch_ptr_bit (gdbarch) == 64)
60 {
61 if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
62 {
63 x86_thread_state_t gp_regs;
64 unsigned int gp_count = x86_THREAD_STATE_COUNT;
65 kern_return_t ret;
66
67 ret = thread_get_state
68 (current_thread, x86_THREAD_STATE, (thread_state_t) & gp_regs,
69 &gp_count);
70 if (ret != KERN_SUCCESS)
71 {
1777feb0 72 printf_unfiltered (_("Error calling thread_get_state for "
17092398 73 "GP registers for thread 0x%lx\n"),
016b7430 74 (unsigned long) current_thread);
a80b95ba
TG
75 MACH_CHECK_ERROR (ret);
76 }
77 amd64_supply_native_gregset (regcache, &gp_regs.uts, -1);
78 fetched++;
79 }
80
81 if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
82 {
83 x86_float_state_t fp_regs;
84 unsigned int fp_count = x86_FLOAT_STATE_COUNT;
85 kern_return_t ret;
86
87 ret = thread_get_state
88 (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
89 &fp_count);
90 if (ret != KERN_SUCCESS)
91 {
1777feb0 92 printf_unfiltered (_("Error calling thread_get_state for "
17092398 93 "float registers for thread 0x%lx\n"),
016b7430 94 (unsigned long) current_thread);
a80b95ba
TG
95 MACH_CHECK_ERROR (ret);
96 }
46187dff 97 amd64_supply_fxsave (regcache, -1, &fp_regs.ufs.fs64.__fpu_fcw);
a80b95ba
TG
98 fetched++;
99 }
100 }
101 else
5cd226f2 102#endif
a80b95ba
TG
103 {
104 if (regno == -1 || regno < I386_NUM_GREGS)
105 {
cf9bb588
TG
106 x86_thread_state32_t gp_regs;
107 unsigned int gp_count = x86_THREAD_STATE32_COUNT;
a80b95ba
TG
108 kern_return_t ret;
109 int i;
110
111 ret = thread_get_state
cf9bb588 112 (current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
a80b95ba
TG
113 &gp_count);
114 if (ret != KERN_SUCCESS)
115 {
1777feb0 116 printf_unfiltered (_("Error calling thread_get_state for "
17092398
TG
117 "GP registers for thread 0x%lx\n"),
118 (unsigned long) current_thread);
a80b95ba
TG
119 MACH_CHECK_ERROR (ret);
120 }
121 for (i = 0; i < I386_NUM_GREGS; i++)
122 regcache_raw_supply
123 (regcache, i,
124 (char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);
125
126 fetched++;
127 }
128
129 if (regno == -1
130 || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
131 {
cf9bb588
TG
132 x86_float_state32_t fp_regs;
133 unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
a80b95ba
TG
134 kern_return_t ret;
135
136 ret = thread_get_state
cf9bb588 137 (current_thread, x86_FLOAT_STATE32, (thread_state_t) &fp_regs,
a80b95ba
TG
138 &fp_count);
139 if (ret != KERN_SUCCESS)
140 {
1777feb0 141 printf_unfiltered (_("Error calling thread_get_state for "
17092398
TG
142 "float registers for thread 0x%lx\n"),
143 (unsigned long) current_thread);
a80b95ba
TG
144 MACH_CHECK_ERROR (ret);
145 }
146 i387_supply_fxsave (regcache, -1, &fp_regs.__fpu_fcw);
147 fetched++;
148 }
149 }
150
151 if (! fetched)
152 {
153 warning (_("unknown register %d"), regno);
154 regcache_raw_supply (regcache, regno, NULL);
155 }
156}
157
158/* Store our register values back into the inferior.
159 If REGNO is -1, do this for all registers.
160 Otherwise, REGNO specifies which register (so we can save time). */
161
162static void
28439f5e
PA
163i386_darwin_store_inferior_registers (struct target_ops *ops,
164 struct regcache *regcache, int regno)
a80b95ba
TG
165{
166 thread_t current_thread = ptid_get_tid (inferior_ptid);
167 struct gdbarch *gdbarch = get_regcache_arch (regcache);
168
5cd226f2 169#ifdef BFD64
a80b95ba
TG
170 if (gdbarch_ptr_bit (gdbarch) == 64)
171 {
172 if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
173 {
174 x86_thread_state_t gp_regs;
175 kern_return_t ret;
176 unsigned int gp_count = x86_THREAD_STATE_COUNT;
177
178 ret = thread_get_state
179 (current_thread, x86_THREAD_STATE, (thread_state_t) &gp_regs,
180 &gp_count);
181 MACH_CHECK_ERROR (ret);
182 gdb_assert (gp_regs.tsh.flavor == x86_THREAD_STATE64);
183 gdb_assert (gp_regs.tsh.count == x86_THREAD_STATE64_COUNT);
184
185 amd64_collect_native_gregset (regcache, &gp_regs.uts, regno);
186
187 ret = thread_set_state (current_thread, x86_THREAD_STATE,
188 (thread_state_t) &gp_regs,
189 x86_THREAD_STATE_COUNT);
190 MACH_CHECK_ERROR (ret);
191 }
192
193 if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
194 {
195 x86_float_state_t fp_regs;
196 kern_return_t ret;
197 unsigned int fp_count = x86_FLOAT_STATE_COUNT;
198
199 ret = thread_get_state
200 (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
201 &fp_count);
202 MACH_CHECK_ERROR (ret);
203 gdb_assert (fp_regs.fsh.flavor == x86_FLOAT_STATE64);
204 gdb_assert (fp_regs.fsh.count == x86_FLOAT_STATE64_COUNT);
205
46187dff 206 amd64_collect_fxsave (regcache, regno, &fp_regs.ufs.fs64.__fpu_fcw);
a80b95ba
TG
207
208 ret = thread_set_state (current_thread, x86_FLOAT_STATE,
209 (thread_state_t) & fp_regs,
210 x86_FLOAT_STATE_COUNT);
211 MACH_CHECK_ERROR (ret);
212 }
213 }
214 else
5cd226f2 215#endif
a80b95ba
TG
216 {
217 if (regno == -1 || regno < I386_NUM_GREGS)
218 {
cf9bb588 219 x86_thread_state32_t gp_regs;
a80b95ba 220 kern_return_t ret;
cf9bb588 221 unsigned int gp_count = x86_THREAD_STATE32_COUNT;
a80b95ba
TG
222 int i;
223
224 ret = thread_get_state
cf9bb588 225 (current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
a80b95ba
TG
226 &gp_count);
227 MACH_CHECK_ERROR (ret);
228
229 for (i = 0; i < I386_NUM_GREGS; i++)
230 if (regno == -1 || regno == i)
231 regcache_raw_collect
232 (regcache, i,
233 (char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);
234
cf9bb588
TG
235 ret = thread_set_state (current_thread, x86_THREAD_STATE32,
236 (thread_state_t) &gp_regs,
237 x86_THREAD_STATE32_COUNT);
a80b95ba
TG
238 MACH_CHECK_ERROR (ret);
239 }
240
241 if (regno == -1
242 || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
243 {
cf9bb588
TG
244 x86_float_state32_t fp_regs;
245 unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
a80b95ba
TG
246 kern_return_t ret;
247
248 ret = thread_get_state
cf9bb588 249 (current_thread, x86_FLOAT_STATE32, (thread_state_t) & fp_regs,
a80b95ba
TG
250 &fp_count);
251 MACH_CHECK_ERROR (ret);
252
253 i387_collect_fxsave (regcache, regno, &fp_regs.__fpu_fcw);
254
cf9bb588
TG
255 ret = thread_set_state (current_thread, x86_FLOAT_STATE32,
256 (thread_state_t) &fp_regs,
257 x86_FLOAT_STATE32_COUNT);
a80b95ba
TG
258 MACH_CHECK_ERROR (ret);
259 }
260 }
261}
262
a80b95ba
TG
263/* Support for debug registers, boosted mostly from i386-linux-nat.c. */
264
a80b95ba
TG
265static void
266i386_darwin_dr_set (int regnum, uint32_t value)
267{
268 int current_pid;
269 thread_t current_thread;
270 x86_debug_state_t dr_regs;
271 kern_return_t ret;
61d82a0d 272 unsigned int dr_count;
a80b95ba
TG
273
274 gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
275
276 current_thread = ptid_get_tid (inferior_ptid);
277
61d82a0d
TG
278 dr_regs.dsh.flavor = x86_DEBUG_STATE;
279 dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
a80b95ba 280 dr_count = x86_DEBUG_STATE_COUNT;
61d82a0d 281 ret = thread_get_state (current_thread, x86_DEBUG_STATE,
a80b95ba
TG
282 (thread_state_t) &dr_regs, &dr_count);
283
284 if (ret != KERN_SUCCESS)
285 {
1777feb0
MS
286 printf_unfiltered (_("Error reading debug registers "
287 "thread 0x%x via thread_get_state\n"),
288 (int) current_thread);
a80b95ba
TG
289 MACH_CHECK_ERROR (ret);
290 }
291
61d82a0d 292 switch (dr_regs.dsh.flavor)
a80b95ba 293 {
61d82a0d
TG
294 case x86_DEBUG_STATE32:
295 switch (regnum)
296 {
297 case 0:
298 dr_regs.uds.ds32.__dr0 = value;
299 break;
300 case 1:
301 dr_regs.uds.ds32.__dr1 = value;
302 break;
303 case 2:
304 dr_regs.uds.ds32.__dr2 = value;
305 break;
306 case 3:
307 dr_regs.uds.ds32.__dr3 = value;
308 break;
309 case 4:
310 dr_regs.uds.ds32.__dr4 = value;
311 break;
312 case 5:
313 dr_regs.uds.ds32.__dr5 = value;
314 break;
315 case 6:
316 dr_regs.uds.ds32.__dr6 = value;
317 break;
318 case 7:
319 dr_regs.uds.ds32.__dr7 = value;
320 break;
321 }
322 break;
323#ifdef BFD64
324 case x86_DEBUG_STATE64:
325 switch (regnum)
326 {
327 case 0:
328 dr_regs.uds.ds64.__dr0 = value;
329 break;
330 case 1:
331 dr_regs.uds.ds64.__dr1 = value;
332 break;
333 case 2:
334 dr_regs.uds.ds64.__dr2 = value;
335 break;
336 case 3:
337 dr_regs.uds.ds64.__dr3 = value;
338 break;
339 case 4:
340 dr_regs.uds.ds64.__dr4 = value;
341 break;
342 case 5:
343 dr_regs.uds.ds64.__dr5 = value;
344 break;
345 case 6:
346 dr_regs.uds.ds64.__dr6 = value;
347 break;
348 case 7:
349 dr_regs.uds.ds64.__dr7 = value;
350 break;
351 }
352 break;
353#endif
a80b95ba
TG
354 }
355
61d82a0d 356 ret = thread_set_state (current_thread, x86_DEBUG_STATE,
a80b95ba
TG
357 (thread_state_t) &dr_regs, dr_count);
358
359 if (ret != KERN_SUCCESS)
360 {
1777feb0
MS
361 printf_unfiltered (_("Error writing debug registers "
362 "thread 0x%x via thread_get_state\n"),
363 (int) current_thread);
a80b95ba
TG
364 MACH_CHECK_ERROR (ret);
365 }
366}
367
368static uint32_t
369i386_darwin_dr_get (int regnum)
370{
371 thread_t current_thread;
372 x86_debug_state_t dr_regs;
373 kern_return_t ret;
61d82a0d 374 unsigned int dr_count;
a80b95ba
TG
375
376 gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
377
378 current_thread = ptid_get_tid (inferior_ptid);
379
61d82a0d
TG
380 dr_regs.dsh.flavor = x86_DEBUG_STATE;
381 dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
a80b95ba 382 dr_count = x86_DEBUG_STATE_COUNT;
61d82a0d 383 ret = thread_get_state (current_thread, x86_DEBUG_STATE,
a80b95ba
TG
384 (thread_state_t) &dr_regs, &dr_count);
385
386 if (ret != KERN_SUCCESS)
387 {
1777feb0
MS
388 printf_unfiltered (_("Error reading debug registers "
389 "thread 0x%x via thread_get_state\n"),
390 (int) current_thread);
a80b95ba
TG
391 MACH_CHECK_ERROR (ret);
392 }
393
61d82a0d 394 switch (dr_regs.dsh.flavor)
a80b95ba 395 {
61d82a0d
TG
396 case x86_DEBUG_STATE32:
397 switch (regnum)
398 {
399 case 0:
400 return dr_regs.uds.ds32.__dr0;
401 case 1:
402 return dr_regs.uds.ds32.__dr1;
403 case 2:
404 return dr_regs.uds.ds32.__dr2;
405 case 3:
406 return dr_regs.uds.ds32.__dr3;
407 case 4:
408 return dr_regs.uds.ds32.__dr4;
409 case 5:
410 return dr_regs.uds.ds32.__dr5;
411 case 6:
412 return dr_regs.uds.ds32.__dr6;
413 case 7:
414 return dr_regs.uds.ds32.__dr7;
415 default:
416 return -1;
417 }
418 break;
419#ifdef BFD64
420 case x86_DEBUG_STATE64:
421 switch (regnum)
422 {
423 case 0:
424 return dr_regs.uds.ds64.__dr0;
425 case 1:
426 return dr_regs.uds.ds64.__dr1;
427 case 2:
428 return dr_regs.uds.ds64.__dr2;
429 case 3:
430 return dr_regs.uds.ds64.__dr3;
431 case 4:
432 return dr_regs.uds.ds64.__dr4;
433 case 5:
434 return dr_regs.uds.ds64.__dr5;
435 case 6:
436 return dr_regs.uds.ds64.__dr6;
437 case 7:
438 return dr_regs.uds.ds64.__dr7;
439 default:
440 return -1;
441 }
442 break;
443#endif
444 default:
445 return -1;
a80b95ba
TG
446 }
447}
448
61d82a0d 449static void
a80b95ba
TG
450i386_darwin_dr_set_control (unsigned long control)
451{
452 i386_darwin_dr_set (DR_CONTROL, control);
453}
454
61d82a0d 455static void
a80b95ba
TG
456i386_darwin_dr_set_addr (int regnum, CORE_ADDR addr)
457{
458 gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR);
459
460 i386_darwin_dr_set (DR_FIRSTADDR + regnum, addr);
461}
462
61d82a0d 463static CORE_ADDR
7b50312a 464i386_darwin_dr_get_addr (int regnum)
a80b95ba 465{
7b50312a 466 return i386_darwin_dr_get (regnum);
a80b95ba
TG
467}
468
61d82a0d 469static unsigned long
a80b95ba
TG
470i386_darwin_dr_get_status (void)
471{
472 return i386_darwin_dr_get (DR_STATUS);
473}
474
61d82a0d 475static unsigned long
7b50312a
PA
476i386_darwin_dr_get_control (void)
477{
478 return i386_darwin_dr_get (DR_CONTROL);
479}
480
a80b95ba
TG
481void
482darwin_check_osabi (darwin_inferior *inf, thread_t thread)
483{
f5656ead 484 if (gdbarch_osabi (target_gdbarch ()) == GDB_OSABI_UNKNOWN)
a80b95ba
TG
485 {
486 /* Attaching to a process. Let's figure out what kind it is. */
487 x86_thread_state_t gp_regs;
488 struct gdbarch_info info;
489 unsigned int gp_count = x86_THREAD_STATE_COUNT;
490 kern_return_t ret;
491
492 ret = thread_get_state (thread, x86_THREAD_STATE,
493 (thread_state_t) &gp_regs, &gp_count);
494 if (ret != KERN_SUCCESS)
495 {
496 MACH_CHECK_ERROR (ret);
497 return;
498 }
499
500 gdbarch_info_init (&info);
501 gdbarch_info_fill (&info);
f5656ead 502 info.byte_order = gdbarch_byte_order (target_gdbarch ());
a80b95ba
TG
503 info.osabi = GDB_OSABI_DARWIN;
504 if (gp_regs.tsh.flavor == x86_THREAD_STATE64)
505 info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
506 bfd_mach_x86_64);
507 else
61d82a0d 508 info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
a80b95ba
TG
509 bfd_mach_i386_i386);
510 gdbarch_update_p (info);
511 }
512}
513
514#define X86_EFLAGS_T 0x100UL
515
acdb24a9
TG
516/* Returning from a signal trampoline is done by calling a
517 special system call (sigreturn). This system call
518 restores the registers that were saved when the signal was
519 raised, including %eflags/%rflags. That means that single-stepping
520 won't work. Instead, we'll have to modify the signal context
521 that's about to be restored, and set the trace flag there. */
522
523static int
524i386_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
525{
f5656ead 526 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
acdb24a9
TG
527 static const gdb_byte darwin_syscall[] = { 0xcd, 0x80 }; /* int 0x80 */
528 gdb_byte buf[sizeof (darwin_syscall)];
529
530 /* Check if PC is at a sigreturn system call. */
531 if (target_read_memory (regs->uts.ts32.__eip, buf, sizeof (buf)) == 0
532 && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
533 && regs->uts.ts32.__eax == 0xb8 /* SYS_sigreturn */)
534 {
535 ULONGEST uctx_addr;
536 ULONGEST mctx_addr;
537 ULONGEST flags_addr;
538 unsigned int eflags;
539
e17a4113
UW
540 uctx_addr = read_memory_unsigned_integer
541 (regs->uts.ts32.__esp + 4, 4, byte_order);
542 mctx_addr = read_memory_unsigned_integer
543 (uctx_addr + 28, 4, byte_order);
acdb24a9
TG
544
545 flags_addr = mctx_addr + 12 + 9 * 4;
546 read_memory (flags_addr, (gdb_byte *) &eflags, 4);
547 eflags |= X86_EFLAGS_T;
548 write_memory (flags_addr, (gdb_byte *) &eflags, 4);
549
550 return 1;
551 }
552 return 0;
553}
554
5cd226f2 555#ifdef BFD64
acdb24a9
TG
556static int
557amd64_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
558{
f5656ead 559 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
acdb24a9
TG
560 static const gdb_byte darwin_syscall[] = { 0x0f, 0x05 }; /* syscall */
561 gdb_byte buf[sizeof (darwin_syscall)];
562
563 /* Check if PC is at a sigreturn system call. */
564 if (target_read_memory (regs->uts.ts64.__rip, buf, sizeof (buf)) == 0
565 && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
566 && (regs->uts.ts64.__rax & 0xffffffff) == 0x20000b8 /* SYS_sigreturn */)
567 {
568 ULONGEST mctx_addr;
569 ULONGEST flags_addr;
570 unsigned int rflags;
571
e17a4113
UW
572 mctx_addr = read_memory_unsigned_integer
573 (regs->uts.ts64.__rdi + 48, 8, byte_order);
acdb24a9
TG
574 flags_addr = mctx_addr + 16 + 17 * 8;
575
576 /* AMD64 is little endian. */
577 read_memory (flags_addr, (gdb_byte *) &rflags, 4);
578 rflags |= X86_EFLAGS_T;
579 write_memory (flags_addr, (gdb_byte *) &rflags, 4);
580
581 return 1;
582 }
583 return 0;
584}
5cd226f2 585#endif
acdb24a9 586
a80b95ba
TG
587void
588darwin_set_sstep (thread_t thread, int enable)
589{
590 x86_thread_state_t regs;
591 unsigned int count = x86_THREAD_STATE_COUNT;
592 kern_return_t kret;
593
594 kret = thread_get_state (thread, x86_THREAD_STATE,
595 (thread_state_t) &regs, &count);
596 if (kret != KERN_SUCCESS)
597 {
598 printf_unfiltered (_("darwin_set_sstep: error %x, thread=%x\n"),
599 kret, thread);
600 return;
601 }
acdb24a9 602
a80b95ba
TG
603 switch (regs.tsh.flavor)
604 {
605 case x86_THREAD_STATE32:
606 {
607 __uint32_t bit = enable ? X86_EFLAGS_T : 0;
608
acdb24a9
TG
609 if (enable && i386_darwin_sstep_at_sigreturn (&regs))
610 return;
a80b95ba
TG
611 if ((regs.uts.ts32.__eflags & X86_EFLAGS_T) == bit)
612 return;
1777feb0
MS
613 regs.uts.ts32.__eflags
614 = (regs.uts.ts32.__eflags & ~X86_EFLAGS_T) | bit;
a80b95ba
TG
615 kret = thread_set_state (thread, x86_THREAD_STATE,
616 (thread_state_t) &regs, count);
617 MACH_CHECK_ERROR (kret);
618 }
619 break;
5cd226f2 620#ifdef BFD64
a80b95ba
TG
621 case x86_THREAD_STATE64:
622 {
623 __uint64_t bit = enable ? X86_EFLAGS_T : 0;
624
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TG
625 if (enable && amd64_darwin_sstep_at_sigreturn (&regs))
626 return;
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TG
627 if ((regs.uts.ts64.__rflags & X86_EFLAGS_T) == bit)
628 return;
1777feb0
MS
629 regs.uts.ts64.__rflags
630 = (regs.uts.ts64.__rflags & ~X86_EFLAGS_T) | bit;
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TG
631 kret = thread_set_state (thread, x86_THREAD_STATE,
632 (thread_state_t) &regs, count);
633 MACH_CHECK_ERROR (kret);
634 }
635 break;
5cd226f2 636#endif
a80b95ba 637 default:
b37520b6 638 error (_("darwin_set_sstep: unknown flavour: %d"), regs.tsh.flavor);
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TG
639 }
640}
641
642void
643darwin_complete_target (struct target_ops *target)
644{
5cd226f2 645#ifdef BFD64
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TG
646 amd64_native_gregset64_reg_offset = amd64_darwin_thread_state_reg_offset;
647 amd64_native_gregset64_num_regs = amd64_darwin_thread_state_num_regs;
648 amd64_native_gregset32_reg_offset = i386_darwin_thread_state_reg_offset;
649 amd64_native_gregset32_num_regs = i386_darwin_thread_state_num_regs;
5cd226f2 650#endif
a80b95ba 651
61d82a0d
TG
652 i386_use_watchpoints (target);
653
654 i386_dr_low.set_control = i386_darwin_dr_set_control;
655 i386_dr_low.set_addr = i386_darwin_dr_set_addr;
656 i386_dr_low.get_addr = i386_darwin_dr_get_addr;
657 i386_dr_low.get_status = i386_darwin_dr_get_status;
658 i386_dr_low.get_control = i386_darwin_dr_get_control;
659
660 /* Let's assume that the kernel is 64 bits iff the executable is. */
661#ifdef __x86_64__
662 i386_set_debug_register_length (8);
663#else
664 i386_set_debug_register_length (4);
665#endif
666
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TG
667 target->to_fetch_registers = i386_darwin_fetch_inferior_registers;
668 target->to_store_registers = i386_darwin_store_inferior_registers;
669}
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