[deliverable/binutils-gdb.git] / gdb / i386-darwin-nat.c

/* Darwin support for GDB, the GNU debugger.
   Copyright (C) 1997-2017 Free Software Foundation, Inc.

   Contributed by Apple Computer, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#include "defs.h"
#include "frame.h"
#include "inferior.h"
#include "target.h"
#include "symfile.h"
#include "symtab.h"
#include "objfiles.h"
#include "gdbcmd.h"
#include "regcache.h"
#include "i386-tdep.h"
#include "i387-tdep.h"
#include "gdbarch.h"
#include "arch-utils.h"
#include "gdbcore.h"

#include "x86-nat.h"
#include "darwin-nat.h"
#include "i386-darwin-tdep.h"

#ifdef BFD64
#include "amd64-nat.h"
#include "amd64-tdep.h"
#include "amd64-darwin-tdep.h"
#endif

/* Read register values from the inferior process.
   If REGNO is -1, do this for all registers.
   Otherwise, REGNO specifies which register (so we can save time).  */
static void
i386_darwin_fetch_inferior_registers (struct target_ops *ops,
				      struct regcache *regcache, int regno)
{
  thread_t current_thread = ptid_get_tid (regcache_get_ptid (regcache));
  int fetched = 0;
  struct gdbarch *gdbarch = get_regcache_arch (regcache);

#ifdef BFD64
  if (gdbarch_ptr_bit (gdbarch) == 64)
    {
      if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
        {
          x86_thread_state_t gp_regs;
          unsigned int gp_count = x86_THREAD_STATE_COUNT;
          kern_return_t ret;

	  ret = thread_get_state
            (current_thread, x86_THREAD_STATE, (thread_state_t) & gp_regs,
             &gp_count);
	  if (ret != KERN_SUCCESS)
	    {
	      printf_unfiltered (_("Error calling thread_get_state for "
				   "GP registers for thread 0x%lx\n"),
				 (unsigned long) current_thread);
	      MACH_CHECK_ERROR (ret);
	    }

	  /* Some kernels don't sanitize the values.  */
	  gp_regs.uts.ts64.__fs &= 0xffff;
	  gp_regs.uts.ts64.__gs &= 0xffff;

	  amd64_supply_native_gregset (regcache, &gp_regs.uts, -1);
          fetched++;
        }

      if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
        {
          x86_float_state_t fp_regs;
          unsigned int fp_count = x86_FLOAT_STATE_COUNT;
          kern_return_t ret;

	  ret = thread_get_state
            (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
             &fp_count);
	  if (ret != KERN_SUCCESS)
	    {
	      printf_unfiltered (_("Error calling thread_get_state for "
				   "float registers for thread 0x%lx\n"),
				 (unsigned long) current_thread);
	      MACH_CHECK_ERROR (ret);
	    }
          amd64_supply_fxsave (regcache, -1, &fp_regs.ufs.fs64.__fpu_fcw);
          fetched++;
        }
    }
  else
#endif
    {
      if (regno == -1 || regno < I386_NUM_GREGS)
        {
          x86_thread_state32_t gp_regs;
          unsigned int gp_count = x86_THREAD_STATE32_COUNT;
          kern_return_t ret;
	  int i;

	  ret = thread_get_state
            (current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
             &gp_count);
	  if (ret != KERN_SUCCESS)
	    {
	      printf_unfiltered (_("Error calling thread_get_state for "
				   "GP registers for thread 0x%lx\n"),
				 (unsigned long) current_thread);
	      MACH_CHECK_ERROR (ret);
	    }
	  for (i = 0; i < I386_NUM_GREGS; i++)
	    regcache_raw_supply
	      (regcache, i,
	       (char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);

          fetched++;
        }

      if (regno == -1
	  || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
        {
          x86_float_state32_t fp_regs;
          unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
          kern_return_t ret;

	  ret = thread_get_state
            (current_thread, x86_FLOAT_STATE32, (thread_state_t) &fp_regs,
             &fp_count);
	  if (ret != KERN_SUCCESS)
	    {
	      printf_unfiltered (_("Error calling thread_get_state for "
				   "float registers for thread 0x%lx\n"),
				 (unsigned long) current_thread);
	      MACH_CHECK_ERROR (ret);
	    }
          i387_supply_fxsave (regcache, -1, &fp_regs.__fpu_fcw);
          fetched++;
        }
    }

  if (! fetched)
    {
      warning (_("unknown register %d"), regno);
      regcache_raw_supply (regcache, regno, NULL);
    }
}

/* Store our register values back into the inferior.
   If REGNO is -1, do this for all registers.
   Otherwise, REGNO specifies which register (so we can save time).  */

static void
i386_darwin_store_inferior_registers (struct target_ops *ops,
				      struct regcache *regcache, int regno)
{
  thread_t current_thread = ptid_get_tid (regcache_get_ptid (regcache));
  struct gdbarch *gdbarch = get_regcache_arch (regcache);

#ifdef BFD64
  if (gdbarch_ptr_bit (gdbarch) == 64)
    {
      if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
        {
          x86_thread_state_t gp_regs;
          kern_return_t ret;
	  unsigned int gp_count = x86_THREAD_STATE_COUNT;

	  ret = thread_get_state
	    (current_thread, x86_THREAD_STATE, (thread_state_t) &gp_regs,
	     &gp_count);
          MACH_CHECK_ERROR (ret);
	  gdb_assert (gp_regs.tsh.flavor == x86_THREAD_STATE64);
          gdb_assert (gp_regs.tsh.count == x86_THREAD_STATE64_COUNT);

	  amd64_collect_native_gregset (regcache, &gp_regs.uts, regno);

	  /* Some kernels don't sanitize the values.  */
	  gp_regs.uts.ts64.__fs &= 0xffff;
	  gp_regs.uts.ts64.__gs &= 0xffff;

          ret = thread_set_state (current_thread, x86_THREAD_STATE,
                                  (thread_state_t) &gp_regs,
                                  x86_THREAD_STATE_COUNT);
          MACH_CHECK_ERROR (ret);
        }

      if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
        {
          x86_float_state_t fp_regs;
          kern_return_t ret;
	  unsigned int fp_count = x86_FLOAT_STATE_COUNT;

	  ret = thread_get_state
	    (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
	     &fp_count);
          MACH_CHECK_ERROR (ret);
          gdb_assert (fp_regs.fsh.flavor == x86_FLOAT_STATE64);
          gdb_assert (fp_regs.fsh.count == x86_FLOAT_STATE64_COUNT);

	  amd64_collect_fxsave (regcache, regno, &fp_regs.ufs.fs64.__fpu_fcw);

	  ret = thread_set_state (current_thread, x86_FLOAT_STATE,
				  (thread_state_t) & fp_regs,
				  x86_FLOAT_STATE_COUNT);
	  MACH_CHECK_ERROR (ret);
        }
    }
  else
#endif
    {
      if (regno == -1 || regno < I386_NUM_GREGS)
        {
          x86_thread_state32_t gp_regs;
          kern_return_t ret;
          unsigned int gp_count = x86_THREAD_STATE32_COUNT;
	  int i;

          ret = thread_get_state
            (current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
             &gp_count);
	  MACH_CHECK_ERROR (ret);

	  for (i = 0; i < I386_NUM_GREGS; i++)
	    if (regno == -1 || regno == i)
	      regcache_raw_collect
		(regcache, i,
		 (char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);

          ret = thread_set_state (current_thread, x86_THREAD_STATE32,
                                  (thread_state_t) &gp_regs,
                                  x86_THREAD_STATE32_COUNT);
          MACH_CHECK_ERROR (ret);
        }

      if (regno == -1
	  || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
        {
          x86_float_state32_t fp_regs;
          unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
          kern_return_t ret;

	  ret = thread_get_state
            (current_thread, x86_FLOAT_STATE32, (thread_state_t) & fp_regs,
             &fp_count);
	  MACH_CHECK_ERROR (ret);

	  i387_collect_fxsave (regcache, regno, &fp_regs.__fpu_fcw);

	  ret = thread_set_state (current_thread, x86_FLOAT_STATE32,
				  (thread_state_t) &fp_regs,
				  x86_FLOAT_STATE32_COUNT);
	  MACH_CHECK_ERROR (ret);
        }
    }
}

/* Support for debug registers, boosted mostly from i386-linux-nat.c.  */

static void
i386_darwin_dr_set (int regnum, CORE_ADDR value)
{
  int current_pid;
  thread_t current_thread;
  x86_debug_state_t dr_regs;
  kern_return_t ret;
  unsigned int dr_count;

  gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);

  current_thread = ptid_get_tid (inferior_ptid);

  dr_regs.dsh.flavor = x86_DEBUG_STATE;
  dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
  dr_count = x86_DEBUG_STATE_COUNT;
  ret = thread_get_state (current_thread, x86_DEBUG_STATE,
                          (thread_state_t) &dr_regs, &dr_count);
  MACH_CHECK_ERROR (ret);

  switch (dr_regs.dsh.flavor)
    {
    case x86_DEBUG_STATE32:
      switch (regnum)
	{
	case 0:
	  dr_regs.uds.ds32.__dr0 = value;
	  break;
	case 1:
	  dr_regs.uds.ds32.__dr1 = value;
	  break;
	case 2:
	  dr_regs.uds.ds32.__dr2 = value;
	  break;
	case 3:
	  dr_regs.uds.ds32.__dr3 = value;
	  break;
	case 4:
	  dr_regs.uds.ds32.__dr4 = value;
	  break;
	case 5:
	  dr_regs.uds.ds32.__dr5 = value;
	  break;
	case 6:
	  dr_regs.uds.ds32.__dr6 = value;
	  break;
	case 7:
	  dr_regs.uds.ds32.__dr7 = value;
	  break;
	}
      break;
#ifdef BFD64
    case x86_DEBUG_STATE64:
      switch (regnum)
	{
	case 0:
	  dr_regs.uds.ds64.__dr0 = value;
	  break;
	case 1:
	  dr_regs.uds.ds64.__dr1 = value;
	  break;
	case 2:
	  dr_regs.uds.ds64.__dr2 = value;
	  break;
	case 3:
	  dr_regs.uds.ds64.__dr3 = value;
	  break;
	case 4:
	  dr_regs.uds.ds64.__dr4 = value;
	  break;
	case 5:
	  dr_regs.uds.ds64.__dr5 = value;
	  break;
	case 6:
	  dr_regs.uds.ds64.__dr6 = value;
	  break;
	case 7:
	  dr_regs.uds.ds64.__dr7 = value;
	  break;
	}
      break;
#endif
    }

  ret = thread_set_state (current_thread, dr_regs.dsh.flavor,
                          (thread_state_t) &dr_regs.uds, dr_count);

  MACH_CHECK_ERROR (ret);
}

static CORE_ADDR
i386_darwin_dr_get (int regnum)
{
  thread_t current_thread;
  x86_debug_state_t dr_regs;
  kern_return_t ret;
  unsigned int dr_count;

  gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);

  current_thread = ptid_get_tid (inferior_ptid);

  dr_regs.dsh.flavor = x86_DEBUG_STATE;
  dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
  dr_count = x86_DEBUG_STATE_COUNT;
  ret = thread_get_state (current_thread, x86_DEBUG_STATE,
                          (thread_state_t) &dr_regs, &dr_count);
  MACH_CHECK_ERROR (ret);

  switch (dr_regs.dsh.flavor)
    {
    case x86_DEBUG_STATE32:
      switch (regnum)
	{
	case 0:
	  return dr_regs.uds.ds32.__dr0;
	case 1:
	  return dr_regs.uds.ds32.__dr1;
	case 2:
	  return dr_regs.uds.ds32.__dr2;
	case 3:
	  return dr_regs.uds.ds32.__dr3;
	case 4:
	  return dr_regs.uds.ds32.__dr4;
	case 5:
	  return dr_regs.uds.ds32.__dr5;
	case 6:
	  return dr_regs.uds.ds32.__dr6;
	case 7:
	  return dr_regs.uds.ds32.__dr7;
	default:
	  return -1;
	}
      break;
#ifdef BFD64
    case x86_DEBUG_STATE64:
      switch (regnum)
	{
	case 0:
	  return dr_regs.uds.ds64.__dr0;
	case 1:
	  return dr_regs.uds.ds64.__dr1;
	case 2:
	  return dr_regs.uds.ds64.__dr2;
	case 3:
	  return dr_regs.uds.ds64.__dr3;
	case 4:
	  return dr_regs.uds.ds64.__dr4;
	case 5:
	  return dr_regs.uds.ds64.__dr5;
	case 6:
	  return dr_regs.uds.ds64.__dr6;
	case 7:
	  return dr_regs.uds.ds64.__dr7;
	default:
	  return -1;
	}
      break;
#endif
    default:
      return -1;
    }
}

static void
i386_darwin_dr_set_control (unsigned long control)
{
  i386_darwin_dr_set (DR_CONTROL, control);
}

static void
i386_darwin_dr_set_addr (int regnum, CORE_ADDR addr)
{
  gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR);

  i386_darwin_dr_set (DR_FIRSTADDR + regnum, addr);
}

static CORE_ADDR
i386_darwin_dr_get_addr (int regnum)
{
  return i386_darwin_dr_get (regnum);
}

static unsigned long
i386_darwin_dr_get_status (void)
{
  return i386_darwin_dr_get (DR_STATUS);
}

static unsigned long
i386_darwin_dr_get_control (void)
{
  return i386_darwin_dr_get (DR_CONTROL);
}

void
darwin_check_osabi (darwin_inferior *inf, thread_t thread)
{
  if (gdbarch_osabi (target_gdbarch ()) == GDB_OSABI_UNKNOWN)
    {
      /* Attaching to a process.  Let's figure out what kind it is.  */
      x86_thread_state_t gp_regs;
      struct gdbarch_info info;
      unsigned int gp_count = x86_THREAD_STATE_COUNT;
      kern_return_t ret;

      ret = thread_get_state (thread, x86_THREAD_STATE,
			      (thread_state_t) &gp_regs, &gp_count);
      if (ret != KERN_SUCCESS)
	{
	  MACH_CHECK_ERROR (ret);
	  return;
	}

      gdbarch_info_init (&info);
      gdbarch_info_fill (&info);
      info.byte_order = gdbarch_byte_order (target_gdbarch ());
      info.osabi = GDB_OSABI_DARWIN;
      if (gp_regs.tsh.flavor == x86_THREAD_STATE64)
	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
					      bfd_mach_x86_64);
      else
	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
					      bfd_mach_i386_i386);
      gdbarch_update_p (info);
    }
}

#define X86_EFLAGS_T 0x100UL

/* Returning from a signal trampoline is done by calling a
   special system call (sigreturn).  This system call
   restores the registers that were saved when the signal was
   raised, including %eflags/%rflags.  That means that single-stepping
   won't work.  Instead, we'll have to modify the signal context
   that's about to be restored, and set the trace flag there.  */

static int
i386_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
{
  enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
  static const gdb_byte darwin_syscall[] = { 0xcd, 0x80 }; /* int 0x80 */
  gdb_byte buf[sizeof (darwin_syscall)];

  /* Check if PC is at a sigreturn system call.  */
  if (target_read_memory (regs->uts.ts32.__eip, buf, sizeof (buf)) == 0
      && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
      && regs->uts.ts32.__eax == 0xb8 /* SYS_sigreturn */)
    {
      ULONGEST uctx_addr;
      ULONGEST mctx_addr;
      ULONGEST flags_addr;
      unsigned int eflags;

      uctx_addr = read_memory_unsigned_integer
		    (regs->uts.ts32.__esp + 4, 4, byte_order);
      mctx_addr = read_memory_unsigned_integer
		    (uctx_addr + 28, 4, byte_order);

      flags_addr = mctx_addr + 12 + 9 * 4;
      read_memory (flags_addr, (gdb_byte *) &eflags, 4);
      eflags |= X86_EFLAGS_T;
      write_memory (flags_addr, (gdb_byte *) &eflags, 4);

      return 1;
    }
  return 0;
}

#ifdef BFD64
static int
amd64_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
{
  enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
  static const gdb_byte darwin_syscall[] = { 0x0f, 0x05 }; /* syscall */
  gdb_byte buf[sizeof (darwin_syscall)];

  /* Check if PC is at a sigreturn system call.  */
  if (target_read_memory (regs->uts.ts64.__rip, buf, sizeof (buf)) == 0
      && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
      && (regs->uts.ts64.__rax & 0xffffffff) == 0x20000b8 /* SYS_sigreturn */)
    {
      ULONGEST mctx_addr;
      ULONGEST flags_addr;
      unsigned int rflags;

      mctx_addr = read_memory_unsigned_integer
		    (regs->uts.ts64.__rdi + 48, 8, byte_order);
      flags_addr = mctx_addr + 16 + 17 * 8;

      /* AMD64 is little endian.  */
      read_memory (flags_addr, (gdb_byte *) &rflags, 4);
      rflags |= X86_EFLAGS_T;
      write_memory (flags_addr, (gdb_byte *) &rflags, 4);

      return 1;
    }
  return 0;
}
#endif

void
darwin_set_sstep (thread_t thread, int enable)
{
  x86_thread_state_t regs;
  unsigned int count = x86_THREAD_STATE_COUNT;
  kern_return_t kret;

  kret = thread_get_state (thread, x86_THREAD_STATE,
			   (thread_state_t) &regs, &count);
  if (kret != KERN_SUCCESS)
    {
      printf_unfiltered (_("darwin_set_sstep: error %x, thread=%x\n"),
			 kret, thread);
      return;
    }

  switch (regs.tsh.flavor)
    {
    case x86_THREAD_STATE32:
      {
	__uint32_t bit = enable ? X86_EFLAGS_T : 0;

	if (enable && i386_darwin_sstep_at_sigreturn (&regs))
	  return;
	if ((regs.uts.ts32.__eflags & X86_EFLAGS_T) == bit)
	  return;
	regs.uts.ts32.__eflags
	  = (regs.uts.ts32.__eflags & ~X86_EFLAGS_T) | bit;
	kret = thread_set_state (thread, x86_THREAD_STATE,
				 (thread_state_t) &regs, count);
	MACH_CHECK_ERROR (kret);
      }
      break;
#ifdef BFD64
    case x86_THREAD_STATE64:
      {
	__uint64_t bit = enable ? X86_EFLAGS_T : 0;

	if (enable && amd64_darwin_sstep_at_sigreturn (&regs))
	  return;
	if ((regs.uts.ts64.__rflags & X86_EFLAGS_T) == bit)
	  return;
	regs.uts.ts64.__rflags
	  = (regs.uts.ts64.__rflags & ~X86_EFLAGS_T) | bit;
	kret = thread_set_state (thread, x86_THREAD_STATE,
				 (thread_state_t) &regs, count);
	MACH_CHECK_ERROR (kret);
      }
      break;
#endif
    default:
      error (_("darwin_set_sstep: unknown flavour: %d"), regs.tsh.flavor);
    }
}

void
darwin_complete_target (struct target_ops *target)
{
#ifdef BFD64
  amd64_native_gregset64_reg_offset = amd64_darwin_thread_state_reg_offset;
  amd64_native_gregset64_num_regs = amd64_darwin_thread_state_num_regs;
  amd64_native_gregset32_reg_offset = i386_darwin_thread_state_reg_offset;
  amd64_native_gregset32_num_regs = i386_darwin_thread_state_num_regs;
#endif

  x86_use_watchpoints (target);

  x86_dr_low.set_control = i386_darwin_dr_set_control;
  x86_dr_low.set_addr = i386_darwin_dr_set_addr;
  x86_dr_low.get_addr = i386_darwin_dr_get_addr;
  x86_dr_low.get_status = i386_darwin_dr_get_status;
  x86_dr_low.get_control = i386_darwin_dr_get_control;

  /* Let's assume that the kernel is 64 bits iff the executable is.  */
#ifdef __x86_64__
  x86_set_debug_register_length (8);
#else
  x86_set_debug_register_length (4);
#endif

  target->to_fetch_registers = i386_darwin_fetch_inferior_registers;
  target->to_store_registers = i386_darwin_store_inferior_registers;
}
Commit	Line	Data
a80b95ba	1	/* Darwin support for GDB, the GNU debugger.
61baf725	2	Copyright (C) 1997-2017 Free Software Foundation, Inc.
a80b95ba TG	3
	4	Contributed by Apple Computer, Inc.
	5
	6	This file is part of GDB.
	7
	8	This program is free software; you can redistribute it and/or modify
	9	it under the terms of the GNU General Public License as published by
	10	the Free Software Foundation; either version 3 of the License, or
	11	(at your option) any later version.
	12
	13	This program is distributed in the hope that it will be useful,
	14	but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
	19	along with this program. If not, see <http://www.gnu.org/licenses/>. */
	20
	21	#include "defs.h"
	22	#include "frame.h"
	23	#include "inferior.h"
	24	#include "target.h"
	25	#include "symfile.h"
	26	#include "symtab.h"
	27	#include "objfiles.h"
	28	#include "gdbcmd.h"
	29	#include "regcache.h"
a80b95ba	30	#include "i386-tdep.h"
a80b95ba TG	31	#include "i387-tdep.h"
	32	#include "gdbarch.h"
	33	#include "arch-utils.h"
acdb24a9	34	#include "gdbcore.h"
a80b95ba	35
df7e5265	36	#include "x86-nat.h"
a80b95ba TG	37	#include "darwin-nat.h"
	38	#include "i386-darwin-tdep.h"
	39
5cd226f2 TG	40	#ifdef BFD64
5cd226f2 TG	41	#include "amd64-nat.h"
46187dff	42	#include "amd64-tdep.h"
5cd226f2 TG	43	#include "amd64-darwin-tdep.h"
	44	#endif
	45
a80b95ba TG	46	/* Read register values from the inferior process.
	47	If REGNO is -1, do this for all registers.
	48	Otherwise, REGNO specifies which register (so we can save time). */
	49	static void
28439f5e PA	50	i386_darwin_fetch_inferior_registers (struct target_ops *ops,
28439f5e PA	51	struct regcache *regcache, int regno)
a80b95ba	52	{
1afaf9f4	53	thread_t current_thread = ptid_get_tid (regcache_get_ptid (regcache));
a80b95ba TG	54	int fetched = 0;
	55	struct gdbarch *gdbarch = get_regcache_arch (regcache);
	56
5cd226f2	57	#ifdef BFD64
a80b95ba TG	58	if (gdbarch_ptr_bit (gdbarch) == 64)
	59	{
	60	if (regno == -1 \|\| amd64_native_gregset_supplies_p (gdbarch, regno))
	61	{
	62	x86_thread_state_t gp_regs;
	63	unsigned int gp_count = x86_THREAD_STATE_COUNT;
	64	kern_return_t ret;
	65
	66	ret = thread_get_state
	67	(current_thread, x86_THREAD_STATE, (thread_state_t) & gp_regs,
	68	&gp_count);
	69	if (ret != KERN_SUCCESS)
	70	{
1777feb0	71	printf_unfiltered (_("Error calling thread_get_state for "
17092398	72	"GP registers for thread 0x%lx\n"),
016b7430	73	(unsigned long) current_thread);
a80b95ba TG	74	MACH_CHECK_ERROR (ret);
a80b95ba TG	75	}
89c7137f TG	76
	77	/* Some kernels don't sanitize the values. */
	78	gp_regs.uts.ts64.__fs &= 0xffff;
	79	gp_regs.uts.ts64.__gs &= 0xffff;
	80
a80b95ba TG	81	amd64_supply_native_gregset (regcache, &gp_regs.uts, -1);
	82	fetched++;
	83	}
	84
	85	if (regno == -1 \|\| !amd64_native_gregset_supplies_p (gdbarch, regno))
	86	{
	87	x86_float_state_t fp_regs;
	88	unsigned int fp_count = x86_FLOAT_STATE_COUNT;
	89	kern_return_t ret;
	90
	91	ret = thread_get_state
	92	(current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
	93	&fp_count);
	94	if (ret != KERN_SUCCESS)
	95	{
1777feb0	96	printf_unfiltered (_("Error calling thread_get_state for "
17092398	97	"float registers for thread 0x%lx\n"),
016b7430	98	(unsigned long) current_thread);
a80b95ba TG	99	MACH_CHECK_ERROR (ret);
a80b95ba TG	100	}
46187dff	101	amd64_supply_fxsave (regcache, -1, &fp_regs.ufs.fs64.__fpu_fcw);
a80b95ba TG	102	fetched++;
	103	}
	104	}
	105	else
5cd226f2	106	#endif
a80b95ba TG	107	{
	108	if (regno == -1 \|\| regno < I386_NUM_GREGS)
	109	{
cf9bb588 TG	110	x86_thread_state32_t gp_regs;
cf9bb588 TG	111	unsigned int gp_count = x86_THREAD_STATE32_COUNT;
a80b95ba TG	112	kern_return_t ret;
	113	int i;
	114
	115	ret = thread_get_state
cf9bb588	116	(current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
a80b95ba TG	117	&gp_count);
	118	if (ret != KERN_SUCCESS)
	119	{
1777feb0	120	printf_unfiltered (_("Error calling thread_get_state for "
17092398 TG	121	"GP registers for thread 0x%lx\n"),
17092398 TG	122	(unsigned long) current_thread);
a80b95ba TG	123	MACH_CHECK_ERROR (ret);
	124	}
	125	for (i = 0; i < I386_NUM_GREGS; i++)
	126	regcache_raw_supply
	127	(regcache, i,
	128	(char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);
	129
	130	fetched++;
	131	}
	132
	133	if (regno == -1
	134	\|\| (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
	135	{
cf9bb588 TG	136	x86_float_state32_t fp_regs;
cf9bb588 TG	137	unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
a80b95ba TG	138	kern_return_t ret;
	139
	140	ret = thread_get_state
cf9bb588	141	(current_thread, x86_FLOAT_STATE32, (thread_state_t) &fp_regs,
a80b95ba TG	142	&fp_count);
	143	if (ret != KERN_SUCCESS)
	144	{
1777feb0	145	printf_unfiltered (_("Error calling thread_get_state for "
17092398 TG	146	"float registers for thread 0x%lx\n"),
17092398 TG	147	(unsigned long) current_thread);
a80b95ba TG	148	MACH_CHECK_ERROR (ret);
	149	}
	150	i387_supply_fxsave (regcache, -1, &fp_regs.__fpu_fcw);
	151	fetched++;
	152	}
	153	}
	154
	155	if (! fetched)
	156	{
	157	warning (_("unknown register %d"), regno);
	158	regcache_raw_supply (regcache, regno, NULL);
	159	}
	160	}
	161
	162	/* Store our register values back into the inferior.
	163	If REGNO is -1, do this for all registers.
	164	Otherwise, REGNO specifies which register (so we can save time). */
	165
	166	static void
28439f5e PA	167	i386_darwin_store_inferior_registers (struct target_ops *ops,
28439f5e PA	168	struct regcache *regcache, int regno)
a80b95ba	169	{
1afaf9f4	170	thread_t current_thread = ptid_get_tid (regcache_get_ptid (regcache));
a80b95ba TG	171	struct gdbarch *gdbarch = get_regcache_arch (regcache);
a80b95ba TG	172
5cd226f2	173	#ifdef BFD64
a80b95ba TG	174	if (gdbarch_ptr_bit (gdbarch) == 64)
	175	{
	176	if (regno == -1 \|\| amd64_native_gregset_supplies_p (gdbarch, regno))
	177	{
	178	x86_thread_state_t gp_regs;
	179	kern_return_t ret;
	180	unsigned int gp_count = x86_THREAD_STATE_COUNT;
	181
	182	ret = thread_get_state
	183	(current_thread, x86_THREAD_STATE, (thread_state_t) &gp_regs,
	184	&gp_count);
	185	MACH_CHECK_ERROR (ret);
	186	gdb_assert (gp_regs.tsh.flavor == x86_THREAD_STATE64);
	187	gdb_assert (gp_regs.tsh.count == x86_THREAD_STATE64_COUNT);
	188
	189	amd64_collect_native_gregset (regcache, &gp_regs.uts, regno);
	190
89c7137f TG	191	/* Some kernels don't sanitize the values. */
	192	gp_regs.uts.ts64.__fs &= 0xffff;
	193	gp_regs.uts.ts64.__gs &= 0xffff;
	194
a80b95ba TG	195	ret = thread_set_state (current_thread, x86_THREAD_STATE,
	196	(thread_state_t) &gp_regs,
	197	x86_THREAD_STATE_COUNT);
	198	MACH_CHECK_ERROR (ret);
	199	}
	200
	201	if (regno == -1 \|\| !amd64_native_gregset_supplies_p (gdbarch, regno))
	202	{
	203	x86_float_state_t fp_regs;
	204	kern_return_t ret;
	205	unsigned int fp_count = x86_FLOAT_STATE_COUNT;
	206
	207	ret = thread_get_state
	208	(current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
	209	&fp_count);
	210	MACH_CHECK_ERROR (ret);
	211	gdb_assert (fp_regs.fsh.flavor == x86_FLOAT_STATE64);
	212	gdb_assert (fp_regs.fsh.count == x86_FLOAT_STATE64_COUNT);
	213
46187dff	214	amd64_collect_fxsave (regcache, regno, &fp_regs.ufs.fs64.__fpu_fcw);
a80b95ba TG	215
	216	ret = thread_set_state (current_thread, x86_FLOAT_STATE,
	217	(thread_state_t) & fp_regs,
	218	x86_FLOAT_STATE_COUNT);
	219	MACH_CHECK_ERROR (ret);
	220	}
	221	}
	222	else
5cd226f2	223	#endif
a80b95ba TG	224	{
	225	if (regno == -1 \|\| regno < I386_NUM_GREGS)
	226	{
cf9bb588	227	x86_thread_state32_t gp_regs;
a80b95ba	228	kern_return_t ret;
cf9bb588	229	unsigned int gp_count = x86_THREAD_STATE32_COUNT;
a80b95ba TG	230	int i;
	231
	232	ret = thread_get_state
cf9bb588	233	(current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
a80b95ba TG	234	&gp_count);
	235	MACH_CHECK_ERROR (ret);
	236
	237	for (i = 0; i < I386_NUM_GREGS; i++)
	238	if (regno == -1 \|\| regno == i)
	239	regcache_raw_collect
	240	(regcache, i,
	241	(char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);
	242
cf9bb588 TG	243	ret = thread_set_state (current_thread, x86_THREAD_STATE32,
	244	(thread_state_t) &gp_regs,
	245	x86_THREAD_STATE32_COUNT);
a80b95ba TG	246	MACH_CHECK_ERROR (ret);
	247	}
	248
	249	if (regno == -1
	250	\|\| (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
	251	{
cf9bb588 TG	252	x86_float_state32_t fp_regs;
cf9bb588 TG	253	unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
a80b95ba TG	254	kern_return_t ret;
	255
	256	ret = thread_get_state
cf9bb588	257	(current_thread, x86_FLOAT_STATE32, (thread_state_t) & fp_regs,
a80b95ba TG	258	&fp_count);
	259	MACH_CHECK_ERROR (ret);
	260
	261	i387_collect_fxsave (regcache, regno, &fp_regs.__fpu_fcw);
	262
cf9bb588 TG	263	ret = thread_set_state (current_thread, x86_FLOAT_STATE32,
	264	(thread_state_t) &fp_regs,
	265	x86_FLOAT_STATE32_COUNT);
a80b95ba TG	266	MACH_CHECK_ERROR (ret);
	267	}
	268	}
	269	}
	270
a80b95ba TG	271	/* Support for debug registers, boosted mostly from i386-linux-nat.c. */
a80b95ba TG	272
a80b95ba	273	static void
b1328b1b	274	i386_darwin_dr_set (int regnum, CORE_ADDR value)
a80b95ba TG	275	{
	276	int current_pid;
	277	thread_t current_thread;
	278	x86_debug_state_t dr_regs;
	279	kern_return_t ret;
61d82a0d	280	unsigned int dr_count;
a80b95ba TG	281
	282	gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
	283
	284	current_thread = ptid_get_tid (inferior_ptid);
	285
61d82a0d TG	286	dr_regs.dsh.flavor = x86_DEBUG_STATE;
61d82a0d TG	287	dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
a80b95ba	288	dr_count = x86_DEBUG_STATE_COUNT;
61d82a0d	289	ret = thread_get_state (current_thread, x86_DEBUG_STATE,
a80b95ba	290	(thread_state_t) &dr_regs, &dr_count);
b1328b1b	291	MACH_CHECK_ERROR (ret);
a80b95ba	292
61d82a0d	293	switch (dr_regs.dsh.flavor)
a80b95ba	294	{
61d82a0d TG	295	case x86_DEBUG_STATE32:
	296	switch (regnum)
	297	{
	298	case 0:
	299	dr_regs.uds.ds32.__dr0 = value;
	300	break;
	301	case 1:
	302	dr_regs.uds.ds32.__dr1 = value;
	303	break;
	304	case 2:
	305	dr_regs.uds.ds32.__dr2 = value;
	306	break;
	307	case 3:
	308	dr_regs.uds.ds32.__dr3 = value;
	309	break;
	310	case 4:
	311	dr_regs.uds.ds32.__dr4 = value;
	312	break;
	313	case 5:
	314	dr_regs.uds.ds32.__dr5 = value;
	315	break;
	316	case 6:
	317	dr_regs.uds.ds32.__dr6 = value;
	318	break;
	319	case 7:
	320	dr_regs.uds.ds32.__dr7 = value;
	321	break;
	322	}
	323	break;
	324	#ifdef BFD64
	325	case x86_DEBUG_STATE64:
	326	switch (regnum)
	327	{
	328	case 0:
	329	dr_regs.uds.ds64.__dr0 = value;
	330	break;
	331	case 1:
	332	dr_regs.uds.ds64.__dr1 = value;
	333	break;
	334	case 2:
	335	dr_regs.uds.ds64.__dr2 = value;
	336	break;
	337	case 3:
	338	dr_regs.uds.ds64.__dr3 = value;
	339	break;
	340	case 4:
	341	dr_regs.uds.ds64.__dr4 = value;
	342	break;
	343	case 5:
	344	dr_regs.uds.ds64.__dr5 = value;
	345	break;
	346	case 6:
	347	dr_regs.uds.ds64.__dr6 = value;
	348	break;
	349	case 7:
	350	dr_regs.uds.ds64.__dr7 = value;
	351	break;
	352	}
	353	break;
	354	#endif
a80b95ba TG	355	}
a80b95ba TG	356
b1328b1b TG	357	ret = thread_set_state (current_thread, dr_regs.dsh.flavor,
b1328b1b TG	358	(thread_state_t) &dr_regs.uds, dr_count);
a80b95ba	359
b1328b1b	360	MACH_CHECK_ERROR (ret);
a80b95ba TG	361	}
a80b95ba TG	362
b1328b1b	363	static CORE_ADDR
a80b95ba TG	364	i386_darwin_dr_get (int regnum)
	365	{
	366	thread_t current_thread;
	367	x86_debug_state_t dr_regs;
	368	kern_return_t ret;
61d82a0d	369	unsigned int dr_count;
a80b95ba TG	370
	371	gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
	372
	373	current_thread = ptid_get_tid (inferior_ptid);
	374
61d82a0d TG	375	dr_regs.dsh.flavor = x86_DEBUG_STATE;
61d82a0d TG	376	dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
a80b95ba	377	dr_count = x86_DEBUG_STATE_COUNT;
61d82a0d	378	ret = thread_get_state (current_thread, x86_DEBUG_STATE,
a80b95ba	379	(thread_state_t) &dr_regs, &dr_count);
b1328b1b	380	MACH_CHECK_ERROR (ret);
a80b95ba	381
61d82a0d	382	switch (dr_regs.dsh.flavor)
a80b95ba	383	{
61d82a0d TG	384	case x86_DEBUG_STATE32:
	385	switch (regnum)
	386	{
	387	case 0:
	388	return dr_regs.uds.ds32.__dr0;
	389	case 1:
	390	return dr_regs.uds.ds32.__dr1;
	391	case 2:
	392	return dr_regs.uds.ds32.__dr2;
	393	case 3:
	394	return dr_regs.uds.ds32.__dr3;
	395	case 4:
	396	return dr_regs.uds.ds32.__dr4;
	397	case 5:
	398	return dr_regs.uds.ds32.__dr5;
	399	case 6:
	400	return dr_regs.uds.ds32.__dr6;
	401	case 7:
	402	return dr_regs.uds.ds32.__dr7;
	403	default:
	404	return -1;
	405	}
	406	break;
	407	#ifdef BFD64
	408	case x86_DEBUG_STATE64:
	409	switch (regnum)
	410	{
	411	case 0:
	412	return dr_regs.uds.ds64.__dr0;
	413	case 1:
	414	return dr_regs.uds.ds64.__dr1;
	415	case 2:
	416	return dr_regs.uds.ds64.__dr2;
	417	case 3:
	418	return dr_regs.uds.ds64.__dr3;
	419	case 4:
	420	return dr_regs.uds.ds64.__dr4;
	421	case 5:
	422	return dr_regs.uds.ds64.__dr5;
	423	case 6:
	424	return dr_regs.uds.ds64.__dr6;
	425	case 7:
	426	return dr_regs.uds.ds64.__dr7;
	427	default:
	428	return -1;
	429	}
	430	break;
	431	#endif
	432	default:
	433	return -1;
a80b95ba TG	434	}
	435	}
	436
61d82a0d	437	static void
a80b95ba TG	438	i386_darwin_dr_set_control (unsigned long control)
	439	{
	440	i386_darwin_dr_set (DR_CONTROL, control);
	441	}
	442
61d82a0d	443	static void
a80b95ba TG	444	i386_darwin_dr_set_addr (int regnum, CORE_ADDR addr)
	445	{
	446	gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR);
	447
	448	i386_darwin_dr_set (DR_FIRSTADDR + regnum, addr);
	449	}
	450
61d82a0d	451	static CORE_ADDR
7b50312a	452	i386_darwin_dr_get_addr (int regnum)
a80b95ba	453	{
7b50312a	454	return i386_darwin_dr_get (regnum);
a80b95ba TG	455	}
a80b95ba TG	456
61d82a0d	457	static unsigned long
a80b95ba TG	458	i386_darwin_dr_get_status (void)
	459	{
	460	return i386_darwin_dr_get (DR_STATUS);
	461	}
	462
61d82a0d	463	static unsigned long
7b50312a PA	464	i386_darwin_dr_get_control (void)
	465	{
	466	return i386_darwin_dr_get (DR_CONTROL);
	467	}
	468
a80b95ba TG	469	void
	470	darwin_check_osabi (darwin_inferior *inf, thread_t thread)
	471	{
f5656ead	472	if (gdbarch_osabi (target_gdbarch ()) == GDB_OSABI_UNKNOWN)
a80b95ba TG	473	{
	474	/* Attaching to a process. Let's figure out what kind it is. */
	475	x86_thread_state_t gp_regs;
	476	struct gdbarch_info info;
	477	unsigned int gp_count = x86_THREAD_STATE_COUNT;
	478	kern_return_t ret;
	479
	480	ret = thread_get_state (thread, x86_THREAD_STATE,
	481	(thread_state_t) &gp_regs, &gp_count);
	482	if (ret != KERN_SUCCESS)
	483	{
	484	MACH_CHECK_ERROR (ret);
	485	return;
	486	}
	487
	488	gdbarch_info_init (&info);
	489	gdbarch_info_fill (&info);
f5656ead	490	info.byte_order = gdbarch_byte_order (target_gdbarch ());
a80b95ba TG	491	info.osabi = GDB_OSABI_DARWIN;
	492	if (gp_regs.tsh.flavor == x86_THREAD_STATE64)
	493	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
	494	bfd_mach_x86_64);
	495	else
61d82a0d	496	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
a80b95ba TG	497	bfd_mach_i386_i386);
	498	gdbarch_update_p (info);
	499	}
	500	}
	501
	502	#define X86_EFLAGS_T 0x100UL
	503
acdb24a9 TG	504	/* Returning from a signal trampoline is done by calling a
	505	special system call (sigreturn). This system call
	506	restores the registers that were saved when the signal was
	507	raised, including %eflags/%rflags. That means that single-stepping
	508	won't work. Instead, we'll have to modify the signal context
	509	that's about to be restored, and set the trace flag there. */
	510
	511	static int
	512	i386_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
	513	{
f5656ead	514	enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
acdb24a9 TG	515	static const gdb_byte darwin_syscall[] = { 0xcd, 0x80 }; /* int 0x80 */
	516	gdb_byte buf[sizeof (darwin_syscall)];
	517
	518	/* Check if PC is at a sigreturn system call. */
	519	if (target_read_memory (regs->uts.ts32.__eip, buf, sizeof (buf)) == 0
	520	&& memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
	521	&& regs->uts.ts32.__eax == 0xb8 /* SYS_sigreturn */)
	522	{
	523	ULONGEST uctx_addr;
	524	ULONGEST mctx_addr;
	525	ULONGEST flags_addr;
	526	unsigned int eflags;
	527
e17a4113 UW	528	uctx_addr = read_memory_unsigned_integer
	529	(regs->uts.ts32.__esp + 4, 4, byte_order);
	530	mctx_addr = read_memory_unsigned_integer
	531	(uctx_addr + 28, 4, byte_order);
acdb24a9 TG	532
	533	flags_addr = mctx_addr + 12 + 9 * 4;
	534	read_memory (flags_addr, (gdb_byte *) &eflags, 4);
	535	eflags \|= X86_EFLAGS_T;
	536	write_memory (flags_addr, (gdb_byte *) &eflags, 4);
	537
	538	return 1;
	539	}
	540	return 0;
	541	}
	542
5cd226f2	543	#ifdef BFD64
acdb24a9 TG	544	static int
	545	amd64_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
	546	{
f5656ead	547	enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
acdb24a9 TG	548	static const gdb_byte darwin_syscall[] = { 0x0f, 0x05 }; /* syscall */
	549	gdb_byte buf[sizeof (darwin_syscall)];
	550
	551	/* Check if PC is at a sigreturn system call. */
	552	if (target_read_memory (regs->uts.ts64.__rip, buf, sizeof (buf)) == 0
	553	&& memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
	554	&& (regs->uts.ts64.__rax & 0xffffffff) == 0x20000b8 /* SYS_sigreturn */)
	555	{
	556	ULONGEST mctx_addr;
	557	ULONGEST flags_addr;
	558	unsigned int rflags;
	559
e17a4113 UW	560	mctx_addr = read_memory_unsigned_integer
e17a4113 UW	561	(regs->uts.ts64.__rdi + 48, 8, byte_order);
acdb24a9 TG	562	flags_addr = mctx_addr + 16 + 17 * 8;
	563
	564	/* AMD64 is little endian. */
	565	read_memory (flags_addr, (gdb_byte *) &rflags, 4);
	566	rflags \|= X86_EFLAGS_T;
	567	write_memory (flags_addr, (gdb_byte *) &rflags, 4);
	568
	569	return 1;
	570	}
	571	return 0;
	572	}
5cd226f2	573	#endif
acdb24a9	574
a80b95ba TG	575	void
	576	darwin_set_sstep (thread_t thread, int enable)
	577	{
	578	x86_thread_state_t regs;
	579	unsigned int count = x86_THREAD_STATE_COUNT;
	580	kern_return_t kret;
	581
	582	kret = thread_get_state (thread, x86_THREAD_STATE,
	583	(thread_state_t) &regs, &count);
	584	if (kret != KERN_SUCCESS)
	585	{
	586	printf_unfiltered (_("darwin_set_sstep: error %x, thread=%x\n"),
	587	kret, thread);
	588	return;
	589	}
acdb24a9	590
a80b95ba TG	591	switch (regs.tsh.flavor)
	592	{
	593	case x86_THREAD_STATE32:
	594	{
	595	__uint32_t bit = enable ? X86_EFLAGS_T : 0;
b1328b1b	596
acdb24a9 TG	597	if (enable && i386_darwin_sstep_at_sigreturn (&regs))
acdb24a9 TG	598	return;
a80b95ba TG	599	if ((regs.uts.ts32.__eflags & X86_EFLAGS_T) == bit)
a80b95ba TG	600	return;
1777feb0 MS	601	regs.uts.ts32.__eflags
1777feb0 MS	602	= (regs.uts.ts32.__eflags & ~X86_EFLAGS_T) \| bit;
b1328b1b	603	kret = thread_set_state (thread, x86_THREAD_STATE,
a80b95ba TG	604	(thread_state_t) &regs, count);
	605	MACH_CHECK_ERROR (kret);
	606	}
	607	break;
5cd226f2	608	#ifdef BFD64
a80b95ba TG	609	case x86_THREAD_STATE64:
	610	{
	611	__uint64_t bit = enable ? X86_EFLAGS_T : 0;
	612
acdb24a9 TG	613	if (enable && amd64_darwin_sstep_at_sigreturn (&regs))
acdb24a9 TG	614	return;
a80b95ba TG	615	if ((regs.uts.ts64.__rflags & X86_EFLAGS_T) == bit)
a80b95ba TG	616	return;
1777feb0 MS	617	regs.uts.ts64.__rflags
1777feb0 MS	618	= (regs.uts.ts64.__rflags & ~X86_EFLAGS_T) \| bit;
b1328b1b	619	kret = thread_set_state (thread, x86_THREAD_STATE,
a80b95ba TG	620	(thread_state_t) &regs, count);
	621	MACH_CHECK_ERROR (kret);
	622	}
	623	break;
5cd226f2	624	#endif
a80b95ba	625	default:
b37520b6	626	error (_("darwin_set_sstep: unknown flavour: %d"), regs.tsh.flavor);
a80b95ba TG	627	}
	628	}
	629
	630	void
	631	darwin_complete_target (struct target_ops *target)
	632	{
5cd226f2	633	#ifdef BFD64
a80b95ba TG	634	amd64_native_gregset64_reg_offset = amd64_darwin_thread_state_reg_offset;
	635	amd64_native_gregset64_num_regs = amd64_darwin_thread_state_num_regs;
	636	amd64_native_gregset32_reg_offset = i386_darwin_thread_state_reg_offset;
	637	amd64_native_gregset32_num_regs = i386_darwin_thread_state_num_regs;
5cd226f2	638	#endif
a80b95ba	639
df7e5265	640	x86_use_watchpoints (target);
61d82a0d	641
df7e5265 GB	642	x86_dr_low.set_control = i386_darwin_dr_set_control;
	643	x86_dr_low.set_addr = i386_darwin_dr_set_addr;
	644	x86_dr_low.get_addr = i386_darwin_dr_get_addr;
	645	x86_dr_low.get_status = i386_darwin_dr_get_status;
	646	x86_dr_low.get_control = i386_darwin_dr_get_control;
61d82a0d TG	647
	648	/* Let's assume that the kernel is 64 bits iff the executable is. */
	649	#ifdef __x86_64__
df7e5265	650	x86_set_debug_register_length (8);
61d82a0d	651	#else
df7e5265	652	x86_set_debug_register_length (4);
61d82a0d TG	653	#endif
61d82a0d TG	654
a80b95ba TG	655	target->to_fetch_registers = i386_darwin_fetch_inferior_registers;
	656	target->to_store_registers = i386_darwin_store_inferior_registers;
	657	}