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a4194092 | 1 | /* Native-dependent code for GNU/Linux i386. |
a4b6fc86 | 2 | |
42a4f53d | 3 | Copyright (C) 1999-2019 Free Software Foundation, Inc. |
d4f3574e | 4 | |
04cd15b6 | 5 | This file is part of GDB. |
d4f3574e | 6 | |
04cd15b6 MK |
7 | This program is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
04cd15b6 | 10 | (at your option) any later version. |
d4f3574e | 11 | |
04cd15b6 MK |
12 | This program is distributed in the hope that it will be useful, |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
d4f3574e | 16 | |
04cd15b6 | 17 | You should have received a copy of the GNU General Public License |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
d4f3574e SS |
19 | |
20 | #include "defs.h" | |
21 | #include "inferior.h" | |
22 | #include "gdbcore.h" | |
4e052eda | 23 | #include "regcache.h" |
c131fcee | 24 | #include "elf/common.h" |
5826e159 | 25 | #include "nat/gdb_ptrace.h" |
72fde3df | 26 | #include <sys/uio.h> |
c60c0f5f | 27 | #include "gregset.h" |
3116063b | 28 | #include "gdb_proc_service.h" |
c60c0f5f | 29 | |
3116063b | 30 | #include "i386-linux-nat.h" |
e750d25e | 31 | #include "i387-tdep.h" |
c3833324 | 32 | #include "i386-tdep.h" |
5179e78f | 33 | #include "i386-linux-tdep.h" |
268a13a5 | 34 | #include "gdbsupport/x86-xstate.h" |
c131fcee | 35 | |
040baaf6 | 36 | #include "x86-linux-nat.h" |
ca9b78ce | 37 | #include "nat/linux-ptrace.h" |
bcc0c096 | 38 | #include "inf-ptrace.h" |
d4f3574e | 39 | |
f6ac5f3d PA |
40 | struct i386_linux_nat_target final : public x86_linux_nat_target |
41 | { | |
42 | /* Add our register access methods. */ | |
43 | void fetch_registers (struct regcache *, int) override; | |
44 | void store_registers (struct regcache *, int) override; | |
45 | ||
46 | /* Override the default ptrace resume method. */ | |
47 | void low_resume (ptid_t ptid, int step, enum gdb_signal sig) override; | |
48 | }; | |
49 | ||
50 | static i386_linux_nat_target the_i386_linux_nat_target; | |
51 | ||
a4b6fc86 AC |
52 | /* The register sets used in GNU/Linux ELF core-dumps are identical to |
53 | the register sets in `struct user' that is used for a.out | |
54 | core-dumps, and is also used by `ptrace'. The corresponding types | |
55 | are `elf_gregset_t' for the general-purpose registers (with | |
04cd15b6 MK |
56 | `elf_greg_t' the type of a single GP register) and `elf_fpregset_t' |
57 | for the floating-point registers. | |
58 | ||
59 | Those types used to be available under the names `gregset_t' and | |
60 | `fpregset_t' too, and this file used those names in the past. But | |
61 | those names are now used for the register sets used in the | |
62 | `mcontext_t' type, and have a different size and layout. */ | |
63 | ||
5c44784c JM |
64 | /* Which ptrace request retrieves which registers? |
65 | These apply to the corresponding SET requests as well. */ | |
e64a344c | 66 | |
5c44784c | 67 | #define GETREGS_SUPPLIES(regno) \ |
3fb1c838 | 68 | ((0 <= (regno) && (regno) <= 15) || (regno) == I386_LINUX_ORIG_EAX_REGNUM) |
e64a344c | 69 | |
6ce2ac0b | 70 | #define GETFPXREGS_SUPPLIES(regno) \ |
f6792ef4 | 71 | (I386_ST0_REGNUM <= (regno) && (regno) < I386_SSE_NUM_REGS) |
5c44784c | 72 | |
c131fcee | 73 | #define GETXSTATEREGS_SUPPLIES(regno) \ |
51547df6 | 74 | (I386_ST0_REGNUM <= (regno) && (regno) < I386_PKEYS_NUM_REGS) |
c131fcee | 75 | |
f60300e7 MK |
76 | /* Does the current host support the GETREGS request? */ |
77 | int have_ptrace_getregs = | |
78 | #ifdef HAVE_PTRACE_GETREGS | |
79 | 1 | |
80 | #else | |
81 | 0 | |
82 | #endif | |
83 | ; | |
84 | ||
6ce2ac0b | 85 | /* Does the current host support the GETFPXREGS request? The header |
5c44784c JM |
86 | file may or may not define it, and even if it is defined, the |
87 | kernel will return EIO if it's running on a pre-SSE processor. | |
88 | ||
89 | My instinct is to attach this to some architecture- or | |
90 | target-specific data structure, but really, a particular GDB | |
91 | process can only run on top of one kernel at a time. So it's okay | |
92 | for this to be a simple variable. */ | |
6ce2ac0b MK |
93 | int have_ptrace_getfpxregs = |
94 | #ifdef HAVE_PTRACE_GETFPXREGS | |
3a13a53b | 95 | -1 |
5c44784c JM |
96 | #else |
97 | 0 | |
98 | #endif | |
99 | ; | |
f60300e7 | 100 | \f |
6ce2ac0b | 101 | |
ce556f85 | 102 | /* Accessing registers through the U area, one at a time. */ |
f60300e7 MK |
103 | |
104 | /* Fetch one register. */ | |
105 | ||
106 | static void | |
56be3814 | 107 | fetch_register (struct regcache *regcache, int regno) |
f60300e7 | 108 | { |
bcc0c096 | 109 | pid_t tid; |
ce556f85 | 110 | int val; |
f60300e7 | 111 | |
ce556f85 | 112 | gdb_assert (!have_ptrace_getregs); |
be0d2954 | 113 | if (i386_linux_gregset_reg_offset[regno] == -1) |
f60300e7 | 114 | { |
73e1c03f | 115 | regcache->raw_supply (regno, NULL); |
f60300e7 MK |
116 | return; |
117 | } | |
118 | ||
222312d3 | 119 | tid = get_ptrace_pid (regcache->ptid ()); |
f60300e7 | 120 | |
ce556f85 | 121 | errno = 0; |
be0d2954 L |
122 | val = ptrace (PTRACE_PEEKUSER, tid, |
123 | i386_linux_gregset_reg_offset[regno], 0); | |
ce556f85 | 124 | if (errno != 0) |
c9f4d572 | 125 | error (_("Couldn't read register %s (#%d): %s."), |
ac7936df | 126 | gdbarch_register_name (regcache->arch (), regno), |
ce556f85 | 127 | regno, safe_strerror (errno)); |
f60300e7 | 128 | |
73e1c03f | 129 | regcache->raw_supply (regno, &val); |
f60300e7 MK |
130 | } |
131 | ||
1777feb0 | 132 | /* Store one register. */ |
f60300e7 MK |
133 | |
134 | static void | |
56be3814 | 135 | store_register (const struct regcache *regcache, int regno) |
f60300e7 | 136 | { |
bcc0c096 | 137 | pid_t tid; |
ce556f85 | 138 | int val; |
f60300e7 | 139 | |
ce556f85 | 140 | gdb_assert (!have_ptrace_getregs); |
be0d2954 | 141 | if (i386_linux_gregset_reg_offset[regno] == -1) |
ce556f85 | 142 | return; |
f60300e7 | 143 | |
222312d3 | 144 | tid = get_ptrace_pid (regcache->ptid ()); |
f60300e7 | 145 | |
ce556f85 | 146 | errno = 0; |
34a79281 | 147 | regcache->raw_collect (regno, &val); |
be0d2954 L |
148 | ptrace (PTRACE_POKEUSER, tid, |
149 | i386_linux_gregset_reg_offset[regno], val); | |
ce556f85 | 150 | if (errno != 0) |
c9f4d572 | 151 | error (_("Couldn't write register %s (#%d): %s."), |
ac7936df | 152 | gdbarch_register_name (regcache->arch (), regno), |
ce556f85 | 153 | regno, safe_strerror (errno)); |
f60300e7 | 154 | } |
5c44784c | 155 | \f |
6ce2ac0b | 156 | |
04cd15b6 MK |
157 | /* Transfering the general-purpose registers between GDB, inferiors |
158 | and core files. */ | |
159 | ||
ad2a4d09 | 160 | /* Fill GDB's register array with the general-purpose register values |
04cd15b6 | 161 | in *GREGSETP. */ |
5c44784c | 162 | |
d4f3574e | 163 | void |
7f7fe91e | 164 | supply_gregset (struct regcache *regcache, const elf_gregset_t *gregsetp) |
d4f3574e | 165 | { |
be0d2954 | 166 | const gdb_byte *regp = (const gdb_byte *) gregsetp; |
6ce2ac0b | 167 | int i; |
d4f3574e | 168 | |
98df6387 | 169 | for (i = 0; i < I386_NUM_GREGS; i++) |
73e1c03f | 170 | regcache->raw_supply (i, regp + i386_linux_gregset_reg_offset[i]); |
3fb1c838 | 171 | |
875f8d0e | 172 | if (I386_LINUX_ORIG_EAX_REGNUM |
ac7936df | 173 | < gdbarch_num_regs (regcache->arch ())) |
73e1c03f SM |
174 | regcache->raw_supply |
175 | (I386_LINUX_ORIG_EAX_REGNUM, | |
176 | regp + i386_linux_gregset_reg_offset[I386_LINUX_ORIG_EAX_REGNUM]); | |
917317f4 JM |
177 | } |
178 | ||
04cd15b6 MK |
179 | /* Fill register REGNO (if it is a general-purpose register) in |
180 | *GREGSETPS with the value in GDB's register array. If REGNO is -1, | |
181 | do this for all registers. */ | |
6ce2ac0b | 182 | |
917317f4 | 183 | void |
7f7fe91e UW |
184 | fill_gregset (const struct regcache *regcache, |
185 | elf_gregset_t *gregsetp, int regno) | |
917317f4 | 186 | { |
be0d2954 | 187 | gdb_byte *regp = (gdb_byte *) gregsetp; |
6ce2ac0b | 188 | int i; |
04cd15b6 | 189 | |
98df6387 | 190 | for (i = 0; i < I386_NUM_GREGS; i++) |
099a9414 | 191 | if (regno == -1 || regno == i) |
34a79281 | 192 | regcache->raw_collect (i, regp + i386_linux_gregset_reg_offset[i]); |
3fb1c838 | 193 | |
82ea117a | 194 | if ((regno == -1 || regno == I386_LINUX_ORIG_EAX_REGNUM) |
875f8d0e | 195 | && I386_LINUX_ORIG_EAX_REGNUM |
ac7936df | 196 | < gdbarch_num_regs (regcache->arch ())) |
34a79281 SM |
197 | regcache->raw_collect |
198 | (I386_LINUX_ORIG_EAX_REGNUM, | |
199 | regp + i386_linux_gregset_reg_offset[I386_LINUX_ORIG_EAX_REGNUM]); | |
d4f3574e SS |
200 | } |
201 | ||
f60300e7 MK |
202 | #ifdef HAVE_PTRACE_GETREGS |
203 | ||
04cd15b6 MK |
204 | /* Fetch all general-purpose registers from process/thread TID and |
205 | store their values in GDB's register array. */ | |
d4f3574e | 206 | |
5c44784c | 207 | static void |
56be3814 | 208 | fetch_regs (struct regcache *regcache, int tid) |
5c44784c | 209 | { |
04cd15b6 | 210 | elf_gregset_t regs; |
2e024c20 | 211 | elf_gregset_t *regs_p = ®s; |
5c44784c | 212 | |
6ce2ac0b | 213 | if (ptrace (PTRACE_GETREGS, tid, 0, (int) ®s) < 0) |
5c44784c | 214 | { |
f60300e7 MK |
215 | if (errno == EIO) |
216 | { | |
217 | /* The kernel we're running on doesn't support the GETREGS | |
218 | request. Reset `have_ptrace_getregs'. */ | |
219 | have_ptrace_getregs = 0; | |
220 | return; | |
221 | } | |
222 | ||
e2e0b3e5 | 223 | perror_with_name (_("Couldn't get registers")); |
5c44784c JM |
224 | } |
225 | ||
2e024c20 | 226 | supply_gregset (regcache, (const elf_gregset_t *) regs_p); |
5c44784c JM |
227 | } |
228 | ||
04cd15b6 MK |
229 | /* Store all valid general-purpose registers in GDB's register array |
230 | into the process/thread specified by TID. */ | |
5c44784c | 231 | |
5c44784c | 232 | static void |
56be3814 | 233 | store_regs (const struct regcache *regcache, int tid, int regno) |
5c44784c | 234 | { |
04cd15b6 | 235 | elf_gregset_t regs; |
5c44784c | 236 | |
6ce2ac0b | 237 | if (ptrace (PTRACE_GETREGS, tid, 0, (int) ®s) < 0) |
e2e0b3e5 | 238 | perror_with_name (_("Couldn't get registers")); |
5c44784c | 239 | |
56be3814 | 240 | fill_gregset (regcache, ®s, regno); |
6ce2ac0b MK |
241 | |
242 | if (ptrace (PTRACE_SETREGS, tid, 0, (int) ®s) < 0) | |
e2e0b3e5 | 243 | perror_with_name (_("Couldn't write registers")); |
5c44784c JM |
244 | } |
245 | ||
f60300e7 MK |
246 | #else |
247 | ||
56be3814 UW |
248 | static void fetch_regs (struct regcache *regcache, int tid) {} |
249 | static void store_regs (const struct regcache *regcache, int tid, int regno) {} | |
f60300e7 MK |
250 | |
251 | #endif | |
5c44784c | 252 | \f |
5c44784c | 253 | |
6ce2ac0b | 254 | /* Transfering floating-point registers between GDB, inferiors and cores. */ |
d4f3574e | 255 | |
04cd15b6 | 256 | /* Fill GDB's register array with the floating-point register values in |
917317f4 | 257 | *FPREGSETP. */ |
04cd15b6 | 258 | |
d4f3574e | 259 | void |
7f7fe91e | 260 | supply_fpregset (struct regcache *regcache, const elf_fpregset_t *fpregsetp) |
d4f3574e | 261 | { |
7f7fe91e | 262 | i387_supply_fsave (regcache, -1, fpregsetp); |
917317f4 | 263 | } |
d4f3574e | 264 | |
04cd15b6 MK |
265 | /* Fill register REGNO (if it is a floating-point register) in |
266 | *FPREGSETP with the value in GDB's register array. If REGNO is -1, | |
267 | do this for all registers. */ | |
917317f4 JM |
268 | |
269 | void | |
7f7fe91e UW |
270 | fill_fpregset (const struct regcache *regcache, |
271 | elf_fpregset_t *fpregsetp, int regno) | |
917317f4 | 272 | { |
7f7fe91e | 273 | i387_collect_fsave (regcache, regno, fpregsetp); |
d4f3574e SS |
274 | } |
275 | ||
f60300e7 MK |
276 | #ifdef HAVE_PTRACE_GETREGS |
277 | ||
04cd15b6 MK |
278 | /* Fetch all floating-point registers from process/thread TID and store |
279 | thier values in GDB's register array. */ | |
917317f4 | 280 | |
d4f3574e | 281 | static void |
56be3814 | 282 | fetch_fpregs (struct regcache *regcache, int tid) |
d4f3574e | 283 | { |
04cd15b6 | 284 | elf_fpregset_t fpregs; |
d4f3574e | 285 | |
6ce2ac0b | 286 | if (ptrace (PTRACE_GETFPREGS, tid, 0, (int) &fpregs) < 0) |
e2e0b3e5 | 287 | perror_with_name (_("Couldn't get floating point status")); |
d4f3574e | 288 | |
56be3814 | 289 | supply_fpregset (regcache, (const elf_fpregset_t *) &fpregs); |
d4f3574e SS |
290 | } |
291 | ||
04cd15b6 MK |
292 | /* Store all valid floating-point registers in GDB's register array |
293 | into the process/thread specified by TID. */ | |
d4f3574e | 294 | |
d4f3574e | 295 | static void |
56be3814 | 296 | store_fpregs (const struct regcache *regcache, int tid, int regno) |
d4f3574e | 297 | { |
04cd15b6 | 298 | elf_fpregset_t fpregs; |
d4f3574e | 299 | |
6ce2ac0b | 300 | if (ptrace (PTRACE_GETFPREGS, tid, 0, (int) &fpregs) < 0) |
e2e0b3e5 | 301 | perror_with_name (_("Couldn't get floating point status")); |
d4f3574e | 302 | |
56be3814 | 303 | fill_fpregset (regcache, &fpregs, regno); |
d4f3574e | 304 | |
6ce2ac0b | 305 | if (ptrace (PTRACE_SETFPREGS, tid, 0, (int) &fpregs) < 0) |
e2e0b3e5 | 306 | perror_with_name (_("Couldn't write floating point status")); |
d4f3574e SS |
307 | } |
308 | ||
f60300e7 MK |
309 | #else |
310 | ||
1777feb0 MS |
311 | static void |
312 | fetch_fpregs (struct regcache *regcache, int tid) | |
313 | { | |
314 | } | |
315 | ||
316 | static void | |
317 | store_fpregs (const struct regcache *regcache, int tid, int regno) | |
318 | { | |
319 | } | |
f60300e7 MK |
320 | |
321 | #endif | |
5c44784c | 322 | \f |
d4f3574e | 323 | |
6ce2ac0b | 324 | /* Transfering floating-point and SSE registers to and from GDB. */ |
11cf8741 | 325 | |
c131fcee L |
326 | /* Fetch all registers covered by the PTRACE_GETREGSET request from |
327 | process/thread TID and store their values in GDB's register array. | |
328 | Return non-zero if successful, zero otherwise. */ | |
329 | ||
330 | static int | |
331 | fetch_xstateregs (struct regcache *regcache, int tid) | |
332 | { | |
df7e5265 | 333 | char xstateregs[X86_XSTATE_MAX_SIZE]; |
c131fcee L |
334 | struct iovec iov; |
335 | ||
0bdb2f78 | 336 | if (have_ptrace_getregset != TRIBOOL_TRUE) |
c131fcee L |
337 | return 0; |
338 | ||
339 | iov.iov_base = xstateregs; | |
340 | iov.iov_len = sizeof(xstateregs); | |
341 | if (ptrace (PTRACE_GETREGSET, tid, (unsigned int) NT_X86_XSTATE, | |
342 | &iov) < 0) | |
343 | perror_with_name (_("Couldn't read extended state status")); | |
344 | ||
345 | i387_supply_xsave (regcache, -1, xstateregs); | |
346 | return 1; | |
347 | } | |
348 | ||
349 | /* Store all valid registers in GDB's register array covered by the | |
350 | PTRACE_SETREGSET request into the process/thread specified by TID. | |
351 | Return non-zero if successful, zero otherwise. */ | |
352 | ||
353 | static int | |
354 | store_xstateregs (const struct regcache *regcache, int tid, int regno) | |
355 | { | |
df7e5265 | 356 | char xstateregs[X86_XSTATE_MAX_SIZE]; |
c131fcee L |
357 | struct iovec iov; |
358 | ||
0bdb2f78 | 359 | if (have_ptrace_getregset != TRIBOOL_TRUE) |
c131fcee L |
360 | return 0; |
361 | ||
362 | iov.iov_base = xstateregs; | |
363 | iov.iov_len = sizeof(xstateregs); | |
364 | if (ptrace (PTRACE_GETREGSET, tid, (unsigned int) NT_X86_XSTATE, | |
365 | &iov) < 0) | |
366 | perror_with_name (_("Couldn't read extended state status")); | |
367 | ||
368 | i387_collect_xsave (regcache, regno, xstateregs, 0); | |
369 | ||
370 | if (ptrace (PTRACE_SETREGSET, tid, (unsigned int) NT_X86_XSTATE, | |
371 | (int) &iov) < 0) | |
372 | perror_with_name (_("Couldn't write extended state status")); | |
373 | ||
374 | return 1; | |
375 | } | |
376 | ||
6ce2ac0b | 377 | #ifdef HAVE_PTRACE_GETFPXREGS |
04cd15b6 | 378 | |
6ce2ac0b | 379 | /* Fetch all registers covered by the PTRACE_GETFPXREGS request from |
04cd15b6 MK |
380 | process/thread TID and store their values in GDB's register array. |
381 | Return non-zero if successful, zero otherwise. */ | |
5c44784c | 382 | |
5c44784c | 383 | static int |
56be3814 | 384 | fetch_fpxregs (struct regcache *regcache, int tid) |
5c44784c | 385 | { |
6ce2ac0b | 386 | elf_fpxregset_t fpxregs; |
5c44784c | 387 | |
6ce2ac0b | 388 | if (! have_ptrace_getfpxregs) |
5c44784c JM |
389 | return 0; |
390 | ||
6ce2ac0b | 391 | if (ptrace (PTRACE_GETFPXREGS, tid, 0, (int) &fpxregs) < 0) |
d4f3574e | 392 | { |
5c44784c JM |
393 | if (errno == EIO) |
394 | { | |
6ce2ac0b | 395 | have_ptrace_getfpxregs = 0; |
5c44784c JM |
396 | return 0; |
397 | } | |
398 | ||
e2e0b3e5 | 399 | perror_with_name (_("Couldn't read floating-point and SSE registers")); |
d4f3574e SS |
400 | } |
401 | ||
b7a8b4ef | 402 | i387_supply_fxsave (regcache, -1, (const elf_fpxregset_t *) &fpxregs); |
5c44784c JM |
403 | return 1; |
404 | } | |
d4f3574e | 405 | |
04cd15b6 | 406 | /* Store all valid registers in GDB's register array covered by the |
6ce2ac0b | 407 | PTRACE_SETFPXREGS request into the process/thread specified by TID. |
04cd15b6 | 408 | Return non-zero if successful, zero otherwise. */ |
5c44784c | 409 | |
5c44784c | 410 | static int |
56be3814 | 411 | store_fpxregs (const struct regcache *regcache, int tid, int regno) |
5c44784c | 412 | { |
6ce2ac0b | 413 | elf_fpxregset_t fpxregs; |
5c44784c | 414 | |
6ce2ac0b | 415 | if (! have_ptrace_getfpxregs) |
5c44784c | 416 | return 0; |
6ce2ac0b MK |
417 | |
418 | if (ptrace (PTRACE_GETFPXREGS, tid, 0, &fpxregs) == -1) | |
2866d305 MK |
419 | { |
420 | if (errno == EIO) | |
421 | { | |
422 | have_ptrace_getfpxregs = 0; | |
423 | return 0; | |
424 | } | |
425 | ||
e2e0b3e5 | 426 | perror_with_name (_("Couldn't read floating-point and SSE registers")); |
2866d305 | 427 | } |
5c44784c | 428 | |
b7a8b4ef | 429 | i387_collect_fxsave (regcache, regno, &fpxregs); |
5c44784c | 430 | |
6ce2ac0b | 431 | if (ptrace (PTRACE_SETFPXREGS, tid, 0, &fpxregs) == -1) |
e2e0b3e5 | 432 | perror_with_name (_("Couldn't write floating-point and SSE registers")); |
5c44784c JM |
433 | |
434 | return 1; | |
435 | } | |
436 | ||
5c44784c JM |
437 | #else |
438 | ||
1777feb0 MS |
439 | static int |
440 | fetch_fpxregs (struct regcache *regcache, int tid) | |
441 | { | |
442 | return 0; | |
443 | } | |
444 | ||
445 | static int | |
446 | store_fpxregs (const struct regcache *regcache, int tid, int regno) | |
447 | { | |
448 | return 0; | |
449 | } | |
5c44784c | 450 | |
6ce2ac0b | 451 | #endif /* HAVE_PTRACE_GETFPXREGS */ |
5c44784c | 452 | \f |
6ce2ac0b | 453 | |
5c44784c | 454 | /* Transferring arbitrary registers between GDB and inferior. */ |
d4f3574e | 455 | |
04cd15b6 MK |
456 | /* Fetch register REGNO from the child process. If REGNO is -1, do |
457 | this for all registers (including the floating point and SSE | |
458 | registers). */ | |
d4f3574e | 459 | |
f6ac5f3d PA |
460 | void |
461 | i386_linux_nat_target::fetch_registers (struct regcache *regcache, int regno) | |
d4f3574e | 462 | { |
bcc0c096 | 463 | pid_t tid; |
ed9a39eb | 464 | |
f60300e7 MK |
465 | /* Use the old method of peeking around in `struct user' if the |
466 | GETREGS request isn't available. */ | |
ce556f85 | 467 | if (!have_ptrace_getregs) |
f60300e7 | 468 | { |
ce556f85 MK |
469 | int i; |
470 | ||
ac7936df | 471 | for (i = 0; i < gdbarch_num_regs (regcache->arch ()); i++) |
ce556f85 | 472 | if (regno == -1 || regno == i) |
56be3814 | 473 | fetch_register (regcache, i); |
ce556f85 | 474 | |
f60300e7 MK |
475 | return; |
476 | } | |
477 | ||
222312d3 | 478 | tid = get_ptrace_pid (regcache->ptid ()); |
ed9a39eb | 479 | |
6ce2ac0b | 480 | /* Use the PTRACE_GETFPXREGS request whenever possible, since it |
04cd15b6 | 481 | transfers more registers in one system call, and we'll cache the |
6ce2ac0b | 482 | results. But remember that fetch_fpxregs can fail, and return |
04cd15b6 | 483 | zero. */ |
5c44784c JM |
484 | if (regno == -1) |
485 | { | |
56be3814 | 486 | fetch_regs (regcache, tid); |
f60300e7 MK |
487 | |
488 | /* The call above might reset `have_ptrace_getregs'. */ | |
ce556f85 | 489 | if (!have_ptrace_getregs) |
f60300e7 | 490 | { |
f6ac5f3d | 491 | fetch_registers (regcache, regno); |
f60300e7 MK |
492 | return; |
493 | } | |
494 | ||
c131fcee L |
495 | if (fetch_xstateregs (regcache, tid)) |
496 | return; | |
56be3814 | 497 | if (fetch_fpxregs (regcache, tid)) |
5c44784c | 498 | return; |
56be3814 | 499 | fetch_fpregs (regcache, tid); |
5c44784c JM |
500 | return; |
501 | } | |
d4f3574e | 502 | |
5c44784c JM |
503 | if (GETREGS_SUPPLIES (regno)) |
504 | { | |
56be3814 | 505 | fetch_regs (regcache, tid); |
5c44784c JM |
506 | return; |
507 | } | |
508 | ||
c131fcee L |
509 | if (GETXSTATEREGS_SUPPLIES (regno)) |
510 | { | |
511 | if (fetch_xstateregs (regcache, tid)) | |
512 | return; | |
513 | } | |
514 | ||
6ce2ac0b | 515 | if (GETFPXREGS_SUPPLIES (regno)) |
5c44784c | 516 | { |
56be3814 | 517 | if (fetch_fpxregs (regcache, tid)) |
5c44784c JM |
518 | return; |
519 | ||
520 | /* Either our processor or our kernel doesn't support the SSE | |
521 | registers, so read the FP registers in the traditional way, | |
522 | and fill the SSE registers with dummy values. It would be | |
523 | more graceful to handle differences in the register set using | |
524 | gdbarch. Until then, this will at least make things work | |
525 | plausibly. */ | |
56be3814 | 526 | fetch_fpregs (regcache, tid); |
5c44784c JM |
527 | return; |
528 | } | |
529 | ||
8e65ff28 | 530 | internal_error (__FILE__, __LINE__, |
e2e0b3e5 | 531 | _("Got request for bad register number %d."), regno); |
d4f3574e SS |
532 | } |
533 | ||
04cd15b6 MK |
534 | /* Store register REGNO back into the child process. If REGNO is -1, |
535 | do this for all registers (including the floating point and SSE | |
536 | registers). */ | |
f6ac5f3d PA |
537 | void |
538 | i386_linux_nat_target::store_registers (struct regcache *regcache, int regno) | |
d4f3574e | 539 | { |
bcc0c096 | 540 | pid_t tid; |
ed9a39eb | 541 | |
f60300e7 MK |
542 | /* Use the old method of poking around in `struct user' if the |
543 | SETREGS request isn't available. */ | |
ce556f85 | 544 | if (!have_ptrace_getregs) |
f60300e7 | 545 | { |
ce556f85 MK |
546 | int i; |
547 | ||
ac7936df | 548 | for (i = 0; i < gdbarch_num_regs (regcache->arch ()); i++) |
ce556f85 | 549 | if (regno == -1 || regno == i) |
56be3814 | 550 | store_register (regcache, i); |
ce556f85 | 551 | |
f60300e7 MK |
552 | return; |
553 | } | |
554 | ||
222312d3 | 555 | tid = get_ptrace_pid (regcache->ptid ()); |
ed9a39eb | 556 | |
6ce2ac0b | 557 | /* Use the PTRACE_SETFPXREGS requests whenever possible, since it |
04cd15b6 | 558 | transfers more registers in one system call. But remember that |
6ce2ac0b | 559 | store_fpxregs can fail, and return zero. */ |
5c44784c JM |
560 | if (regno == -1) |
561 | { | |
56be3814 | 562 | store_regs (regcache, tid, regno); |
c131fcee L |
563 | if (store_xstateregs (regcache, tid, regno)) |
564 | return; | |
56be3814 | 565 | if (store_fpxregs (regcache, tid, regno)) |
5c44784c | 566 | return; |
56be3814 | 567 | store_fpregs (regcache, tid, regno); |
5c44784c JM |
568 | return; |
569 | } | |
d4f3574e | 570 | |
5c44784c JM |
571 | if (GETREGS_SUPPLIES (regno)) |
572 | { | |
56be3814 | 573 | store_regs (regcache, tid, regno); |
5c44784c JM |
574 | return; |
575 | } | |
576 | ||
c131fcee L |
577 | if (GETXSTATEREGS_SUPPLIES (regno)) |
578 | { | |
579 | if (store_xstateregs (regcache, tid, regno)) | |
580 | return; | |
581 | } | |
582 | ||
6ce2ac0b | 583 | if (GETFPXREGS_SUPPLIES (regno)) |
5c44784c | 584 | { |
56be3814 | 585 | if (store_fpxregs (regcache, tid, regno)) |
5c44784c JM |
586 | return; |
587 | ||
588 | /* Either our processor or our kernel doesn't support the SSE | |
04cd15b6 MK |
589 | registers, so just write the FP registers in the traditional |
590 | way. */ | |
56be3814 | 591 | store_fpregs (regcache, tid, regno); |
5c44784c JM |
592 | return; |
593 | } | |
594 | ||
8e65ff28 | 595 | internal_error (__FILE__, __LINE__, |
e2e0b3e5 | 596 | _("Got request to store bad register number %d."), regno); |
d4f3574e | 597 | } |
de57eccd | 598 | \f |
6ce2ac0b | 599 | |
8c420b8d GB |
600 | /* Called by libthread_db. Returns a pointer to the thread local |
601 | storage (or its descriptor). */ | |
602 | ||
603 | ps_err_e | |
754653a7 | 604 | ps_get_thread_area (struct ps_prochandle *ph, |
8c420b8d GB |
605 | lwpid_t lwpid, int idx, void **base) |
606 | { | |
607 | unsigned int base_addr; | |
608 | ps_err_e result; | |
609 | ||
610 | result = x86_linux_get_thread_area (lwpid, (void *) idx, &base_addr); | |
611 | ||
612 | if (result == PS_OK) | |
613 | *(int *) base = base_addr; | |
614 | ||
615 | return result; | |
616 | } | |
5bca7895 MK |
617 | \f |
618 | ||
a4b6fc86 | 619 | /* The instruction for a GNU/Linux system call is: |
a6abb2c0 MK |
620 | int $0x80 |
621 | or 0xcd 0x80. */ | |
622 | ||
623 | static const unsigned char linux_syscall[] = { 0xcd, 0x80 }; | |
624 | ||
625 | #define LINUX_SYSCALL_LEN (sizeof linux_syscall) | |
626 | ||
627 | /* The system call number is stored in the %eax register. */ | |
7532965f | 628 | #define LINUX_SYSCALL_REGNUM I386_EAX_REGNUM |
a6abb2c0 MK |
629 | |
630 | /* We are specifically interested in the sigreturn and rt_sigreturn | |
631 | system calls. */ | |
632 | ||
633 | #ifndef SYS_sigreturn | |
634 | #define SYS_sigreturn 0x77 | |
635 | #endif | |
636 | #ifndef SYS_rt_sigreturn | |
637 | #define SYS_rt_sigreturn 0xad | |
638 | #endif | |
639 | ||
640 | /* Offset to saved processor flags, from <asm/sigcontext.h>. */ | |
641 | #define LINUX_SIGCONTEXT_EFLAGS_OFFSET (64) | |
642 | ||
643 | /* Resume execution of the inferior process. | |
644 | If STEP is nonzero, single-step it. | |
645 | If SIGNAL is nonzero, give it that signal. */ | |
646 | ||
f6ac5f3d PA |
647 | void |
648 | i386_linux_nat_target::low_resume (ptid_t ptid, int step, enum gdb_signal signal) | |
a6abb2c0 | 649 | { |
e38504b3 | 650 | int pid = ptid.lwp (); |
a96d9b2e SDJ |
651 | int request; |
652 | ||
653 | if (catch_syscall_enabled () > 0) | |
654 | request = PTRACE_SYSCALL; | |
655 | else | |
656 | request = PTRACE_CONT; | |
a6abb2c0 | 657 | |
a6abb2c0 MK |
658 | if (step) |
659 | { | |
90ad5e1d | 660 | struct regcache *regcache = get_thread_regcache (ptid); |
ac7936df | 661 | struct gdbarch *gdbarch = regcache->arch (); |
e17a4113 | 662 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
7b86a1b8 | 663 | ULONGEST pc; |
8e70166d | 664 | gdb_byte buf[LINUX_SYSCALL_LEN]; |
a6abb2c0 MK |
665 | |
666 | request = PTRACE_SINGLESTEP; | |
667 | ||
e17a4113 UW |
668 | regcache_cooked_read_unsigned (regcache, |
669 | gdbarch_pc_regnum (gdbarch), &pc); | |
7b86a1b8 | 670 | |
a6abb2c0 MK |
671 | /* Returning from a signal trampoline is done by calling a |
672 | special system call (sigreturn or rt_sigreturn, see | |
673 | i386-linux-tdep.c for more information). This system call | |
674 | restores the registers that were saved when the signal was | |
675 | raised, including %eflags. That means that single-stepping | |
676 | won't work. Instead, we'll have to modify the signal context | |
677 | that's about to be restored, and set the trace flag there. */ | |
678 | ||
679 | /* First check if PC is at a system call. */ | |
8defab1a | 680 | if (target_read_memory (pc, buf, LINUX_SYSCALL_LEN) == 0 |
a6abb2c0 MK |
681 | && memcmp (buf, linux_syscall, LINUX_SYSCALL_LEN) == 0) |
682 | { | |
7b86a1b8 UW |
683 | ULONGEST syscall; |
684 | regcache_cooked_read_unsigned (regcache, | |
685 | LINUX_SYSCALL_REGNUM, &syscall); | |
a6abb2c0 MK |
686 | |
687 | /* Then check the system call number. */ | |
688 | if (syscall == SYS_sigreturn || syscall == SYS_rt_sigreturn) | |
689 | { | |
7b86a1b8 | 690 | ULONGEST sp, addr; |
a6abb2c0 | 691 | unsigned long int eflags; |
7bf0983e | 692 | |
7b86a1b8 | 693 | regcache_cooked_read_unsigned (regcache, I386_ESP_REGNUM, &sp); |
a6abb2c0 | 694 | if (syscall == SYS_rt_sigreturn) |
f3d6df6d YQ |
695 | addr = read_memory_unsigned_integer (sp + 8, 4, byte_order) |
696 | + 20; | |
7b86a1b8 UW |
697 | else |
698 | addr = sp; | |
a6abb2c0 MK |
699 | |
700 | /* Set the trace flag in the context that's about to be | |
701 | restored. */ | |
702 | addr += LINUX_SIGCONTEXT_EFLAGS_OFFSET; | |
8e70166d | 703 | read_memory (addr, (gdb_byte *) &eflags, 4); |
a6abb2c0 | 704 | eflags |= 0x0100; |
8e70166d | 705 | write_memory (addr, (gdb_byte *) &eflags, 4); |
a6abb2c0 MK |
706 | } |
707 | } | |
708 | } | |
709 | ||
2ea28649 | 710 | if (ptrace (request, pid, 0, gdb_signal_to_host (signal)) == -1) |
e2e0b3e5 | 711 | perror_with_name (("ptrace")); |
a6abb2c0 | 712 | } |
c1e246a0 GB |
713 | |
714 | void | |
715 | _initialize_i386_linux_nat (void) | |
716 | { | |
f6ac5f3d | 717 | linux_target = &the_i386_linux_nat_target; |
c1e246a0 GB |
718 | |
719 | /* Add the target. */ | |
d9f719f1 | 720 | add_inf_child_target (linux_target); |
c1e246a0 | 721 | } |