* ltconfig, ltmain.sh: Upgrade to libtool 1.4a 1.641.2.256.
[deliverable/binutils-gdb.git] / gdb / i386-tdep.c
CommitLineData
c906108c 1/* Intel 386 target-dependent stuff.
b6ba6518
KB
2 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001
c906108c
SS
4 Free Software Foundation, Inc.
5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
JM
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c906108c
SS
22
23#include "defs.h"
24#include "gdb_string.h"
25#include "frame.h"
26#include "inferior.h"
27#include "gdbcore.h"
28#include "target.h"
29#include "floatformat.h"
30#include "symtab.h"
31#include "gdbcmd.h"
32#include "command.h"
b4a20239 33#include "arch-utils.h"
4e052eda 34#include "regcache.h"
c906108c 35
917317f4
JM
36/* i386_register_byte[i] is the offset into the register file of the
37 start of register number i. We initialize this from
38 i386_register_raw_size. */
39int i386_register_byte[MAX_NUM_REGS];
40
ceb4951f
JB
41/* i386_register_raw_size[i] is the number of bytes of storage in
42 GDB's register array occupied by register i. */
917317f4
JM
43int i386_register_raw_size[MAX_NUM_REGS] = {
44 4, 4, 4, 4,
45 4, 4, 4, 4,
46 4, 4, 4, 4,
47 4, 4, 4, 4,
48 10, 10, 10, 10,
49 10, 10, 10, 10,
50 4, 4, 4, 4,
51 4, 4, 4, 4,
52 16, 16, 16, 16,
53 16, 16, 16, 16,
54 4
55};
56
57/* i386_register_virtual_size[i] is the size in bytes of the virtual
58 type of register i. */
59int i386_register_virtual_size[MAX_NUM_REGS];
fc338970 60\f
917317f4 61
fc338970
MK
62/* This is the variable that is set with "set disassembly-flavor", and
63 its legitimate values. */
53904c9e
AC
64static const char att_flavor[] = "att";
65static const char intel_flavor[] = "intel";
66static const char *valid_flavors[] =
c5aa993b 67{
c906108c
SS
68 att_flavor,
69 intel_flavor,
70 NULL
71};
53904c9e 72static const char *disassembly_flavor = att_flavor;
c906108c 73
fc338970
MK
74/* This is used to keep the bfd arch_info in sync with the disassembly
75 flavor. */
a14ed312
KB
76static void set_disassembly_flavor_sfunc (char *, int,
77 struct cmd_list_element *);
78static void set_disassembly_flavor (void);
fc338970
MK
79\f
80
81/* Stdio style buffering was used to minimize calls to ptrace, but
82 this buffering did not take into account that the code section
83 being accessed may not be an even number of buffers long (even if
84 the buffer is only sizeof(int) long). In cases where the code
85 section size happened to be a non-integral number of buffers long,
86 attempting to read the last buffer would fail. Simply using
87 target_read_memory and ignoring errors, rather than read_memory, is
88 not the correct solution, since legitimate access errors would then
89 be totally ignored. To properly handle this situation and continue
90 to use buffering would require that this code be able to determine
91 the minimum code section size granularity (not the alignment of the
92 section itself, since the actual failing case that pointed out this
93 problem had a section alignment of 4 but was not a multiple of 4
94 bytes long), on a target by target basis, and then adjust it's
95 buffer size accordingly. This is messy, but potentially feasible.
96 It probably needs the bfd library's help and support. For now, the
97 buffer size is set to 1. (FIXME -fnf) */
98
99#define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */
c906108c
SS
100static CORE_ADDR codestream_next_addr;
101static CORE_ADDR codestream_addr;
102static unsigned char codestream_buf[CODESTREAM_BUFSIZ];
103static int codestream_off;
104static int codestream_cnt;
105
106#define codestream_tell() (codestream_addr + codestream_off)
fc338970
MK
107#define codestream_peek() \
108 (codestream_cnt == 0 ? \
109 codestream_fill(1) : codestream_buf[codestream_off])
110#define codestream_get() \
111 (codestream_cnt-- == 0 ? \
112 codestream_fill(0) : codestream_buf[codestream_off++])
c906108c 113
c5aa993b 114static unsigned char
fba45db2 115codestream_fill (int peek_flag)
c906108c
SS
116{
117 codestream_addr = codestream_next_addr;
118 codestream_next_addr += CODESTREAM_BUFSIZ;
119 codestream_off = 0;
120 codestream_cnt = CODESTREAM_BUFSIZ;
121 read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ);
c5aa993b 122
c906108c 123 if (peek_flag)
c5aa993b 124 return (codestream_peek ());
c906108c 125 else
c5aa993b 126 return (codestream_get ());
c906108c
SS
127}
128
129static void
fba45db2 130codestream_seek (CORE_ADDR place)
c906108c
SS
131{
132 codestream_next_addr = place / CODESTREAM_BUFSIZ;
133 codestream_next_addr *= CODESTREAM_BUFSIZ;
134 codestream_cnt = 0;
135 codestream_fill (1);
c5aa993b 136 while (codestream_tell () != place)
c906108c
SS
137 codestream_get ();
138}
139
140static void
fba45db2 141codestream_read (unsigned char *buf, int count)
c906108c
SS
142{
143 unsigned char *p;
144 int i;
145 p = buf;
146 for (i = 0; i < count; i++)
147 *p++ = codestream_get ();
148}
fc338970 149\f
c906108c 150
fc338970 151/* If the next instruction is a jump, move to its target. */
c906108c
SS
152
153static void
fba45db2 154i386_follow_jump (void)
c906108c
SS
155{
156 unsigned char buf[4];
157 long delta;
158
159 int data16;
160 CORE_ADDR pos;
161
162 pos = codestream_tell ();
163
164 data16 = 0;
165 if (codestream_peek () == 0x66)
166 {
167 codestream_get ();
168 data16 = 1;
169 }
170
171 switch (codestream_get ())
172 {
173 case 0xe9:
fc338970 174 /* Relative jump: if data16 == 0, disp32, else disp16. */
c906108c
SS
175 if (data16)
176 {
177 codestream_read (buf, 2);
178 delta = extract_signed_integer (buf, 2);
179
fc338970
MK
180 /* Include the size of the jmp instruction (including the
181 0x66 prefix). */
c5aa993b 182 pos += delta + 4;
c906108c
SS
183 }
184 else
185 {
186 codestream_read (buf, 4);
187 delta = extract_signed_integer (buf, 4);
188
189 pos += delta + 5;
190 }
191 break;
192 case 0xeb:
fc338970 193 /* Relative jump, disp8 (ignore data16). */
c906108c
SS
194 codestream_read (buf, 1);
195 /* Sign-extend it. */
196 delta = extract_signed_integer (buf, 1);
197
198 pos += delta + 2;
199 break;
200 }
201 codestream_seek (pos);
202}
203
fc338970
MK
204/* Find & return the amount a local space allocated, and advance the
205 codestream to the first register push (if any).
206
207 If the entry sequence doesn't make sense, return -1, and leave
208 codestream pointer at a random spot. */
c906108c
SS
209
210static long
fba45db2 211i386_get_frame_setup (CORE_ADDR pc)
c906108c
SS
212{
213 unsigned char op;
214
215 codestream_seek (pc);
216
217 i386_follow_jump ();
218
219 op = codestream_get ();
220
221 if (op == 0x58) /* popl %eax */
222 {
fc338970
MK
223 /* This function must start with
224
225 popl %eax 0x58
226 xchgl %eax, (%esp) 0x87 0x04 0x24
227 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
228
229 (the System V compiler puts out the second `xchg'
230 instruction, and the assembler doesn't try to optimize it, so
231 the 'sib' form gets generated). This sequence is used to get
232 the address of the return buffer for a function that returns
233 a structure. */
c906108c
SS
234 int pos;
235 unsigned char buf[4];
fc338970
MK
236 static unsigned char proto1[3] = { 0x87, 0x04, 0x24 };
237 static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 };
238
c906108c
SS
239 pos = codestream_tell ();
240 codestream_read (buf, 4);
241 if (memcmp (buf, proto1, 3) == 0)
242 pos += 3;
243 else if (memcmp (buf, proto2, 4) == 0)
244 pos += 4;
245
246 codestream_seek (pos);
fc338970 247 op = codestream_get (); /* Update next opcode. */
c906108c
SS
248 }
249
250 if (op == 0x68 || op == 0x6a)
251 {
fc338970
MK
252 /* This function may start with
253
254 pushl constant
255 call _probe
256 addl $4, %esp
257
258 followed by
259
260 pushl %ebp
261
262 etc. */
c906108c
SS
263 int pos;
264 unsigned char buf[8];
265
fc338970 266 /* Skip past the `pushl' instruction; it has either a one-byte
c906108c
SS
267 or a four-byte operand, depending on the opcode. */
268 pos = codestream_tell ();
269 if (op == 0x68)
270 pos += 4;
271 else
272 pos += 1;
273 codestream_seek (pos);
274
fc338970
MK
275 /* Read the following 8 bytes, which should be "call _probe" (6
276 bytes) followed by "addl $4,%esp" (2 bytes). */
c906108c
SS
277 codestream_read (buf, sizeof (buf));
278 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
279 pos += sizeof (buf);
280 codestream_seek (pos);
fc338970 281 op = codestream_get (); /* Update next opcode. */
c906108c
SS
282 }
283
284 if (op == 0x55) /* pushl %ebp */
c5aa993b 285 {
fc338970 286 /* Check for "movl %esp, %ebp" -- can be written in two ways. */
c906108c
SS
287 switch (codestream_get ())
288 {
289 case 0x8b:
290 if (codestream_get () != 0xec)
fc338970 291 return -1;
c906108c
SS
292 break;
293 case 0x89:
294 if (codestream_get () != 0xe5)
fc338970 295 return -1;
c906108c
SS
296 break;
297 default:
fc338970 298 return -1;
c906108c 299 }
fc338970
MK
300 /* Check for stack adjustment
301
302 subl $XXX, %esp
303
304 NOTE: You can't subtract a 16 bit immediate from a 32 bit
305 reg, so we don't have to worry about a data16 prefix. */
c906108c
SS
306 op = codestream_peek ();
307 if (op == 0x83)
308 {
fc338970 309 /* `subl' with 8 bit immediate. */
c906108c
SS
310 codestream_get ();
311 if (codestream_get () != 0xec)
fc338970 312 /* Some instruction starting with 0x83 other than `subl'. */
c906108c
SS
313 {
314 codestream_seek (codestream_tell () - 2);
315 return 0;
316 }
fc338970
MK
317 /* `subl' with signed byte immediate (though it wouldn't
318 make sense to be negative). */
c5aa993b 319 return (codestream_get ());
c906108c
SS
320 }
321 else if (op == 0x81)
322 {
323 char buf[4];
fc338970 324 /* Maybe it is `subl' with a 32 bit immedediate. */
c5aa993b 325 codestream_get ();
c906108c 326 if (codestream_get () != 0xec)
fc338970 327 /* Some instruction starting with 0x81 other than `subl'. */
c906108c
SS
328 {
329 codestream_seek (codestream_tell () - 2);
330 return 0;
331 }
fc338970 332 /* It is `subl' with a 32 bit immediate. */
c5aa993b 333 codestream_read ((unsigned char *) buf, 4);
c906108c
SS
334 return extract_signed_integer (buf, 4);
335 }
336 else
337 {
fc338970 338 return 0;
c906108c
SS
339 }
340 }
341 else if (op == 0xc8)
342 {
343 char buf[2];
fc338970 344 /* `enter' with 16 bit unsigned immediate. */
c5aa993b 345 codestream_read ((unsigned char *) buf, 2);
fc338970 346 codestream_get (); /* Flush final byte of enter instruction. */
c906108c
SS
347 return extract_unsigned_integer (buf, 2);
348 }
349 return (-1);
350}
351
c833a37e
MK
352/* Return the chain-pointer for FRAME. In the case of the i386, the
353 frame's nominal address is the address of a 4-byte word containing
354 the calling frame's address. */
355
356CORE_ADDR
357i386_frame_chain (struct frame_info *frame)
358{
359 if (frame->signal_handler_caller)
360 return frame->frame;
361
362 if (! inside_entry_file (frame->pc))
363 return read_memory_unsigned_integer (frame->frame, 4);
364
365 return 0;
366}
367
539ffe0b
MK
368/* Determine whether the function invocation represented by FRAME does
369 not have a from on the stack associated with it. If it does not,
370 return non-zero, otherwise return zero. */
371
372int
373i386_frameless_function_invocation (struct frame_info *frame)
374{
375 if (frame->signal_handler_caller)
376 return 0;
377
378 return frameless_look_for_prologue (frame);
379}
380
0d17c81d
MK
381/* Return the saved program counter for FRAME. */
382
383CORE_ADDR
384i386_frame_saved_pc (struct frame_info *frame)
385{
386 /* FIXME: kettenis/2001-05-09: Conditionalizing the next bit of code
387 on SIGCONTEXT_PC_OFFSET and I386V4_SIGTRAMP_SAVED_PC should be
388 considered a temporary hack. I plan to come up with something
389 better when we go multi-arch. */
390#if defined (SIGCONTEXT_PC_OFFSET) || defined (I386V4_SIGTRAMP_SAVED_PC)
391 if (frame->signal_handler_caller)
392 return sigtramp_saved_pc (frame);
393#endif
394
395 return read_memory_unsigned_integer (frame->frame + 4, 4);
396}
397
ed84f6c1
MK
398/* Immediately after a function call, return the saved pc. */
399
400CORE_ADDR
401i386_saved_pc_after_call (struct frame_info *frame)
402{
403 return read_memory_unsigned_integer (read_register (SP_REGNUM), 4);
404}
405
c906108c
SS
406/* Return number of args passed to a frame.
407 Can return -1, meaning no way to tell. */
408
409int
fba45db2 410i386_frame_num_args (struct frame_info *fi)
c906108c
SS
411{
412#if 1
413 return -1;
414#else
415 /* This loses because not only might the compiler not be popping the
fc338970
MK
416 args right after the function call, it might be popping args from
417 both this call and a previous one, and we would say there are
418 more args than there really are. */
c906108c 419
c5aa993b
JM
420 int retpc;
421 unsigned char op;
c906108c
SS
422 struct frame_info *pfi;
423
fc338970 424 /* On the i386, the instruction following the call could be:
c906108c
SS
425 popl %ecx - one arg
426 addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits
fc338970 427 anything else - zero args. */
c906108c
SS
428
429 int frameless;
430
392a587b 431 frameless = FRAMELESS_FUNCTION_INVOCATION (fi);
c906108c 432 if (frameless)
fc338970
MK
433 /* In the absence of a frame pointer, GDB doesn't get correct
434 values for nameless arguments. Return -1, so it doesn't print
435 any nameless arguments. */
c906108c
SS
436 return -1;
437
c5aa993b 438 pfi = get_prev_frame (fi);
c906108c
SS
439 if (pfi == 0)
440 {
fc338970
MK
441 /* NOTE: This can happen if we are looking at the frame for
442 main, because FRAME_CHAIN_VALID won't let us go into start.
443 If we have debugging symbols, that's not really a big deal;
444 it just means it will only show as many arguments to main as
445 are declared. */
c906108c
SS
446 return -1;
447 }
448 else
449 {
c5aa993b
JM
450 retpc = pfi->pc;
451 op = read_memory_integer (retpc, 1);
fc338970 452 if (op == 0x59) /* pop %ecx */
c5aa993b 453 return 1;
c906108c
SS
454 else if (op == 0x83)
455 {
c5aa993b
JM
456 op = read_memory_integer (retpc + 1, 1);
457 if (op == 0xc4)
458 /* addl $<signed imm 8 bits>, %esp */
459 return (read_memory_integer (retpc + 2, 1) & 0xff) / 4;
c906108c
SS
460 else
461 return 0;
462 }
fc338970
MK
463 else if (op == 0x81) /* `add' with 32 bit immediate. */
464 {
c5aa993b
JM
465 op = read_memory_integer (retpc + 1, 1);
466 if (op == 0xc4)
467 /* addl $<imm 32>, %esp */
468 return read_memory_integer (retpc + 2, 4) / 4;
c906108c
SS
469 else
470 return 0;
471 }
472 else
473 {
474 return 0;
475 }
476 }
477#endif
478}
479
fc338970
MK
480/* Parse the first few instructions the function to see what registers
481 were stored.
482
483 We handle these cases:
484
485 The startup sequence can be at the start of the function, or the
486 function can start with a branch to startup code at the end.
487
488 %ebp can be set up with either the 'enter' instruction, or "pushl
489 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
490 once used in the System V compiler).
491
492 Local space is allocated just below the saved %ebp by either the
493 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
494 bit unsigned argument for space to allocate, and the 'addl'
495 instruction could have either a signed byte, or 32 bit immediate.
496
497 Next, the registers used by this function are pushed. With the
498 System V compiler they will always be in the order: %edi, %esi,
499 %ebx (and sometimes a harmless bug causes it to also save but not
500 restore %eax); however, the code below is willing to see the pushes
501 in any order, and will handle up to 8 of them.
502
503 If the setup sequence is at the end of the function, then the next
504 instruction will be a branch back to the start. */
c906108c
SS
505
506void
fba45db2 507i386_frame_init_saved_regs (struct frame_info *fip)
c906108c
SS
508{
509 long locals = -1;
510 unsigned char op;
511 CORE_ADDR dummy_bottom;
fc338970 512 CORE_ADDR addr;
c906108c
SS
513 CORE_ADDR pc;
514 int i;
c5aa993b 515
1211c4e4
AC
516 if (fip->saved_regs)
517 return;
518
519 frame_saved_regs_zalloc (fip);
c5aa993b 520
fc338970
MK
521 /* If the frame is the end of a dummy, compute where the beginning
522 would be. */
c906108c 523 dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH;
c5aa993b 524
fc338970 525 /* Check if the PC points in the stack, in a dummy frame. */
c5aa993b 526 if (dummy_bottom <= fip->pc && fip->pc <= fip->frame)
c906108c 527 {
fc338970
MK
528 /* All registers were saved by push_call_dummy. */
529 addr = fip->frame;
c5aa993b 530 for (i = 0; i < NUM_REGS; i++)
c906108c 531 {
fc338970
MK
532 addr -= REGISTER_RAW_SIZE (i);
533 fip->saved_regs[i] = addr;
c906108c
SS
534 }
535 return;
536 }
c5aa993b 537
c906108c
SS
538 pc = get_pc_function_start (fip->pc);
539 if (pc != 0)
540 locals = i386_get_frame_setup (pc);
c5aa993b
JM
541
542 if (locals >= 0)
c906108c 543 {
fc338970 544 addr = fip->frame - 4 - locals;
c5aa993b 545 for (i = 0; i < 8; i++)
c906108c
SS
546 {
547 op = codestream_get ();
548 if (op < 0x50 || op > 0x57)
549 break;
550#ifdef I386_REGNO_TO_SYMMETRY
551 /* Dynix uses different internal numbering. Ick. */
fc338970 552 fip->saved_regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = addr;
c906108c 553#else
fc338970 554 fip->saved_regs[op - 0x50] = addr;
c906108c 555#endif
fc338970 556 addr -= 4;
c906108c
SS
557 }
558 }
c5aa993b 559
1211c4e4
AC
560 fip->saved_regs[PC_REGNUM] = fip->frame + 4;
561 fip->saved_regs[FP_REGNUM] = fip->frame;
c906108c
SS
562}
563
fc338970 564/* Return PC of first real instruction. */
c906108c
SS
565
566int
fba45db2 567i386_skip_prologue (int pc)
c906108c
SS
568{
569 unsigned char op;
570 int i;
c5aa993b 571 static unsigned char pic_pat[6] =
fc338970
MK
572 { 0xe8, 0, 0, 0, 0, /* call 0x0 */
573 0x5b, /* popl %ebx */
c5aa993b 574 };
c906108c 575 CORE_ADDR pos;
c5aa993b 576
c906108c
SS
577 if (i386_get_frame_setup (pc) < 0)
578 return (pc);
c5aa993b 579
fc338970
MK
580 /* Found valid frame setup -- codestream now points to start of push
581 instructions for saving registers. */
c5aa993b 582
fc338970 583 /* Skip over register saves. */
c906108c
SS
584 for (i = 0; i < 8; i++)
585 {
586 op = codestream_peek ();
fc338970 587 /* Break if not `pushl' instrunction. */
c5aa993b 588 if (op < 0x50 || op > 0x57)
c906108c
SS
589 break;
590 codestream_get ();
591 }
592
fc338970
MK
593 /* The native cc on SVR4 in -K PIC mode inserts the following code
594 to get the address of the global offset table (GOT) into register
595 %ebx
596
597 call 0x0
598 popl %ebx
599 movl %ebx,x(%ebp) (optional)
600 addl y,%ebx
601
c906108c
SS
602 This code is with the rest of the prologue (at the end of the
603 function), so we have to skip it to get to the first real
604 instruction at the start of the function. */
c5aa993b 605
c906108c
SS
606 pos = codestream_tell ();
607 for (i = 0; i < 6; i++)
608 {
609 op = codestream_get ();
c5aa993b 610 if (pic_pat[i] != op)
c906108c
SS
611 break;
612 }
613 if (i == 6)
614 {
615 unsigned char buf[4];
616 long delta = 6;
617
618 op = codestream_get ();
c5aa993b 619 if (op == 0x89) /* movl %ebx, x(%ebp) */
c906108c
SS
620 {
621 op = codestream_get ();
fc338970 622 if (op == 0x5d) /* One byte offset from %ebp. */
c906108c
SS
623 {
624 delta += 3;
625 codestream_read (buf, 1);
626 }
fc338970 627 else if (op == 0x9d) /* Four byte offset from %ebp. */
c906108c
SS
628 {
629 delta += 6;
630 codestream_read (buf, 4);
631 }
fc338970 632 else /* Unexpected instruction. */
c5aa993b
JM
633 delta = -1;
634 op = codestream_get ();
c906108c 635 }
c5aa993b
JM
636 /* addl y,%ebx */
637 if (delta > 0 && op == 0x81 && codestream_get () == 0xc3)
c906108c 638 {
c5aa993b 639 pos += delta + 6;
c906108c
SS
640 }
641 }
642 codestream_seek (pos);
c5aa993b 643
c906108c 644 i386_follow_jump ();
c5aa993b 645
c906108c
SS
646 return (codestream_tell ());
647}
648
649void
fba45db2 650i386_push_dummy_frame (void)
c906108c
SS
651{
652 CORE_ADDR sp = read_register (SP_REGNUM);
653 int regnum;
654 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 655
c906108c
SS
656 sp = push_word (sp, read_register (PC_REGNUM));
657 sp = push_word (sp, read_register (FP_REGNUM));
658 write_register (FP_REGNUM, sp);
659 for (regnum = 0; regnum < NUM_REGS; regnum++)
660 {
661 read_register_gen (regnum, regbuf);
662 sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum));
663 }
664 write_register (SP_REGNUM, sp);
665}
666
a7769679
MK
667/* Insert the (relative) function address into the call sequence
668 stored at DYMMY. */
669
670void
671i386_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
672 value_ptr *args, struct type *type, int gcc_p)
673{
674 int from, to, delta, loc;
675
676 loc = (int)(read_register (SP_REGNUM) - CALL_DUMMY_LENGTH);
677 from = loc + 5;
678 to = (int)(fun);
679 delta = to - from;
680
681 *((char *)(dummy) + 1) = (delta & 0xff);
682 *((char *)(dummy) + 2) = ((delta >> 8) & 0xff);
683 *((char *)(dummy) + 3) = ((delta >> 16) & 0xff);
684 *((char *)(dummy) + 4) = ((delta >> 24) & 0xff);
685}
686
c906108c 687void
fba45db2 688i386_pop_frame (void)
c906108c
SS
689{
690 struct frame_info *frame = get_current_frame ();
691 CORE_ADDR fp;
692 int regnum;
c906108c 693 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 694
c906108c 695 fp = FRAME_FP (frame);
1211c4e4
AC
696 i386_frame_init_saved_regs (frame);
697
c5aa993b 698 for (regnum = 0; regnum < NUM_REGS; regnum++)
c906108c 699 {
fc338970
MK
700 CORE_ADDR addr;
701 addr = frame->saved_regs[regnum];
702 if (addr)
c906108c 703 {
fc338970 704 read_memory (addr, regbuf, REGISTER_RAW_SIZE (regnum));
c906108c
SS
705 write_register_bytes (REGISTER_BYTE (regnum), regbuf,
706 REGISTER_RAW_SIZE (regnum));
707 }
708 }
709 write_register (FP_REGNUM, read_memory_integer (fp, 4));
710 write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
711 write_register (SP_REGNUM, fp + 8);
712 flush_cached_frames ();
713}
fc338970 714\f
c906108c
SS
715
716#ifdef GET_LONGJMP_TARGET
717
fc338970
MK
718/* Figure out where the longjmp will land. Slurp the args out of the
719 stack. We expect the first arg to be a pointer to the jmp_buf
720 structure from which we extract the pc (JB_PC) that we will land
721 at. The pc is copied into PC. This routine returns true on
722 success. */
c906108c
SS
723
724int
fba45db2 725get_longjmp_target (CORE_ADDR *pc)
c906108c
SS
726{
727 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
728 CORE_ADDR sp, jb_addr;
729
730 sp = read_register (SP_REGNUM);
731
fc338970 732 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack. */
c906108c
SS
733 buf,
734 TARGET_PTR_BIT / TARGET_CHAR_BIT))
735 return 0;
736
737 jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
738
739 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
740 TARGET_PTR_BIT / TARGET_CHAR_BIT))
741 return 0;
742
743 *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
744
745 return 1;
746}
747
748#endif /* GET_LONGJMP_TARGET */
fc338970 749\f
c906108c 750
22f8ba57
MK
751CORE_ADDR
752i386_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
753 int struct_return, CORE_ADDR struct_addr)
754{
755 sp = default_push_arguments (nargs, args, sp, struct_return, struct_addr);
756
757 if (struct_return)
758 {
759 char buf[4];
760
761 sp -= 4;
762 store_address (buf, 4, struct_addr);
763 write_memory (sp, buf, 4);
764 }
765
766 return sp;
767}
768
769void
770i386_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
771{
772 /* Do nothing. Everything was already done by i386_push_arguments. */
773}
774
1a309862
MK
775/* These registers are used for returning integers (and on some
776 targets also for returning `struct' and `union' values when their
ef9dff19 777 size and alignment match an integer type). */
1a309862
MK
778#define LOW_RETURN_REGNUM 0 /* %eax */
779#define HIGH_RETURN_REGNUM 2 /* %edx */
780
781/* Extract from an array REGBUF containing the (raw) register state, a
782 function return value of TYPE, and copy that, in virtual format,
783 into VALBUF. */
784
c906108c 785void
1a309862 786i386_extract_return_value (struct type *type, char *regbuf, char *valbuf)
c906108c 787{
1a309862
MK
788 int len = TYPE_LENGTH (type);
789
1e8d0a7b
MK
790 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
791 && TYPE_NFIELDS (type) == 1)
3df1b9b4
MK
792 {
793 i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regbuf, valbuf);
794 return;
795 }
1e8d0a7b
MK
796
797 if (TYPE_CODE (type) == TYPE_CODE_FLT)
c906108c 798 {
1a309862
MK
799 if (NUM_FREGS == 0)
800 {
801 warning ("Cannot find floating-point return value.");
802 memset (valbuf, 0, len);
ef9dff19 803 return;
1a309862
MK
804 }
805
806 /* Floating-point return values can be found in %st(0). */
807 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
808 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
809 {
810 /* Copy straight over, but take care of the padding. */
811 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM)],
812 FPU_REG_RAW_SIZE);
813 memset (valbuf + FPU_REG_RAW_SIZE, 0, len - FPU_REG_RAW_SIZE);
814 }
815 else
816 {
817 /* Convert the extended floating-point number found in
818 %st(0) to the desired type. This is probably not exactly
819 how it would happen on the target itself, but it is the
820 best we can do. */
821 DOUBLEST val;
822 floatformat_to_doublest (&floatformat_i387_ext,
823 &regbuf[REGISTER_BYTE (FP0_REGNUM)], &val);
824 store_floating (valbuf, TYPE_LENGTH (type), val);
825 }
c906108c
SS
826 }
827 else
c5aa993b 828 {
d4f3574e
SS
829 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
830 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
831
832 if (len <= low_size)
1a309862 833 memcpy (valbuf, &regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)], len);
d4f3574e
SS
834 else if (len <= (low_size + high_size))
835 {
836 memcpy (valbuf,
1a309862 837 &regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)], low_size);
d4f3574e 838 memcpy (valbuf + low_size,
1a309862 839 &regbuf[REGISTER_BYTE (HIGH_RETURN_REGNUM)], len - low_size);
d4f3574e
SS
840 }
841 else
8e65ff28
AC
842 internal_error (__FILE__, __LINE__,
843 "Cannot extract return value of %d bytes long.", len);
c906108c
SS
844 }
845}
846
ef9dff19
MK
847/* Write into the appropriate registers a function return value stored
848 in VALBUF of type TYPE, given in virtual format. */
849
850void
851i386_store_return_value (struct type *type, char *valbuf)
852{
853 int len = TYPE_LENGTH (type);
854
1e8d0a7b
MK
855 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
856 && TYPE_NFIELDS (type) == 1)
3df1b9b4
MK
857 {
858 i386_store_return_value (TYPE_FIELD_TYPE (type, 0), valbuf);
859 return;
860 }
1e8d0a7b
MK
861
862 if (TYPE_CODE (type) == TYPE_CODE_FLT)
ef9dff19
MK
863 {
864 if (NUM_FREGS == 0)
865 {
866 warning ("Cannot set floating-point return value.");
867 return;
868 }
869
870 /* Floating-point return values can be found in %st(0). */
871 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
872 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
873 {
874 /* Copy straight over. */
875 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf,
876 FPU_REG_RAW_SIZE);
877 }
878 else
879 {
880 char buf[FPU_REG_RAW_SIZE];
881 DOUBLEST val;
882
883 /* Convert the value found in VALBUF to the extended
884 floating point format used by the FPU. This is probably
885 not exactly how it would happen on the target itself, but
886 it is the best we can do. */
887 val = extract_floating (valbuf, TYPE_LENGTH (type));
888 floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
889 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf,
890 FPU_REG_RAW_SIZE);
891 }
892 }
893 else
894 {
895 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
896 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
897
898 if (len <= low_size)
899 write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM), valbuf, len);
900 else if (len <= (low_size + high_size))
901 {
902 write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM),
903 valbuf, low_size);
904 write_register_bytes (REGISTER_BYTE (HIGH_RETURN_REGNUM),
905 valbuf + low_size, len - low_size);
906 }
907 else
8e65ff28
AC
908 internal_error (__FILE__, __LINE__,
909 "Cannot store return value of %d bytes long.", len);
ef9dff19
MK
910 }
911}
f7af9647
MK
912
913/* Extract from an array REGBUF containing the (raw) register state
914 the address in which a function should return its structure value,
915 as a CORE_ADDR. */
916
917CORE_ADDR
918i386_extract_struct_value_address (char *regbuf)
919{
920 return extract_address (&regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)],
921 REGISTER_RAW_SIZE (LOW_RETURN_REGNUM));
922}
fc338970 923\f
ef9dff19 924
d7a0d72c
MK
925/* Return the GDB type object for the "standard" data type of data in
926 register REGNUM. Perhaps %esi and %edi should go here, but
927 potentially they could be used for things other than address. */
928
929struct type *
930i386_register_virtual_type (int regnum)
931{
932 if (regnum == PC_REGNUM || regnum == FP_REGNUM || regnum == SP_REGNUM)
933 return lookup_pointer_type (builtin_type_void);
934
935 if (IS_FP_REGNUM (regnum))
936 return builtin_type_long_double;
937
938 if (IS_SSE_REGNUM (regnum))
939 return builtin_type_v4sf;
940
941 return builtin_type_int;
942}
943
944/* Return true iff register REGNUM's virtual format is different from
945 its raw format. Note that this definition assumes that the host
946 supports IEEE 32-bit floats, since it doesn't say that SSE
947 registers need conversion. Even if we can't find a counterexample,
948 this is still sloppy. */
949
950int
951i386_register_convertible (int regnum)
952{
953 return IS_FP_REGNUM (regnum);
954}
955
ac27f131
MK
956/* Convert data from raw format for register REGNUM in buffer FROM to
957 virtual format with type TYPE in buffer TO. In principle both
958 formats are identical except that the virtual format has two extra
959 bytes appended that aren't used. We set these to zero. */
960
961void
962i386_register_convert_to_virtual (int regnum, struct type *type,
963 char *from, char *to)
964{
965 /* Copy straight over, but take care of the padding. */
966 memcpy (to, from, FPU_REG_RAW_SIZE);
967 memset (to + FPU_REG_RAW_SIZE, 0, TYPE_LENGTH (type) - FPU_REG_RAW_SIZE);
968}
969
970/* Convert data from virtual format with type TYPE in buffer FROM to
971 raw format for register REGNUM in buffer TO. Simply omit the two
972 unused bytes. */
973
974void
975i386_register_convert_to_raw (struct type *type, int regnum,
976 char *from, char *to)
977{
978 memcpy (to, from, FPU_REG_RAW_SIZE);
979}
ac27f131 980\f
fc338970 981
c906108c 982#ifdef I386V4_SIGTRAMP_SAVED_PC
fc338970
MK
983/* Get saved user PC for sigtramp from the pushed ucontext on the
984 stack for all three variants of SVR4 sigtramps. */
c906108c
SS
985
986CORE_ADDR
fba45db2 987i386v4_sigtramp_saved_pc (struct frame_info *frame)
c906108c
SS
988{
989 CORE_ADDR saved_pc_offset = 4;
990 char *name = NULL;
991
992 find_pc_partial_function (frame->pc, &name, NULL, NULL);
993 if (name)
994 {
995 if (STREQ (name, "_sigreturn"))
996 saved_pc_offset = 132 + 14 * 4;
997 else if (STREQ (name, "_sigacthandler"))
998 saved_pc_offset = 80 + 14 * 4;
999 else if (STREQ (name, "sigvechandler"))
1000 saved_pc_offset = 120 + 14 * 4;
1001 }
1002
1003 if (frame->next)
1004 return read_memory_integer (frame->next->frame + saved_pc_offset, 4);
1005 return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4);
1006}
1007#endif /* I386V4_SIGTRAMP_SAVED_PC */
fc338970 1008\f
a0b3c4fd 1009
c906108c 1010#ifdef STATIC_TRANSFORM_NAME
fc338970
MK
1011/* SunPRO encodes the static variables. This is not related to C++
1012 mangling, it is done for C too. */
c906108c
SS
1013
1014char *
fba45db2 1015sunpro_static_transform_name (char *name)
c906108c
SS
1016{
1017 char *p;
1018 if (IS_STATIC_TRANSFORM_NAME (name))
1019 {
fc338970
MK
1020 /* For file-local statics there will be a period, a bunch of
1021 junk (the contents of which match a string given in the
c5aa993b
JM
1022 N_OPT), a period and the name. For function-local statics
1023 there will be a bunch of junk (which seems to change the
1024 second character from 'A' to 'B'), a period, the name of the
1025 function, and the name. So just skip everything before the
1026 last period. */
c906108c
SS
1027 p = strrchr (name, '.');
1028 if (p != NULL)
1029 name = p + 1;
1030 }
1031 return name;
1032}
1033#endif /* STATIC_TRANSFORM_NAME */
fc338970 1034\f
c906108c 1035
fc338970 1036/* Stuff for WIN32 PE style DLL's but is pretty generic really. */
c906108c
SS
1037
1038CORE_ADDR
fba45db2 1039skip_trampoline_code (CORE_ADDR pc, char *name)
c906108c 1040{
fc338970 1041 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
c906108c 1042 {
c5aa993b 1043 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
c906108c 1044 struct minimal_symbol *indsym =
fc338970 1045 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
c5aa993b 1046 char *symname = indsym ? SYMBOL_NAME (indsym) : 0;
c906108c 1047
c5aa993b 1048 if (symname)
c906108c 1049 {
c5aa993b
JM
1050 if (strncmp (symname, "__imp_", 6) == 0
1051 || strncmp (symname, "_imp_", 5) == 0)
c906108c
SS
1052 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
1053 }
1054 }
fc338970 1055 return 0; /* Not a trampoline. */
c906108c 1056}
fc338970
MK
1057\f
1058
1059/* We have two flavours of disassembly. The machinery on this page
1060 deals with switching between those. */
c906108c
SS
1061
1062static int
fba45db2 1063gdb_print_insn_i386 (bfd_vma memaddr, disassemble_info *info)
c906108c
SS
1064{
1065 if (disassembly_flavor == att_flavor)
1066 return print_insn_i386_att (memaddr, info);
1067 else if (disassembly_flavor == intel_flavor)
1068 return print_insn_i386_intel (memaddr, info);
fc338970
MK
1069 /* Never reached -- disassembly_flavour is always either att_flavor
1070 or intel_flavor. */
e1e9e218 1071 internal_error (__FILE__, __LINE__, "failed internal consistency check");
7a292a7a
SS
1072}
1073
fc338970
MK
1074/* If the disassembly mode is intel, we have to also switch the bfd
1075 mach_type. This function is run in the set disassembly_flavor
7a292a7a
SS
1076 command, and does that. */
1077
1078static void
fba45db2
KB
1079set_disassembly_flavor_sfunc (char *args, int from_tty,
1080 struct cmd_list_element *c)
7a292a7a
SS
1081{
1082 set_disassembly_flavor ();
7a292a7a
SS
1083}
1084
1085static void
fba45db2 1086set_disassembly_flavor (void)
7a292a7a
SS
1087{
1088 if (disassembly_flavor == att_flavor)
1089 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386);
1090 else if (disassembly_flavor == intel_flavor)
fc338970
MK
1091 set_architecture_from_arch_mach (bfd_arch_i386,
1092 bfd_mach_i386_i386_intel_syntax);
c906108c 1093}
fc338970 1094\f
2acceee2 1095
28e9e0f0
MK
1096/* Provide a prototype to silence -Wmissing-prototypes. */
1097void _initialize_i386_tdep (void);
1098
c906108c 1099void
fba45db2 1100_initialize_i386_tdep (void)
c906108c 1101{
917317f4
JM
1102 /* Initialize the table saying where each register starts in the
1103 register file. */
1104 {
1105 int i, offset;
1106
1107 offset = 0;
1108 for (i = 0; i < MAX_NUM_REGS; i++)
1109 {
1110 i386_register_byte[i] = offset;
1111 offset += i386_register_raw_size[i];
1112 }
1113 }
1114
1115 /* Initialize the table of virtual register sizes. */
1116 {
1117 int i;
1118
1119 for (i = 0; i < MAX_NUM_REGS; i++)
1120 i386_register_virtual_size[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i));
1121 }
c5aa993b 1122
c906108c
SS
1123 tm_print_insn = gdb_print_insn_i386;
1124 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach;
1125
fc338970 1126 /* Add the variable that controls the disassembly flavor. */
917317f4
JM
1127 {
1128 struct cmd_list_element *new_cmd;
7a292a7a 1129
917317f4
JM
1130 new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class,
1131 valid_flavors,
1ed2a135 1132 &disassembly_flavor,
fc338970
MK
1133 "\
1134Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
c906108c 1135and the default value is \"att\".",
917317f4
JM
1136 &setlist);
1137 new_cmd->function.sfunc = set_disassembly_flavor_sfunc;
1138 add_show_from_set (new_cmd, &showlist);
1139 }
c5aa993b 1140
7a292a7a 1141 /* Finally, initialize the disassembly flavor to the default given
fc338970 1142 in the disassembly_flavor variable. */
7a292a7a 1143 set_disassembly_flavor ();
c906108c 1144}
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