Fri Jan 29 12:57:34 1999 Elena Zannoni <ezannoni@kwikemart.cygnus.com>
[deliverable/binutils-gdb.git] / gdb / i386-tdep.c
CommitLineData
f2ebc25f 1/* Intel 386 target-dependent stuff.
c98fe0c1
JI
2 Copyright (C) 1988, 1989, 1991, 1994, 1995, 1996, 1998
3 Free Software Foundation, Inc.
bd5635a1
RP
4
5This file is part of GDB.
6
7d9884b9 7This program is free software; you can redistribute it and/or modify
bd5635a1 8it under the terms of the GNU General Public License as published by
7d9884b9
JG
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
bd5635a1 11
7d9884b9 12This program is distributed in the hope that it will be useful,
bd5635a1
RP
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
7d9884b9 18along with this program; if not, write to the Free Software
f33b2c13 19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
bd5635a1 20
bd5635a1 21#include "defs.h"
f33b2c13 22#include "gdb_string.h"
bd5635a1
RP
23#include "frame.h"
24#include "inferior.h"
25#include "gdbcore.h"
51b57ded 26#include "target.h"
eae3f093 27#include "floatformat.h"
28ee4b42 28#include "symtab.h"
f33b2c13 29#include "gdbcmd.h"
c98fe0c1 30#include "command.h"
bd5635a1 31
f33b2c13 32static long i386_get_frame_setup PARAMS ((CORE_ADDR));
d747e0af 33
1a494973 34static void i386_follow_jump PARAMS ((void));
d747e0af 35
1a494973 36static void codestream_read PARAMS ((unsigned char *, int));
d747e0af 37
f33b2c13 38static void codestream_seek PARAMS ((CORE_ADDR));
d747e0af 39
f33b2c13 40static unsigned char codestream_fill PARAMS ((int));
bd5635a1 41
c98fe0c1
JI
42CORE_ADDR skip_trampoline_code PARAMS ((CORE_ADDR, char *));
43
44static int gdb_print_insn_i386 (bfd_vma, disassemble_info *);
45
46void _initialize_i386_tdep PARAMS ((void));
47
48/* This is the variable the is set with "set disassembly-flavor",
49 and its legitimate values. */
50static char att_flavor[] = "att";
51static char intel_flavor[] = "intel";
52static char *valid_flavors[] = {
53 att_flavor,
54 intel_flavor,
55 NULL
56};
57static char *disassembly_flavor = att_flavor;
58
59/* Get rid of these defines as soon as there are two functions
60 to implement different disassembly flavors. */
61#define print_insn_i386_att print_insn_i386
62#define print_insn_i386_intel print_insn_i386
63
d747e0af
MT
64/* Stdio style buffering was used to minimize calls to ptrace, but this
65 buffering did not take into account that the code section being accessed
66 may not be an even number of buffers long (even if the buffer is only
67 sizeof(int) long). In cases where the code section size happened to
68 be a non-integral number of buffers long, attempting to read the last
69 buffer would fail. Simply using target_read_memory and ignoring errors,
70 rather than read_memory, is not the correct solution, since legitimate
71 access errors would then be totally ignored. To properly handle this
72 situation and continue to use buffering would require that this code
73 be able to determine the minimum code section size granularity (not the
74 alignment of the section itself, since the actual failing case that
75 pointed out this problem had a section alignment of 4 but was not a
76 multiple of 4 bytes long), on a target by target basis, and then
77 adjust it's buffer size accordingly. This is messy, but potentially
78 feasible. It probably needs the bfd library's help and support. For
79 now, the buffer size is set to 1. (FIXME -fnf) */
80
81#define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */
bd5635a1
RP
82static CORE_ADDR codestream_next_addr;
83static CORE_ADDR codestream_addr;
d747e0af 84static unsigned char codestream_buf[CODESTREAM_BUFSIZ];
bd5635a1
RP
85static int codestream_off;
86static int codestream_cnt;
87
88#define codestream_tell() (codestream_addr + codestream_off)
89#define codestream_peek() (codestream_cnt == 0 ? \
90 codestream_fill(1): codestream_buf[codestream_off])
91#define codestream_get() (codestream_cnt-- == 0 ? \
92 codestream_fill(0) : codestream_buf[codestream_off++])
93
94static unsigned char
95codestream_fill (peek_flag)
d747e0af 96 int peek_flag;
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RP
97{
98 codestream_addr = codestream_next_addr;
d747e0af 99 codestream_next_addr += CODESTREAM_BUFSIZ;
bd5635a1 100 codestream_off = 0;
d747e0af 101 codestream_cnt = CODESTREAM_BUFSIZ;
34df79fc 102 read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ);
bd5635a1
RP
103
104 if (peek_flag)
105 return (codestream_peek());
106 else
107 return (codestream_get());
108}
109
110static void
111codestream_seek (place)
f33b2c13 112 CORE_ADDR place;
bd5635a1 113{
d747e0af
MT
114 codestream_next_addr = place / CODESTREAM_BUFSIZ;
115 codestream_next_addr *= CODESTREAM_BUFSIZ;
bd5635a1
RP
116 codestream_cnt = 0;
117 codestream_fill (1);
118 while (codestream_tell() != place)
119 codestream_get ();
120}
121
122static void
123codestream_read (buf, count)
124 unsigned char *buf;
d747e0af 125 int count;
bd5635a1
RP
126{
127 unsigned char *p;
128 int i;
129 p = buf;
130 for (i = 0; i < count; i++)
131 *p++ = codestream_get ();
132}
133
134/* next instruction is a jump, move to target */
d747e0af
MT
135
136static void
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RP
137i386_follow_jump ()
138{
28ee4b42
PS
139 unsigned char buf[4];
140 long delta;
141
bd5635a1 142 int data16;
28ee4b42
PS
143 CORE_ADDR pos;
144
bd5635a1 145 pos = codestream_tell ();
28ee4b42 146
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RP
147 data16 = 0;
148 if (codestream_peek () == 0x66)
149 {
150 codestream_get ();
151 data16 = 1;
152 }
28ee4b42 153
bd5635a1
RP
154 switch (codestream_get ())
155 {
156 case 0xe9:
157 /* relative jump: if data16 == 0, disp32, else disp16 */
158 if (data16)
159 {
28ee4b42
PS
160 codestream_read (buf, 2);
161 delta = extract_signed_integer (buf, 2);
f2ebc25f
JK
162
163 /* include size of jmp inst (including the 0x66 prefix). */
28ee4b42 164 pos += delta + 4;
bd5635a1
RP
165 }
166 else
167 {
28ee4b42
PS
168 codestream_read (buf, 4);
169 delta = extract_signed_integer (buf, 4);
170
171 pos += delta + 5;
bd5635a1
RP
172 }
173 break;
174 case 0xeb:
175 /* relative jump, disp8 (ignore data16) */
28ee4b42
PS
176 codestream_read (buf, 1);
177 /* Sign-extend it. */
178 delta = extract_signed_integer (buf, 1);
179
180 pos += delta + 2;
bd5635a1
RP
181 break;
182 }
f2ebc25f 183 codestream_seek (pos);
bd5635a1
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184}
185
186/*
187 * find & return amound a local space allocated, and advance codestream to
188 * first register push (if any)
189 *
190 * if entry sequence doesn't make sense, return -1, and leave
191 * codestream pointer random
192 */
d747e0af 193
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RP
194static long
195i386_get_frame_setup (pc)
f33b2c13 196 CORE_ADDR pc;
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RP
197{
198 unsigned char op;
28ee4b42 199
bd5635a1 200 codestream_seek (pc);
28ee4b42 201
bd5635a1 202 i386_follow_jump ();
28ee4b42 203
bd5635a1 204 op = codestream_get ();
28ee4b42 205
bd5635a1
RP
206 if (op == 0x58) /* popl %eax */
207 {
208 /*
209 * this function must start with
210 *
211 * popl %eax 0x58
212 * xchgl %eax, (%esp) 0x87 0x04 0x24
213 * or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
214 *
215 * (the system 5 compiler puts out the second xchg
216 * inst, and the assembler doesn't try to optimize it,
217 * so the 'sib' form gets generated)
218 *
219 * this sequence is used to get the address of the return
220 * buffer for a function that returns a structure
221 */
222 int pos;
223 unsigned char buf[4];
224 static unsigned char proto1[3] = { 0x87,0x04,0x24 };
225 static unsigned char proto2[4] = { 0x87,0x44,0x24,0x00 };
226 pos = codestream_tell ();
227 codestream_read (buf, 4);
51b57ded 228 if (memcmp (buf, proto1, 3) == 0)
bd5635a1 229 pos += 3;
51b57ded 230 else if (memcmp (buf, proto2, 4) == 0)
bd5635a1 231 pos += 4;
28ee4b42 232
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RP
233 codestream_seek (pos);
234 op = codestream_get (); /* update next opcode */
235 }
28ee4b42 236
c98fe0c1
JI
237 if (op == 0x68 || op == 0x6a)
238 {
239 /*
240 * this function may start with
241 *
242 * pushl constant
243 * call _probe
244 * addl $4, %esp
245 * followed by
246 * pushl %ebp
247 * etc.
248 */
249 int pos;
250 unsigned char buf[8];
251
252 /* Skip past the pushl instruction; it has either a one-byte
253 or a four-byte operand, depending on the opcode. */
254 pos = codestream_tell ();
255 if (op == 0x68)
256 pos += 4;
257 else
258 pos += 1;
259 codestream_seek (pos);
260
261 /* Read the following 8 bytes, which should be "call _probe" (6 bytes)
262 followed by "addl $4,%esp" (2 bytes). */
263 codestream_read (buf, sizeof (buf));
264 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
265 pos += sizeof (buf);
266 codestream_seek (pos);
267 op = codestream_get (); /* update next opcode */
268 }
269
bd5635a1
RP
270 if (op == 0x55) /* pushl %ebp */
271 {
272 /* check for movl %esp, %ebp - can be written two ways */
273 switch (codestream_get ())
274 {
275 case 0x8b:
276 if (codestream_get () != 0xec)
277 return (-1);
278 break;
279 case 0x89:
280 if (codestream_get () != 0xe5)
281 return (-1);
282 break;
283 default:
284 return (-1);
285 }
286 /* check for stack adjustment
287 *
288 * subl $XXX, %esp
289 *
290 * note: you can't subtract a 16 bit immediate
291 * from a 32 bit reg, so we don't have to worry
292 * about a data16 prefix
293 */
294 op = codestream_peek ();
295 if (op == 0x83)
296 {
297 /* subl with 8 bit immed */
298 codestream_get ();
299 if (codestream_get () != 0xec)
300 /* Some instruction starting with 0x83 other than subl. */
301 {
302 codestream_seek (codestream_tell () - 2);
303 return 0;
304 }
305 /* subl with signed byte immediate
306 * (though it wouldn't make sense to be negative)
307 */
308 return (codestream_get());
309 }
310 else if (op == 0x81)
311 {
34df79fc
JK
312 char buf[4];
313 /* Maybe it is subl with 32 bit immedediate. */
bd5635a1
RP
314 codestream_get();
315 if (codestream_get () != 0xec)
316 /* Some instruction starting with 0x81 other than subl. */
317 {
318 codestream_seek (codestream_tell () - 2);
319 return 0;
320 }
34df79fc
JK
321 /* It is subl with 32 bit immediate. */
322 codestream_read ((unsigned char *)buf, 4);
323 return extract_signed_integer (buf, 4);
bd5635a1
RP
324 }
325 else
326 {
327 return (0);
328 }
329 }
330 else if (op == 0xc8)
331 {
34df79fc 332 char buf[2];
bd5635a1 333 /* enter instruction: arg is 16 bit unsigned immed */
34df79fc 334 codestream_read ((unsigned char *)buf, 2);
bd5635a1 335 codestream_get (); /* flush final byte of enter instruction */
34df79fc 336 return extract_unsigned_integer (buf, 2);
bd5635a1
RP
337 }
338 return (-1);
339}
340
341/* Return number of args passed to a frame.
342 Can return -1, meaning no way to tell. */
343
bd5635a1
RP
344int
345i386_frame_num_args (fi)
d747e0af 346 struct frame_info *fi;
bd5635a1 347{
34df79fc
JK
348#if 1
349 return -1;
350#else
351 /* This loses because not only might the compiler not be popping the
352 args right after the function call, it might be popping args from both
353 this call and a previous one, and we would say there are more args
354 than there really are. */
355
bd5635a1
RP
356 int retpc;
357 unsigned char op;
358 struct frame_info *pfi;
359
34df79fc
JK
360 /* on the 386, the instruction following the call could be:
361 popl %ecx - one arg
362 addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits
363 anything else - zero args */
364
bd5635a1
RP
365 int frameless;
366
367 FRAMELESS_FUNCTION_INVOCATION (fi, frameless);
368 if (frameless)
369 /* In the absence of a frame pointer, GDB doesn't get correct values
370 for nameless arguments. Return -1, so it doesn't print any
371 nameless arguments. */
372 return -1;
373
d747e0af 374 pfi = get_prev_frame_info (fi);
bd5635a1
RP
375 if (pfi == 0)
376 {
377 /* Note: this can happen if we are looking at the frame for
378 main, because FRAME_CHAIN_VALID won't let us go into
379 start. If we have debugging symbols, that's not really
380 a big deal; it just means it will only show as many arguments
381 to main as are declared. */
382 return -1;
383 }
384 else
385 {
386 retpc = pfi->pc;
387 op = read_memory_integer (retpc, 1);
388 if (op == 0x59)
389 /* pop %ecx */
390 return 1;
391 else if (op == 0x83)
392 {
393 op = read_memory_integer (retpc+1, 1);
394 if (op == 0xc4)
395 /* addl $<signed imm 8 bits>, %esp */
396 return (read_memory_integer (retpc+2,1)&0xff)/4;
397 else
398 return 0;
399 }
400 else if (op == 0x81)
401 { /* add with 32 bit immediate */
402 op = read_memory_integer (retpc+1, 1);
403 if (op == 0xc4)
404 /* addl $<imm 32>, %esp */
405 return read_memory_integer (retpc+2, 4) / 4;
406 else
407 return 0;
408 }
409 else
410 {
411 return 0;
412 }
413 }
34df79fc 414#endif
bd5635a1
RP
415}
416
417/*
418 * parse the first few instructions of the function to see
419 * what registers were stored.
420 *
421 * We handle these cases:
422 *
423 * The startup sequence can be at the start of the function,
424 * or the function can start with a branch to startup code at the end.
425 *
426 * %ebp can be set up with either the 'enter' instruction, or
427 * 'pushl %ebp, movl %esp, %ebp' (enter is too slow to be useful,
428 * but was once used in the sys5 compiler)
429 *
430 * Local space is allocated just below the saved %ebp by either the
431 * 'enter' instruction, or by 'subl $<size>, %esp'. 'enter' has
432 * a 16 bit unsigned argument for space to allocate, and the
433 * 'addl' instruction could have either a signed byte, or
434 * 32 bit immediate.
435 *
436 * Next, the registers used by this function are pushed. In
437 * the sys5 compiler they will always be in the order: %edi, %esi, %ebx
438 * (and sometimes a harmless bug causes it to also save but not restore %eax);
439 * however, the code below is willing to see the pushes in any order,
440 * and will handle up to 8 of them.
441 *
442 * If the setup sequence is at the end of the function, then the
443 * next instruction will be a branch back to the start.
444 */
445
d747e0af 446void
bd5635a1
RP
447i386_frame_find_saved_regs (fip, fsrp)
448 struct frame_info *fip;
449 struct frame_saved_regs *fsrp;
450{
c98fe0c1 451 long locals = -1;
bd5635a1
RP
452 unsigned char op;
453 CORE_ADDR dummy_bottom;
454 CORE_ADDR adr;
c98fe0c1 455 CORE_ADDR pc;
bd5635a1
RP
456 int i;
457
34df79fc 458 memset (fsrp, 0, sizeof *fsrp);
bd5635a1
RP
459
460 /* if frame is the end of a dummy, compute where the
461 * beginning would be
462 */
463 dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH;
464
465 /* check if the PC is in the stack, in a dummy frame */
466 if (dummy_bottom <= fip->pc && fip->pc <= fip->frame)
467 {
468 /* all regs were saved by push_call_dummy () */
469 adr = fip->frame;
470 for (i = 0; i < NUM_REGS; i++)
471 {
472 adr -= REGISTER_RAW_SIZE (i);
473 fsrp->regs[i] = adr;
474 }
475 return;
476 }
477
c98fe0c1
JI
478 pc = get_pc_function_start (fip->pc);
479 if (pc != 0)
480 locals = i386_get_frame_setup (pc);
bd5635a1
RP
481
482 if (locals >= 0)
483 {
484 adr = fip->frame - 4 - locals;
485 for (i = 0; i < 8; i++)
486 {
487 op = codestream_get ();
488 if (op < 0x50 || op > 0x57)
489 break;
1a494973
C
490#ifdef I386_REGNO_TO_SYMMETRY
491 /* Dynix uses different internal numbering. Ick. */
492 fsrp->regs[I386_REGNO_TO_SYMMETRY(op - 0x50)] = adr;
493#else
bd5635a1 494 fsrp->regs[op - 0x50] = adr;
1a494973 495#endif
bd5635a1
RP
496 adr -= 4;
497 }
498 }
499
500 fsrp->regs[PC_REGNUM] = fip->frame + 4;
501 fsrp->regs[FP_REGNUM] = fip->frame;
502}
503
504/* return pc of first real instruction */
d747e0af
MT
505
506int
bd5635a1 507i386_skip_prologue (pc)
d747e0af 508 int pc;
bd5635a1
RP
509{
510 unsigned char op;
511 int i;
28ee4b42
PS
512 static unsigned char pic_pat[6] = { 0xe8, 0, 0, 0, 0, /* call 0x0 */
513 0x5b, /* popl %ebx */
514 };
515 CORE_ADDR pos;
bd5635a1
RP
516
517 if (i386_get_frame_setup (pc) < 0)
518 return (pc);
519
520 /* found valid frame setup - codestream now points to
521 * start of push instructions for saving registers
522 */
523
524 /* skip over register saves */
525 for (i = 0; i < 8; i++)
526 {
527 op = codestream_peek ();
528 /* break if not pushl inst */
529 if (op < 0x50 || op > 0x57)
530 break;
531 codestream_get ();
532 }
28ee4b42
PS
533
534 /* The native cc on SVR4 in -K PIC mode inserts the following code to get
535 the address of the global offset table (GOT) into register %ebx.
536 call 0x0
537 popl %ebx
538 movl %ebx,x(%ebp) (optional)
539 addl y,%ebx
540 This code is with the rest of the prologue (at the end of the
541 function), so we have to skip it to get to the first real
542 instruction at the start of the function. */
543
544 pos = codestream_tell ();
545 for (i = 0; i < 6; i++)
546 {
547 op = codestream_get ();
548 if (pic_pat [i] != op)
549 break;
550 }
551 if (i == 6)
552 {
553 unsigned char buf[4];
554 long delta = 6;
555
556 op = codestream_get ();
557 if (op == 0x89) /* movl %ebx, x(%ebp) */
558 {
559 op = codestream_get ();
560 if (op == 0x5d) /* one byte offset from %ebp */
561 {
562 delta += 3;
563 codestream_read (buf, 1);
564 }
565 else if (op == 0x9d) /* four byte offset from %ebp */
566 {
567 delta += 6;
568 codestream_read (buf, 4);
569 }
570 else /* unexpected instruction */
571 delta = -1;
572 op = codestream_get ();
573 }
574 /* addl y,%ebx */
575 if (delta > 0 && op == 0x81 && codestream_get () == 0xc3)
576 {
577 pos += delta + 6;
578 }
579 }
580 codestream_seek (pos);
bd5635a1
RP
581
582 i386_follow_jump ();
583
584 return (codestream_tell ());
585}
586
d747e0af 587void
bd5635a1
RP
588i386_push_dummy_frame ()
589{
590 CORE_ADDR sp = read_register (SP_REGNUM);
591 int regnum;
592 char regbuf[MAX_REGISTER_RAW_SIZE];
593
594 sp = push_word (sp, read_register (PC_REGNUM));
595 sp = push_word (sp, read_register (FP_REGNUM));
596 write_register (FP_REGNUM, sp);
597 for (regnum = 0; regnum < NUM_REGS; regnum++)
598 {
599 read_register_gen (regnum, regbuf);
600 sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum));
601 }
602 write_register (SP_REGNUM, sp);
603}
604
d747e0af 605void
bd5635a1
RP
606i386_pop_frame ()
607{
1a494973 608 struct frame_info *frame = get_current_frame ();
bd5635a1
RP
609 CORE_ADDR fp;
610 int regnum;
611 struct frame_saved_regs fsr;
bd5635a1
RP
612 char regbuf[MAX_REGISTER_RAW_SIZE];
613
1a494973
C
614 fp = FRAME_FP (frame);
615 get_frame_saved_regs (frame, &fsr);
bd5635a1
RP
616 for (regnum = 0; regnum < NUM_REGS; regnum++)
617 {
618 CORE_ADDR adr;
619 adr = fsr.regs[regnum];
620 if (adr)
621 {
622 read_memory (adr, regbuf, REGISTER_RAW_SIZE (regnum));
623 write_register_bytes (REGISTER_BYTE (regnum), regbuf,
624 REGISTER_RAW_SIZE (regnum));
625 }
626 }
627 write_register (FP_REGNUM, read_memory_integer (fp, 4));
628 write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
629 write_register (SP_REGNUM, fp + 8);
630 flush_cached_frames ();
bd5635a1 631}
d747e0af 632
51b57ded
FF
633#ifdef GET_LONGJMP_TARGET
634
635/* Figure out where the longjmp will land. Slurp the args out of the stack.
636 We expect the first arg to be a pointer to the jmp_buf structure from which
637 we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
638 This routine returns true on success. */
639
640int
641get_longjmp_target(pc)
642 CORE_ADDR *pc;
643{
34df79fc 644 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
51b57ded
FF
645 CORE_ADDR sp, jb_addr;
646
34df79fc 647 sp = read_register (SP_REGNUM);
51b57ded 648
34df79fc
JK
649 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack */
650 buf,
651 TARGET_PTR_BIT / TARGET_CHAR_BIT))
51b57ded
FF
652 return 0;
653
34df79fc 654 jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
51b57ded 655
34df79fc
JK
656 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
657 TARGET_PTR_BIT / TARGET_CHAR_BIT))
51b57ded
FF
658 return 0;
659
34df79fc 660 *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
51b57ded
FF
661
662 return 1;
663}
664
665#endif /* GET_LONGJMP_TARGET */
34df79fc 666
34df79fc
JK
667void
668i386_extract_return_value(type, regbuf, valbuf)
669 struct type *type;
670 char regbuf[REGISTER_BYTES];
671 char *valbuf;
672{
f33b2c13
SG
673/* On AIX, floating point values are returned in floating point registers. */
674#ifdef I386_AIX_TARGET
34df79fc
JK
675 if (TYPE_CODE_FLT == TYPE_CODE(type))
676 {
34df79fc
JK
677 double d;
678 /* 387 %st(0), gcc uses this */
eae3f093
JK
679 floatformat_to_double (&floatformat_i387_ext,
680 &regbuf[REGISTER_BYTE(FP0_REGNUM)],
681 &d);
28ee4b42 682 store_floating (valbuf, TYPE_LENGTH (type), d);
34df79fc
JK
683 }
684 else
f33b2c13 685#endif /* I386_AIX_TARGET */
34df79fc
JK
686 {
687 memcpy (valbuf, regbuf, TYPE_LENGTH (type));
688 }
689}
28ee4b42
PS
690
691#ifdef I386V4_SIGTRAMP_SAVED_PC
692/* Get saved user PC for sigtramp from the pushed ucontext on the stack
693 for all three variants of SVR4 sigtramps. */
694
695CORE_ADDR
696i386v4_sigtramp_saved_pc (frame)
1a494973 697 struct frame_info *frame;
28ee4b42
PS
698{
699 CORE_ADDR saved_pc_offset = 4;
700 char *name = NULL;
701
1a494973 702 find_pc_partial_function (frame->pc, &name, NULL, NULL);
28ee4b42
PS
703 if (name)
704 {
705 if (STREQ (name, "_sigreturn"))
706 saved_pc_offset = 132 + 14 * 4;
137b6849 707 else if (STREQ (name, "_sigacthandler"))
28ee4b42 708 saved_pc_offset = 80 + 14 * 4;
137b6849 709 else if (STREQ (name, "sigvechandler"))
28ee4b42
PS
710 saved_pc_offset = 120 + 14 * 4;
711 }
712
713 if (frame->next)
714 return read_memory_integer (frame->next->frame + saved_pc_offset, 4);
715 return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4);
716}
717#endif /* I386V4_SIGTRAMP_SAVED_PC */
1a494973 718
c98fe0c1
JI
719#ifdef STATIC_TRANSFORM_NAME
720/* SunPRO encodes the static variables. This is not related to C++ mangling,
721 it is done for C too. */
722
723char *
724sunpro_static_transform_name (name)
725 char *name;
726{
727 char *p;
728 if (IS_STATIC_TRANSFORM_NAME (name))
729 {
730 /* For file-local statics there will be a period, a bunch
731 of junk (the contents of which match a string given in the
732 N_OPT), a period and the name. For function-local statics
733 there will be a bunch of junk (which seems to change the
734 second character from 'A' to 'B'), a period, the name of the
735 function, and the name. So just skip everything before the
736 last period. */
737 p = strrchr (name, '.');
738 if (p != NULL)
739 name = p + 1;
740 }
741 return name;
742}
743#endif /* STATIC_TRANSFORM_NAME */
744
f33b2c13
SG
745
746
747/* Stuff for WIN32 PE style DLL's but is pretty generic really. */
748
749CORE_ADDR
750skip_trampoline_code (pc, name)
751 CORE_ADDR pc;
752 char *name;
753{
754 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
755 {
756 unsigned long indirect = read_memory_unsigned_integer (pc+2, 4);
757 struct minimal_symbol *indsym =
758 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
759 char *symname = indsym ? SYMBOL_NAME(indsym) : 0;
760
761 if (symname)
762 {
763 if (strncmp (symname,"__imp_", 6) == 0
764 || strncmp (symname,"_imp_", 5) == 0)
765 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
766 }
767 }
768 return 0; /* not a trampoline */
769}
770
c98fe0c1
JI
771static int
772gdb_print_insn_i386 (memaddr, info)
773 bfd_vma memaddr;
774 disassemble_info * info;
f33b2c13 775{
c98fe0c1
JI
776 if (disassembly_flavor == att_flavor)
777 print_insn_i386_att (memaddr, info);
778 else if (disassembly_flavor == intel_flavor)
779 print_insn_i386_intel (memaddr, info);
780
f33b2c13
SG
781}
782
1a494973
C
783void
784_initialize_i386_tdep ()
785{
c98fe0c1
JI
786 tm_print_insn = gdb_print_insn_i386;
787 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach;
788
789 /* Add the variable that controls the disassembly flavor */
790 add_show_from_set(
791 add_set_enum_cmd ("disassembly-flavor", no_class,
792 valid_flavors,
793 (char *) &disassembly_flavor,
794 "Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
795and the default value is \"att\".",
796 &setlist),
797 &showlist);
f33b2c13 798
c98fe0c1 799
1a494973 800}
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