Commit | Line | Data |
---|---|---|
c906108c | 1 | /* Intel 386 target-dependent stuff. |
b6ba6518 KB |
2 | Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, |
3 | 1998, 1999, 2000, 2001 | |
c906108c SS |
4 | Free Software Foundation, Inc. |
5 | ||
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | #include "defs.h" | |
24 | #include "gdb_string.h" | |
25 | #include "frame.h" | |
26 | #include "inferior.h" | |
27 | #include "gdbcore.h" | |
28 | #include "target.h" | |
29 | #include "floatformat.h" | |
30 | #include "symtab.h" | |
31 | #include "gdbcmd.h" | |
32 | #include "command.h" | |
b4a20239 | 33 | #include "arch-utils.h" |
4e052eda | 34 | #include "regcache.h" |
d16aafd8 | 35 | #include "doublest.h" |
fd0407d6 | 36 | #include "value.h" |
c906108c | 37 | |
3d261580 MK |
38 | #include "gdb_assert.h" |
39 | ||
fc633446 MK |
40 | /* Names of the registers. The first 10 registers match the register |
41 | numbering scheme used by GCC for stabs and DWARF. */ | |
42 | static char *i386_register_names[] = | |
43 | { | |
44 | "eax", "ecx", "edx", "ebx", | |
45 | "esp", "ebp", "esi", "edi", | |
46 | "eip", "eflags", "cs", "ss", | |
47 | "ds", "es", "fs", "gs", | |
48 | "st0", "st1", "st2", "st3", | |
49 | "st4", "st5", "st6", "st7", | |
50 | "fctrl", "fstat", "ftag", "fiseg", | |
51 | "fioff", "foseg", "fooff", "fop", | |
52 | "xmm0", "xmm1", "xmm2", "xmm3", | |
53 | "xmm4", "xmm5", "xmm6", "xmm7", | |
54 | "mxcsr" | |
55 | }; | |
56 | ||
1a11ba71 | 57 | /* i386_register_offset[i] is the offset into the register file of the |
917317f4 | 58 | start of register number i. We initialize this from |
1a11ba71 MK |
59 | i386_register_size. */ |
60 | static int i386_register_offset[MAX_NUM_REGS]; | |
917317f4 | 61 | |
1a11ba71 MK |
62 | /* i386_register_size[i] is the number of bytes of storage in GDB's |
63 | register array occupied by register i. */ | |
64 | static int i386_register_size[MAX_NUM_REGS] = { | |
917317f4 JM |
65 | 4, 4, 4, 4, |
66 | 4, 4, 4, 4, | |
67 | 4, 4, 4, 4, | |
68 | 4, 4, 4, 4, | |
69 | 10, 10, 10, 10, | |
70 | 10, 10, 10, 10, | |
71 | 4, 4, 4, 4, | |
72 | 4, 4, 4, 4, | |
73 | 16, 16, 16, 16, | |
74 | 16, 16, 16, 16, | |
75 | 4 | |
76 | }; | |
77 | ||
fc633446 MK |
78 | /* Return the name of register REG. */ |
79 | ||
80 | char * | |
81 | i386_register_name (int reg) | |
82 | { | |
83 | if (reg < 0) | |
84 | return NULL; | |
85 | if (reg >= sizeof (i386_register_names) / sizeof (*i386_register_names)) | |
86 | return NULL; | |
87 | ||
88 | return i386_register_names[reg]; | |
89 | } | |
90 | ||
1a11ba71 MK |
91 | /* Return the offset into the register array of the start of register |
92 | number REG. */ | |
93 | int | |
94 | i386_register_byte (int reg) | |
95 | { | |
96 | return i386_register_offset[reg]; | |
97 | } | |
98 | ||
99 | /* Return the number of bytes of storage in GDB's register array | |
100 | occupied by register REG. */ | |
101 | ||
102 | int | |
103 | i386_register_raw_size (int reg) | |
104 | { | |
105 | return i386_register_size[reg]; | |
106 | } | |
107 | ||
108 | /* Return the size in bytes of the virtual type of register REG. */ | |
109 | ||
110 | int | |
111 | i386_register_virtual_size (int reg) | |
112 | { | |
113 | return TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (reg)); | |
114 | } | |
115 | ||
85540d8c MK |
116 | /* Convert stabs register number REG to the appropriate register |
117 | number used by GDB. */ | |
118 | ||
119 | int | |
120 | i386_stab_reg_to_regnum (int reg) | |
121 | { | |
122 | /* This implements what GCC calls the "default" register map. */ | |
123 | if (reg >= 0 && reg <= 7) | |
124 | { | |
125 | /* General registers. */ | |
126 | return reg; | |
127 | } | |
128 | else if (reg >= 12 && reg <= 19) | |
129 | { | |
130 | /* Floating-point registers. */ | |
131 | return reg - 12 + FP0_REGNUM; | |
132 | } | |
133 | else if (reg >= 21 && reg <= 28) | |
134 | { | |
135 | /* SSE registers. */ | |
136 | return reg - 21 + XMM0_REGNUM; | |
137 | } | |
138 | else if (reg >= 29 && reg <= 36) | |
139 | { | |
140 | /* MMX registers. */ | |
141 | /* FIXME: kettenis/2001-07-28: Should we have the MMX registers | |
142 | as pseudo-registers? */ | |
143 | return reg - 29 + FP0_REGNUM; | |
144 | } | |
145 | ||
146 | /* This will hopefully provoke a warning. */ | |
147 | return NUM_REGS + NUM_PSEUDO_REGS; | |
148 | } | |
149 | ||
150 | /* Convert Dwarf register number REG to the appropriate register | |
151 | number used by GDB. */ | |
152 | ||
153 | int | |
154 | i386_dwarf_reg_to_regnum (int reg) | |
155 | { | |
156 | /* The DWARF register numbering includes %eip and %eflags, and | |
157 | numbers the floating point registers differently. */ | |
158 | if (reg >= 0 && reg <= 9) | |
159 | { | |
160 | /* General registers. */ | |
161 | return reg; | |
162 | } | |
163 | else if (reg >= 11 && reg <= 18) | |
164 | { | |
165 | /* Floating-point registers. */ | |
166 | return reg - 11 + FP0_REGNUM; | |
167 | } | |
168 | else if (reg >= 21) | |
169 | { | |
170 | /* The SSE and MMX registers have identical numbers as in stabs. */ | |
171 | return i386_stab_reg_to_regnum (reg); | |
172 | } | |
173 | ||
174 | /* This will hopefully provoke a warning. */ | |
175 | return NUM_REGS + NUM_PSEUDO_REGS; | |
176 | } | |
fc338970 | 177 | \f |
917317f4 | 178 | |
fc338970 MK |
179 | /* This is the variable that is set with "set disassembly-flavor", and |
180 | its legitimate values. */ | |
53904c9e AC |
181 | static const char att_flavor[] = "att"; |
182 | static const char intel_flavor[] = "intel"; | |
183 | static const char *valid_flavors[] = | |
c5aa993b | 184 | { |
c906108c SS |
185 | att_flavor, |
186 | intel_flavor, | |
187 | NULL | |
188 | }; | |
53904c9e | 189 | static const char *disassembly_flavor = att_flavor; |
c906108c | 190 | |
fc338970 MK |
191 | /* This is used to keep the bfd arch_info in sync with the disassembly |
192 | flavor. */ | |
a14ed312 KB |
193 | static void set_disassembly_flavor_sfunc (char *, int, |
194 | struct cmd_list_element *); | |
195 | static void set_disassembly_flavor (void); | |
fc338970 MK |
196 | \f |
197 | ||
198 | /* Stdio style buffering was used to minimize calls to ptrace, but | |
199 | this buffering did not take into account that the code section | |
200 | being accessed may not be an even number of buffers long (even if | |
201 | the buffer is only sizeof(int) long). In cases where the code | |
202 | section size happened to be a non-integral number of buffers long, | |
203 | attempting to read the last buffer would fail. Simply using | |
204 | target_read_memory and ignoring errors, rather than read_memory, is | |
205 | not the correct solution, since legitimate access errors would then | |
206 | be totally ignored. To properly handle this situation and continue | |
207 | to use buffering would require that this code be able to determine | |
208 | the minimum code section size granularity (not the alignment of the | |
209 | section itself, since the actual failing case that pointed out this | |
210 | problem had a section alignment of 4 but was not a multiple of 4 | |
211 | bytes long), on a target by target basis, and then adjust it's | |
212 | buffer size accordingly. This is messy, but potentially feasible. | |
213 | It probably needs the bfd library's help and support. For now, the | |
214 | buffer size is set to 1. (FIXME -fnf) */ | |
215 | ||
216 | #define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */ | |
c906108c SS |
217 | static CORE_ADDR codestream_next_addr; |
218 | static CORE_ADDR codestream_addr; | |
219 | static unsigned char codestream_buf[CODESTREAM_BUFSIZ]; | |
220 | static int codestream_off; | |
221 | static int codestream_cnt; | |
222 | ||
223 | #define codestream_tell() (codestream_addr + codestream_off) | |
fc338970 MK |
224 | #define codestream_peek() \ |
225 | (codestream_cnt == 0 ? \ | |
226 | codestream_fill(1) : codestream_buf[codestream_off]) | |
227 | #define codestream_get() \ | |
228 | (codestream_cnt-- == 0 ? \ | |
229 | codestream_fill(0) : codestream_buf[codestream_off++]) | |
c906108c | 230 | |
c5aa993b | 231 | static unsigned char |
fba45db2 | 232 | codestream_fill (int peek_flag) |
c906108c SS |
233 | { |
234 | codestream_addr = codestream_next_addr; | |
235 | codestream_next_addr += CODESTREAM_BUFSIZ; | |
236 | codestream_off = 0; | |
237 | codestream_cnt = CODESTREAM_BUFSIZ; | |
238 | read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ); | |
c5aa993b | 239 | |
c906108c | 240 | if (peek_flag) |
c5aa993b | 241 | return (codestream_peek ()); |
c906108c | 242 | else |
c5aa993b | 243 | return (codestream_get ()); |
c906108c SS |
244 | } |
245 | ||
246 | static void | |
fba45db2 | 247 | codestream_seek (CORE_ADDR place) |
c906108c SS |
248 | { |
249 | codestream_next_addr = place / CODESTREAM_BUFSIZ; | |
250 | codestream_next_addr *= CODESTREAM_BUFSIZ; | |
251 | codestream_cnt = 0; | |
252 | codestream_fill (1); | |
c5aa993b | 253 | while (codestream_tell () != place) |
c906108c SS |
254 | codestream_get (); |
255 | } | |
256 | ||
257 | static void | |
fba45db2 | 258 | codestream_read (unsigned char *buf, int count) |
c906108c SS |
259 | { |
260 | unsigned char *p; | |
261 | int i; | |
262 | p = buf; | |
263 | for (i = 0; i < count; i++) | |
264 | *p++ = codestream_get (); | |
265 | } | |
fc338970 | 266 | \f |
c906108c | 267 | |
fc338970 | 268 | /* If the next instruction is a jump, move to its target. */ |
c906108c SS |
269 | |
270 | static void | |
fba45db2 | 271 | i386_follow_jump (void) |
c906108c SS |
272 | { |
273 | unsigned char buf[4]; | |
274 | long delta; | |
275 | ||
276 | int data16; | |
277 | CORE_ADDR pos; | |
278 | ||
279 | pos = codestream_tell (); | |
280 | ||
281 | data16 = 0; | |
282 | if (codestream_peek () == 0x66) | |
283 | { | |
284 | codestream_get (); | |
285 | data16 = 1; | |
286 | } | |
287 | ||
288 | switch (codestream_get ()) | |
289 | { | |
290 | case 0xe9: | |
fc338970 | 291 | /* Relative jump: if data16 == 0, disp32, else disp16. */ |
c906108c SS |
292 | if (data16) |
293 | { | |
294 | codestream_read (buf, 2); | |
295 | delta = extract_signed_integer (buf, 2); | |
296 | ||
fc338970 MK |
297 | /* Include the size of the jmp instruction (including the |
298 | 0x66 prefix). */ | |
c5aa993b | 299 | pos += delta + 4; |
c906108c SS |
300 | } |
301 | else | |
302 | { | |
303 | codestream_read (buf, 4); | |
304 | delta = extract_signed_integer (buf, 4); | |
305 | ||
306 | pos += delta + 5; | |
307 | } | |
308 | break; | |
309 | case 0xeb: | |
fc338970 | 310 | /* Relative jump, disp8 (ignore data16). */ |
c906108c SS |
311 | codestream_read (buf, 1); |
312 | /* Sign-extend it. */ | |
313 | delta = extract_signed_integer (buf, 1); | |
314 | ||
315 | pos += delta + 2; | |
316 | break; | |
317 | } | |
318 | codestream_seek (pos); | |
319 | } | |
320 | ||
fc338970 MK |
321 | /* Find & return the amount a local space allocated, and advance the |
322 | codestream to the first register push (if any). | |
323 | ||
324 | If the entry sequence doesn't make sense, return -1, and leave | |
325 | codestream pointer at a random spot. */ | |
c906108c SS |
326 | |
327 | static long | |
fba45db2 | 328 | i386_get_frame_setup (CORE_ADDR pc) |
c906108c SS |
329 | { |
330 | unsigned char op; | |
331 | ||
332 | codestream_seek (pc); | |
333 | ||
334 | i386_follow_jump (); | |
335 | ||
336 | op = codestream_get (); | |
337 | ||
338 | if (op == 0x58) /* popl %eax */ | |
339 | { | |
fc338970 MK |
340 | /* This function must start with |
341 | ||
342 | popl %eax 0x58 | |
343 | xchgl %eax, (%esp) 0x87 0x04 0x24 | |
344 | or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00 | |
345 | ||
346 | (the System V compiler puts out the second `xchg' | |
347 | instruction, and the assembler doesn't try to optimize it, so | |
348 | the 'sib' form gets generated). This sequence is used to get | |
349 | the address of the return buffer for a function that returns | |
350 | a structure. */ | |
c906108c SS |
351 | int pos; |
352 | unsigned char buf[4]; | |
fc338970 MK |
353 | static unsigned char proto1[3] = { 0x87, 0x04, 0x24 }; |
354 | static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 }; | |
355 | ||
c906108c SS |
356 | pos = codestream_tell (); |
357 | codestream_read (buf, 4); | |
358 | if (memcmp (buf, proto1, 3) == 0) | |
359 | pos += 3; | |
360 | else if (memcmp (buf, proto2, 4) == 0) | |
361 | pos += 4; | |
362 | ||
363 | codestream_seek (pos); | |
fc338970 | 364 | op = codestream_get (); /* Update next opcode. */ |
c906108c SS |
365 | } |
366 | ||
367 | if (op == 0x68 || op == 0x6a) | |
368 | { | |
fc338970 MK |
369 | /* This function may start with |
370 | ||
371 | pushl constant | |
372 | call _probe | |
373 | addl $4, %esp | |
374 | ||
375 | followed by | |
376 | ||
377 | pushl %ebp | |
378 | ||
379 | etc. */ | |
c906108c SS |
380 | int pos; |
381 | unsigned char buf[8]; | |
382 | ||
fc338970 | 383 | /* Skip past the `pushl' instruction; it has either a one-byte |
c906108c SS |
384 | or a four-byte operand, depending on the opcode. */ |
385 | pos = codestream_tell (); | |
386 | if (op == 0x68) | |
387 | pos += 4; | |
388 | else | |
389 | pos += 1; | |
390 | codestream_seek (pos); | |
391 | ||
fc338970 MK |
392 | /* Read the following 8 bytes, which should be "call _probe" (6 |
393 | bytes) followed by "addl $4,%esp" (2 bytes). */ | |
c906108c SS |
394 | codestream_read (buf, sizeof (buf)); |
395 | if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4) | |
396 | pos += sizeof (buf); | |
397 | codestream_seek (pos); | |
fc338970 | 398 | op = codestream_get (); /* Update next opcode. */ |
c906108c SS |
399 | } |
400 | ||
401 | if (op == 0x55) /* pushl %ebp */ | |
c5aa993b | 402 | { |
fc338970 | 403 | /* Check for "movl %esp, %ebp" -- can be written in two ways. */ |
c906108c SS |
404 | switch (codestream_get ()) |
405 | { | |
406 | case 0x8b: | |
407 | if (codestream_get () != 0xec) | |
fc338970 | 408 | return -1; |
c906108c SS |
409 | break; |
410 | case 0x89: | |
411 | if (codestream_get () != 0xe5) | |
fc338970 | 412 | return -1; |
c906108c SS |
413 | break; |
414 | default: | |
fc338970 | 415 | return -1; |
c906108c | 416 | } |
fc338970 MK |
417 | /* Check for stack adjustment |
418 | ||
419 | subl $XXX, %esp | |
420 | ||
421 | NOTE: You can't subtract a 16 bit immediate from a 32 bit | |
422 | reg, so we don't have to worry about a data16 prefix. */ | |
c906108c SS |
423 | op = codestream_peek (); |
424 | if (op == 0x83) | |
425 | { | |
fc338970 | 426 | /* `subl' with 8 bit immediate. */ |
c906108c SS |
427 | codestream_get (); |
428 | if (codestream_get () != 0xec) | |
fc338970 | 429 | /* Some instruction starting with 0x83 other than `subl'. */ |
c906108c SS |
430 | { |
431 | codestream_seek (codestream_tell () - 2); | |
432 | return 0; | |
433 | } | |
fc338970 MK |
434 | /* `subl' with signed byte immediate (though it wouldn't |
435 | make sense to be negative). */ | |
c5aa993b | 436 | return (codestream_get ()); |
c906108c SS |
437 | } |
438 | else if (op == 0x81) | |
439 | { | |
440 | char buf[4]; | |
fc338970 | 441 | /* Maybe it is `subl' with a 32 bit immedediate. */ |
c5aa993b | 442 | codestream_get (); |
c906108c | 443 | if (codestream_get () != 0xec) |
fc338970 | 444 | /* Some instruction starting with 0x81 other than `subl'. */ |
c906108c SS |
445 | { |
446 | codestream_seek (codestream_tell () - 2); | |
447 | return 0; | |
448 | } | |
fc338970 | 449 | /* It is `subl' with a 32 bit immediate. */ |
c5aa993b | 450 | codestream_read ((unsigned char *) buf, 4); |
c906108c SS |
451 | return extract_signed_integer (buf, 4); |
452 | } | |
453 | else | |
454 | { | |
fc338970 | 455 | return 0; |
c906108c SS |
456 | } |
457 | } | |
458 | else if (op == 0xc8) | |
459 | { | |
460 | char buf[2]; | |
fc338970 | 461 | /* `enter' with 16 bit unsigned immediate. */ |
c5aa993b | 462 | codestream_read ((unsigned char *) buf, 2); |
fc338970 | 463 | codestream_get (); /* Flush final byte of enter instruction. */ |
c906108c SS |
464 | return extract_unsigned_integer (buf, 2); |
465 | } | |
466 | return (-1); | |
467 | } | |
468 | ||
c833a37e MK |
469 | /* Return the chain-pointer for FRAME. In the case of the i386, the |
470 | frame's nominal address is the address of a 4-byte word containing | |
471 | the calling frame's address. */ | |
472 | ||
473 | CORE_ADDR | |
474 | i386_frame_chain (struct frame_info *frame) | |
475 | { | |
476 | if (frame->signal_handler_caller) | |
477 | return frame->frame; | |
478 | ||
479 | if (! inside_entry_file (frame->pc)) | |
480 | return read_memory_unsigned_integer (frame->frame, 4); | |
481 | ||
482 | return 0; | |
483 | } | |
484 | ||
539ffe0b MK |
485 | /* Determine whether the function invocation represented by FRAME does |
486 | not have a from on the stack associated with it. If it does not, | |
487 | return non-zero, otherwise return zero. */ | |
488 | ||
489 | int | |
490 | i386_frameless_function_invocation (struct frame_info *frame) | |
491 | { | |
492 | if (frame->signal_handler_caller) | |
493 | return 0; | |
494 | ||
495 | return frameless_look_for_prologue (frame); | |
496 | } | |
497 | ||
0d17c81d MK |
498 | /* Return the saved program counter for FRAME. */ |
499 | ||
500 | CORE_ADDR | |
501 | i386_frame_saved_pc (struct frame_info *frame) | |
502 | { | |
503 | /* FIXME: kettenis/2001-05-09: Conditionalizing the next bit of code | |
504 | on SIGCONTEXT_PC_OFFSET and I386V4_SIGTRAMP_SAVED_PC should be | |
505 | considered a temporary hack. I plan to come up with something | |
506 | better when we go multi-arch. */ | |
507 | #if defined (SIGCONTEXT_PC_OFFSET) || defined (I386V4_SIGTRAMP_SAVED_PC) | |
508 | if (frame->signal_handler_caller) | |
509 | return sigtramp_saved_pc (frame); | |
510 | #endif | |
511 | ||
512 | return read_memory_unsigned_integer (frame->frame + 4, 4); | |
513 | } | |
514 | ||
ed84f6c1 MK |
515 | /* Immediately after a function call, return the saved pc. */ |
516 | ||
517 | CORE_ADDR | |
518 | i386_saved_pc_after_call (struct frame_info *frame) | |
519 | { | |
520 | return read_memory_unsigned_integer (read_register (SP_REGNUM), 4); | |
521 | } | |
522 | ||
c906108c SS |
523 | /* Return number of args passed to a frame. |
524 | Can return -1, meaning no way to tell. */ | |
525 | ||
526 | int | |
fba45db2 | 527 | i386_frame_num_args (struct frame_info *fi) |
c906108c SS |
528 | { |
529 | #if 1 | |
530 | return -1; | |
531 | #else | |
532 | /* This loses because not only might the compiler not be popping the | |
fc338970 MK |
533 | args right after the function call, it might be popping args from |
534 | both this call and a previous one, and we would say there are | |
535 | more args than there really are. */ | |
c906108c | 536 | |
c5aa993b JM |
537 | int retpc; |
538 | unsigned char op; | |
c906108c SS |
539 | struct frame_info *pfi; |
540 | ||
fc338970 | 541 | /* On the i386, the instruction following the call could be: |
c906108c SS |
542 | popl %ecx - one arg |
543 | addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits | |
fc338970 | 544 | anything else - zero args. */ |
c906108c SS |
545 | |
546 | int frameless; | |
547 | ||
392a587b | 548 | frameless = FRAMELESS_FUNCTION_INVOCATION (fi); |
c906108c | 549 | if (frameless) |
fc338970 MK |
550 | /* In the absence of a frame pointer, GDB doesn't get correct |
551 | values for nameless arguments. Return -1, so it doesn't print | |
552 | any nameless arguments. */ | |
c906108c SS |
553 | return -1; |
554 | ||
c5aa993b | 555 | pfi = get_prev_frame (fi); |
c906108c SS |
556 | if (pfi == 0) |
557 | { | |
fc338970 MK |
558 | /* NOTE: This can happen if we are looking at the frame for |
559 | main, because FRAME_CHAIN_VALID won't let us go into start. | |
560 | If we have debugging symbols, that's not really a big deal; | |
561 | it just means it will only show as many arguments to main as | |
562 | are declared. */ | |
c906108c SS |
563 | return -1; |
564 | } | |
565 | else | |
566 | { | |
c5aa993b JM |
567 | retpc = pfi->pc; |
568 | op = read_memory_integer (retpc, 1); | |
fc338970 | 569 | if (op == 0x59) /* pop %ecx */ |
c5aa993b | 570 | return 1; |
c906108c SS |
571 | else if (op == 0x83) |
572 | { | |
c5aa993b JM |
573 | op = read_memory_integer (retpc + 1, 1); |
574 | if (op == 0xc4) | |
575 | /* addl $<signed imm 8 bits>, %esp */ | |
576 | return (read_memory_integer (retpc + 2, 1) & 0xff) / 4; | |
c906108c SS |
577 | else |
578 | return 0; | |
579 | } | |
fc338970 MK |
580 | else if (op == 0x81) /* `add' with 32 bit immediate. */ |
581 | { | |
c5aa993b JM |
582 | op = read_memory_integer (retpc + 1, 1); |
583 | if (op == 0xc4) | |
584 | /* addl $<imm 32>, %esp */ | |
585 | return read_memory_integer (retpc + 2, 4) / 4; | |
c906108c SS |
586 | else |
587 | return 0; | |
588 | } | |
589 | else | |
590 | { | |
591 | return 0; | |
592 | } | |
593 | } | |
594 | #endif | |
595 | } | |
596 | ||
fc338970 MK |
597 | /* Parse the first few instructions the function to see what registers |
598 | were stored. | |
599 | ||
600 | We handle these cases: | |
601 | ||
602 | The startup sequence can be at the start of the function, or the | |
603 | function can start with a branch to startup code at the end. | |
604 | ||
605 | %ebp can be set up with either the 'enter' instruction, or "pushl | |
606 | %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was | |
607 | once used in the System V compiler). | |
608 | ||
609 | Local space is allocated just below the saved %ebp by either the | |
610 | 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16 | |
611 | bit unsigned argument for space to allocate, and the 'addl' | |
612 | instruction could have either a signed byte, or 32 bit immediate. | |
613 | ||
614 | Next, the registers used by this function are pushed. With the | |
615 | System V compiler they will always be in the order: %edi, %esi, | |
616 | %ebx (and sometimes a harmless bug causes it to also save but not | |
617 | restore %eax); however, the code below is willing to see the pushes | |
618 | in any order, and will handle up to 8 of them. | |
619 | ||
620 | If the setup sequence is at the end of the function, then the next | |
621 | instruction will be a branch back to the start. */ | |
c906108c SS |
622 | |
623 | void | |
fba45db2 | 624 | i386_frame_init_saved_regs (struct frame_info *fip) |
c906108c SS |
625 | { |
626 | long locals = -1; | |
627 | unsigned char op; | |
628 | CORE_ADDR dummy_bottom; | |
fc338970 | 629 | CORE_ADDR addr; |
c906108c SS |
630 | CORE_ADDR pc; |
631 | int i; | |
c5aa993b | 632 | |
1211c4e4 AC |
633 | if (fip->saved_regs) |
634 | return; | |
635 | ||
636 | frame_saved_regs_zalloc (fip); | |
c5aa993b | 637 | |
fc338970 MK |
638 | /* If the frame is the end of a dummy, compute where the beginning |
639 | would be. */ | |
c906108c | 640 | dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH; |
c5aa993b | 641 | |
fc338970 | 642 | /* Check if the PC points in the stack, in a dummy frame. */ |
c5aa993b | 643 | if (dummy_bottom <= fip->pc && fip->pc <= fip->frame) |
c906108c | 644 | { |
fc338970 MK |
645 | /* All registers were saved by push_call_dummy. */ |
646 | addr = fip->frame; | |
c5aa993b | 647 | for (i = 0; i < NUM_REGS; i++) |
c906108c | 648 | { |
fc338970 MK |
649 | addr -= REGISTER_RAW_SIZE (i); |
650 | fip->saved_regs[i] = addr; | |
c906108c SS |
651 | } |
652 | return; | |
653 | } | |
c5aa993b | 654 | |
c906108c SS |
655 | pc = get_pc_function_start (fip->pc); |
656 | if (pc != 0) | |
657 | locals = i386_get_frame_setup (pc); | |
c5aa993b JM |
658 | |
659 | if (locals >= 0) | |
c906108c | 660 | { |
fc338970 | 661 | addr = fip->frame - 4 - locals; |
c5aa993b | 662 | for (i = 0; i < 8; i++) |
c906108c SS |
663 | { |
664 | op = codestream_get (); | |
665 | if (op < 0x50 || op > 0x57) | |
666 | break; | |
667 | #ifdef I386_REGNO_TO_SYMMETRY | |
668 | /* Dynix uses different internal numbering. Ick. */ | |
fc338970 | 669 | fip->saved_regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = addr; |
c906108c | 670 | #else |
fc338970 | 671 | fip->saved_regs[op - 0x50] = addr; |
c906108c | 672 | #endif |
fc338970 | 673 | addr -= 4; |
c906108c SS |
674 | } |
675 | } | |
c5aa993b | 676 | |
1211c4e4 AC |
677 | fip->saved_regs[PC_REGNUM] = fip->frame + 4; |
678 | fip->saved_regs[FP_REGNUM] = fip->frame; | |
c906108c SS |
679 | } |
680 | ||
fc338970 | 681 | /* Return PC of first real instruction. */ |
c906108c SS |
682 | |
683 | int | |
fba45db2 | 684 | i386_skip_prologue (int pc) |
c906108c SS |
685 | { |
686 | unsigned char op; | |
687 | int i; | |
c5aa993b | 688 | static unsigned char pic_pat[6] = |
fc338970 MK |
689 | { 0xe8, 0, 0, 0, 0, /* call 0x0 */ |
690 | 0x5b, /* popl %ebx */ | |
c5aa993b | 691 | }; |
c906108c | 692 | CORE_ADDR pos; |
c5aa993b | 693 | |
c906108c SS |
694 | if (i386_get_frame_setup (pc) < 0) |
695 | return (pc); | |
c5aa993b | 696 | |
fc338970 MK |
697 | /* Found valid frame setup -- codestream now points to start of push |
698 | instructions for saving registers. */ | |
c5aa993b | 699 | |
fc338970 | 700 | /* Skip over register saves. */ |
c906108c SS |
701 | for (i = 0; i < 8; i++) |
702 | { | |
703 | op = codestream_peek (); | |
fc338970 | 704 | /* Break if not `pushl' instrunction. */ |
c5aa993b | 705 | if (op < 0x50 || op > 0x57) |
c906108c SS |
706 | break; |
707 | codestream_get (); | |
708 | } | |
709 | ||
fc338970 MK |
710 | /* The native cc on SVR4 in -K PIC mode inserts the following code |
711 | to get the address of the global offset table (GOT) into register | |
712 | %ebx | |
713 | ||
714 | call 0x0 | |
715 | popl %ebx | |
716 | movl %ebx,x(%ebp) (optional) | |
717 | addl y,%ebx | |
718 | ||
c906108c SS |
719 | This code is with the rest of the prologue (at the end of the |
720 | function), so we have to skip it to get to the first real | |
721 | instruction at the start of the function. */ | |
c5aa993b | 722 | |
c906108c SS |
723 | pos = codestream_tell (); |
724 | for (i = 0; i < 6; i++) | |
725 | { | |
726 | op = codestream_get (); | |
c5aa993b | 727 | if (pic_pat[i] != op) |
c906108c SS |
728 | break; |
729 | } | |
730 | if (i == 6) | |
731 | { | |
732 | unsigned char buf[4]; | |
733 | long delta = 6; | |
734 | ||
735 | op = codestream_get (); | |
c5aa993b | 736 | if (op == 0x89) /* movl %ebx, x(%ebp) */ |
c906108c SS |
737 | { |
738 | op = codestream_get (); | |
fc338970 | 739 | if (op == 0x5d) /* One byte offset from %ebp. */ |
c906108c SS |
740 | { |
741 | delta += 3; | |
742 | codestream_read (buf, 1); | |
743 | } | |
fc338970 | 744 | else if (op == 0x9d) /* Four byte offset from %ebp. */ |
c906108c SS |
745 | { |
746 | delta += 6; | |
747 | codestream_read (buf, 4); | |
748 | } | |
fc338970 | 749 | else /* Unexpected instruction. */ |
c5aa993b JM |
750 | delta = -1; |
751 | op = codestream_get (); | |
c906108c | 752 | } |
c5aa993b JM |
753 | /* addl y,%ebx */ |
754 | if (delta > 0 && op == 0x81 && codestream_get () == 0xc3) | |
c906108c | 755 | { |
c5aa993b | 756 | pos += delta + 6; |
c906108c SS |
757 | } |
758 | } | |
759 | codestream_seek (pos); | |
c5aa993b | 760 | |
c906108c | 761 | i386_follow_jump (); |
c5aa993b | 762 | |
c906108c SS |
763 | return (codestream_tell ()); |
764 | } | |
765 | ||
766 | void | |
fba45db2 | 767 | i386_push_dummy_frame (void) |
c906108c SS |
768 | { |
769 | CORE_ADDR sp = read_register (SP_REGNUM); | |
770 | int regnum; | |
771 | char regbuf[MAX_REGISTER_RAW_SIZE]; | |
c5aa993b | 772 | |
c906108c SS |
773 | sp = push_word (sp, read_register (PC_REGNUM)); |
774 | sp = push_word (sp, read_register (FP_REGNUM)); | |
775 | write_register (FP_REGNUM, sp); | |
776 | for (regnum = 0; regnum < NUM_REGS; regnum++) | |
777 | { | |
778 | read_register_gen (regnum, regbuf); | |
779 | sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum)); | |
780 | } | |
781 | write_register (SP_REGNUM, sp); | |
782 | } | |
783 | ||
a7769679 MK |
784 | /* Insert the (relative) function address into the call sequence |
785 | stored at DYMMY. */ | |
786 | ||
787 | void | |
788 | i386_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs, | |
ea7c478f | 789 | struct value **args, struct type *type, int gcc_p) |
a7769679 MK |
790 | { |
791 | int from, to, delta, loc; | |
792 | ||
793 | loc = (int)(read_register (SP_REGNUM) - CALL_DUMMY_LENGTH); | |
794 | from = loc + 5; | |
795 | to = (int)(fun); | |
796 | delta = to - from; | |
797 | ||
798 | *((char *)(dummy) + 1) = (delta & 0xff); | |
799 | *((char *)(dummy) + 2) = ((delta >> 8) & 0xff); | |
800 | *((char *)(dummy) + 3) = ((delta >> 16) & 0xff); | |
801 | *((char *)(dummy) + 4) = ((delta >> 24) & 0xff); | |
802 | } | |
803 | ||
c906108c | 804 | void |
fba45db2 | 805 | i386_pop_frame (void) |
c906108c SS |
806 | { |
807 | struct frame_info *frame = get_current_frame (); | |
808 | CORE_ADDR fp; | |
809 | int regnum; | |
c906108c | 810 | char regbuf[MAX_REGISTER_RAW_SIZE]; |
c5aa993b | 811 | |
c906108c | 812 | fp = FRAME_FP (frame); |
1211c4e4 AC |
813 | i386_frame_init_saved_regs (frame); |
814 | ||
c5aa993b | 815 | for (regnum = 0; regnum < NUM_REGS; regnum++) |
c906108c | 816 | { |
fc338970 MK |
817 | CORE_ADDR addr; |
818 | addr = frame->saved_regs[regnum]; | |
819 | if (addr) | |
c906108c | 820 | { |
fc338970 | 821 | read_memory (addr, regbuf, REGISTER_RAW_SIZE (regnum)); |
c906108c SS |
822 | write_register_bytes (REGISTER_BYTE (regnum), regbuf, |
823 | REGISTER_RAW_SIZE (regnum)); | |
824 | } | |
825 | } | |
826 | write_register (FP_REGNUM, read_memory_integer (fp, 4)); | |
827 | write_register (PC_REGNUM, read_memory_integer (fp + 4, 4)); | |
828 | write_register (SP_REGNUM, fp + 8); | |
829 | flush_cached_frames (); | |
830 | } | |
fc338970 | 831 | \f |
c906108c SS |
832 | |
833 | #ifdef GET_LONGJMP_TARGET | |
834 | ||
fc338970 MK |
835 | /* Figure out where the longjmp will land. Slurp the args out of the |
836 | stack. We expect the first arg to be a pointer to the jmp_buf | |
837 | structure from which we extract the pc (JB_PC) that we will land | |
838 | at. The pc is copied into PC. This routine returns true on | |
839 | success. */ | |
c906108c SS |
840 | |
841 | int | |
fba45db2 | 842 | get_longjmp_target (CORE_ADDR *pc) |
c906108c SS |
843 | { |
844 | char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT]; | |
845 | CORE_ADDR sp, jb_addr; | |
846 | ||
847 | sp = read_register (SP_REGNUM); | |
848 | ||
fc338970 | 849 | if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack. */ |
c906108c SS |
850 | buf, |
851 | TARGET_PTR_BIT / TARGET_CHAR_BIT)) | |
852 | return 0; | |
853 | ||
854 | jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT); | |
855 | ||
856 | if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf, | |
857 | TARGET_PTR_BIT / TARGET_CHAR_BIT)) | |
858 | return 0; | |
859 | ||
860 | *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT); | |
861 | ||
862 | return 1; | |
863 | } | |
864 | ||
865 | #endif /* GET_LONGJMP_TARGET */ | |
fc338970 | 866 | \f |
c906108c | 867 | |
22f8ba57 | 868 | CORE_ADDR |
ea7c478f | 869 | i386_push_arguments (int nargs, struct value **args, CORE_ADDR sp, |
22f8ba57 MK |
870 | int struct_return, CORE_ADDR struct_addr) |
871 | { | |
872 | sp = default_push_arguments (nargs, args, sp, struct_return, struct_addr); | |
873 | ||
874 | if (struct_return) | |
875 | { | |
876 | char buf[4]; | |
877 | ||
878 | sp -= 4; | |
879 | store_address (buf, 4, struct_addr); | |
880 | write_memory (sp, buf, 4); | |
881 | } | |
882 | ||
883 | return sp; | |
884 | } | |
885 | ||
886 | void | |
887 | i386_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
888 | { | |
889 | /* Do nothing. Everything was already done by i386_push_arguments. */ | |
890 | } | |
891 | ||
1a309862 MK |
892 | /* These registers are used for returning integers (and on some |
893 | targets also for returning `struct' and `union' values when their | |
ef9dff19 | 894 | size and alignment match an integer type). */ |
1a309862 MK |
895 | #define LOW_RETURN_REGNUM 0 /* %eax */ |
896 | #define HIGH_RETURN_REGNUM 2 /* %edx */ | |
897 | ||
898 | /* Extract from an array REGBUF containing the (raw) register state, a | |
899 | function return value of TYPE, and copy that, in virtual format, | |
900 | into VALBUF. */ | |
901 | ||
c906108c | 902 | void |
1a309862 | 903 | i386_extract_return_value (struct type *type, char *regbuf, char *valbuf) |
c906108c | 904 | { |
1a309862 MK |
905 | int len = TYPE_LENGTH (type); |
906 | ||
1e8d0a7b MK |
907 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
908 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 MK |
909 | { |
910 | i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regbuf, valbuf); | |
911 | return; | |
912 | } | |
1e8d0a7b MK |
913 | |
914 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
c906108c | 915 | { |
1a309862 MK |
916 | if (NUM_FREGS == 0) |
917 | { | |
918 | warning ("Cannot find floating-point return value."); | |
919 | memset (valbuf, 0, len); | |
ef9dff19 | 920 | return; |
1a309862 MK |
921 | } |
922 | ||
c6ba6f0d MK |
923 | /* Floating-point return values can be found in %st(0). Convert |
924 | its contents to the desired type. This is probably not | |
925 | exactly how it would happen on the target itself, but it is | |
926 | the best we can do. */ | |
927 | convert_typed_floating (®buf[REGISTER_BYTE (FP0_REGNUM)], | |
928 | builtin_type_i387_ext, valbuf, type); | |
c906108c SS |
929 | } |
930 | else | |
c5aa993b | 931 | { |
d4f3574e SS |
932 | int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); |
933 | int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); | |
934 | ||
935 | if (len <= low_size) | |
1a309862 | 936 | memcpy (valbuf, ®buf[REGISTER_BYTE (LOW_RETURN_REGNUM)], len); |
d4f3574e SS |
937 | else if (len <= (low_size + high_size)) |
938 | { | |
939 | memcpy (valbuf, | |
1a309862 | 940 | ®buf[REGISTER_BYTE (LOW_RETURN_REGNUM)], low_size); |
d4f3574e | 941 | memcpy (valbuf + low_size, |
1a309862 | 942 | ®buf[REGISTER_BYTE (HIGH_RETURN_REGNUM)], len - low_size); |
d4f3574e SS |
943 | } |
944 | else | |
8e65ff28 AC |
945 | internal_error (__FILE__, __LINE__, |
946 | "Cannot extract return value of %d bytes long.", len); | |
c906108c SS |
947 | } |
948 | } | |
949 | ||
ef9dff19 MK |
950 | /* Write into the appropriate registers a function return value stored |
951 | in VALBUF of type TYPE, given in virtual format. */ | |
952 | ||
953 | void | |
954 | i386_store_return_value (struct type *type, char *valbuf) | |
955 | { | |
956 | int len = TYPE_LENGTH (type); | |
957 | ||
1e8d0a7b MK |
958 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
959 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 MK |
960 | { |
961 | i386_store_return_value (TYPE_FIELD_TYPE (type, 0), valbuf); | |
962 | return; | |
963 | } | |
1e8d0a7b MK |
964 | |
965 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
ef9dff19 | 966 | { |
ccb945b8 | 967 | unsigned int fstat; |
c6ba6f0d | 968 | char buf[FPU_REG_RAW_SIZE]; |
ccb945b8 | 969 | |
ef9dff19 MK |
970 | if (NUM_FREGS == 0) |
971 | { | |
972 | warning ("Cannot set floating-point return value."); | |
973 | return; | |
974 | } | |
975 | ||
635b0cc1 MK |
976 | /* Returning floating-point values is a bit tricky. Apart from |
977 | storing the return value in %st(0), we have to simulate the | |
978 | state of the FPU at function return point. */ | |
979 | ||
c6ba6f0d MK |
980 | /* Convert the value found in VALBUF to the extended |
981 | floating-point format used by the FPU. This is probably | |
982 | not exactly how it would happen on the target itself, but | |
983 | it is the best we can do. */ | |
984 | convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext); | |
985 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf, | |
986 | FPU_REG_RAW_SIZE); | |
ccb945b8 | 987 | |
635b0cc1 MK |
988 | /* Set the top of the floating-point register stack to 7. The |
989 | actual value doesn't really matter, but 7 is what a normal | |
990 | function return would end up with if the program started out | |
991 | with a freshly initialized FPU. */ | |
ccb945b8 MK |
992 | fstat = read_register (FSTAT_REGNUM); |
993 | fstat |= (7 << 11); | |
994 | write_register (FSTAT_REGNUM, fstat); | |
995 | ||
635b0cc1 MK |
996 | /* Mark %st(1) through %st(7) as empty. Since we set the top of |
997 | the floating-point register stack to 7, the appropriate value | |
998 | for the tag word is 0x3fff. */ | |
ccb945b8 | 999 | write_register (FTAG_REGNUM, 0x3fff); |
ef9dff19 MK |
1000 | } |
1001 | else | |
1002 | { | |
1003 | int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); | |
1004 | int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); | |
1005 | ||
1006 | if (len <= low_size) | |
1007 | write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM), valbuf, len); | |
1008 | else if (len <= (low_size + high_size)) | |
1009 | { | |
1010 | write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM), | |
1011 | valbuf, low_size); | |
1012 | write_register_bytes (REGISTER_BYTE (HIGH_RETURN_REGNUM), | |
1013 | valbuf + low_size, len - low_size); | |
1014 | } | |
1015 | else | |
8e65ff28 AC |
1016 | internal_error (__FILE__, __LINE__, |
1017 | "Cannot store return value of %d bytes long.", len); | |
ef9dff19 MK |
1018 | } |
1019 | } | |
f7af9647 MK |
1020 | |
1021 | /* Extract from an array REGBUF containing the (raw) register state | |
1022 | the address in which a function should return its structure value, | |
1023 | as a CORE_ADDR. */ | |
1024 | ||
1025 | CORE_ADDR | |
1026 | i386_extract_struct_value_address (char *regbuf) | |
1027 | { | |
1028 | return extract_address (®buf[REGISTER_BYTE (LOW_RETURN_REGNUM)], | |
1029 | REGISTER_RAW_SIZE (LOW_RETURN_REGNUM)); | |
1030 | } | |
fc338970 | 1031 | \f |
ef9dff19 | 1032 | |
d7a0d72c MK |
1033 | /* Return the GDB type object for the "standard" data type of data in |
1034 | register REGNUM. Perhaps %esi and %edi should go here, but | |
1035 | potentially they could be used for things other than address. */ | |
1036 | ||
1037 | struct type * | |
1038 | i386_register_virtual_type (int regnum) | |
1039 | { | |
1040 | if (regnum == PC_REGNUM || regnum == FP_REGNUM || regnum == SP_REGNUM) | |
1041 | return lookup_pointer_type (builtin_type_void); | |
1042 | ||
1043 | if (IS_FP_REGNUM (regnum)) | |
c6ba6f0d | 1044 | return builtin_type_i387_ext; |
d7a0d72c MK |
1045 | |
1046 | if (IS_SSE_REGNUM (regnum)) | |
1047 | return builtin_type_v4sf; | |
1048 | ||
1049 | return builtin_type_int; | |
1050 | } | |
1051 | ||
1052 | /* Return true iff register REGNUM's virtual format is different from | |
1053 | its raw format. Note that this definition assumes that the host | |
1054 | supports IEEE 32-bit floats, since it doesn't say that SSE | |
1055 | registers need conversion. Even if we can't find a counterexample, | |
1056 | this is still sloppy. */ | |
1057 | ||
1058 | int | |
1059 | i386_register_convertible (int regnum) | |
1060 | { | |
1061 | return IS_FP_REGNUM (regnum); | |
1062 | } | |
1063 | ||
ac27f131 | 1064 | /* Convert data from raw format for register REGNUM in buffer FROM to |
3d261580 | 1065 | virtual format with type TYPE in buffer TO. */ |
ac27f131 MK |
1066 | |
1067 | void | |
1068 | i386_register_convert_to_virtual (int regnum, struct type *type, | |
1069 | char *from, char *to) | |
1070 | { | |
c6ba6f0d | 1071 | gdb_assert (IS_FP_REGNUM (regnum)); |
3d261580 MK |
1072 | |
1073 | /* We only support floating-point values. */ | |
8d7f6b4a MK |
1074 | if (TYPE_CODE (type) != TYPE_CODE_FLT) |
1075 | { | |
1076 | warning ("Cannot convert floating-point register value " | |
1077 | "to non-floating-point type."); | |
1078 | memset (to, 0, TYPE_LENGTH (type)); | |
1079 | return; | |
1080 | } | |
3d261580 | 1081 | |
c6ba6f0d MK |
1082 | /* Convert to TYPE. This should be a no-op if TYPE is equivalent to |
1083 | the extended floating-point format used by the FPU. */ | |
1084 | convert_typed_floating (from, builtin_type_i387_ext, to, type); | |
ac27f131 MK |
1085 | } |
1086 | ||
1087 | /* Convert data from virtual format with type TYPE in buffer FROM to | |
3d261580 | 1088 | raw format for register REGNUM in buffer TO. */ |
ac27f131 MK |
1089 | |
1090 | void | |
1091 | i386_register_convert_to_raw (struct type *type, int regnum, | |
1092 | char *from, char *to) | |
1093 | { | |
c6ba6f0d MK |
1094 | gdb_assert (IS_FP_REGNUM (regnum)); |
1095 | ||
1096 | /* We only support floating-point values. */ | |
1097 | if (TYPE_CODE (type) != TYPE_CODE_FLT) | |
1098 | { | |
1099 | warning ("Cannot convert non-floating-point type " | |
1100 | "to floating-point register value."); | |
1101 | memset (to, 0, TYPE_LENGTH (type)); | |
1102 | return; | |
1103 | } | |
3d261580 | 1104 | |
c6ba6f0d MK |
1105 | /* Convert from TYPE. This should be a no-op if TYPE is equivalent |
1106 | to the extended floating-point format used by the FPU. */ | |
1107 | convert_typed_floating (from, type, to, builtin_type_i387_ext); | |
ac27f131 | 1108 | } |
ac27f131 | 1109 | \f |
fc338970 | 1110 | |
c906108c | 1111 | #ifdef I386V4_SIGTRAMP_SAVED_PC |
fc338970 MK |
1112 | /* Get saved user PC for sigtramp from the pushed ucontext on the |
1113 | stack for all three variants of SVR4 sigtramps. */ | |
c906108c SS |
1114 | |
1115 | CORE_ADDR | |
fba45db2 | 1116 | i386v4_sigtramp_saved_pc (struct frame_info *frame) |
c906108c SS |
1117 | { |
1118 | CORE_ADDR saved_pc_offset = 4; | |
1119 | char *name = NULL; | |
1120 | ||
1121 | find_pc_partial_function (frame->pc, &name, NULL, NULL); | |
1122 | if (name) | |
1123 | { | |
1124 | if (STREQ (name, "_sigreturn")) | |
1125 | saved_pc_offset = 132 + 14 * 4; | |
1126 | else if (STREQ (name, "_sigacthandler")) | |
1127 | saved_pc_offset = 80 + 14 * 4; | |
1128 | else if (STREQ (name, "sigvechandler")) | |
1129 | saved_pc_offset = 120 + 14 * 4; | |
1130 | } | |
1131 | ||
1132 | if (frame->next) | |
1133 | return read_memory_integer (frame->next->frame + saved_pc_offset, 4); | |
1134 | return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4); | |
1135 | } | |
1136 | #endif /* I386V4_SIGTRAMP_SAVED_PC */ | |
fc338970 | 1137 | \f |
a0b3c4fd | 1138 | |
c906108c | 1139 | #ifdef STATIC_TRANSFORM_NAME |
fc338970 MK |
1140 | /* SunPRO encodes the static variables. This is not related to C++ |
1141 | mangling, it is done for C too. */ | |
c906108c SS |
1142 | |
1143 | char * | |
fba45db2 | 1144 | sunpro_static_transform_name (char *name) |
c906108c SS |
1145 | { |
1146 | char *p; | |
1147 | if (IS_STATIC_TRANSFORM_NAME (name)) | |
1148 | { | |
fc338970 MK |
1149 | /* For file-local statics there will be a period, a bunch of |
1150 | junk (the contents of which match a string given in the | |
c5aa993b JM |
1151 | N_OPT), a period and the name. For function-local statics |
1152 | there will be a bunch of junk (which seems to change the | |
1153 | second character from 'A' to 'B'), a period, the name of the | |
1154 | function, and the name. So just skip everything before the | |
1155 | last period. */ | |
c906108c SS |
1156 | p = strrchr (name, '.'); |
1157 | if (p != NULL) | |
1158 | name = p + 1; | |
1159 | } | |
1160 | return name; | |
1161 | } | |
1162 | #endif /* STATIC_TRANSFORM_NAME */ | |
fc338970 | 1163 | \f |
c906108c | 1164 | |
fc338970 | 1165 | /* Stuff for WIN32 PE style DLL's but is pretty generic really. */ |
c906108c SS |
1166 | |
1167 | CORE_ADDR | |
fba45db2 | 1168 | skip_trampoline_code (CORE_ADDR pc, char *name) |
c906108c | 1169 | { |
fc338970 | 1170 | if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */ |
c906108c | 1171 | { |
c5aa993b | 1172 | unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4); |
c906108c | 1173 | struct minimal_symbol *indsym = |
fc338970 | 1174 | indirect ? lookup_minimal_symbol_by_pc (indirect) : 0; |
c5aa993b | 1175 | char *symname = indsym ? SYMBOL_NAME (indsym) : 0; |
c906108c | 1176 | |
c5aa993b | 1177 | if (symname) |
c906108c | 1178 | { |
c5aa993b JM |
1179 | if (strncmp (symname, "__imp_", 6) == 0 |
1180 | || strncmp (symname, "_imp_", 5) == 0) | |
c906108c SS |
1181 | return name ? 1 : read_memory_unsigned_integer (indirect, 4); |
1182 | } | |
1183 | } | |
fc338970 | 1184 | return 0; /* Not a trampoline. */ |
c906108c | 1185 | } |
fc338970 MK |
1186 | \f |
1187 | ||
1188 | /* We have two flavours of disassembly. The machinery on this page | |
1189 | deals with switching between those. */ | |
c906108c SS |
1190 | |
1191 | static int | |
fba45db2 | 1192 | gdb_print_insn_i386 (bfd_vma memaddr, disassemble_info *info) |
c906108c SS |
1193 | { |
1194 | if (disassembly_flavor == att_flavor) | |
1195 | return print_insn_i386_att (memaddr, info); | |
1196 | else if (disassembly_flavor == intel_flavor) | |
1197 | return print_insn_i386_intel (memaddr, info); | |
fc338970 MK |
1198 | /* Never reached -- disassembly_flavour is always either att_flavor |
1199 | or intel_flavor. */ | |
e1e9e218 | 1200 | internal_error (__FILE__, __LINE__, "failed internal consistency check"); |
7a292a7a SS |
1201 | } |
1202 | ||
fc338970 MK |
1203 | /* If the disassembly mode is intel, we have to also switch the bfd |
1204 | mach_type. This function is run in the set disassembly_flavor | |
7a292a7a SS |
1205 | command, and does that. */ |
1206 | ||
1207 | static void | |
fba45db2 KB |
1208 | set_disassembly_flavor_sfunc (char *args, int from_tty, |
1209 | struct cmd_list_element *c) | |
7a292a7a SS |
1210 | { |
1211 | set_disassembly_flavor (); | |
7a292a7a SS |
1212 | } |
1213 | ||
1214 | static void | |
fba45db2 | 1215 | set_disassembly_flavor (void) |
7a292a7a SS |
1216 | { |
1217 | if (disassembly_flavor == att_flavor) | |
1218 | set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386); | |
1219 | else if (disassembly_flavor == intel_flavor) | |
fc338970 MK |
1220 | set_architecture_from_arch_mach (bfd_arch_i386, |
1221 | bfd_mach_i386_i386_intel_syntax); | |
c906108c | 1222 | } |
fc338970 | 1223 | \f |
2acceee2 | 1224 | |
28e9e0f0 MK |
1225 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1226 | void _initialize_i386_tdep (void); | |
1227 | ||
c906108c | 1228 | void |
fba45db2 | 1229 | _initialize_i386_tdep (void) |
c906108c | 1230 | { |
917317f4 JM |
1231 | /* Initialize the table saying where each register starts in the |
1232 | register file. */ | |
1233 | { | |
1234 | int i, offset; | |
1235 | ||
1236 | offset = 0; | |
1237 | for (i = 0; i < MAX_NUM_REGS; i++) | |
1238 | { | |
1a11ba71 MK |
1239 | i386_register_offset[i] = offset; |
1240 | offset += i386_register_size[i]; | |
917317f4 JM |
1241 | } |
1242 | } | |
1243 | ||
c906108c SS |
1244 | tm_print_insn = gdb_print_insn_i386; |
1245 | tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach; | |
1246 | ||
fc338970 | 1247 | /* Add the variable that controls the disassembly flavor. */ |
917317f4 JM |
1248 | { |
1249 | struct cmd_list_element *new_cmd; | |
7a292a7a | 1250 | |
917317f4 JM |
1251 | new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class, |
1252 | valid_flavors, | |
1ed2a135 | 1253 | &disassembly_flavor, |
fc338970 MK |
1254 | "\ |
1255 | Set the disassembly flavor, the valid values are \"att\" and \"intel\", \ | |
c906108c | 1256 | and the default value is \"att\".", |
917317f4 JM |
1257 | &setlist); |
1258 | new_cmd->function.sfunc = set_disassembly_flavor_sfunc; | |
1259 | add_show_from_set (new_cmd, &showlist); | |
1260 | } | |
c5aa993b | 1261 | |
7a292a7a | 1262 | /* Finally, initialize the disassembly flavor to the default given |
fc338970 | 1263 | in the disassembly_flavor variable. */ |
7a292a7a | 1264 | set_disassembly_flavor (); |
c906108c | 1265 | } |