Commit | Line | Data |
---|---|---|
c906108c | 1 | /* Intel 386 target-dependent stuff. |
349c5d5f AC |
2 | |
3 | Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, | |
4be87837 | 4 | 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
c906108c | 5 | |
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | #include "defs.h" | |
acd5c798 MK |
24 | #include "arch-utils.h" |
25 | #include "command.h" | |
26 | #include "dummy-frame.h" | |
6405b0a6 | 27 | #include "dwarf2-frame.h" |
acd5c798 MK |
28 | #include "doublest.h" |
29 | #include "floatformat.h" | |
c906108c | 30 | #include "frame.h" |
acd5c798 MK |
31 | #include "frame-base.h" |
32 | #include "frame-unwind.h" | |
c906108c | 33 | #include "inferior.h" |
acd5c798 | 34 | #include "gdbcmd.h" |
c906108c | 35 | #include "gdbcore.h" |
dfe01d39 | 36 | #include "objfiles.h" |
acd5c798 MK |
37 | #include "osabi.h" |
38 | #include "regcache.h" | |
39 | #include "reggroups.h" | |
c0d1d883 | 40 | #include "symfile.h" |
c906108c | 41 | #include "symtab.h" |
acd5c798 | 42 | #include "target.h" |
fd0407d6 | 43 | #include "value.h" |
acd5c798 | 44 | |
3d261580 | 45 | #include "gdb_assert.h" |
acd5c798 | 46 | #include "gdb_string.h" |
3d261580 | 47 | |
d2a7c97a | 48 | #include "i386-tdep.h" |
61113f8b | 49 | #include "i387-tdep.h" |
d2a7c97a | 50 | |
fc633446 MK |
51 | /* Names of the registers. The first 10 registers match the register |
52 | numbering scheme used by GCC for stabs and DWARF. */ | |
c40e1eab | 53 | |
fc633446 MK |
54 | static char *i386_register_names[] = |
55 | { | |
56 | "eax", "ecx", "edx", "ebx", | |
57 | "esp", "ebp", "esi", "edi", | |
58 | "eip", "eflags", "cs", "ss", | |
59 | "ds", "es", "fs", "gs", | |
60 | "st0", "st1", "st2", "st3", | |
61 | "st4", "st5", "st6", "st7", | |
62 | "fctrl", "fstat", "ftag", "fiseg", | |
63 | "fioff", "foseg", "fooff", "fop", | |
64 | "xmm0", "xmm1", "xmm2", "xmm3", | |
65 | "xmm4", "xmm5", "xmm6", "xmm7", | |
66 | "mxcsr" | |
67 | }; | |
68 | ||
c40e1eab MK |
69 | static const int i386_num_register_names = |
70 | (sizeof (i386_register_names) / sizeof (*i386_register_names)); | |
71 | ||
28fc6740 AC |
72 | /* MMX registers. */ |
73 | ||
74 | static char *i386_mmx_names[] = | |
75 | { | |
76 | "mm0", "mm1", "mm2", "mm3", | |
77 | "mm4", "mm5", "mm6", "mm7" | |
78 | }; | |
c40e1eab MK |
79 | |
80 | static const int i386_num_mmx_regs = | |
81 | (sizeof (i386_mmx_names) / sizeof (i386_mmx_names[0])); | |
82 | ||
83 | #define MM0_REGNUM NUM_REGS | |
28fc6740 AC |
84 | |
85 | static int | |
c40e1eab | 86 | i386_mmx_regnum_p (int regnum) |
28fc6740 | 87 | { |
c40e1eab MK |
88 | return (regnum >= MM0_REGNUM |
89 | && regnum < MM0_REGNUM + i386_num_mmx_regs); | |
28fc6740 AC |
90 | } |
91 | ||
23a34459 AC |
92 | /* FP register? */ |
93 | ||
94 | int | |
95 | i386_fp_regnum_p (int regnum) | |
96 | { | |
97 | return (regnum < NUM_REGS | |
c40e1eab | 98 | && (FP0_REGNUM && FP0_REGNUM <= regnum && regnum < FPC_REGNUM)); |
23a34459 AC |
99 | } |
100 | ||
101 | int | |
102 | i386_fpc_regnum_p (int regnum) | |
103 | { | |
104 | return (regnum < NUM_REGS | |
c40e1eab | 105 | && (FPC_REGNUM <= regnum && regnum < XMM0_REGNUM)); |
23a34459 AC |
106 | } |
107 | ||
108 | /* SSE register? */ | |
109 | ||
110 | int | |
111 | i386_sse_regnum_p (int regnum) | |
112 | { | |
113 | return (regnum < NUM_REGS | |
c40e1eab | 114 | && (XMM0_REGNUM <= regnum && regnum < MXCSR_REGNUM)); |
23a34459 AC |
115 | } |
116 | ||
117 | int | |
118 | i386_mxcsr_regnum_p (int regnum) | |
119 | { | |
120 | return (regnum < NUM_REGS | |
c40e1eab | 121 | && regnum == MXCSR_REGNUM); |
23a34459 AC |
122 | } |
123 | ||
fc633446 MK |
124 | /* Return the name of register REG. */ |
125 | ||
fa88f677 | 126 | const char * |
fc633446 MK |
127 | i386_register_name (int reg) |
128 | { | |
23a34459 | 129 | if (i386_mmx_regnum_p (reg)) |
28fc6740 | 130 | return i386_mmx_names[reg - MM0_REGNUM]; |
fc633446 | 131 | |
70913449 MK |
132 | if (reg >= 0 && reg < i386_num_register_names) |
133 | return i386_register_names[reg]; | |
134 | ||
c40e1eab | 135 | return NULL; |
fc633446 MK |
136 | } |
137 | ||
85540d8c MK |
138 | /* Convert stabs register number REG to the appropriate register |
139 | number used by GDB. */ | |
140 | ||
8201327c | 141 | static int |
85540d8c MK |
142 | i386_stab_reg_to_regnum (int reg) |
143 | { | |
144 | /* This implements what GCC calls the "default" register map. */ | |
145 | if (reg >= 0 && reg <= 7) | |
146 | { | |
acd5c798 | 147 | /* General-purpose registers. */ |
85540d8c MK |
148 | return reg; |
149 | } | |
150 | else if (reg >= 12 && reg <= 19) | |
151 | { | |
152 | /* Floating-point registers. */ | |
153 | return reg - 12 + FP0_REGNUM; | |
154 | } | |
155 | else if (reg >= 21 && reg <= 28) | |
156 | { | |
157 | /* SSE registers. */ | |
158 | return reg - 21 + XMM0_REGNUM; | |
159 | } | |
160 | else if (reg >= 29 && reg <= 36) | |
161 | { | |
162 | /* MMX registers. */ | |
7d12f766 | 163 | return reg - 29 + MM0_REGNUM; |
85540d8c MK |
164 | } |
165 | ||
166 | /* This will hopefully provoke a warning. */ | |
167 | return NUM_REGS + NUM_PSEUDO_REGS; | |
168 | } | |
169 | ||
8201327c | 170 | /* Convert DWARF register number REG to the appropriate register |
85540d8c MK |
171 | number used by GDB. */ |
172 | ||
8201327c | 173 | static int |
85540d8c MK |
174 | i386_dwarf_reg_to_regnum (int reg) |
175 | { | |
176 | /* The DWARF register numbering includes %eip and %eflags, and | |
177 | numbers the floating point registers differently. */ | |
178 | if (reg >= 0 && reg <= 9) | |
179 | { | |
acd5c798 | 180 | /* General-purpose registers. */ |
85540d8c MK |
181 | return reg; |
182 | } | |
183 | else if (reg >= 11 && reg <= 18) | |
184 | { | |
185 | /* Floating-point registers. */ | |
186 | return reg - 11 + FP0_REGNUM; | |
187 | } | |
188 | else if (reg >= 21) | |
189 | { | |
190 | /* The SSE and MMX registers have identical numbers as in stabs. */ | |
191 | return i386_stab_reg_to_regnum (reg); | |
192 | } | |
193 | ||
194 | /* This will hopefully provoke a warning. */ | |
195 | return NUM_REGS + NUM_PSEUDO_REGS; | |
196 | } | |
fc338970 | 197 | \f |
917317f4 | 198 | |
fc338970 MK |
199 | /* This is the variable that is set with "set disassembly-flavor", and |
200 | its legitimate values. */ | |
53904c9e AC |
201 | static const char att_flavor[] = "att"; |
202 | static const char intel_flavor[] = "intel"; | |
203 | static const char *valid_flavors[] = | |
c5aa993b | 204 | { |
c906108c SS |
205 | att_flavor, |
206 | intel_flavor, | |
207 | NULL | |
208 | }; | |
53904c9e | 209 | static const char *disassembly_flavor = att_flavor; |
acd5c798 | 210 | \f |
c906108c | 211 | |
acd5c798 MK |
212 | /* Use the program counter to determine the contents and size of a |
213 | breakpoint instruction. Return a pointer to a string of bytes that | |
214 | encode a breakpoint instruction, store the length of the string in | |
215 | *LEN and optionally adjust *PC to point to the correct memory | |
216 | location for inserting the breakpoint. | |
c906108c | 217 | |
acd5c798 MK |
218 | On the i386 we have a single breakpoint that fits in a single byte |
219 | and can be inserted anywhere. | |
c906108c | 220 | |
acd5c798 MK |
221 | This function is 64-bit safe. */ |
222 | ||
223 | static const unsigned char * | |
224 | i386_breakpoint_from_pc (CORE_ADDR *pc, int *len) | |
c906108c | 225 | { |
acd5c798 MK |
226 | static unsigned char break_insn[] = { 0xcc }; /* int 3 */ |
227 | ||
228 | *len = sizeof (break_insn); | |
229 | return break_insn; | |
c906108c | 230 | } |
fc338970 | 231 | \f |
acd5c798 MK |
232 | #ifdef I386_REGNO_TO_SYMMETRY |
233 | #error "The Sequent Symmetry is no longer supported." | |
234 | #endif | |
c906108c | 235 | |
acd5c798 MK |
236 | /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi |
237 | and %esp "belong" to the calling function. Therefore these | |
238 | registers should be saved if they're going to be modified. */ | |
c906108c | 239 | |
acd5c798 MK |
240 | /* The maximum number of saved registers. This should include all |
241 | registers mentioned above, and %eip. */ | |
a3386186 | 242 | #define I386_NUM_SAVED_REGS I386_NUM_GREGS |
acd5c798 MK |
243 | |
244 | struct i386_frame_cache | |
c906108c | 245 | { |
acd5c798 MK |
246 | /* Base address. */ |
247 | CORE_ADDR base; | |
248 | CORE_ADDR sp_offset; | |
249 | CORE_ADDR pc; | |
250 | ||
251 | /* Saved registers. */ | |
252 | CORE_ADDR saved_regs[I386_NUM_SAVED_REGS]; | |
253 | CORE_ADDR saved_sp; | |
254 | int pc_in_eax; | |
255 | ||
256 | /* Stack space reserved for local variables. */ | |
257 | long locals; | |
258 | }; | |
259 | ||
260 | /* Allocate and initialize a frame cache. */ | |
261 | ||
262 | static struct i386_frame_cache * | |
263 | i386_alloc_frame_cache (void) | |
264 | { | |
265 | struct i386_frame_cache *cache; | |
266 | int i; | |
267 | ||
268 | cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache); | |
269 | ||
270 | /* Base address. */ | |
271 | cache->base = 0; | |
272 | cache->sp_offset = -4; | |
273 | cache->pc = 0; | |
274 | ||
275 | /* Saved registers. We initialize these to -1 since zero is a valid | |
276 | offset (that's where %ebp is supposed to be stored). */ | |
277 | for (i = 0; i < I386_NUM_SAVED_REGS; i++) | |
278 | cache->saved_regs[i] = -1; | |
279 | cache->saved_sp = 0; | |
280 | cache->pc_in_eax = 0; | |
281 | ||
282 | /* Frameless until proven otherwise. */ | |
283 | cache->locals = -1; | |
284 | ||
285 | return cache; | |
286 | } | |
c906108c | 287 | |
acd5c798 MK |
288 | /* If the instruction at PC is a jump, return the address of its |
289 | target. Otherwise, return PC. */ | |
c906108c | 290 | |
acd5c798 MK |
291 | static CORE_ADDR |
292 | i386_follow_jump (CORE_ADDR pc) | |
293 | { | |
294 | unsigned char op; | |
295 | long delta = 0; | |
296 | int data16 = 0; | |
c906108c | 297 | |
acd5c798 MK |
298 | op = read_memory_unsigned_integer (pc, 1); |
299 | if (op == 0x66) | |
c906108c | 300 | { |
c906108c | 301 | data16 = 1; |
acd5c798 | 302 | op = read_memory_unsigned_integer (pc + 1, 1); |
c906108c SS |
303 | } |
304 | ||
acd5c798 | 305 | switch (op) |
c906108c SS |
306 | { |
307 | case 0xe9: | |
fc338970 | 308 | /* Relative jump: if data16 == 0, disp32, else disp16. */ |
c906108c SS |
309 | if (data16) |
310 | { | |
acd5c798 | 311 | delta = read_memory_integer (pc + 2, 2); |
c906108c | 312 | |
fc338970 MK |
313 | /* Include the size of the jmp instruction (including the |
314 | 0x66 prefix). */ | |
acd5c798 | 315 | delta += 4; |
c906108c SS |
316 | } |
317 | else | |
318 | { | |
acd5c798 | 319 | delta = read_memory_integer (pc + 1, 4); |
c906108c | 320 | |
acd5c798 MK |
321 | /* Include the size of the jmp instruction. */ |
322 | delta += 5; | |
c906108c SS |
323 | } |
324 | break; | |
325 | case 0xeb: | |
fc338970 | 326 | /* Relative jump, disp8 (ignore data16). */ |
acd5c798 | 327 | delta = read_memory_integer (pc + data16 + 1, 1); |
c906108c | 328 | |
acd5c798 | 329 | delta += data16 + 2; |
c906108c SS |
330 | break; |
331 | } | |
c906108c | 332 | |
acd5c798 MK |
333 | return pc + delta; |
334 | } | |
fc338970 | 335 | |
acd5c798 MK |
336 | /* Check whether PC points at a prologue for a function returning a |
337 | structure or union. If so, it updates CACHE and returns the | |
338 | address of the first instruction after the code sequence that | |
339 | removes the "hidden" argument from the stack or CURRENT_PC, | |
340 | whichever is smaller. Otherwise, return PC. */ | |
c906108c | 341 | |
acd5c798 MK |
342 | static CORE_ADDR |
343 | i386_analyze_struct_return (CORE_ADDR pc, CORE_ADDR current_pc, | |
344 | struct i386_frame_cache *cache) | |
c906108c | 345 | { |
acd5c798 MK |
346 | /* Functions that return a structure or union start with: |
347 | ||
348 | popl %eax 0x58 | |
349 | xchgl %eax, (%esp) 0x87 0x04 0x24 | |
350 | or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00 | |
351 | ||
352 | (the System V compiler puts out the second `xchg' instruction, | |
353 | and the assembler doesn't try to optimize it, so the 'sib' form | |
354 | gets generated). This sequence is used to get the address of the | |
355 | return buffer for a function that returns a structure. */ | |
356 | static unsigned char proto1[3] = { 0x87, 0x04, 0x24 }; | |
357 | static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 }; | |
358 | unsigned char buf[4]; | |
c906108c SS |
359 | unsigned char op; |
360 | ||
acd5c798 MK |
361 | if (current_pc <= pc) |
362 | return pc; | |
363 | ||
364 | op = read_memory_unsigned_integer (pc, 1); | |
c906108c | 365 | |
acd5c798 MK |
366 | if (op != 0x58) /* popl %eax */ |
367 | return pc; | |
c906108c | 368 | |
acd5c798 MK |
369 | read_memory (pc + 1, buf, 4); |
370 | if (memcmp (buf, proto1, 3) != 0 && memcmp (buf, proto2, 4) != 0) | |
371 | return pc; | |
c906108c | 372 | |
acd5c798 | 373 | if (current_pc == pc) |
c906108c | 374 | { |
acd5c798 MK |
375 | cache->sp_offset += 4; |
376 | return current_pc; | |
c906108c SS |
377 | } |
378 | ||
acd5c798 | 379 | if (current_pc == pc + 1) |
c906108c | 380 | { |
acd5c798 MK |
381 | cache->pc_in_eax = 1; |
382 | return current_pc; | |
383 | } | |
384 | ||
385 | if (buf[1] == proto1[1]) | |
386 | return pc + 4; | |
387 | else | |
388 | return pc + 5; | |
389 | } | |
390 | ||
391 | static CORE_ADDR | |
392 | i386_skip_probe (CORE_ADDR pc) | |
393 | { | |
394 | /* A function may start with | |
fc338970 | 395 | |
acd5c798 MK |
396 | pushl constant |
397 | call _probe | |
398 | addl $4, %esp | |
fc338970 | 399 | |
acd5c798 MK |
400 | followed by |
401 | ||
402 | pushl %ebp | |
fc338970 | 403 | |
acd5c798 MK |
404 | etc. */ |
405 | unsigned char buf[8]; | |
406 | unsigned char op; | |
fc338970 | 407 | |
acd5c798 MK |
408 | op = read_memory_unsigned_integer (pc, 1); |
409 | ||
410 | if (op == 0x68 || op == 0x6a) | |
411 | { | |
412 | int delta; | |
c906108c | 413 | |
acd5c798 MK |
414 | /* Skip past the `pushl' instruction; it has either a one-byte or a |
415 | four-byte operand, depending on the opcode. */ | |
c906108c | 416 | if (op == 0x68) |
acd5c798 | 417 | delta = 5; |
c906108c | 418 | else |
acd5c798 | 419 | delta = 2; |
c906108c | 420 | |
acd5c798 MK |
421 | /* Read the following 8 bytes, which should be `call _probe' (6 |
422 | bytes) followed by `addl $4,%esp' (2 bytes). */ | |
423 | read_memory (pc + delta, buf, sizeof (buf)); | |
c906108c | 424 | if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4) |
acd5c798 | 425 | pc += delta + sizeof (buf); |
c906108c SS |
426 | } |
427 | ||
acd5c798 MK |
428 | return pc; |
429 | } | |
430 | ||
431 | /* Check whether PC points at a code that sets up a new stack frame. | |
432 | If so, it updates CACHE and returns the address of the first | |
433 | instruction after the sequence that sets removes the "hidden" | |
434 | argument from the stack or CURRENT_PC, whichever is smaller. | |
435 | Otherwise, return PC. */ | |
436 | ||
437 | static CORE_ADDR | |
438 | i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR current_pc, | |
439 | struct i386_frame_cache *cache) | |
440 | { | |
441 | unsigned char op; | |
442 | ||
443 | if (current_pc <= pc) | |
444 | return current_pc; | |
445 | ||
446 | op = read_memory_unsigned_integer (pc, 1); | |
447 | ||
c906108c | 448 | if (op == 0x55) /* pushl %ebp */ |
c5aa993b | 449 | { |
acd5c798 MK |
450 | /* Take into account that we've executed the `pushl %ebp' that |
451 | starts this instruction sequence. */ | |
452 | cache->saved_regs[I386_EBP_REGNUM] = 0; | |
453 | cache->sp_offset += 4; | |
454 | ||
455 | /* If that's all, return now. */ | |
456 | if (current_pc <= pc + 1) | |
457 | return current_pc; | |
458 | ||
459 | /* Check for `movl %esp, %ebp' -- can be written in two ways. */ | |
460 | op = read_memory_unsigned_integer (pc + 1, 1); | |
461 | switch (op) | |
c906108c SS |
462 | { |
463 | case 0x8b: | |
acd5c798 MK |
464 | if (read_memory_unsigned_integer (pc + 2, 1) != 0xec) |
465 | return pc + 1; | |
c906108c SS |
466 | break; |
467 | case 0x89: | |
acd5c798 MK |
468 | if (read_memory_unsigned_integer (pc + 2, 1) != 0xe5) |
469 | return pc + 1; | |
c906108c SS |
470 | break; |
471 | default: | |
acd5c798 | 472 | return pc + 1; |
c906108c | 473 | } |
acd5c798 MK |
474 | |
475 | /* OK, we actually have a frame. We just don't know how large it is | |
476 | yet. Set its size to zero. We'll adjust it if necessary. */ | |
477 | cache->locals = 0; | |
478 | ||
479 | /* If that's all, return now. */ | |
480 | if (current_pc <= pc + 3) | |
481 | return current_pc; | |
482 | ||
fc338970 MK |
483 | /* Check for stack adjustment |
484 | ||
acd5c798 | 485 | subl $XXX, %esp |
fc338970 MK |
486 | |
487 | NOTE: You can't subtract a 16 bit immediate from a 32 bit | |
488 | reg, so we don't have to worry about a data16 prefix. */ | |
acd5c798 | 489 | op = read_memory_unsigned_integer (pc + 3, 1); |
c906108c SS |
490 | if (op == 0x83) |
491 | { | |
fc338970 | 492 | /* `subl' with 8 bit immediate. */ |
acd5c798 | 493 | if (read_memory_unsigned_integer (pc + 4, 1) != 0xec) |
fc338970 | 494 | /* Some instruction starting with 0x83 other than `subl'. */ |
acd5c798 MK |
495 | return pc + 3; |
496 | ||
497 | /* `subl' with signed byte immediate (though it wouldn't make | |
498 | sense to be negative). */ | |
499 | cache->locals = read_memory_integer (pc + 5, 1); | |
500 | return pc + 6; | |
c906108c SS |
501 | } |
502 | else if (op == 0x81) | |
503 | { | |
fc338970 | 504 | /* Maybe it is `subl' with a 32 bit immedediate. */ |
acd5c798 | 505 | if (read_memory_unsigned_integer (pc + 4, 1) != 0xec) |
fc338970 | 506 | /* Some instruction starting with 0x81 other than `subl'. */ |
acd5c798 MK |
507 | return pc + 3; |
508 | ||
fc338970 | 509 | /* It is `subl' with a 32 bit immediate. */ |
acd5c798 MK |
510 | cache->locals = read_memory_integer (pc + 5, 4); |
511 | return pc + 9; | |
c906108c SS |
512 | } |
513 | else | |
514 | { | |
acd5c798 MK |
515 | /* Some instruction other than `subl'. */ |
516 | return pc + 3; | |
c906108c SS |
517 | } |
518 | } | |
acd5c798 | 519 | else if (op == 0xc8) /* enter $XXX */ |
c906108c | 520 | { |
acd5c798 MK |
521 | cache->locals = read_memory_unsigned_integer (pc + 1, 2); |
522 | return pc + 4; | |
c906108c | 523 | } |
21d0e8a4 | 524 | |
acd5c798 | 525 | return pc; |
21d0e8a4 MK |
526 | } |
527 | ||
acd5c798 MK |
528 | /* Check whether PC points at code that saves registers on the stack. |
529 | If so, it updates CACHE and returns the address of the first | |
530 | instruction after the register saves or CURRENT_PC, whichever is | |
531 | smaller. Otherwise, return PC. */ | |
6bff26de MK |
532 | |
533 | static CORE_ADDR | |
acd5c798 MK |
534 | i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc, |
535 | struct i386_frame_cache *cache) | |
6bff26de | 536 | { |
acd5c798 | 537 | if (cache->locals >= 0) |
267bf4bb | 538 | { |
acd5c798 MK |
539 | CORE_ADDR offset; |
540 | unsigned char op; | |
541 | int i; | |
c0d1d883 | 542 | |
acd5c798 MK |
543 | offset = - 4 - cache->locals; |
544 | for (i = 0; i < 8 && pc < current_pc; i++) | |
545 | { | |
546 | op = read_memory_unsigned_integer (pc, 1); | |
547 | if (op < 0x50 || op > 0x57) | |
548 | break; | |
0d17c81d | 549 | |
acd5c798 MK |
550 | cache->saved_regs[op - 0x50] = offset; |
551 | offset -= 4; | |
552 | pc++; | |
553 | } | |
6bff26de MK |
554 | } |
555 | ||
acd5c798 | 556 | return pc; |
22797942 AC |
557 | } |
558 | ||
acd5c798 MK |
559 | /* Do a full analysis of the prologue at PC and update CACHE |
560 | accordingly. Bail out early if CURRENT_PC is reached. Return the | |
561 | address where the analysis stopped. | |
ed84f6c1 | 562 | |
fc338970 MK |
563 | We handle these cases: |
564 | ||
565 | The startup sequence can be at the start of the function, or the | |
566 | function can start with a branch to startup code at the end. | |
567 | ||
568 | %ebp can be set up with either the 'enter' instruction, or "pushl | |
569 | %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was | |
570 | once used in the System V compiler). | |
571 | ||
572 | Local space is allocated just below the saved %ebp by either the | |
573 | 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16 | |
574 | bit unsigned argument for space to allocate, and the 'addl' | |
575 | instruction could have either a signed byte, or 32 bit immediate. | |
576 | ||
577 | Next, the registers used by this function are pushed. With the | |
578 | System V compiler they will always be in the order: %edi, %esi, | |
579 | %ebx (and sometimes a harmless bug causes it to also save but not | |
580 | restore %eax); however, the code below is willing to see the pushes | |
581 | in any order, and will handle up to 8 of them. | |
582 | ||
583 | If the setup sequence is at the end of the function, then the next | |
584 | instruction will be a branch back to the start. */ | |
c906108c | 585 | |
acd5c798 MK |
586 | static CORE_ADDR |
587 | i386_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc, | |
588 | struct i386_frame_cache *cache) | |
c906108c | 589 | { |
acd5c798 MK |
590 | pc = i386_follow_jump (pc); |
591 | pc = i386_analyze_struct_return (pc, current_pc, cache); | |
592 | pc = i386_skip_probe (pc); | |
593 | pc = i386_analyze_frame_setup (pc, current_pc, cache); | |
594 | return i386_analyze_register_saves (pc, current_pc, cache); | |
c906108c SS |
595 | } |
596 | ||
fc338970 | 597 | /* Return PC of first real instruction. */ |
c906108c | 598 | |
3a1e71e3 | 599 | static CORE_ADDR |
acd5c798 | 600 | i386_skip_prologue (CORE_ADDR start_pc) |
c906108c | 601 | { |
c5aa993b | 602 | static unsigned char pic_pat[6] = |
acd5c798 MK |
603 | { |
604 | 0xe8, 0, 0, 0, 0, /* call 0x0 */ | |
605 | 0x5b, /* popl %ebx */ | |
c5aa993b | 606 | }; |
acd5c798 MK |
607 | struct i386_frame_cache cache; |
608 | CORE_ADDR pc; | |
609 | unsigned char op; | |
610 | int i; | |
c5aa993b | 611 | |
acd5c798 MK |
612 | cache.locals = -1; |
613 | pc = i386_analyze_prologue (start_pc, 0xffffffff, &cache); | |
614 | if (cache.locals < 0) | |
615 | return start_pc; | |
c5aa993b | 616 | |
acd5c798 | 617 | /* Found valid frame setup. */ |
c906108c | 618 | |
fc338970 MK |
619 | /* The native cc on SVR4 in -K PIC mode inserts the following code |
620 | to get the address of the global offset table (GOT) into register | |
acd5c798 MK |
621 | %ebx: |
622 | ||
fc338970 MK |
623 | call 0x0 |
624 | popl %ebx | |
625 | movl %ebx,x(%ebp) (optional) | |
626 | addl y,%ebx | |
627 | ||
c906108c SS |
628 | This code is with the rest of the prologue (at the end of the |
629 | function), so we have to skip it to get to the first real | |
630 | instruction at the start of the function. */ | |
c5aa993b | 631 | |
c906108c SS |
632 | for (i = 0; i < 6; i++) |
633 | { | |
acd5c798 | 634 | op = read_memory_unsigned_integer (pc + i, 1); |
c5aa993b | 635 | if (pic_pat[i] != op) |
c906108c SS |
636 | break; |
637 | } | |
638 | if (i == 6) | |
639 | { | |
acd5c798 MK |
640 | int delta = 6; |
641 | ||
642 | op = read_memory_unsigned_integer (pc + delta, 1); | |
c906108c | 643 | |
c5aa993b | 644 | if (op == 0x89) /* movl %ebx, x(%ebp) */ |
c906108c | 645 | { |
acd5c798 MK |
646 | op = read_memory_unsigned_integer (pc + delta + 1, 1); |
647 | ||
fc338970 | 648 | if (op == 0x5d) /* One byte offset from %ebp. */ |
acd5c798 | 649 | delta += 3; |
fc338970 | 650 | else if (op == 0x9d) /* Four byte offset from %ebp. */ |
acd5c798 | 651 | delta += 6; |
fc338970 | 652 | else /* Unexpected instruction. */ |
acd5c798 MK |
653 | delta = 0; |
654 | ||
655 | op = read_memory_unsigned_integer (pc + delta, 1); | |
c906108c | 656 | } |
acd5c798 | 657 | |
c5aa993b | 658 | /* addl y,%ebx */ |
acd5c798 MK |
659 | if (delta > 0 && op == 0x81 |
660 | && read_memory_unsigned_integer (pc + delta + 1, 1) == 0xc3); | |
c906108c | 661 | { |
acd5c798 | 662 | pc += delta + 6; |
c906108c SS |
663 | } |
664 | } | |
c5aa993b | 665 | |
acd5c798 | 666 | return i386_follow_jump (pc); |
c906108c SS |
667 | } |
668 | ||
acd5c798 | 669 | /* This function is 64-bit safe. */ |
93924b6b | 670 | |
acd5c798 MK |
671 | static CORE_ADDR |
672 | i386_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
93924b6b | 673 | { |
acd5c798 MK |
674 | char buf[8]; |
675 | ||
676 | frame_unwind_register (next_frame, PC_REGNUM, buf); | |
677 | return extract_typed_address (buf, builtin_type_void_func_ptr); | |
93924b6b | 678 | } |
acd5c798 | 679 | \f |
93924b6b | 680 | |
acd5c798 | 681 | /* Normal frames. */ |
c5aa993b | 682 | |
acd5c798 MK |
683 | static struct i386_frame_cache * |
684 | i386_frame_cache (struct frame_info *next_frame, void **this_cache) | |
a7769679 | 685 | { |
acd5c798 | 686 | struct i386_frame_cache *cache; |
c0d1d883 | 687 | char buf[4]; |
acd5c798 MK |
688 | int i; |
689 | ||
690 | if (*this_cache) | |
691 | return *this_cache; | |
692 | ||
693 | cache = i386_alloc_frame_cache (); | |
694 | *this_cache = cache; | |
695 | ||
696 | /* In principle, for normal frames, %ebp holds the frame pointer, | |
697 | which holds the base address for the current stack frame. | |
698 | However, for functions that don't need it, the frame pointer is | |
699 | optional. For these "frameless" functions the frame pointer is | |
700 | actually the frame pointer of the calling frame. Signal | |
701 | trampolines are just a special case of a "frameless" function. | |
702 | They (usually) share their frame pointer with the frame that was | |
703 | in progress when the signal occurred. */ | |
704 | ||
705 | frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); | |
706 | cache->base = extract_unsigned_integer (buf, 4); | |
707 | if (cache->base == 0) | |
708 | return cache; | |
709 | ||
710 | /* For normal frames, %eip is stored at 4(%ebp). */ | |
711 | cache->saved_regs[I386_EIP_REGNUM] = 4; | |
712 | ||
713 | cache->pc = frame_func_unwind (next_frame); | |
714 | if (cache->pc != 0) | |
715 | i386_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache); | |
716 | ||
717 | if (cache->locals < 0) | |
718 | { | |
719 | /* We didn't find a valid frame, which means that CACHE->base | |
720 | currently holds the frame pointer for our calling frame. If | |
721 | we're at the start of a function, or somewhere half-way its | |
722 | prologue, the function's frame probably hasn't been fully | |
723 | setup yet. Try to reconstruct the base address for the stack | |
724 | frame by looking at the stack pointer. For truly "frameless" | |
725 | functions this might work too. */ | |
726 | ||
727 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); | |
728 | cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset; | |
729 | } | |
730 | ||
731 | /* Now that we have the base address for the stack frame we can | |
732 | calculate the value of %esp in the calling frame. */ | |
733 | cache->saved_sp = cache->base + 8; | |
a7769679 | 734 | |
acd5c798 MK |
735 | /* Adjust all the saved registers such that they contain addresses |
736 | instead of offsets. */ | |
737 | for (i = 0; i < I386_NUM_SAVED_REGS; i++) | |
738 | if (cache->saved_regs[i] != -1) | |
739 | cache->saved_regs[i] += cache->base; | |
740 | ||
741 | return cache; | |
a7769679 MK |
742 | } |
743 | ||
3a1e71e3 | 744 | static void |
acd5c798 MK |
745 | i386_frame_this_id (struct frame_info *next_frame, void **this_cache, |
746 | struct frame_id *this_id) | |
c906108c | 747 | { |
acd5c798 MK |
748 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); |
749 | ||
750 | /* This marks the outermost frame. */ | |
751 | if (cache->base == 0) | |
752 | return; | |
753 | ||
3e210248 | 754 | /* See the end of i386_push_dummy_call. */ |
acd5c798 MK |
755 | (*this_id) = frame_id_build (cache->base + 8, cache->pc); |
756 | } | |
757 | ||
758 | static void | |
759 | i386_frame_prev_register (struct frame_info *next_frame, void **this_cache, | |
760 | int regnum, int *optimizedp, | |
761 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
762 | int *realnump, void *valuep) | |
763 | { | |
764 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); | |
765 | ||
766 | gdb_assert (regnum >= 0); | |
767 | ||
768 | /* The System V ABI says that: | |
769 | ||
770 | "The flags register contains the system flags, such as the | |
771 | direction flag and the carry flag. The direction flag must be | |
772 | set to the forward (that is, zero) direction before entry and | |
773 | upon exit from a function. Other user flags have no specified | |
774 | role in the standard calling sequence and are not preserved." | |
775 | ||
776 | To guarantee the "upon exit" part of that statement we fake a | |
777 | saved flags register that has its direction flag cleared. | |
778 | ||
779 | Note that GCC doesn't seem to rely on the fact that the direction | |
780 | flag is cleared after a function return; it always explicitly | |
781 | clears the flag before operations where it matters. | |
782 | ||
783 | FIXME: kettenis/20030316: I'm not quite sure whether this is the | |
784 | right thing to do. The way we fake the flags register here makes | |
785 | it impossible to change it. */ | |
786 | ||
787 | if (regnum == I386_EFLAGS_REGNUM) | |
788 | { | |
789 | *optimizedp = 0; | |
790 | *lvalp = not_lval; | |
791 | *addrp = 0; | |
792 | *realnump = -1; | |
793 | if (valuep) | |
794 | { | |
795 | ULONGEST val; | |
c5aa993b | 796 | |
acd5c798 MK |
797 | /* Clear the direction flag. */ |
798 | frame_unwind_unsigned_register (next_frame, PS_REGNUM, &val); | |
799 | val &= ~(1 << 10); | |
800 | store_unsigned_integer (valuep, 4, val); | |
801 | } | |
802 | ||
803 | return; | |
804 | } | |
1211c4e4 | 805 | |
acd5c798 | 806 | if (regnum == I386_EIP_REGNUM && cache->pc_in_eax) |
c906108c | 807 | { |
acd5c798 MK |
808 | frame_register_unwind (next_frame, I386_EAX_REGNUM, |
809 | optimizedp, lvalp, addrp, realnump, valuep); | |
810 | return; | |
811 | } | |
812 | ||
813 | if (regnum == I386_ESP_REGNUM && cache->saved_sp) | |
814 | { | |
815 | *optimizedp = 0; | |
816 | *lvalp = not_lval; | |
817 | *addrp = 0; | |
818 | *realnump = -1; | |
819 | if (valuep) | |
c906108c | 820 | { |
acd5c798 MK |
821 | /* Store the value. */ |
822 | store_unsigned_integer (valuep, 4, cache->saved_sp); | |
c906108c | 823 | } |
acd5c798 | 824 | return; |
c906108c | 825 | } |
acd5c798 MK |
826 | |
827 | if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1) | |
828 | { | |
829 | *optimizedp = 0; | |
830 | *lvalp = lval_memory; | |
831 | *addrp = cache->saved_regs[regnum]; | |
832 | *realnump = -1; | |
833 | if (valuep) | |
834 | { | |
835 | /* Read the value in from memory. */ | |
836 | read_memory (*addrp, valuep, | |
837 | register_size (current_gdbarch, regnum)); | |
838 | } | |
839 | return; | |
840 | } | |
841 | ||
842 | frame_register_unwind (next_frame, regnum, | |
843 | optimizedp, lvalp, addrp, realnump, valuep); | |
844 | } | |
845 | ||
846 | static const struct frame_unwind i386_frame_unwind = | |
847 | { | |
848 | NORMAL_FRAME, | |
849 | i386_frame_this_id, | |
850 | i386_frame_prev_register | |
851 | }; | |
852 | ||
853 | static const struct frame_unwind * | |
854 | i386_frame_p (CORE_ADDR pc) | |
855 | { | |
856 | return &i386_frame_unwind; | |
857 | } | |
858 | \f | |
859 | ||
860 | /* Signal trampolines. */ | |
861 | ||
862 | static struct i386_frame_cache * | |
863 | i386_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache) | |
864 | { | |
865 | struct i386_frame_cache *cache; | |
866 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
867 | CORE_ADDR addr; | |
868 | char buf[4]; | |
869 | ||
870 | if (*this_cache) | |
871 | return *this_cache; | |
872 | ||
873 | cache = i386_alloc_frame_cache (); | |
874 | ||
875 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); | |
876 | cache->base = extract_unsigned_integer (buf, 4) - 4; | |
877 | ||
878 | addr = tdep->sigcontext_addr (next_frame); | |
a3386186 MK |
879 | if (tdep->sc_reg_offset) |
880 | { | |
881 | int i; | |
882 | ||
883 | gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS); | |
884 | ||
885 | for (i = 0; i < tdep->sc_num_regs; i++) | |
886 | if (tdep->sc_reg_offset[i] != -1) | |
887 | cache->saved_regs[i] = addr + tdep->sc_reg_offset[i]; | |
888 | } | |
889 | else | |
890 | { | |
891 | cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset; | |
892 | cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset; | |
893 | } | |
acd5c798 MK |
894 | |
895 | *this_cache = cache; | |
896 | return cache; | |
897 | } | |
898 | ||
899 | static void | |
900 | i386_sigtramp_frame_this_id (struct frame_info *next_frame, void **this_cache, | |
901 | struct frame_id *this_id) | |
902 | { | |
903 | struct i386_frame_cache *cache = | |
904 | i386_sigtramp_frame_cache (next_frame, this_cache); | |
905 | ||
3e210248 | 906 | /* See the end of i386_push_dummy_call. */ |
acd5c798 MK |
907 | (*this_id) = frame_id_build (cache->base + 8, frame_pc_unwind (next_frame)); |
908 | } | |
909 | ||
910 | static void | |
911 | i386_sigtramp_frame_prev_register (struct frame_info *next_frame, | |
912 | void **this_cache, | |
913 | int regnum, int *optimizedp, | |
914 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
915 | int *realnump, void *valuep) | |
916 | { | |
917 | /* Make sure we've initialized the cache. */ | |
918 | i386_sigtramp_frame_cache (next_frame, this_cache); | |
919 | ||
920 | i386_frame_prev_register (next_frame, this_cache, regnum, | |
921 | optimizedp, lvalp, addrp, realnump, valuep); | |
c906108c | 922 | } |
c0d1d883 | 923 | |
acd5c798 MK |
924 | static const struct frame_unwind i386_sigtramp_frame_unwind = |
925 | { | |
926 | SIGTRAMP_FRAME, | |
927 | i386_sigtramp_frame_this_id, | |
928 | i386_sigtramp_frame_prev_register | |
929 | }; | |
930 | ||
931 | static const struct frame_unwind * | |
932 | i386_sigtramp_frame_p (CORE_ADDR pc) | |
933 | { | |
934 | char *name; | |
935 | ||
1c3545ae MK |
936 | /* We shouldn't even bother to try if the OSABI didn't register |
937 | a sigcontext_addr handler. */ | |
938 | if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr) | |
939 | return NULL; | |
940 | ||
acd5c798 MK |
941 | find_pc_partial_function (pc, &name, NULL, NULL); |
942 | if (PC_IN_SIGTRAMP (pc, name)) | |
943 | return &i386_sigtramp_frame_unwind; | |
944 | ||
945 | return NULL; | |
946 | } | |
947 | \f | |
948 | ||
949 | static CORE_ADDR | |
950 | i386_frame_base_address (struct frame_info *next_frame, void **this_cache) | |
951 | { | |
952 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); | |
953 | ||
954 | return cache->base; | |
955 | } | |
956 | ||
957 | static const struct frame_base i386_frame_base = | |
958 | { | |
959 | &i386_frame_unwind, | |
960 | i386_frame_base_address, | |
961 | i386_frame_base_address, | |
962 | i386_frame_base_address | |
963 | }; | |
964 | ||
acd5c798 MK |
965 | static struct frame_id |
966 | i386_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
967 | { | |
968 | char buf[4]; | |
969 | CORE_ADDR fp; | |
970 | ||
971 | frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); | |
972 | fp = extract_unsigned_integer (buf, 4); | |
973 | ||
3e210248 | 974 | /* See the end of i386_push_dummy_call. */ |
acd5c798 | 975 | return frame_id_build (fp + 8, frame_pc_unwind (next_frame)); |
c0d1d883 | 976 | } |
fc338970 | 977 | \f |
c906108c | 978 | |
fc338970 MK |
979 | /* Figure out where the longjmp will land. Slurp the args out of the |
980 | stack. We expect the first arg to be a pointer to the jmp_buf | |
8201327c | 981 | structure from which we extract the address that we will land at. |
28bcfd30 | 982 | This address is copied into PC. This routine returns non-zero on |
acd5c798 MK |
983 | success. |
984 | ||
985 | This function is 64-bit safe. */ | |
c906108c | 986 | |
8201327c MK |
987 | static int |
988 | i386_get_longjmp_target (CORE_ADDR *pc) | |
c906108c | 989 | { |
28bcfd30 | 990 | char buf[8]; |
c906108c | 991 | CORE_ADDR sp, jb_addr; |
8201327c | 992 | int jb_pc_offset = gdbarch_tdep (current_gdbarch)->jb_pc_offset; |
f9d3c2a8 | 993 | int len = TYPE_LENGTH (builtin_type_void_func_ptr); |
c906108c | 994 | |
8201327c MK |
995 | /* If JB_PC_OFFSET is -1, we have no way to find out where the |
996 | longjmp will land. */ | |
997 | if (jb_pc_offset == -1) | |
c906108c SS |
998 | return 0; |
999 | ||
8201327c | 1000 | sp = read_register (SP_REGNUM); |
28bcfd30 | 1001 | if (target_read_memory (sp + len, buf, len)) |
c906108c SS |
1002 | return 0; |
1003 | ||
f9d3c2a8 | 1004 | jb_addr = extract_typed_address (buf, builtin_type_void_func_ptr); |
28bcfd30 | 1005 | if (target_read_memory (jb_addr + jb_pc_offset, buf, len)) |
8201327c | 1006 | return 0; |
c906108c | 1007 | |
f9d3c2a8 | 1008 | *pc = extract_typed_address (buf, builtin_type_void_func_ptr); |
c906108c SS |
1009 | return 1; |
1010 | } | |
fc338970 | 1011 | \f |
c906108c | 1012 | |
3a1e71e3 | 1013 | static CORE_ADDR |
6a65450a AC |
1014 | i386_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, |
1015 | struct regcache *regcache, CORE_ADDR bp_addr, int nargs, | |
1016 | struct value **args, CORE_ADDR sp, int struct_return, | |
1017 | CORE_ADDR struct_addr) | |
22f8ba57 | 1018 | { |
acd5c798 MK |
1019 | char buf[4]; |
1020 | int i; | |
1021 | ||
1022 | /* Push arguments in reverse order. */ | |
1023 | for (i = nargs - 1; i >= 0; i--) | |
22f8ba57 | 1024 | { |
acd5c798 MK |
1025 | int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args[i])); |
1026 | ||
1027 | /* The System V ABI says that: | |
1028 | ||
1029 | "An argument's size is increased, if necessary, to make it a | |
1030 | multiple of [32-bit] words. This may require tail padding, | |
1031 | depending on the size of the argument." | |
1032 | ||
1033 | This makes sure the stack says word-aligned. */ | |
1034 | sp -= (len + 3) & ~3; | |
1035 | write_memory (sp, VALUE_CONTENTS_ALL (args[i]), len); | |
1036 | } | |
22f8ba57 | 1037 | |
acd5c798 MK |
1038 | /* Push value address. */ |
1039 | if (struct_return) | |
1040 | { | |
22f8ba57 | 1041 | sp -= 4; |
fbd9dcd3 | 1042 | store_unsigned_integer (buf, 4, struct_addr); |
22f8ba57 MK |
1043 | write_memory (sp, buf, 4); |
1044 | } | |
1045 | ||
acd5c798 MK |
1046 | /* Store return address. */ |
1047 | sp -= 4; | |
6a65450a | 1048 | store_unsigned_integer (buf, 4, bp_addr); |
acd5c798 MK |
1049 | write_memory (sp, buf, 4); |
1050 | ||
1051 | /* Finally, update the stack pointer... */ | |
1052 | store_unsigned_integer (buf, 4, sp); | |
1053 | regcache_cooked_write (regcache, I386_ESP_REGNUM, buf); | |
1054 | ||
1055 | /* ...and fake a frame pointer. */ | |
1056 | regcache_cooked_write (regcache, I386_EBP_REGNUM, buf); | |
1057 | ||
3e210248 AC |
1058 | /* MarkK wrote: This "+ 8" is all over the place: |
1059 | (i386_frame_this_id, i386_sigtramp_frame_this_id, | |
1060 | i386_unwind_dummy_id). It's there, since all frame unwinders for | |
1061 | a given target have to agree (within a certain margin) on the | |
1062 | defenition of the stack address of a frame. Otherwise | |
1063 | frame_id_inner() won't work correctly. Since DWARF2/GCC uses the | |
1064 | stack address *before* the function call as a frame's CFA. On | |
1065 | the i386, when %ebp is used as a frame pointer, the offset | |
1066 | between the contents %ebp and the CFA as defined by GCC. */ | |
1067 | return sp + 8; | |
22f8ba57 MK |
1068 | } |
1069 | ||
1a309862 MK |
1070 | /* These registers are used for returning integers (and on some |
1071 | targets also for returning `struct' and `union' values when their | |
ef9dff19 | 1072 | size and alignment match an integer type). */ |
acd5c798 MK |
1073 | #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */ |
1074 | #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */ | |
1a309862 MK |
1075 | |
1076 | /* Extract from an array REGBUF containing the (raw) register state, a | |
1077 | function return value of TYPE, and copy that, in virtual format, | |
1078 | into VALBUF. */ | |
1079 | ||
3a1e71e3 | 1080 | static void |
00f8375e | 1081 | i386_extract_return_value (struct type *type, struct regcache *regcache, |
ebba8386 | 1082 | void *dst) |
c906108c | 1083 | { |
ebba8386 | 1084 | bfd_byte *valbuf = dst; |
1a309862 | 1085 | int len = TYPE_LENGTH (type); |
00f8375e | 1086 | char buf[I386_MAX_REGISTER_SIZE]; |
1a309862 | 1087 | |
1e8d0a7b MK |
1088 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1089 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 | 1090 | { |
00f8375e | 1091 | i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); |
3df1b9b4 MK |
1092 | return; |
1093 | } | |
1e8d0a7b MK |
1094 | |
1095 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
c906108c | 1096 | { |
94ea66b3 | 1097 | if (FP0_REGNUM < 0) |
1a309862 MK |
1098 | { |
1099 | warning ("Cannot find floating-point return value."); | |
1100 | memset (valbuf, 0, len); | |
ef9dff19 | 1101 | return; |
1a309862 MK |
1102 | } |
1103 | ||
c6ba6f0d MK |
1104 | /* Floating-point return values can be found in %st(0). Convert |
1105 | its contents to the desired type. This is probably not | |
1106 | exactly how it would happen on the target itself, but it is | |
1107 | the best we can do. */ | |
acd5c798 | 1108 | regcache_raw_read (regcache, I386_ST0_REGNUM, buf); |
00f8375e | 1109 | convert_typed_floating (buf, builtin_type_i387_ext, valbuf, type); |
c906108c SS |
1110 | } |
1111 | else | |
c5aa993b | 1112 | { |
d4f3574e SS |
1113 | int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); |
1114 | int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); | |
1115 | ||
1116 | if (len <= low_size) | |
00f8375e | 1117 | { |
0818c12a | 1118 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e MK |
1119 | memcpy (valbuf, buf, len); |
1120 | } | |
d4f3574e SS |
1121 | else if (len <= (low_size + high_size)) |
1122 | { | |
0818c12a | 1123 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e | 1124 | memcpy (valbuf, buf, low_size); |
0818c12a | 1125 | regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf); |
00f8375e | 1126 | memcpy (valbuf + low_size, buf, len - low_size); |
d4f3574e SS |
1127 | } |
1128 | else | |
8e65ff28 AC |
1129 | internal_error (__FILE__, __LINE__, |
1130 | "Cannot extract return value of %d bytes long.", len); | |
c906108c SS |
1131 | } |
1132 | } | |
1133 | ||
ef9dff19 MK |
1134 | /* Write into the appropriate registers a function return value stored |
1135 | in VALBUF of type TYPE, given in virtual format. */ | |
1136 | ||
3a1e71e3 | 1137 | static void |
3d7f4f49 MK |
1138 | i386_store_return_value (struct type *type, struct regcache *regcache, |
1139 | const void *valbuf) | |
ef9dff19 MK |
1140 | { |
1141 | int len = TYPE_LENGTH (type); | |
1142 | ||
1e8d0a7b MK |
1143 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1144 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 | 1145 | { |
3d7f4f49 | 1146 | i386_store_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); |
3df1b9b4 MK |
1147 | return; |
1148 | } | |
1e8d0a7b MK |
1149 | |
1150 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
ef9dff19 | 1151 | { |
3d7f4f49 | 1152 | ULONGEST fstat; |
c6ba6f0d | 1153 | char buf[FPU_REG_RAW_SIZE]; |
ccb945b8 | 1154 | |
94ea66b3 | 1155 | if (FP0_REGNUM < 0) |
ef9dff19 MK |
1156 | { |
1157 | warning ("Cannot set floating-point return value."); | |
1158 | return; | |
1159 | } | |
1160 | ||
635b0cc1 MK |
1161 | /* Returning floating-point values is a bit tricky. Apart from |
1162 | storing the return value in %st(0), we have to simulate the | |
1163 | state of the FPU at function return point. */ | |
1164 | ||
c6ba6f0d MK |
1165 | /* Convert the value found in VALBUF to the extended |
1166 | floating-point format used by the FPU. This is probably | |
1167 | not exactly how it would happen on the target itself, but | |
1168 | it is the best we can do. */ | |
1169 | convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext); | |
acd5c798 | 1170 | regcache_raw_write (regcache, I386_ST0_REGNUM, buf); |
ccb945b8 | 1171 | |
635b0cc1 MK |
1172 | /* Set the top of the floating-point register stack to 7. The |
1173 | actual value doesn't really matter, but 7 is what a normal | |
1174 | function return would end up with if the program started out | |
1175 | with a freshly initialized FPU. */ | |
3d7f4f49 | 1176 | regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat); |
ccb945b8 | 1177 | fstat |= (7 << 11); |
3d7f4f49 | 1178 | regcache_raw_write_unsigned (regcache, FSTAT_REGNUM, fstat); |
ccb945b8 | 1179 | |
635b0cc1 MK |
1180 | /* Mark %st(1) through %st(7) as empty. Since we set the top of |
1181 | the floating-point register stack to 7, the appropriate value | |
1182 | for the tag word is 0x3fff. */ | |
3d7f4f49 | 1183 | regcache_raw_write_unsigned (regcache, FTAG_REGNUM, 0x3fff); |
ef9dff19 MK |
1184 | } |
1185 | else | |
1186 | { | |
1187 | int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); | |
1188 | int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); | |
1189 | ||
1190 | if (len <= low_size) | |
3d7f4f49 | 1191 | regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf); |
ef9dff19 MK |
1192 | else if (len <= (low_size + high_size)) |
1193 | { | |
3d7f4f49 MK |
1194 | regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf); |
1195 | regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0, | |
1196 | len - low_size, (char *) valbuf + low_size); | |
ef9dff19 MK |
1197 | } |
1198 | else | |
8e65ff28 AC |
1199 | internal_error (__FILE__, __LINE__, |
1200 | "Cannot store return value of %d bytes long.", len); | |
ef9dff19 MK |
1201 | } |
1202 | } | |
f7af9647 | 1203 | |
751f1375 MK |
1204 | /* Extract from REGCACHE, which contains the (raw) register state, the |
1205 | address in which a function should return its structure value, as a | |
1206 | CORE_ADDR. */ | |
f7af9647 | 1207 | |
3a1e71e3 | 1208 | static CORE_ADDR |
00f8375e | 1209 | i386_extract_struct_value_address (struct regcache *regcache) |
f7af9647 | 1210 | { |
acd5c798 | 1211 | char buf[4]; |
751f1375 | 1212 | |
acd5c798 MK |
1213 | regcache_cooked_read (regcache, I386_EAX_REGNUM, buf); |
1214 | return extract_unsigned_integer (buf, 4); | |
f7af9647 | 1215 | } |
fc338970 | 1216 | \f |
ef9dff19 | 1217 | |
8201327c MK |
1218 | /* This is the variable that is set with "set struct-convention", and |
1219 | its legitimate values. */ | |
1220 | static const char default_struct_convention[] = "default"; | |
1221 | static const char pcc_struct_convention[] = "pcc"; | |
1222 | static const char reg_struct_convention[] = "reg"; | |
1223 | static const char *valid_conventions[] = | |
1224 | { | |
1225 | default_struct_convention, | |
1226 | pcc_struct_convention, | |
1227 | reg_struct_convention, | |
1228 | NULL | |
1229 | }; | |
1230 | static const char *struct_convention = default_struct_convention; | |
1231 | ||
1232 | static int | |
1233 | i386_use_struct_convention (int gcc_p, struct type *type) | |
1234 | { | |
1235 | enum struct_return struct_return; | |
1236 | ||
1237 | if (struct_convention == default_struct_convention) | |
1238 | struct_return = gdbarch_tdep (current_gdbarch)->struct_return; | |
1239 | else if (struct_convention == pcc_struct_convention) | |
1240 | struct_return = pcc_struct_return; | |
1241 | else | |
1242 | struct_return = reg_struct_return; | |
1243 | ||
1244 | return generic_use_struct_convention (struct_return == reg_struct_return, | |
1245 | type); | |
1246 | } | |
1247 | \f | |
1248 | ||
d7a0d72c MK |
1249 | /* Return the GDB type object for the "standard" data type of data in |
1250 | register REGNUM. Perhaps %esi and %edi should go here, but | |
1251 | potentially they could be used for things other than address. */ | |
1252 | ||
3a1e71e3 | 1253 | static struct type * |
4e259f09 | 1254 | i386_register_type (struct gdbarch *gdbarch, int regnum) |
d7a0d72c | 1255 | { |
acd5c798 MK |
1256 | if (regnum == I386_EIP_REGNUM |
1257 | || regnum == I386_EBP_REGNUM || regnum == I386_ESP_REGNUM) | |
d7a0d72c MK |
1258 | return lookup_pointer_type (builtin_type_void); |
1259 | ||
23a34459 | 1260 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1261 | return builtin_type_i387_ext; |
d7a0d72c | 1262 | |
23a34459 | 1263 | if (i386_sse_regnum_p (regnum)) |
3139facc | 1264 | return builtin_type_vec128i; |
d7a0d72c | 1265 | |
23a34459 | 1266 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 AC |
1267 | return builtin_type_vec64i; |
1268 | ||
d7a0d72c MK |
1269 | return builtin_type_int; |
1270 | } | |
1271 | ||
28fc6740 | 1272 | /* Map a cooked register onto a raw register or memory. For the i386, |
acd5c798 | 1273 | the MMX registers need to be mapped onto floating point registers. */ |
28fc6740 AC |
1274 | |
1275 | static int | |
c86c27af | 1276 | i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum) |
28fc6740 AC |
1277 | { |
1278 | int mmxi; | |
1279 | ULONGEST fstat; | |
1280 | int tos; | |
1281 | int fpi; | |
c86c27af | 1282 | |
28fc6740 AC |
1283 | mmxi = regnum - MM0_REGNUM; |
1284 | regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat); | |
1285 | tos = (fstat >> 11) & 0x7; | |
1286 | fpi = (mmxi + tos) % 8; | |
c86c27af | 1287 | |
28fc6740 AC |
1288 | return (FP0_REGNUM + fpi); |
1289 | } | |
1290 | ||
1291 | static void | |
1292 | i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, | |
1293 | int regnum, void *buf) | |
1294 | { | |
23a34459 | 1295 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 | 1296 | { |
d9d9c31f | 1297 | char mmx_buf[MAX_REGISTER_SIZE]; |
c86c27af MK |
1298 | int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); |
1299 | ||
28fc6740 | 1300 | /* Extract (always little endian). */ |
c86c27af | 1301 | regcache_raw_read (regcache, fpnum, mmx_buf); |
28fc6740 AC |
1302 | memcpy (buf, mmx_buf, REGISTER_RAW_SIZE (regnum)); |
1303 | } | |
1304 | else | |
1305 | regcache_raw_read (regcache, regnum, buf); | |
1306 | } | |
1307 | ||
1308 | static void | |
1309 | i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
1310 | int regnum, const void *buf) | |
1311 | { | |
23a34459 | 1312 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 | 1313 | { |
d9d9c31f | 1314 | char mmx_buf[MAX_REGISTER_SIZE]; |
c86c27af MK |
1315 | int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); |
1316 | ||
28fc6740 AC |
1317 | /* Read ... */ |
1318 | regcache_raw_read (regcache, fpnum, mmx_buf); | |
1319 | /* ... Modify ... (always little endian). */ | |
1320 | memcpy (mmx_buf, buf, REGISTER_RAW_SIZE (regnum)); | |
1321 | /* ... Write. */ | |
1322 | regcache_raw_write (regcache, fpnum, mmx_buf); | |
1323 | } | |
1324 | else | |
1325 | regcache_raw_write (regcache, regnum, buf); | |
1326 | } | |
ff2e87ac AC |
1327 | \f |
1328 | ||
1329 | /* These registers don't have pervasive standard uses. Move them to | |
1330 | i386-tdep.h if necessary. */ | |
1331 | ||
1332 | #define I386_EBX_REGNUM 3 /* %ebx */ | |
1333 | #define I386_ECX_REGNUM 1 /* %ecx */ | |
1334 | #define I386_ESI_REGNUM 6 /* %esi */ | |
1335 | #define I386_EDI_REGNUM 7 /* %edi */ | |
1336 | ||
1337 | /* Return the register number of the register allocated by GCC after | |
1338 | REGNUM, or -1 if there is no such register. */ | |
1339 | ||
1340 | static int | |
1341 | i386_next_regnum (int regnum) | |
1342 | { | |
1343 | /* GCC allocates the registers in the order: | |
1344 | ||
1345 | %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ... | |
1346 | ||
1347 | Since storing a variable in %esp doesn't make any sense we return | |
1348 | -1 for %ebp and for %esp itself. */ | |
1349 | static int next_regnum[] = | |
1350 | { | |
1351 | I386_EDX_REGNUM, /* Slot for %eax. */ | |
1352 | I386_EBX_REGNUM, /* Slot for %ecx. */ | |
1353 | I386_ECX_REGNUM, /* Slot for %edx. */ | |
1354 | I386_ESI_REGNUM, /* Slot for %ebx. */ | |
1355 | -1, -1, /* Slots for %esp and %ebp. */ | |
1356 | I386_EDI_REGNUM, /* Slot for %esi. */ | |
1357 | I386_EBP_REGNUM /* Slot for %edi. */ | |
1358 | }; | |
1359 | ||
de5b9bb9 | 1360 | if (regnum >= 0 && regnum < sizeof (next_regnum) / sizeof (next_regnum[0])) |
ff2e87ac | 1361 | return next_regnum[regnum]; |
28fc6740 | 1362 | |
ff2e87ac AC |
1363 | return -1; |
1364 | } | |
1365 | ||
1366 | /* Return nonzero if a value of type TYPE stored in register REGNUM | |
1367 | needs any special handling. */ | |
d7a0d72c | 1368 | |
3a1e71e3 | 1369 | static int |
ff2e87ac | 1370 | i386_convert_register_p (int regnum, struct type *type) |
d7a0d72c | 1371 | { |
de5b9bb9 MK |
1372 | int len = TYPE_LENGTH (type); |
1373 | ||
ff2e87ac AC |
1374 | /* Values may be spread across multiple registers. Most debugging |
1375 | formats aren't expressive enough to specify the locations, so | |
1376 | some heuristics is involved. Right now we only handle types that | |
de5b9bb9 MK |
1377 | have a length that is a multiple of the word size, since GCC |
1378 | doesn't seem to put any other types into registers. */ | |
1379 | if (len > 4 && len % 4 == 0) | |
1380 | { | |
1381 | int last_regnum = regnum; | |
1382 | ||
1383 | while (len > 4) | |
1384 | { | |
1385 | last_regnum = i386_next_regnum (last_regnum); | |
1386 | len -= 4; | |
1387 | } | |
1388 | ||
1389 | if (last_regnum != -1) | |
1390 | return 1; | |
1391 | } | |
ff2e87ac | 1392 | |
23a34459 | 1393 | return i386_fp_regnum_p (regnum); |
d7a0d72c MK |
1394 | } |
1395 | ||
ff2e87ac AC |
1396 | /* Read a value of type TYPE from register REGNUM in frame FRAME, and |
1397 | return its contents in TO. */ | |
ac27f131 | 1398 | |
3a1e71e3 | 1399 | static void |
ff2e87ac AC |
1400 | i386_register_to_value (struct frame_info *frame, int regnum, |
1401 | struct type *type, void *to) | |
ac27f131 | 1402 | { |
de5b9bb9 MK |
1403 | int len = TYPE_LENGTH (type); |
1404 | char *buf = to; | |
1405 | ||
ff2e87ac AC |
1406 | /* FIXME: kettenis/20030609: What should we do if REGNUM isn't |
1407 | available in FRAME (i.e. if it wasn't saved)? */ | |
3d261580 | 1408 | |
ff2e87ac | 1409 | if (i386_fp_regnum_p (regnum)) |
8d7f6b4a | 1410 | { |
d532c08f MK |
1411 | i387_register_to_value (frame, regnum, type, to); |
1412 | return; | |
8d7f6b4a | 1413 | } |
ff2e87ac | 1414 | |
de5b9bb9 MK |
1415 | /* Read a value spread accross multiple registers. */ |
1416 | ||
1417 | gdb_assert (len > 4 && len % 4 == 0); | |
3d261580 | 1418 | |
de5b9bb9 MK |
1419 | while (len > 0) |
1420 | { | |
1421 | gdb_assert (regnum != -1); | |
1422 | gdb_assert (register_size (current_gdbarch, regnum) == 4); | |
d532c08f | 1423 | |
de5b9bb9 MK |
1424 | frame_read_register (frame, regnum, buf); |
1425 | regnum = i386_next_regnum (regnum); | |
1426 | len -= 4; | |
1427 | buf += 4; | |
1428 | } | |
ac27f131 MK |
1429 | } |
1430 | ||
ff2e87ac AC |
1431 | /* Write the contents FROM of a value of type TYPE into register |
1432 | REGNUM in frame FRAME. */ | |
ac27f131 | 1433 | |
3a1e71e3 | 1434 | static void |
ff2e87ac AC |
1435 | i386_value_to_register (struct frame_info *frame, int regnum, |
1436 | struct type *type, const void *from) | |
ac27f131 | 1437 | { |
de5b9bb9 MK |
1438 | int len = TYPE_LENGTH (type); |
1439 | const char *buf = from; | |
1440 | ||
ff2e87ac | 1441 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1442 | { |
d532c08f MK |
1443 | i387_value_to_register (frame, regnum, type, from); |
1444 | return; | |
1445 | } | |
3d261580 | 1446 | |
de5b9bb9 MK |
1447 | /* Write a value spread accross multiple registers. */ |
1448 | ||
1449 | gdb_assert (len > 4 && len % 4 == 0); | |
ff2e87ac | 1450 | |
de5b9bb9 MK |
1451 | while (len > 0) |
1452 | { | |
1453 | gdb_assert (regnum != -1); | |
1454 | gdb_assert (register_size (current_gdbarch, regnum) == 4); | |
d532c08f | 1455 | |
de5b9bb9 MK |
1456 | put_frame_register (frame, regnum, buf); |
1457 | regnum = i386_next_regnum (regnum); | |
1458 | len -= 4; | |
1459 | buf += 4; | |
1460 | } | |
ac27f131 | 1461 | } |
ff2e87ac AC |
1462 | \f |
1463 | ||
fc338970 | 1464 | |
c906108c | 1465 | #ifdef STATIC_TRANSFORM_NAME |
fc338970 MK |
1466 | /* SunPRO encodes the static variables. This is not related to C++ |
1467 | mangling, it is done for C too. */ | |
c906108c SS |
1468 | |
1469 | char * | |
fba45db2 | 1470 | sunpro_static_transform_name (char *name) |
c906108c SS |
1471 | { |
1472 | char *p; | |
1473 | if (IS_STATIC_TRANSFORM_NAME (name)) | |
1474 | { | |
fc338970 MK |
1475 | /* For file-local statics there will be a period, a bunch of |
1476 | junk (the contents of which match a string given in the | |
c5aa993b JM |
1477 | N_OPT), a period and the name. For function-local statics |
1478 | there will be a bunch of junk (which seems to change the | |
1479 | second character from 'A' to 'B'), a period, the name of the | |
1480 | function, and the name. So just skip everything before the | |
1481 | last period. */ | |
c906108c SS |
1482 | p = strrchr (name, '.'); |
1483 | if (p != NULL) | |
1484 | name = p + 1; | |
1485 | } | |
1486 | return name; | |
1487 | } | |
1488 | #endif /* STATIC_TRANSFORM_NAME */ | |
fc338970 | 1489 | \f |
c906108c | 1490 | |
fc338970 | 1491 | /* Stuff for WIN32 PE style DLL's but is pretty generic really. */ |
c906108c SS |
1492 | |
1493 | CORE_ADDR | |
1cce71eb | 1494 | i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name) |
c906108c | 1495 | { |
fc338970 | 1496 | if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */ |
c906108c | 1497 | { |
c5aa993b | 1498 | unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4); |
c906108c | 1499 | struct minimal_symbol *indsym = |
fc338970 | 1500 | indirect ? lookup_minimal_symbol_by_pc (indirect) : 0; |
645dd519 | 1501 | char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0; |
c906108c | 1502 | |
c5aa993b | 1503 | if (symname) |
c906108c | 1504 | { |
c5aa993b JM |
1505 | if (strncmp (symname, "__imp_", 6) == 0 |
1506 | || strncmp (symname, "_imp_", 5) == 0) | |
c906108c SS |
1507 | return name ? 1 : read_memory_unsigned_integer (indirect, 4); |
1508 | } | |
1509 | } | |
fc338970 | 1510 | return 0; /* Not a trampoline. */ |
c906108c | 1511 | } |
fc338970 MK |
1512 | \f |
1513 | ||
8201327c MK |
1514 | /* Return non-zero if PC and NAME show that we are in a signal |
1515 | trampoline. */ | |
1516 | ||
1517 | static int | |
1518 | i386_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1519 | { | |
1520 | return (name && strcmp ("_sigtramp", name) == 0); | |
1521 | } | |
1522 | \f | |
1523 | ||
fc338970 MK |
1524 | /* We have two flavours of disassembly. The machinery on this page |
1525 | deals with switching between those. */ | |
c906108c SS |
1526 | |
1527 | static int | |
5e3397bb | 1528 | i386_print_insn (bfd_vma pc, disassemble_info *info) |
c906108c | 1529 | { |
5e3397bb MK |
1530 | gdb_assert (disassembly_flavor == att_flavor |
1531 | || disassembly_flavor == intel_flavor); | |
1532 | ||
1533 | /* FIXME: kettenis/20020915: Until disassembler_options is properly | |
1534 | constified, cast to prevent a compiler warning. */ | |
1535 | info->disassembler_options = (char *) disassembly_flavor; | |
1536 | info->mach = gdbarch_bfd_arch_info (current_gdbarch)->mach; | |
1537 | ||
1538 | return print_insn_i386 (pc, info); | |
7a292a7a | 1539 | } |
fc338970 | 1540 | \f |
3ce1502b | 1541 | |
8201327c MK |
1542 | /* There are a few i386 architecture variants that differ only |
1543 | slightly from the generic i386 target. For now, we don't give them | |
1544 | their own source file, but include them here. As a consequence, | |
1545 | they'll always be included. */ | |
3ce1502b | 1546 | |
8201327c | 1547 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1548 | |
8201327c MK |
1549 | static int |
1550 | i386_svr4_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
d2a7c97a | 1551 | { |
acd5c798 MK |
1552 | /* UnixWare uses _sigacthandler. The origin of the other symbols is |
1553 | currently unknown. */ | |
8201327c MK |
1554 | return (name && (strcmp ("_sigreturn", name) == 0 |
1555 | || strcmp ("_sigacthandler", name) == 0 | |
1556 | || strcmp ("sigvechandler", name) == 0)); | |
1557 | } | |
d2a7c97a | 1558 | |
acd5c798 MK |
1559 | /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp |
1560 | routine, return the address of the associated sigcontext (ucontext) | |
1561 | structure. */ | |
3ce1502b | 1562 | |
3a1e71e3 | 1563 | static CORE_ADDR |
acd5c798 | 1564 | i386_svr4_sigcontext_addr (struct frame_info *next_frame) |
8201327c | 1565 | { |
acd5c798 MK |
1566 | char buf[4]; |
1567 | CORE_ADDR sp; | |
3ce1502b | 1568 | |
acd5c798 MK |
1569 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); |
1570 | sp = extract_unsigned_integer (buf, 4); | |
21d0e8a4 | 1571 | |
acd5c798 | 1572 | return read_memory_unsigned_integer (sp + 8, 4); |
8201327c MK |
1573 | } |
1574 | \f | |
3ce1502b | 1575 | |
8201327c | 1576 | /* DJGPP. */ |
d2a7c97a | 1577 | |
8201327c MK |
1578 | static int |
1579 | i386_go32_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1580 | { | |
1581 | /* DJGPP doesn't have any special frames for signal handlers. */ | |
1582 | return 0; | |
1583 | } | |
1584 | \f | |
d2a7c97a | 1585 | |
8201327c | 1586 | /* Generic ELF. */ |
d2a7c97a | 1587 | |
8201327c MK |
1588 | void |
1589 | i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1590 | { | |
1591 | /* We typically use stabs-in-ELF with the DWARF register numbering. */ | |
1592 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1593 | } | |
3ce1502b | 1594 | |
8201327c | 1595 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1596 | |
8201327c MK |
1597 | void |
1598 | i386_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1599 | { | |
1600 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
3ce1502b | 1601 | |
8201327c MK |
1602 | /* System V Release 4 uses ELF. */ |
1603 | i386_elf_init_abi (info, gdbarch); | |
3ce1502b | 1604 | |
dfe01d39 MK |
1605 | /* System V Release 4 has shared libraries. */ |
1606 | set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section); | |
1607 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); | |
1608 | ||
8201327c | 1609 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_svr4_pc_in_sigtramp); |
21d0e8a4 | 1610 | tdep->sigcontext_addr = i386_svr4_sigcontext_addr; |
acd5c798 MK |
1611 | tdep->sc_pc_offset = 36 + 14 * 4; |
1612 | tdep->sc_sp_offset = 36 + 17 * 4; | |
3ce1502b | 1613 | |
8201327c | 1614 | tdep->jb_pc_offset = 20; |
3ce1502b MK |
1615 | } |
1616 | ||
8201327c | 1617 | /* DJGPP. */ |
3ce1502b | 1618 | |
3a1e71e3 | 1619 | static void |
8201327c | 1620 | i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1621 | { |
8201327c | 1622 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1623 | |
8201327c | 1624 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_go32_pc_in_sigtramp); |
3ce1502b | 1625 | |
8201327c | 1626 | tdep->jb_pc_offset = 36; |
3ce1502b MK |
1627 | } |
1628 | ||
8201327c | 1629 | /* NetWare. */ |
3ce1502b | 1630 | |
3a1e71e3 | 1631 | static void |
8201327c | 1632 | i386_nw_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1633 | { |
8201327c | 1634 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1635 | |
8201327c | 1636 | tdep->jb_pc_offset = 24; |
d2a7c97a | 1637 | } |
8201327c | 1638 | \f |
2acceee2 | 1639 | |
38c968cf AC |
1640 | /* i386 register groups. In addition to the normal groups, add "mmx" |
1641 | and "sse". */ | |
1642 | ||
1643 | static struct reggroup *i386_sse_reggroup; | |
1644 | static struct reggroup *i386_mmx_reggroup; | |
1645 | ||
1646 | static void | |
1647 | i386_init_reggroups (void) | |
1648 | { | |
1649 | i386_sse_reggroup = reggroup_new ("sse", USER_REGGROUP); | |
1650 | i386_mmx_reggroup = reggroup_new ("mmx", USER_REGGROUP); | |
1651 | } | |
1652 | ||
1653 | static void | |
1654 | i386_add_reggroups (struct gdbarch *gdbarch) | |
1655 | { | |
1656 | reggroup_add (gdbarch, i386_sse_reggroup); | |
1657 | reggroup_add (gdbarch, i386_mmx_reggroup); | |
1658 | reggroup_add (gdbarch, general_reggroup); | |
1659 | reggroup_add (gdbarch, float_reggroup); | |
1660 | reggroup_add (gdbarch, all_reggroup); | |
1661 | reggroup_add (gdbarch, save_reggroup); | |
1662 | reggroup_add (gdbarch, restore_reggroup); | |
1663 | reggroup_add (gdbarch, vector_reggroup); | |
1664 | reggroup_add (gdbarch, system_reggroup); | |
1665 | } | |
1666 | ||
1667 | int | |
1668 | i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
1669 | struct reggroup *group) | |
1670 | { | |
1671 | int sse_regnum_p = (i386_sse_regnum_p (regnum) | |
1672 | || i386_mxcsr_regnum_p (regnum)); | |
1673 | int fp_regnum_p = (i386_fp_regnum_p (regnum) | |
1674 | || i386_fpc_regnum_p (regnum)); | |
1675 | int mmx_regnum_p = (i386_mmx_regnum_p (regnum)); | |
acd5c798 | 1676 | |
38c968cf AC |
1677 | if (group == i386_mmx_reggroup) |
1678 | return mmx_regnum_p; | |
1679 | if (group == i386_sse_reggroup) | |
1680 | return sse_regnum_p; | |
1681 | if (group == vector_reggroup) | |
1682 | return (mmx_regnum_p || sse_regnum_p); | |
1683 | if (group == float_reggroup) | |
1684 | return fp_regnum_p; | |
1685 | if (group == general_reggroup) | |
1686 | return (!fp_regnum_p && !mmx_regnum_p && !sse_regnum_p); | |
acd5c798 | 1687 | |
38c968cf AC |
1688 | return default_register_reggroup_p (gdbarch, regnum, group); |
1689 | } | |
38c968cf | 1690 | \f |
acd5c798 | 1691 | |
143985b7 | 1692 | /* Get the ith function argument for the current function. */ |
42c466d7 | 1693 | static CORE_ADDR |
143985b7 AF |
1694 | i386_fetch_pointer_argument (struct frame_info *frame, int argi, |
1695 | struct type *type) | |
1696 | { | |
1697 | CORE_ADDR stack; | |
1698 | frame_read_register (frame, SP_REGNUM, &stack); | |
1699 | return read_memory_unsigned_integer (stack + (4 * (argi + 1)), 4); | |
1700 | } | |
1701 | ||
1702 | \f | |
3a1e71e3 | 1703 | static struct gdbarch * |
a62cc96e AC |
1704 | i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1705 | { | |
cd3c07fc | 1706 | struct gdbarch_tdep *tdep; |
a62cc96e AC |
1707 | struct gdbarch *gdbarch; |
1708 | ||
4be87837 DJ |
1709 | /* If there is already a candidate, use it. */ |
1710 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1711 | if (arches != NULL) | |
1712 | return arches->gdbarch; | |
a62cc96e AC |
1713 | |
1714 | /* Allocate space for the new architecture. */ | |
1715 | tdep = XMALLOC (struct gdbarch_tdep); | |
1716 | gdbarch = gdbarch_alloc (&info, tdep); | |
1717 | ||
8201327c | 1718 | /* The i386 default settings don't include the SSE registers. |
356a6b3e MK |
1719 | FIXME: kettenis/20020614: They do include the FPU registers for |
1720 | now, which probably is not quite right. */ | |
8201327c | 1721 | tdep->num_xmm_regs = 0; |
d2a7c97a | 1722 | |
8201327c MK |
1723 | tdep->jb_pc_offset = -1; |
1724 | tdep->struct_return = pcc_struct_return; | |
8201327c MK |
1725 | tdep->sigtramp_start = 0; |
1726 | tdep->sigtramp_end = 0; | |
21d0e8a4 | 1727 | tdep->sigcontext_addr = NULL; |
a3386186 | 1728 | tdep->sc_reg_offset = NULL; |
8201327c | 1729 | tdep->sc_pc_offset = -1; |
21d0e8a4 | 1730 | tdep->sc_sp_offset = -1; |
8201327c | 1731 | |
896fb97d MK |
1732 | /* The format used for `long double' on almost all i386 targets is |
1733 | the i387 extended floating-point format. In fact, of all targets | |
1734 | in the GCC 2.95 tree, only OSF/1 does it different, and insists | |
1735 | on having a `long double' that's not `long' at all. */ | |
1736 | set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext); | |
21d0e8a4 | 1737 | |
66da5fd8 | 1738 | /* Although the i387 extended floating-point has only 80 significant |
896fb97d MK |
1739 | bits, a `long double' actually takes up 96, probably to enforce |
1740 | alignment. */ | |
1741 | set_gdbarch_long_double_bit (gdbarch, 96); | |
1742 | ||
acd5c798 MK |
1743 | /* The default ABI includes general-purpose registers and |
1744 | floating-point registers. */ | |
356a6b3e | 1745 | set_gdbarch_num_regs (gdbarch, I386_NUM_GREGS + I386_NUM_FREGS); |
acd5c798 MK |
1746 | set_gdbarch_register_name (gdbarch, i386_register_name); |
1747 | set_gdbarch_register_type (gdbarch, i386_register_type); | |
21d0e8a4 | 1748 | |
acd5c798 MK |
1749 | /* Register numbers of various important registers. */ |
1750 | set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */ | |
1751 | set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */ | |
1752 | set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */ | |
1753 | set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */ | |
356a6b3e MK |
1754 | |
1755 | /* Use the "default" register numbering scheme for stabs and COFF. */ | |
1756 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1757 | set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1758 | ||
1759 | /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */ | |
1760 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1761 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1762 | ||
1763 | /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to | |
1764 | be in use on any of the supported i386 targets. */ | |
1765 | ||
61113f8b MK |
1766 | set_gdbarch_print_float_info (gdbarch, i387_print_float_info); |
1767 | ||
8201327c | 1768 | set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target); |
96297dab | 1769 | |
a62cc96e | 1770 | /* Call dummy code. */ |
acd5c798 | 1771 | set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call); |
a62cc96e | 1772 | |
ff2e87ac AC |
1773 | set_gdbarch_convert_register_p (gdbarch, i386_convert_register_p); |
1774 | set_gdbarch_register_to_value (gdbarch, i386_register_to_value); | |
1775 | set_gdbarch_value_to_register (gdbarch, i386_value_to_register); | |
b6197528 | 1776 | |
00f8375e | 1777 | set_gdbarch_extract_return_value (gdbarch, i386_extract_return_value); |
3d7f4f49 | 1778 | set_gdbarch_store_return_value (gdbarch, i386_store_return_value); |
00f8375e | 1779 | set_gdbarch_extract_struct_value_address (gdbarch, |
fc08ec52 | 1780 | i386_extract_struct_value_address); |
8201327c MK |
1781 | set_gdbarch_use_struct_convention (gdbarch, i386_use_struct_convention); |
1782 | ||
93924b6b MK |
1783 | set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue); |
1784 | ||
1785 | /* Stack grows downward. */ | |
1786 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1787 | ||
1788 | set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc); | |
1789 | set_gdbarch_decr_pc_after_break (gdbarch, 1); | |
1790 | set_gdbarch_function_start_offset (gdbarch, 0); | |
42fdc8df | 1791 | |
42fdc8df | 1792 | set_gdbarch_frame_args_skip (gdbarch, 8); |
8201327c MK |
1793 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_pc_in_sigtramp); |
1794 | ||
28fc6740 | 1795 | /* Wire in the MMX registers. */ |
0f751ff2 | 1796 | set_gdbarch_num_pseudo_regs (gdbarch, i386_num_mmx_regs); |
28fc6740 AC |
1797 | set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read); |
1798 | set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write); | |
1799 | ||
5e3397bb MK |
1800 | set_gdbarch_print_insn (gdbarch, i386_print_insn); |
1801 | ||
acd5c798 | 1802 | set_gdbarch_unwind_dummy_id (gdbarch, i386_unwind_dummy_id); |
acd5c798 MK |
1803 | |
1804 | set_gdbarch_unwind_pc (gdbarch, i386_unwind_pc); | |
1805 | ||
38c968cf AC |
1806 | /* Add the i386 register groups. */ |
1807 | i386_add_reggroups (gdbarch); | |
1808 | set_gdbarch_register_reggroup_p (gdbarch, i386_register_reggroup_p); | |
1809 | ||
143985b7 AF |
1810 | /* Helper for function argument information. */ |
1811 | set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument); | |
1812 | ||
6405b0a6 MK |
1813 | /* Hook in the DWARF CFI frame unwinder. */ |
1814 | frame_unwind_append_predicate (gdbarch, dwarf2_frame_p); | |
1815 | set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info); | |
1816 | ||
acd5c798 | 1817 | frame_base_set_default (gdbarch, &i386_frame_base); |
6c0e89ed | 1818 | |
3ce1502b | 1819 | /* Hook in ABI-specific overrides, if they have been registered. */ |
4be87837 | 1820 | gdbarch_init_osabi (info, gdbarch); |
3ce1502b | 1821 | |
acd5c798 MK |
1822 | frame_unwind_append_predicate (gdbarch, i386_sigtramp_frame_p); |
1823 | frame_unwind_append_predicate (gdbarch, i386_frame_p); | |
1824 | ||
a62cc96e AC |
1825 | return gdbarch; |
1826 | } | |
1827 | ||
8201327c MK |
1828 | static enum gdb_osabi |
1829 | i386_coff_osabi_sniffer (bfd *abfd) | |
1830 | { | |
762c5349 MK |
1831 | if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0 |
1832 | || strcmp (bfd_get_target (abfd), "coff-go32") == 0) | |
8201327c MK |
1833 | return GDB_OSABI_GO32; |
1834 | ||
1835 | return GDB_OSABI_UNKNOWN; | |
1836 | } | |
1837 | ||
1838 | static enum gdb_osabi | |
1839 | i386_nlm_osabi_sniffer (bfd *abfd) | |
1840 | { | |
1841 | return GDB_OSABI_NETWARE; | |
1842 | } | |
1843 | \f | |
1844 | ||
28e9e0f0 MK |
1845 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1846 | void _initialize_i386_tdep (void); | |
1847 | ||
c906108c | 1848 | void |
fba45db2 | 1849 | _initialize_i386_tdep (void) |
c906108c | 1850 | { |
a62cc96e AC |
1851 | register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init); |
1852 | ||
fc338970 | 1853 | /* Add the variable that controls the disassembly flavor. */ |
917317f4 JM |
1854 | { |
1855 | struct cmd_list_element *new_cmd; | |
7a292a7a | 1856 | |
917317f4 JM |
1857 | new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class, |
1858 | valid_flavors, | |
1ed2a135 | 1859 | &disassembly_flavor, |
fc338970 MK |
1860 | "\ |
1861 | Set the disassembly flavor, the valid values are \"att\" and \"intel\", \ | |
c906108c | 1862 | and the default value is \"att\".", |
917317f4 | 1863 | &setlist); |
917317f4 JM |
1864 | add_show_from_set (new_cmd, &showlist); |
1865 | } | |
8201327c MK |
1866 | |
1867 | /* Add the variable that controls the convention for returning | |
1868 | structs. */ | |
1869 | { | |
1870 | struct cmd_list_element *new_cmd; | |
1871 | ||
1872 | new_cmd = add_set_enum_cmd ("struct-convention", no_class, | |
5e3397bb | 1873 | valid_conventions, |
8201327c MK |
1874 | &struct_convention, "\ |
1875 | Set the convention for returning small structs, valid values \ | |
1876 | are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".", | |
1877 | &setlist); | |
1878 | add_show_from_set (new_cmd, &showlist); | |
1879 | } | |
1880 | ||
1881 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour, | |
1882 | i386_coff_osabi_sniffer); | |
1883 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_nlm_flavour, | |
1884 | i386_nlm_osabi_sniffer); | |
1885 | ||
05816f70 | 1886 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4, |
8201327c | 1887 | i386_svr4_init_abi); |
05816f70 | 1888 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_GO32, |
8201327c | 1889 | i386_go32_init_abi); |
05816f70 | 1890 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_NETWARE, |
8201327c | 1891 | i386_nw_init_abi); |
38c968cf AC |
1892 | |
1893 | /* Initialize the i386 specific register groups. */ | |
1894 | i386_init_reggroups (); | |
c906108c | 1895 | } |