Commit | Line | Data |
---|---|---|
c906108c | 1 | /* Intel 386 target-dependent stuff. |
b6ba6518 KB |
2 | Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, |
3 | 1998, 1999, 2000, 2001 | |
c906108c SS |
4 | Free Software Foundation, Inc. |
5 | ||
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | #include "defs.h" | |
24 | #include "gdb_string.h" | |
25 | #include "frame.h" | |
26 | #include "inferior.h" | |
27 | #include "gdbcore.h" | |
28 | #include "target.h" | |
29 | #include "floatformat.h" | |
30 | #include "symtab.h" | |
31 | #include "gdbcmd.h" | |
32 | #include "command.h" | |
b4a20239 | 33 | #include "arch-utils.h" |
4e052eda | 34 | #include "regcache.h" |
d16aafd8 | 35 | #include "doublest.h" |
fd0407d6 | 36 | #include "value.h" |
c906108c | 37 | |
3d261580 MK |
38 | #include "gdb_assert.h" |
39 | ||
fc633446 MK |
40 | /* Names of the registers. The first 10 registers match the register |
41 | numbering scheme used by GCC for stabs and DWARF. */ | |
42 | static char *i386_register_names[] = | |
43 | { | |
44 | "eax", "ecx", "edx", "ebx", | |
45 | "esp", "ebp", "esi", "edi", | |
46 | "eip", "eflags", "cs", "ss", | |
47 | "ds", "es", "fs", "gs", | |
48 | "st0", "st1", "st2", "st3", | |
49 | "st4", "st5", "st6", "st7", | |
50 | "fctrl", "fstat", "ftag", "fiseg", | |
51 | "fioff", "foseg", "fooff", "fop", | |
52 | "xmm0", "xmm1", "xmm2", "xmm3", | |
53 | "xmm4", "xmm5", "xmm6", "xmm7", | |
54 | "mxcsr" | |
55 | }; | |
56 | ||
917317f4 JM |
57 | /* i386_register_byte[i] is the offset into the register file of the |
58 | start of register number i. We initialize this from | |
59 | i386_register_raw_size. */ | |
60 | int i386_register_byte[MAX_NUM_REGS]; | |
61 | ||
ceb4951f JB |
62 | /* i386_register_raw_size[i] is the number of bytes of storage in |
63 | GDB's register array occupied by register i. */ | |
917317f4 JM |
64 | int i386_register_raw_size[MAX_NUM_REGS] = { |
65 | 4, 4, 4, 4, | |
66 | 4, 4, 4, 4, | |
67 | 4, 4, 4, 4, | |
68 | 4, 4, 4, 4, | |
69 | 10, 10, 10, 10, | |
70 | 10, 10, 10, 10, | |
71 | 4, 4, 4, 4, | |
72 | 4, 4, 4, 4, | |
73 | 16, 16, 16, 16, | |
74 | 16, 16, 16, 16, | |
75 | 4 | |
76 | }; | |
77 | ||
78 | /* i386_register_virtual_size[i] is the size in bytes of the virtual | |
79 | type of register i. */ | |
80 | int i386_register_virtual_size[MAX_NUM_REGS]; | |
85540d8c | 81 | |
fc633446 MK |
82 | /* Return the name of register REG. */ |
83 | ||
84 | char * | |
85 | i386_register_name (int reg) | |
86 | { | |
87 | if (reg < 0) | |
88 | return NULL; | |
89 | if (reg >= sizeof (i386_register_names) / sizeof (*i386_register_names)) | |
90 | return NULL; | |
91 | ||
92 | return i386_register_names[reg]; | |
93 | } | |
94 | ||
85540d8c MK |
95 | /* Convert stabs register number REG to the appropriate register |
96 | number used by GDB. */ | |
97 | ||
98 | int | |
99 | i386_stab_reg_to_regnum (int reg) | |
100 | { | |
101 | /* This implements what GCC calls the "default" register map. */ | |
102 | if (reg >= 0 && reg <= 7) | |
103 | { | |
104 | /* General registers. */ | |
105 | return reg; | |
106 | } | |
107 | else if (reg >= 12 && reg <= 19) | |
108 | { | |
109 | /* Floating-point registers. */ | |
110 | return reg - 12 + FP0_REGNUM; | |
111 | } | |
112 | else if (reg >= 21 && reg <= 28) | |
113 | { | |
114 | /* SSE registers. */ | |
115 | return reg - 21 + XMM0_REGNUM; | |
116 | } | |
117 | else if (reg >= 29 && reg <= 36) | |
118 | { | |
119 | /* MMX registers. */ | |
120 | /* FIXME: kettenis/2001-07-28: Should we have the MMX registers | |
121 | as pseudo-registers? */ | |
122 | return reg - 29 + FP0_REGNUM; | |
123 | } | |
124 | ||
125 | /* This will hopefully provoke a warning. */ | |
126 | return NUM_REGS + NUM_PSEUDO_REGS; | |
127 | } | |
128 | ||
129 | /* Convert Dwarf register number REG to the appropriate register | |
130 | number used by GDB. */ | |
131 | ||
132 | int | |
133 | i386_dwarf_reg_to_regnum (int reg) | |
134 | { | |
135 | /* The DWARF register numbering includes %eip and %eflags, and | |
136 | numbers the floating point registers differently. */ | |
137 | if (reg >= 0 && reg <= 9) | |
138 | { | |
139 | /* General registers. */ | |
140 | return reg; | |
141 | } | |
142 | else if (reg >= 11 && reg <= 18) | |
143 | { | |
144 | /* Floating-point registers. */ | |
145 | return reg - 11 + FP0_REGNUM; | |
146 | } | |
147 | else if (reg >= 21) | |
148 | { | |
149 | /* The SSE and MMX registers have identical numbers as in stabs. */ | |
150 | return i386_stab_reg_to_regnum (reg); | |
151 | } | |
152 | ||
153 | /* This will hopefully provoke a warning. */ | |
154 | return NUM_REGS + NUM_PSEUDO_REGS; | |
155 | } | |
fc338970 | 156 | \f |
917317f4 | 157 | |
fc338970 MK |
158 | /* This is the variable that is set with "set disassembly-flavor", and |
159 | its legitimate values. */ | |
53904c9e AC |
160 | static const char att_flavor[] = "att"; |
161 | static const char intel_flavor[] = "intel"; | |
162 | static const char *valid_flavors[] = | |
c5aa993b | 163 | { |
c906108c SS |
164 | att_flavor, |
165 | intel_flavor, | |
166 | NULL | |
167 | }; | |
53904c9e | 168 | static const char *disassembly_flavor = att_flavor; |
c906108c | 169 | |
fc338970 MK |
170 | /* This is used to keep the bfd arch_info in sync with the disassembly |
171 | flavor. */ | |
a14ed312 KB |
172 | static void set_disassembly_flavor_sfunc (char *, int, |
173 | struct cmd_list_element *); | |
174 | static void set_disassembly_flavor (void); | |
fc338970 MK |
175 | \f |
176 | ||
177 | /* Stdio style buffering was used to minimize calls to ptrace, but | |
178 | this buffering did not take into account that the code section | |
179 | being accessed may not be an even number of buffers long (even if | |
180 | the buffer is only sizeof(int) long). In cases where the code | |
181 | section size happened to be a non-integral number of buffers long, | |
182 | attempting to read the last buffer would fail. Simply using | |
183 | target_read_memory and ignoring errors, rather than read_memory, is | |
184 | not the correct solution, since legitimate access errors would then | |
185 | be totally ignored. To properly handle this situation and continue | |
186 | to use buffering would require that this code be able to determine | |
187 | the minimum code section size granularity (not the alignment of the | |
188 | section itself, since the actual failing case that pointed out this | |
189 | problem had a section alignment of 4 but was not a multiple of 4 | |
190 | bytes long), on a target by target basis, and then adjust it's | |
191 | buffer size accordingly. This is messy, but potentially feasible. | |
192 | It probably needs the bfd library's help and support. For now, the | |
193 | buffer size is set to 1. (FIXME -fnf) */ | |
194 | ||
195 | #define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */ | |
c906108c SS |
196 | static CORE_ADDR codestream_next_addr; |
197 | static CORE_ADDR codestream_addr; | |
198 | static unsigned char codestream_buf[CODESTREAM_BUFSIZ]; | |
199 | static int codestream_off; | |
200 | static int codestream_cnt; | |
201 | ||
202 | #define codestream_tell() (codestream_addr + codestream_off) | |
fc338970 MK |
203 | #define codestream_peek() \ |
204 | (codestream_cnt == 0 ? \ | |
205 | codestream_fill(1) : codestream_buf[codestream_off]) | |
206 | #define codestream_get() \ | |
207 | (codestream_cnt-- == 0 ? \ | |
208 | codestream_fill(0) : codestream_buf[codestream_off++]) | |
c906108c | 209 | |
c5aa993b | 210 | static unsigned char |
fba45db2 | 211 | codestream_fill (int peek_flag) |
c906108c SS |
212 | { |
213 | codestream_addr = codestream_next_addr; | |
214 | codestream_next_addr += CODESTREAM_BUFSIZ; | |
215 | codestream_off = 0; | |
216 | codestream_cnt = CODESTREAM_BUFSIZ; | |
217 | read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ); | |
c5aa993b | 218 | |
c906108c | 219 | if (peek_flag) |
c5aa993b | 220 | return (codestream_peek ()); |
c906108c | 221 | else |
c5aa993b | 222 | return (codestream_get ()); |
c906108c SS |
223 | } |
224 | ||
225 | static void | |
fba45db2 | 226 | codestream_seek (CORE_ADDR place) |
c906108c SS |
227 | { |
228 | codestream_next_addr = place / CODESTREAM_BUFSIZ; | |
229 | codestream_next_addr *= CODESTREAM_BUFSIZ; | |
230 | codestream_cnt = 0; | |
231 | codestream_fill (1); | |
c5aa993b | 232 | while (codestream_tell () != place) |
c906108c SS |
233 | codestream_get (); |
234 | } | |
235 | ||
236 | static void | |
fba45db2 | 237 | codestream_read (unsigned char *buf, int count) |
c906108c SS |
238 | { |
239 | unsigned char *p; | |
240 | int i; | |
241 | p = buf; | |
242 | for (i = 0; i < count; i++) | |
243 | *p++ = codestream_get (); | |
244 | } | |
fc338970 | 245 | \f |
c906108c | 246 | |
fc338970 | 247 | /* If the next instruction is a jump, move to its target. */ |
c906108c SS |
248 | |
249 | static void | |
fba45db2 | 250 | i386_follow_jump (void) |
c906108c SS |
251 | { |
252 | unsigned char buf[4]; | |
253 | long delta; | |
254 | ||
255 | int data16; | |
256 | CORE_ADDR pos; | |
257 | ||
258 | pos = codestream_tell (); | |
259 | ||
260 | data16 = 0; | |
261 | if (codestream_peek () == 0x66) | |
262 | { | |
263 | codestream_get (); | |
264 | data16 = 1; | |
265 | } | |
266 | ||
267 | switch (codestream_get ()) | |
268 | { | |
269 | case 0xe9: | |
fc338970 | 270 | /* Relative jump: if data16 == 0, disp32, else disp16. */ |
c906108c SS |
271 | if (data16) |
272 | { | |
273 | codestream_read (buf, 2); | |
274 | delta = extract_signed_integer (buf, 2); | |
275 | ||
fc338970 MK |
276 | /* Include the size of the jmp instruction (including the |
277 | 0x66 prefix). */ | |
c5aa993b | 278 | pos += delta + 4; |
c906108c SS |
279 | } |
280 | else | |
281 | { | |
282 | codestream_read (buf, 4); | |
283 | delta = extract_signed_integer (buf, 4); | |
284 | ||
285 | pos += delta + 5; | |
286 | } | |
287 | break; | |
288 | case 0xeb: | |
fc338970 | 289 | /* Relative jump, disp8 (ignore data16). */ |
c906108c SS |
290 | codestream_read (buf, 1); |
291 | /* Sign-extend it. */ | |
292 | delta = extract_signed_integer (buf, 1); | |
293 | ||
294 | pos += delta + 2; | |
295 | break; | |
296 | } | |
297 | codestream_seek (pos); | |
298 | } | |
299 | ||
fc338970 MK |
300 | /* Find & return the amount a local space allocated, and advance the |
301 | codestream to the first register push (if any). | |
302 | ||
303 | If the entry sequence doesn't make sense, return -1, and leave | |
304 | codestream pointer at a random spot. */ | |
c906108c SS |
305 | |
306 | static long | |
fba45db2 | 307 | i386_get_frame_setup (CORE_ADDR pc) |
c906108c SS |
308 | { |
309 | unsigned char op; | |
310 | ||
311 | codestream_seek (pc); | |
312 | ||
313 | i386_follow_jump (); | |
314 | ||
315 | op = codestream_get (); | |
316 | ||
317 | if (op == 0x58) /* popl %eax */ | |
318 | { | |
fc338970 MK |
319 | /* This function must start with |
320 | ||
321 | popl %eax 0x58 | |
322 | xchgl %eax, (%esp) 0x87 0x04 0x24 | |
323 | or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00 | |
324 | ||
325 | (the System V compiler puts out the second `xchg' | |
326 | instruction, and the assembler doesn't try to optimize it, so | |
327 | the 'sib' form gets generated). This sequence is used to get | |
328 | the address of the return buffer for a function that returns | |
329 | a structure. */ | |
c906108c SS |
330 | int pos; |
331 | unsigned char buf[4]; | |
fc338970 MK |
332 | static unsigned char proto1[3] = { 0x87, 0x04, 0x24 }; |
333 | static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 }; | |
334 | ||
c906108c SS |
335 | pos = codestream_tell (); |
336 | codestream_read (buf, 4); | |
337 | if (memcmp (buf, proto1, 3) == 0) | |
338 | pos += 3; | |
339 | else if (memcmp (buf, proto2, 4) == 0) | |
340 | pos += 4; | |
341 | ||
342 | codestream_seek (pos); | |
fc338970 | 343 | op = codestream_get (); /* Update next opcode. */ |
c906108c SS |
344 | } |
345 | ||
346 | if (op == 0x68 || op == 0x6a) | |
347 | { | |
fc338970 MK |
348 | /* This function may start with |
349 | ||
350 | pushl constant | |
351 | call _probe | |
352 | addl $4, %esp | |
353 | ||
354 | followed by | |
355 | ||
356 | pushl %ebp | |
357 | ||
358 | etc. */ | |
c906108c SS |
359 | int pos; |
360 | unsigned char buf[8]; | |
361 | ||
fc338970 | 362 | /* Skip past the `pushl' instruction; it has either a one-byte |
c906108c SS |
363 | or a four-byte operand, depending on the opcode. */ |
364 | pos = codestream_tell (); | |
365 | if (op == 0x68) | |
366 | pos += 4; | |
367 | else | |
368 | pos += 1; | |
369 | codestream_seek (pos); | |
370 | ||
fc338970 MK |
371 | /* Read the following 8 bytes, which should be "call _probe" (6 |
372 | bytes) followed by "addl $4,%esp" (2 bytes). */ | |
c906108c SS |
373 | codestream_read (buf, sizeof (buf)); |
374 | if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4) | |
375 | pos += sizeof (buf); | |
376 | codestream_seek (pos); | |
fc338970 | 377 | op = codestream_get (); /* Update next opcode. */ |
c906108c SS |
378 | } |
379 | ||
380 | if (op == 0x55) /* pushl %ebp */ | |
c5aa993b | 381 | { |
fc338970 | 382 | /* Check for "movl %esp, %ebp" -- can be written in two ways. */ |
c906108c SS |
383 | switch (codestream_get ()) |
384 | { | |
385 | case 0x8b: | |
386 | if (codestream_get () != 0xec) | |
fc338970 | 387 | return -1; |
c906108c SS |
388 | break; |
389 | case 0x89: | |
390 | if (codestream_get () != 0xe5) | |
fc338970 | 391 | return -1; |
c906108c SS |
392 | break; |
393 | default: | |
fc338970 | 394 | return -1; |
c906108c | 395 | } |
fc338970 MK |
396 | /* Check for stack adjustment |
397 | ||
398 | subl $XXX, %esp | |
399 | ||
400 | NOTE: You can't subtract a 16 bit immediate from a 32 bit | |
401 | reg, so we don't have to worry about a data16 prefix. */ | |
c906108c SS |
402 | op = codestream_peek (); |
403 | if (op == 0x83) | |
404 | { | |
fc338970 | 405 | /* `subl' with 8 bit immediate. */ |
c906108c SS |
406 | codestream_get (); |
407 | if (codestream_get () != 0xec) | |
fc338970 | 408 | /* Some instruction starting with 0x83 other than `subl'. */ |
c906108c SS |
409 | { |
410 | codestream_seek (codestream_tell () - 2); | |
411 | return 0; | |
412 | } | |
fc338970 MK |
413 | /* `subl' with signed byte immediate (though it wouldn't |
414 | make sense to be negative). */ | |
c5aa993b | 415 | return (codestream_get ()); |
c906108c SS |
416 | } |
417 | else if (op == 0x81) | |
418 | { | |
419 | char buf[4]; | |
fc338970 | 420 | /* Maybe it is `subl' with a 32 bit immedediate. */ |
c5aa993b | 421 | codestream_get (); |
c906108c | 422 | if (codestream_get () != 0xec) |
fc338970 | 423 | /* Some instruction starting with 0x81 other than `subl'. */ |
c906108c SS |
424 | { |
425 | codestream_seek (codestream_tell () - 2); | |
426 | return 0; | |
427 | } | |
fc338970 | 428 | /* It is `subl' with a 32 bit immediate. */ |
c5aa993b | 429 | codestream_read ((unsigned char *) buf, 4); |
c906108c SS |
430 | return extract_signed_integer (buf, 4); |
431 | } | |
432 | else | |
433 | { | |
fc338970 | 434 | return 0; |
c906108c SS |
435 | } |
436 | } | |
437 | else if (op == 0xc8) | |
438 | { | |
439 | char buf[2]; | |
fc338970 | 440 | /* `enter' with 16 bit unsigned immediate. */ |
c5aa993b | 441 | codestream_read ((unsigned char *) buf, 2); |
fc338970 | 442 | codestream_get (); /* Flush final byte of enter instruction. */ |
c906108c SS |
443 | return extract_unsigned_integer (buf, 2); |
444 | } | |
445 | return (-1); | |
446 | } | |
447 | ||
c833a37e MK |
448 | /* Return the chain-pointer for FRAME. In the case of the i386, the |
449 | frame's nominal address is the address of a 4-byte word containing | |
450 | the calling frame's address. */ | |
451 | ||
452 | CORE_ADDR | |
453 | i386_frame_chain (struct frame_info *frame) | |
454 | { | |
455 | if (frame->signal_handler_caller) | |
456 | return frame->frame; | |
457 | ||
458 | if (! inside_entry_file (frame->pc)) | |
459 | return read_memory_unsigned_integer (frame->frame, 4); | |
460 | ||
461 | return 0; | |
462 | } | |
463 | ||
539ffe0b MK |
464 | /* Determine whether the function invocation represented by FRAME does |
465 | not have a from on the stack associated with it. If it does not, | |
466 | return non-zero, otherwise return zero. */ | |
467 | ||
468 | int | |
469 | i386_frameless_function_invocation (struct frame_info *frame) | |
470 | { | |
471 | if (frame->signal_handler_caller) | |
472 | return 0; | |
473 | ||
474 | return frameless_look_for_prologue (frame); | |
475 | } | |
476 | ||
0d17c81d MK |
477 | /* Return the saved program counter for FRAME. */ |
478 | ||
479 | CORE_ADDR | |
480 | i386_frame_saved_pc (struct frame_info *frame) | |
481 | { | |
482 | /* FIXME: kettenis/2001-05-09: Conditionalizing the next bit of code | |
483 | on SIGCONTEXT_PC_OFFSET and I386V4_SIGTRAMP_SAVED_PC should be | |
484 | considered a temporary hack. I plan to come up with something | |
485 | better when we go multi-arch. */ | |
486 | #if defined (SIGCONTEXT_PC_OFFSET) || defined (I386V4_SIGTRAMP_SAVED_PC) | |
487 | if (frame->signal_handler_caller) | |
488 | return sigtramp_saved_pc (frame); | |
489 | #endif | |
490 | ||
491 | return read_memory_unsigned_integer (frame->frame + 4, 4); | |
492 | } | |
493 | ||
ed84f6c1 MK |
494 | /* Immediately after a function call, return the saved pc. */ |
495 | ||
496 | CORE_ADDR | |
497 | i386_saved_pc_after_call (struct frame_info *frame) | |
498 | { | |
499 | return read_memory_unsigned_integer (read_register (SP_REGNUM), 4); | |
500 | } | |
501 | ||
c906108c SS |
502 | /* Return number of args passed to a frame. |
503 | Can return -1, meaning no way to tell. */ | |
504 | ||
505 | int | |
fba45db2 | 506 | i386_frame_num_args (struct frame_info *fi) |
c906108c SS |
507 | { |
508 | #if 1 | |
509 | return -1; | |
510 | #else | |
511 | /* This loses because not only might the compiler not be popping the | |
fc338970 MK |
512 | args right after the function call, it might be popping args from |
513 | both this call and a previous one, and we would say there are | |
514 | more args than there really are. */ | |
c906108c | 515 | |
c5aa993b JM |
516 | int retpc; |
517 | unsigned char op; | |
c906108c SS |
518 | struct frame_info *pfi; |
519 | ||
fc338970 | 520 | /* On the i386, the instruction following the call could be: |
c906108c SS |
521 | popl %ecx - one arg |
522 | addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits | |
fc338970 | 523 | anything else - zero args. */ |
c906108c SS |
524 | |
525 | int frameless; | |
526 | ||
392a587b | 527 | frameless = FRAMELESS_FUNCTION_INVOCATION (fi); |
c906108c | 528 | if (frameless) |
fc338970 MK |
529 | /* In the absence of a frame pointer, GDB doesn't get correct |
530 | values for nameless arguments. Return -1, so it doesn't print | |
531 | any nameless arguments. */ | |
c906108c SS |
532 | return -1; |
533 | ||
c5aa993b | 534 | pfi = get_prev_frame (fi); |
c906108c SS |
535 | if (pfi == 0) |
536 | { | |
fc338970 MK |
537 | /* NOTE: This can happen if we are looking at the frame for |
538 | main, because FRAME_CHAIN_VALID won't let us go into start. | |
539 | If we have debugging symbols, that's not really a big deal; | |
540 | it just means it will only show as many arguments to main as | |
541 | are declared. */ | |
c906108c SS |
542 | return -1; |
543 | } | |
544 | else | |
545 | { | |
c5aa993b JM |
546 | retpc = pfi->pc; |
547 | op = read_memory_integer (retpc, 1); | |
fc338970 | 548 | if (op == 0x59) /* pop %ecx */ |
c5aa993b | 549 | return 1; |
c906108c SS |
550 | else if (op == 0x83) |
551 | { | |
c5aa993b JM |
552 | op = read_memory_integer (retpc + 1, 1); |
553 | if (op == 0xc4) | |
554 | /* addl $<signed imm 8 bits>, %esp */ | |
555 | return (read_memory_integer (retpc + 2, 1) & 0xff) / 4; | |
c906108c SS |
556 | else |
557 | return 0; | |
558 | } | |
fc338970 MK |
559 | else if (op == 0x81) /* `add' with 32 bit immediate. */ |
560 | { | |
c5aa993b JM |
561 | op = read_memory_integer (retpc + 1, 1); |
562 | if (op == 0xc4) | |
563 | /* addl $<imm 32>, %esp */ | |
564 | return read_memory_integer (retpc + 2, 4) / 4; | |
c906108c SS |
565 | else |
566 | return 0; | |
567 | } | |
568 | else | |
569 | { | |
570 | return 0; | |
571 | } | |
572 | } | |
573 | #endif | |
574 | } | |
575 | ||
fc338970 MK |
576 | /* Parse the first few instructions the function to see what registers |
577 | were stored. | |
578 | ||
579 | We handle these cases: | |
580 | ||
581 | The startup sequence can be at the start of the function, or the | |
582 | function can start with a branch to startup code at the end. | |
583 | ||
584 | %ebp can be set up with either the 'enter' instruction, or "pushl | |
585 | %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was | |
586 | once used in the System V compiler). | |
587 | ||
588 | Local space is allocated just below the saved %ebp by either the | |
589 | 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16 | |
590 | bit unsigned argument for space to allocate, and the 'addl' | |
591 | instruction could have either a signed byte, or 32 bit immediate. | |
592 | ||
593 | Next, the registers used by this function are pushed. With the | |
594 | System V compiler they will always be in the order: %edi, %esi, | |
595 | %ebx (and sometimes a harmless bug causes it to also save but not | |
596 | restore %eax); however, the code below is willing to see the pushes | |
597 | in any order, and will handle up to 8 of them. | |
598 | ||
599 | If the setup sequence is at the end of the function, then the next | |
600 | instruction will be a branch back to the start. */ | |
c906108c SS |
601 | |
602 | void | |
fba45db2 | 603 | i386_frame_init_saved_regs (struct frame_info *fip) |
c906108c SS |
604 | { |
605 | long locals = -1; | |
606 | unsigned char op; | |
607 | CORE_ADDR dummy_bottom; | |
fc338970 | 608 | CORE_ADDR addr; |
c906108c SS |
609 | CORE_ADDR pc; |
610 | int i; | |
c5aa993b | 611 | |
1211c4e4 AC |
612 | if (fip->saved_regs) |
613 | return; | |
614 | ||
615 | frame_saved_regs_zalloc (fip); | |
c5aa993b | 616 | |
fc338970 MK |
617 | /* If the frame is the end of a dummy, compute where the beginning |
618 | would be. */ | |
c906108c | 619 | dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH; |
c5aa993b | 620 | |
fc338970 | 621 | /* Check if the PC points in the stack, in a dummy frame. */ |
c5aa993b | 622 | if (dummy_bottom <= fip->pc && fip->pc <= fip->frame) |
c906108c | 623 | { |
fc338970 MK |
624 | /* All registers were saved by push_call_dummy. */ |
625 | addr = fip->frame; | |
c5aa993b | 626 | for (i = 0; i < NUM_REGS; i++) |
c906108c | 627 | { |
fc338970 MK |
628 | addr -= REGISTER_RAW_SIZE (i); |
629 | fip->saved_regs[i] = addr; | |
c906108c SS |
630 | } |
631 | return; | |
632 | } | |
c5aa993b | 633 | |
c906108c SS |
634 | pc = get_pc_function_start (fip->pc); |
635 | if (pc != 0) | |
636 | locals = i386_get_frame_setup (pc); | |
c5aa993b JM |
637 | |
638 | if (locals >= 0) | |
c906108c | 639 | { |
fc338970 | 640 | addr = fip->frame - 4 - locals; |
c5aa993b | 641 | for (i = 0; i < 8; i++) |
c906108c SS |
642 | { |
643 | op = codestream_get (); | |
644 | if (op < 0x50 || op > 0x57) | |
645 | break; | |
646 | #ifdef I386_REGNO_TO_SYMMETRY | |
647 | /* Dynix uses different internal numbering. Ick. */ | |
fc338970 | 648 | fip->saved_regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = addr; |
c906108c | 649 | #else |
fc338970 | 650 | fip->saved_regs[op - 0x50] = addr; |
c906108c | 651 | #endif |
fc338970 | 652 | addr -= 4; |
c906108c SS |
653 | } |
654 | } | |
c5aa993b | 655 | |
1211c4e4 AC |
656 | fip->saved_regs[PC_REGNUM] = fip->frame + 4; |
657 | fip->saved_regs[FP_REGNUM] = fip->frame; | |
c906108c SS |
658 | } |
659 | ||
fc338970 | 660 | /* Return PC of first real instruction. */ |
c906108c SS |
661 | |
662 | int | |
fba45db2 | 663 | i386_skip_prologue (int pc) |
c906108c SS |
664 | { |
665 | unsigned char op; | |
666 | int i; | |
c5aa993b | 667 | static unsigned char pic_pat[6] = |
fc338970 MK |
668 | { 0xe8, 0, 0, 0, 0, /* call 0x0 */ |
669 | 0x5b, /* popl %ebx */ | |
c5aa993b | 670 | }; |
c906108c | 671 | CORE_ADDR pos; |
c5aa993b | 672 | |
c906108c SS |
673 | if (i386_get_frame_setup (pc) < 0) |
674 | return (pc); | |
c5aa993b | 675 | |
fc338970 MK |
676 | /* Found valid frame setup -- codestream now points to start of push |
677 | instructions for saving registers. */ | |
c5aa993b | 678 | |
fc338970 | 679 | /* Skip over register saves. */ |
c906108c SS |
680 | for (i = 0; i < 8; i++) |
681 | { | |
682 | op = codestream_peek (); | |
fc338970 | 683 | /* Break if not `pushl' instrunction. */ |
c5aa993b | 684 | if (op < 0x50 || op > 0x57) |
c906108c SS |
685 | break; |
686 | codestream_get (); | |
687 | } | |
688 | ||
fc338970 MK |
689 | /* The native cc on SVR4 in -K PIC mode inserts the following code |
690 | to get the address of the global offset table (GOT) into register | |
691 | %ebx | |
692 | ||
693 | call 0x0 | |
694 | popl %ebx | |
695 | movl %ebx,x(%ebp) (optional) | |
696 | addl y,%ebx | |
697 | ||
c906108c SS |
698 | This code is with the rest of the prologue (at the end of the |
699 | function), so we have to skip it to get to the first real | |
700 | instruction at the start of the function. */ | |
c5aa993b | 701 | |
c906108c SS |
702 | pos = codestream_tell (); |
703 | for (i = 0; i < 6; i++) | |
704 | { | |
705 | op = codestream_get (); | |
c5aa993b | 706 | if (pic_pat[i] != op) |
c906108c SS |
707 | break; |
708 | } | |
709 | if (i == 6) | |
710 | { | |
711 | unsigned char buf[4]; | |
712 | long delta = 6; | |
713 | ||
714 | op = codestream_get (); | |
c5aa993b | 715 | if (op == 0x89) /* movl %ebx, x(%ebp) */ |
c906108c SS |
716 | { |
717 | op = codestream_get (); | |
fc338970 | 718 | if (op == 0x5d) /* One byte offset from %ebp. */ |
c906108c SS |
719 | { |
720 | delta += 3; | |
721 | codestream_read (buf, 1); | |
722 | } | |
fc338970 | 723 | else if (op == 0x9d) /* Four byte offset from %ebp. */ |
c906108c SS |
724 | { |
725 | delta += 6; | |
726 | codestream_read (buf, 4); | |
727 | } | |
fc338970 | 728 | else /* Unexpected instruction. */ |
c5aa993b JM |
729 | delta = -1; |
730 | op = codestream_get (); | |
c906108c | 731 | } |
c5aa993b JM |
732 | /* addl y,%ebx */ |
733 | if (delta > 0 && op == 0x81 && codestream_get () == 0xc3) | |
c906108c | 734 | { |
c5aa993b | 735 | pos += delta + 6; |
c906108c SS |
736 | } |
737 | } | |
738 | codestream_seek (pos); | |
c5aa993b | 739 | |
c906108c | 740 | i386_follow_jump (); |
c5aa993b | 741 | |
c906108c SS |
742 | return (codestream_tell ()); |
743 | } | |
744 | ||
745 | void | |
fba45db2 | 746 | i386_push_dummy_frame (void) |
c906108c SS |
747 | { |
748 | CORE_ADDR sp = read_register (SP_REGNUM); | |
749 | int regnum; | |
750 | char regbuf[MAX_REGISTER_RAW_SIZE]; | |
c5aa993b | 751 | |
c906108c SS |
752 | sp = push_word (sp, read_register (PC_REGNUM)); |
753 | sp = push_word (sp, read_register (FP_REGNUM)); | |
754 | write_register (FP_REGNUM, sp); | |
755 | for (regnum = 0; regnum < NUM_REGS; regnum++) | |
756 | { | |
757 | read_register_gen (regnum, regbuf); | |
758 | sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum)); | |
759 | } | |
760 | write_register (SP_REGNUM, sp); | |
761 | } | |
762 | ||
a7769679 MK |
763 | /* Insert the (relative) function address into the call sequence |
764 | stored at DYMMY. */ | |
765 | ||
766 | void | |
767 | i386_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs, | |
ea7c478f | 768 | struct value **args, struct type *type, int gcc_p) |
a7769679 MK |
769 | { |
770 | int from, to, delta, loc; | |
771 | ||
772 | loc = (int)(read_register (SP_REGNUM) - CALL_DUMMY_LENGTH); | |
773 | from = loc + 5; | |
774 | to = (int)(fun); | |
775 | delta = to - from; | |
776 | ||
777 | *((char *)(dummy) + 1) = (delta & 0xff); | |
778 | *((char *)(dummy) + 2) = ((delta >> 8) & 0xff); | |
779 | *((char *)(dummy) + 3) = ((delta >> 16) & 0xff); | |
780 | *((char *)(dummy) + 4) = ((delta >> 24) & 0xff); | |
781 | } | |
782 | ||
c906108c | 783 | void |
fba45db2 | 784 | i386_pop_frame (void) |
c906108c SS |
785 | { |
786 | struct frame_info *frame = get_current_frame (); | |
787 | CORE_ADDR fp; | |
788 | int regnum; | |
c906108c | 789 | char regbuf[MAX_REGISTER_RAW_SIZE]; |
c5aa993b | 790 | |
c906108c | 791 | fp = FRAME_FP (frame); |
1211c4e4 AC |
792 | i386_frame_init_saved_regs (frame); |
793 | ||
c5aa993b | 794 | for (regnum = 0; regnum < NUM_REGS; regnum++) |
c906108c | 795 | { |
fc338970 MK |
796 | CORE_ADDR addr; |
797 | addr = frame->saved_regs[regnum]; | |
798 | if (addr) | |
c906108c | 799 | { |
fc338970 | 800 | read_memory (addr, regbuf, REGISTER_RAW_SIZE (regnum)); |
c906108c SS |
801 | write_register_bytes (REGISTER_BYTE (regnum), regbuf, |
802 | REGISTER_RAW_SIZE (regnum)); | |
803 | } | |
804 | } | |
805 | write_register (FP_REGNUM, read_memory_integer (fp, 4)); | |
806 | write_register (PC_REGNUM, read_memory_integer (fp + 4, 4)); | |
807 | write_register (SP_REGNUM, fp + 8); | |
808 | flush_cached_frames (); | |
809 | } | |
fc338970 | 810 | \f |
c906108c SS |
811 | |
812 | #ifdef GET_LONGJMP_TARGET | |
813 | ||
fc338970 MK |
814 | /* Figure out where the longjmp will land. Slurp the args out of the |
815 | stack. We expect the first arg to be a pointer to the jmp_buf | |
816 | structure from which we extract the pc (JB_PC) that we will land | |
817 | at. The pc is copied into PC. This routine returns true on | |
818 | success. */ | |
c906108c SS |
819 | |
820 | int | |
fba45db2 | 821 | get_longjmp_target (CORE_ADDR *pc) |
c906108c SS |
822 | { |
823 | char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT]; | |
824 | CORE_ADDR sp, jb_addr; | |
825 | ||
826 | sp = read_register (SP_REGNUM); | |
827 | ||
fc338970 | 828 | if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack. */ |
c906108c SS |
829 | buf, |
830 | TARGET_PTR_BIT / TARGET_CHAR_BIT)) | |
831 | return 0; | |
832 | ||
833 | jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT); | |
834 | ||
835 | if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf, | |
836 | TARGET_PTR_BIT / TARGET_CHAR_BIT)) | |
837 | return 0; | |
838 | ||
839 | *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT); | |
840 | ||
841 | return 1; | |
842 | } | |
843 | ||
844 | #endif /* GET_LONGJMP_TARGET */ | |
fc338970 | 845 | \f |
c906108c | 846 | |
22f8ba57 | 847 | CORE_ADDR |
ea7c478f | 848 | i386_push_arguments (int nargs, struct value **args, CORE_ADDR sp, |
22f8ba57 MK |
849 | int struct_return, CORE_ADDR struct_addr) |
850 | { | |
851 | sp = default_push_arguments (nargs, args, sp, struct_return, struct_addr); | |
852 | ||
853 | if (struct_return) | |
854 | { | |
855 | char buf[4]; | |
856 | ||
857 | sp -= 4; | |
858 | store_address (buf, 4, struct_addr); | |
859 | write_memory (sp, buf, 4); | |
860 | } | |
861 | ||
862 | return sp; | |
863 | } | |
864 | ||
865 | void | |
866 | i386_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
867 | { | |
868 | /* Do nothing. Everything was already done by i386_push_arguments. */ | |
869 | } | |
870 | ||
1a309862 MK |
871 | /* These registers are used for returning integers (and on some |
872 | targets also for returning `struct' and `union' values when their | |
ef9dff19 | 873 | size and alignment match an integer type). */ |
1a309862 MK |
874 | #define LOW_RETURN_REGNUM 0 /* %eax */ |
875 | #define HIGH_RETURN_REGNUM 2 /* %edx */ | |
876 | ||
877 | /* Extract from an array REGBUF containing the (raw) register state, a | |
878 | function return value of TYPE, and copy that, in virtual format, | |
879 | into VALBUF. */ | |
880 | ||
c906108c | 881 | void |
1a309862 | 882 | i386_extract_return_value (struct type *type, char *regbuf, char *valbuf) |
c906108c | 883 | { |
1a309862 MK |
884 | int len = TYPE_LENGTH (type); |
885 | ||
1e8d0a7b MK |
886 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
887 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 MK |
888 | { |
889 | i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regbuf, valbuf); | |
890 | return; | |
891 | } | |
1e8d0a7b MK |
892 | |
893 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
c906108c | 894 | { |
1a309862 MK |
895 | if (NUM_FREGS == 0) |
896 | { | |
897 | warning ("Cannot find floating-point return value."); | |
898 | memset (valbuf, 0, len); | |
ef9dff19 | 899 | return; |
1a309862 MK |
900 | } |
901 | ||
c6ba6f0d MK |
902 | /* Floating-point return values can be found in %st(0). Convert |
903 | its contents to the desired type. This is probably not | |
904 | exactly how it would happen on the target itself, but it is | |
905 | the best we can do. */ | |
906 | convert_typed_floating (®buf[REGISTER_BYTE (FP0_REGNUM)], | |
907 | builtin_type_i387_ext, valbuf, type); | |
c906108c SS |
908 | } |
909 | else | |
c5aa993b | 910 | { |
d4f3574e SS |
911 | int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); |
912 | int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); | |
913 | ||
914 | if (len <= low_size) | |
1a309862 | 915 | memcpy (valbuf, ®buf[REGISTER_BYTE (LOW_RETURN_REGNUM)], len); |
d4f3574e SS |
916 | else if (len <= (low_size + high_size)) |
917 | { | |
918 | memcpy (valbuf, | |
1a309862 | 919 | ®buf[REGISTER_BYTE (LOW_RETURN_REGNUM)], low_size); |
d4f3574e | 920 | memcpy (valbuf + low_size, |
1a309862 | 921 | ®buf[REGISTER_BYTE (HIGH_RETURN_REGNUM)], len - low_size); |
d4f3574e SS |
922 | } |
923 | else | |
8e65ff28 AC |
924 | internal_error (__FILE__, __LINE__, |
925 | "Cannot extract return value of %d bytes long.", len); | |
c906108c SS |
926 | } |
927 | } | |
928 | ||
ef9dff19 MK |
929 | /* Write into the appropriate registers a function return value stored |
930 | in VALBUF of type TYPE, given in virtual format. */ | |
931 | ||
932 | void | |
933 | i386_store_return_value (struct type *type, char *valbuf) | |
934 | { | |
935 | int len = TYPE_LENGTH (type); | |
936 | ||
1e8d0a7b MK |
937 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
938 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 MK |
939 | { |
940 | i386_store_return_value (TYPE_FIELD_TYPE (type, 0), valbuf); | |
941 | return; | |
942 | } | |
1e8d0a7b MK |
943 | |
944 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
ef9dff19 | 945 | { |
ccb945b8 | 946 | unsigned int fstat; |
c6ba6f0d | 947 | char buf[FPU_REG_RAW_SIZE]; |
ccb945b8 | 948 | |
ef9dff19 MK |
949 | if (NUM_FREGS == 0) |
950 | { | |
951 | warning ("Cannot set floating-point return value."); | |
952 | return; | |
953 | } | |
954 | ||
635b0cc1 MK |
955 | /* Returning floating-point values is a bit tricky. Apart from |
956 | storing the return value in %st(0), we have to simulate the | |
957 | state of the FPU at function return point. */ | |
958 | ||
c6ba6f0d MK |
959 | /* Convert the value found in VALBUF to the extended |
960 | floating-point format used by the FPU. This is probably | |
961 | not exactly how it would happen on the target itself, but | |
962 | it is the best we can do. */ | |
963 | convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext); | |
964 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf, | |
965 | FPU_REG_RAW_SIZE); | |
ccb945b8 | 966 | |
635b0cc1 MK |
967 | /* Set the top of the floating-point register stack to 7. The |
968 | actual value doesn't really matter, but 7 is what a normal | |
969 | function return would end up with if the program started out | |
970 | with a freshly initialized FPU. */ | |
ccb945b8 MK |
971 | fstat = read_register (FSTAT_REGNUM); |
972 | fstat |= (7 << 11); | |
973 | write_register (FSTAT_REGNUM, fstat); | |
974 | ||
635b0cc1 MK |
975 | /* Mark %st(1) through %st(7) as empty. Since we set the top of |
976 | the floating-point register stack to 7, the appropriate value | |
977 | for the tag word is 0x3fff. */ | |
ccb945b8 | 978 | write_register (FTAG_REGNUM, 0x3fff); |
ef9dff19 MK |
979 | } |
980 | else | |
981 | { | |
982 | int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); | |
983 | int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); | |
984 | ||
985 | if (len <= low_size) | |
986 | write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM), valbuf, len); | |
987 | else if (len <= (low_size + high_size)) | |
988 | { | |
989 | write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM), | |
990 | valbuf, low_size); | |
991 | write_register_bytes (REGISTER_BYTE (HIGH_RETURN_REGNUM), | |
992 | valbuf + low_size, len - low_size); | |
993 | } | |
994 | else | |
8e65ff28 AC |
995 | internal_error (__FILE__, __LINE__, |
996 | "Cannot store return value of %d bytes long.", len); | |
ef9dff19 MK |
997 | } |
998 | } | |
f7af9647 MK |
999 | |
1000 | /* Extract from an array REGBUF containing the (raw) register state | |
1001 | the address in which a function should return its structure value, | |
1002 | as a CORE_ADDR. */ | |
1003 | ||
1004 | CORE_ADDR | |
1005 | i386_extract_struct_value_address (char *regbuf) | |
1006 | { | |
1007 | return extract_address (®buf[REGISTER_BYTE (LOW_RETURN_REGNUM)], | |
1008 | REGISTER_RAW_SIZE (LOW_RETURN_REGNUM)); | |
1009 | } | |
fc338970 | 1010 | \f |
ef9dff19 | 1011 | |
d7a0d72c MK |
1012 | /* Return the GDB type object for the "standard" data type of data in |
1013 | register REGNUM. Perhaps %esi and %edi should go here, but | |
1014 | potentially they could be used for things other than address. */ | |
1015 | ||
1016 | struct type * | |
1017 | i386_register_virtual_type (int regnum) | |
1018 | { | |
1019 | if (regnum == PC_REGNUM || regnum == FP_REGNUM || regnum == SP_REGNUM) | |
1020 | return lookup_pointer_type (builtin_type_void); | |
1021 | ||
1022 | if (IS_FP_REGNUM (regnum)) | |
c6ba6f0d | 1023 | return builtin_type_i387_ext; |
d7a0d72c MK |
1024 | |
1025 | if (IS_SSE_REGNUM (regnum)) | |
1026 | return builtin_type_v4sf; | |
1027 | ||
1028 | return builtin_type_int; | |
1029 | } | |
1030 | ||
1031 | /* Return true iff register REGNUM's virtual format is different from | |
1032 | its raw format. Note that this definition assumes that the host | |
1033 | supports IEEE 32-bit floats, since it doesn't say that SSE | |
1034 | registers need conversion. Even if we can't find a counterexample, | |
1035 | this is still sloppy. */ | |
1036 | ||
1037 | int | |
1038 | i386_register_convertible (int regnum) | |
1039 | { | |
1040 | return IS_FP_REGNUM (regnum); | |
1041 | } | |
1042 | ||
ac27f131 | 1043 | /* Convert data from raw format for register REGNUM in buffer FROM to |
3d261580 | 1044 | virtual format with type TYPE in buffer TO. */ |
ac27f131 MK |
1045 | |
1046 | void | |
1047 | i386_register_convert_to_virtual (int regnum, struct type *type, | |
1048 | char *from, char *to) | |
1049 | { | |
c6ba6f0d | 1050 | gdb_assert (IS_FP_REGNUM (regnum)); |
3d261580 MK |
1051 | |
1052 | /* We only support floating-point values. */ | |
8d7f6b4a MK |
1053 | if (TYPE_CODE (type) != TYPE_CODE_FLT) |
1054 | { | |
1055 | warning ("Cannot convert floating-point register value " | |
1056 | "to non-floating-point type."); | |
1057 | memset (to, 0, TYPE_LENGTH (type)); | |
1058 | return; | |
1059 | } | |
3d261580 | 1060 | |
c6ba6f0d MK |
1061 | /* Convert to TYPE. This should be a no-op if TYPE is equivalent to |
1062 | the extended floating-point format used by the FPU. */ | |
1063 | convert_typed_floating (from, builtin_type_i387_ext, to, type); | |
ac27f131 MK |
1064 | } |
1065 | ||
1066 | /* Convert data from virtual format with type TYPE in buffer FROM to | |
3d261580 | 1067 | raw format for register REGNUM in buffer TO. */ |
ac27f131 MK |
1068 | |
1069 | void | |
1070 | i386_register_convert_to_raw (struct type *type, int regnum, | |
1071 | char *from, char *to) | |
1072 | { | |
c6ba6f0d MK |
1073 | gdb_assert (IS_FP_REGNUM (regnum)); |
1074 | ||
1075 | /* We only support floating-point values. */ | |
1076 | if (TYPE_CODE (type) != TYPE_CODE_FLT) | |
1077 | { | |
1078 | warning ("Cannot convert non-floating-point type " | |
1079 | "to floating-point register value."); | |
1080 | memset (to, 0, TYPE_LENGTH (type)); | |
1081 | return; | |
1082 | } | |
3d261580 | 1083 | |
c6ba6f0d MK |
1084 | /* Convert from TYPE. This should be a no-op if TYPE is equivalent |
1085 | to the extended floating-point format used by the FPU. */ | |
1086 | convert_typed_floating (from, type, to, builtin_type_i387_ext); | |
ac27f131 | 1087 | } |
ac27f131 | 1088 | \f |
fc338970 | 1089 | |
c906108c | 1090 | #ifdef I386V4_SIGTRAMP_SAVED_PC |
fc338970 MK |
1091 | /* Get saved user PC for sigtramp from the pushed ucontext on the |
1092 | stack for all three variants of SVR4 sigtramps. */ | |
c906108c SS |
1093 | |
1094 | CORE_ADDR | |
fba45db2 | 1095 | i386v4_sigtramp_saved_pc (struct frame_info *frame) |
c906108c SS |
1096 | { |
1097 | CORE_ADDR saved_pc_offset = 4; | |
1098 | char *name = NULL; | |
1099 | ||
1100 | find_pc_partial_function (frame->pc, &name, NULL, NULL); | |
1101 | if (name) | |
1102 | { | |
1103 | if (STREQ (name, "_sigreturn")) | |
1104 | saved_pc_offset = 132 + 14 * 4; | |
1105 | else if (STREQ (name, "_sigacthandler")) | |
1106 | saved_pc_offset = 80 + 14 * 4; | |
1107 | else if (STREQ (name, "sigvechandler")) | |
1108 | saved_pc_offset = 120 + 14 * 4; | |
1109 | } | |
1110 | ||
1111 | if (frame->next) | |
1112 | return read_memory_integer (frame->next->frame + saved_pc_offset, 4); | |
1113 | return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4); | |
1114 | } | |
1115 | #endif /* I386V4_SIGTRAMP_SAVED_PC */ | |
fc338970 | 1116 | \f |
a0b3c4fd | 1117 | |
c906108c | 1118 | #ifdef STATIC_TRANSFORM_NAME |
fc338970 MK |
1119 | /* SunPRO encodes the static variables. This is not related to C++ |
1120 | mangling, it is done for C too. */ | |
c906108c SS |
1121 | |
1122 | char * | |
fba45db2 | 1123 | sunpro_static_transform_name (char *name) |
c906108c SS |
1124 | { |
1125 | char *p; | |
1126 | if (IS_STATIC_TRANSFORM_NAME (name)) | |
1127 | { | |
fc338970 MK |
1128 | /* For file-local statics there will be a period, a bunch of |
1129 | junk (the contents of which match a string given in the | |
c5aa993b JM |
1130 | N_OPT), a period and the name. For function-local statics |
1131 | there will be a bunch of junk (which seems to change the | |
1132 | second character from 'A' to 'B'), a period, the name of the | |
1133 | function, and the name. So just skip everything before the | |
1134 | last period. */ | |
c906108c SS |
1135 | p = strrchr (name, '.'); |
1136 | if (p != NULL) | |
1137 | name = p + 1; | |
1138 | } | |
1139 | return name; | |
1140 | } | |
1141 | #endif /* STATIC_TRANSFORM_NAME */ | |
fc338970 | 1142 | \f |
c906108c | 1143 | |
fc338970 | 1144 | /* Stuff for WIN32 PE style DLL's but is pretty generic really. */ |
c906108c SS |
1145 | |
1146 | CORE_ADDR | |
fba45db2 | 1147 | skip_trampoline_code (CORE_ADDR pc, char *name) |
c906108c | 1148 | { |
fc338970 | 1149 | if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */ |
c906108c | 1150 | { |
c5aa993b | 1151 | unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4); |
c906108c | 1152 | struct minimal_symbol *indsym = |
fc338970 | 1153 | indirect ? lookup_minimal_symbol_by_pc (indirect) : 0; |
c5aa993b | 1154 | char *symname = indsym ? SYMBOL_NAME (indsym) : 0; |
c906108c | 1155 | |
c5aa993b | 1156 | if (symname) |
c906108c | 1157 | { |
c5aa993b JM |
1158 | if (strncmp (symname, "__imp_", 6) == 0 |
1159 | || strncmp (symname, "_imp_", 5) == 0) | |
c906108c SS |
1160 | return name ? 1 : read_memory_unsigned_integer (indirect, 4); |
1161 | } | |
1162 | } | |
fc338970 | 1163 | return 0; /* Not a trampoline. */ |
c906108c | 1164 | } |
fc338970 MK |
1165 | \f |
1166 | ||
1167 | /* We have two flavours of disassembly. The machinery on this page | |
1168 | deals with switching between those. */ | |
c906108c SS |
1169 | |
1170 | static int | |
fba45db2 | 1171 | gdb_print_insn_i386 (bfd_vma memaddr, disassemble_info *info) |
c906108c SS |
1172 | { |
1173 | if (disassembly_flavor == att_flavor) | |
1174 | return print_insn_i386_att (memaddr, info); | |
1175 | else if (disassembly_flavor == intel_flavor) | |
1176 | return print_insn_i386_intel (memaddr, info); | |
fc338970 MK |
1177 | /* Never reached -- disassembly_flavour is always either att_flavor |
1178 | or intel_flavor. */ | |
e1e9e218 | 1179 | internal_error (__FILE__, __LINE__, "failed internal consistency check"); |
7a292a7a SS |
1180 | } |
1181 | ||
fc338970 MK |
1182 | /* If the disassembly mode is intel, we have to also switch the bfd |
1183 | mach_type. This function is run in the set disassembly_flavor | |
7a292a7a SS |
1184 | command, and does that. */ |
1185 | ||
1186 | static void | |
fba45db2 KB |
1187 | set_disassembly_flavor_sfunc (char *args, int from_tty, |
1188 | struct cmd_list_element *c) | |
7a292a7a SS |
1189 | { |
1190 | set_disassembly_flavor (); | |
7a292a7a SS |
1191 | } |
1192 | ||
1193 | static void | |
fba45db2 | 1194 | set_disassembly_flavor (void) |
7a292a7a SS |
1195 | { |
1196 | if (disassembly_flavor == att_flavor) | |
1197 | set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386); | |
1198 | else if (disassembly_flavor == intel_flavor) | |
fc338970 MK |
1199 | set_architecture_from_arch_mach (bfd_arch_i386, |
1200 | bfd_mach_i386_i386_intel_syntax); | |
c906108c | 1201 | } |
fc338970 | 1202 | \f |
2acceee2 | 1203 | |
28e9e0f0 MK |
1204 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1205 | void _initialize_i386_tdep (void); | |
1206 | ||
c906108c | 1207 | void |
fba45db2 | 1208 | _initialize_i386_tdep (void) |
c906108c | 1209 | { |
917317f4 JM |
1210 | /* Initialize the table saying where each register starts in the |
1211 | register file. */ | |
1212 | { | |
1213 | int i, offset; | |
1214 | ||
1215 | offset = 0; | |
1216 | for (i = 0; i < MAX_NUM_REGS; i++) | |
1217 | { | |
1218 | i386_register_byte[i] = offset; | |
1219 | offset += i386_register_raw_size[i]; | |
1220 | } | |
1221 | } | |
1222 | ||
1223 | /* Initialize the table of virtual register sizes. */ | |
1224 | { | |
1225 | int i; | |
1226 | ||
1227 | for (i = 0; i < MAX_NUM_REGS; i++) | |
1228 | i386_register_virtual_size[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i)); | |
1229 | } | |
c5aa993b | 1230 | |
c906108c SS |
1231 | tm_print_insn = gdb_print_insn_i386; |
1232 | tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach; | |
1233 | ||
fc338970 | 1234 | /* Add the variable that controls the disassembly flavor. */ |
917317f4 JM |
1235 | { |
1236 | struct cmd_list_element *new_cmd; | |
7a292a7a | 1237 | |
917317f4 JM |
1238 | new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class, |
1239 | valid_flavors, | |
1ed2a135 | 1240 | &disassembly_flavor, |
fc338970 MK |
1241 | "\ |
1242 | Set the disassembly flavor, the valid values are \"att\" and \"intel\", \ | |
c906108c | 1243 | and the default value is \"att\".", |
917317f4 JM |
1244 | &setlist); |
1245 | new_cmd->function.sfunc = set_disassembly_flavor_sfunc; | |
1246 | add_show_from_set (new_cmd, &showlist); | |
1247 | } | |
c5aa993b | 1248 | |
7a292a7a | 1249 | /* Finally, initialize the disassembly flavor to the default given |
fc338970 | 1250 | in the disassembly_flavor variable. */ |
7a292a7a | 1251 | set_disassembly_flavor (); |
c906108c | 1252 | } |