Commit | Line | Data |
---|---|---|
c906108c | 1 | /* Intel 386 target-dependent stuff. |
349c5d5f AC |
2 | |
3 | Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, | |
4be87837 | 4 | 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
c906108c | 5 | |
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | #include "defs.h" | |
acd5c798 MK |
24 | #include "arch-utils.h" |
25 | #include "command.h" | |
26 | #include "dummy-frame.h" | |
6405b0a6 | 27 | #include "dwarf2-frame.h" |
acd5c798 MK |
28 | #include "doublest.h" |
29 | #include "floatformat.h" | |
c906108c | 30 | #include "frame.h" |
acd5c798 MK |
31 | #include "frame-base.h" |
32 | #include "frame-unwind.h" | |
c906108c | 33 | #include "inferior.h" |
acd5c798 | 34 | #include "gdbcmd.h" |
c906108c | 35 | #include "gdbcore.h" |
dfe01d39 | 36 | #include "objfiles.h" |
acd5c798 MK |
37 | #include "osabi.h" |
38 | #include "regcache.h" | |
39 | #include "reggroups.h" | |
473f17b0 | 40 | #include "regset.h" |
c0d1d883 | 41 | #include "symfile.h" |
c906108c | 42 | #include "symtab.h" |
acd5c798 | 43 | #include "target.h" |
fd0407d6 | 44 | #include "value.h" |
a89aa300 | 45 | #include "dis-asm.h" |
acd5c798 | 46 | |
3d261580 | 47 | #include "gdb_assert.h" |
acd5c798 | 48 | #include "gdb_string.h" |
3d261580 | 49 | |
d2a7c97a | 50 | #include "i386-tdep.h" |
61113f8b | 51 | #include "i387-tdep.h" |
d2a7c97a | 52 | |
fc633446 MK |
53 | /* Names of the registers. The first 10 registers match the register |
54 | numbering scheme used by GCC for stabs and DWARF. */ | |
c40e1eab | 55 | |
fc633446 MK |
56 | static char *i386_register_names[] = |
57 | { | |
58 | "eax", "ecx", "edx", "ebx", | |
59 | "esp", "ebp", "esi", "edi", | |
60 | "eip", "eflags", "cs", "ss", | |
61 | "ds", "es", "fs", "gs", | |
62 | "st0", "st1", "st2", "st3", | |
63 | "st4", "st5", "st6", "st7", | |
64 | "fctrl", "fstat", "ftag", "fiseg", | |
65 | "fioff", "foseg", "fooff", "fop", | |
66 | "xmm0", "xmm1", "xmm2", "xmm3", | |
67 | "xmm4", "xmm5", "xmm6", "xmm7", | |
68 | "mxcsr" | |
69 | }; | |
70 | ||
1cb97e17 | 71 | static const int i386_num_register_names = ARRAY_SIZE (i386_register_names); |
c40e1eab | 72 | |
28fc6740 AC |
73 | /* MMX registers. */ |
74 | ||
75 | static char *i386_mmx_names[] = | |
76 | { | |
77 | "mm0", "mm1", "mm2", "mm3", | |
78 | "mm4", "mm5", "mm6", "mm7" | |
79 | }; | |
c40e1eab | 80 | |
1cb97e17 | 81 | static const int i386_num_mmx_regs = ARRAY_SIZE (i386_mmx_names); |
c40e1eab | 82 | |
28fc6740 | 83 | static int |
5716833c | 84 | i386_mmx_regnum_p (struct gdbarch *gdbarch, int regnum) |
28fc6740 | 85 | { |
5716833c MK |
86 | int mm0_regnum = gdbarch_tdep (gdbarch)->mm0_regnum; |
87 | ||
88 | if (mm0_regnum < 0) | |
89 | return 0; | |
90 | ||
91 | return (regnum >= mm0_regnum && regnum < mm0_regnum + i386_num_mmx_regs); | |
28fc6740 AC |
92 | } |
93 | ||
5716833c | 94 | /* SSE register? */ |
23a34459 | 95 | |
5716833c MK |
96 | static int |
97 | i386_sse_regnum_p (struct gdbarch *gdbarch, int regnum) | |
23a34459 | 98 | { |
5716833c MK |
99 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
100 | ||
101 | #define I387_ST0_REGNUM tdep->st0_regnum | |
102 | #define I387_NUM_XMM_REGS tdep->num_xmm_regs | |
103 | ||
104 | if (I387_NUM_XMM_REGS == 0) | |
105 | return 0; | |
106 | ||
107 | return (I387_XMM0_REGNUM <= regnum && regnum < I387_MXCSR_REGNUM); | |
108 | ||
109 | #undef I387_ST0_REGNUM | |
110 | #undef I387_NUM_XMM_REGS | |
23a34459 AC |
111 | } |
112 | ||
5716833c MK |
113 | static int |
114 | i386_mxcsr_regnum_p (struct gdbarch *gdbarch, int regnum) | |
23a34459 | 115 | { |
5716833c MK |
116 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
117 | ||
118 | #define I387_ST0_REGNUM tdep->st0_regnum | |
119 | #define I387_NUM_XMM_REGS tdep->num_xmm_regs | |
120 | ||
121 | if (I387_NUM_XMM_REGS == 0) | |
122 | return 0; | |
123 | ||
124 | return (regnum == I387_MXCSR_REGNUM); | |
125 | ||
126 | #undef I387_ST0_REGNUM | |
127 | #undef I387_NUM_XMM_REGS | |
23a34459 AC |
128 | } |
129 | ||
5716833c MK |
130 | #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum) |
131 | #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum) | |
132 | #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs) | |
133 | ||
134 | /* FP register? */ | |
23a34459 AC |
135 | |
136 | int | |
5716833c | 137 | i386_fp_regnum_p (int regnum) |
23a34459 | 138 | { |
5716833c MK |
139 | if (I387_ST0_REGNUM < 0) |
140 | return 0; | |
141 | ||
142 | return (I387_ST0_REGNUM <= regnum && regnum < I387_FCTRL_REGNUM); | |
23a34459 AC |
143 | } |
144 | ||
145 | int | |
5716833c | 146 | i386_fpc_regnum_p (int regnum) |
23a34459 | 147 | { |
5716833c MK |
148 | if (I387_ST0_REGNUM < 0) |
149 | return 0; | |
150 | ||
151 | return (I387_FCTRL_REGNUM <= regnum && regnum < I387_XMM0_REGNUM); | |
23a34459 AC |
152 | } |
153 | ||
fc633446 MK |
154 | /* Return the name of register REG. */ |
155 | ||
fa88f677 | 156 | const char * |
fc633446 MK |
157 | i386_register_name (int reg) |
158 | { | |
5716833c MK |
159 | if (i386_mmx_regnum_p (current_gdbarch, reg)) |
160 | return i386_mmx_names[reg - I387_MM0_REGNUM]; | |
fc633446 | 161 | |
70913449 MK |
162 | if (reg >= 0 && reg < i386_num_register_names) |
163 | return i386_register_names[reg]; | |
164 | ||
c40e1eab | 165 | return NULL; |
fc633446 MK |
166 | } |
167 | ||
85540d8c MK |
168 | /* Convert stabs register number REG to the appropriate register |
169 | number used by GDB. */ | |
170 | ||
8201327c | 171 | static int |
85540d8c MK |
172 | i386_stab_reg_to_regnum (int reg) |
173 | { | |
174 | /* This implements what GCC calls the "default" register map. */ | |
175 | if (reg >= 0 && reg <= 7) | |
176 | { | |
acd5c798 | 177 | /* General-purpose registers. */ |
85540d8c MK |
178 | return reg; |
179 | } | |
180 | else if (reg >= 12 && reg <= 19) | |
181 | { | |
182 | /* Floating-point registers. */ | |
5716833c | 183 | return reg - 12 + I387_ST0_REGNUM; |
85540d8c MK |
184 | } |
185 | else if (reg >= 21 && reg <= 28) | |
186 | { | |
187 | /* SSE registers. */ | |
5716833c | 188 | return reg - 21 + I387_XMM0_REGNUM; |
85540d8c MK |
189 | } |
190 | else if (reg >= 29 && reg <= 36) | |
191 | { | |
192 | /* MMX registers. */ | |
5716833c | 193 | return reg - 29 + I387_MM0_REGNUM; |
85540d8c MK |
194 | } |
195 | ||
196 | /* This will hopefully provoke a warning. */ | |
197 | return NUM_REGS + NUM_PSEUDO_REGS; | |
198 | } | |
199 | ||
8201327c | 200 | /* Convert DWARF register number REG to the appropriate register |
85540d8c MK |
201 | number used by GDB. */ |
202 | ||
8201327c | 203 | static int |
85540d8c MK |
204 | i386_dwarf_reg_to_regnum (int reg) |
205 | { | |
206 | /* The DWARF register numbering includes %eip and %eflags, and | |
207 | numbers the floating point registers differently. */ | |
208 | if (reg >= 0 && reg <= 9) | |
209 | { | |
acd5c798 | 210 | /* General-purpose registers. */ |
85540d8c MK |
211 | return reg; |
212 | } | |
213 | else if (reg >= 11 && reg <= 18) | |
214 | { | |
215 | /* Floating-point registers. */ | |
5716833c | 216 | return reg - 11 + I387_ST0_REGNUM; |
85540d8c MK |
217 | } |
218 | else if (reg >= 21) | |
219 | { | |
220 | /* The SSE and MMX registers have identical numbers as in stabs. */ | |
221 | return i386_stab_reg_to_regnum (reg); | |
222 | } | |
223 | ||
224 | /* This will hopefully provoke a warning. */ | |
225 | return NUM_REGS + NUM_PSEUDO_REGS; | |
226 | } | |
5716833c MK |
227 | |
228 | #undef I387_ST0_REGNUM | |
229 | #undef I387_MM0_REGNUM | |
230 | #undef I387_NUM_XMM_REGS | |
fc338970 | 231 | \f |
917317f4 | 232 | |
fc338970 MK |
233 | /* This is the variable that is set with "set disassembly-flavor", and |
234 | its legitimate values. */ | |
53904c9e AC |
235 | static const char att_flavor[] = "att"; |
236 | static const char intel_flavor[] = "intel"; | |
237 | static const char *valid_flavors[] = | |
c5aa993b | 238 | { |
c906108c SS |
239 | att_flavor, |
240 | intel_flavor, | |
241 | NULL | |
242 | }; | |
53904c9e | 243 | static const char *disassembly_flavor = att_flavor; |
acd5c798 | 244 | \f |
c906108c | 245 | |
acd5c798 MK |
246 | /* Use the program counter to determine the contents and size of a |
247 | breakpoint instruction. Return a pointer to a string of bytes that | |
248 | encode a breakpoint instruction, store the length of the string in | |
249 | *LEN and optionally adjust *PC to point to the correct memory | |
250 | location for inserting the breakpoint. | |
c906108c | 251 | |
acd5c798 MK |
252 | On the i386 we have a single breakpoint that fits in a single byte |
253 | and can be inserted anywhere. | |
c906108c | 254 | |
acd5c798 MK |
255 | This function is 64-bit safe. */ |
256 | ||
257 | static const unsigned char * | |
258 | i386_breakpoint_from_pc (CORE_ADDR *pc, int *len) | |
c906108c | 259 | { |
acd5c798 MK |
260 | static unsigned char break_insn[] = { 0xcc }; /* int 3 */ |
261 | ||
262 | *len = sizeof (break_insn); | |
263 | return break_insn; | |
c906108c | 264 | } |
fc338970 | 265 | \f |
acd5c798 MK |
266 | #ifdef I386_REGNO_TO_SYMMETRY |
267 | #error "The Sequent Symmetry is no longer supported." | |
268 | #endif | |
c906108c | 269 | |
acd5c798 MK |
270 | /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi |
271 | and %esp "belong" to the calling function. Therefore these | |
272 | registers should be saved if they're going to be modified. */ | |
c906108c | 273 | |
acd5c798 MK |
274 | /* The maximum number of saved registers. This should include all |
275 | registers mentioned above, and %eip. */ | |
a3386186 | 276 | #define I386_NUM_SAVED_REGS I386_NUM_GREGS |
acd5c798 MK |
277 | |
278 | struct i386_frame_cache | |
c906108c | 279 | { |
acd5c798 MK |
280 | /* Base address. */ |
281 | CORE_ADDR base; | |
282 | CORE_ADDR sp_offset; | |
283 | CORE_ADDR pc; | |
284 | ||
fd13a04a AC |
285 | /* Saved registers. */ |
286 | CORE_ADDR saved_regs[I386_NUM_SAVED_REGS]; | |
acd5c798 MK |
287 | CORE_ADDR saved_sp; |
288 | int pc_in_eax; | |
289 | ||
290 | /* Stack space reserved for local variables. */ | |
291 | long locals; | |
292 | }; | |
293 | ||
294 | /* Allocate and initialize a frame cache. */ | |
295 | ||
296 | static struct i386_frame_cache * | |
fd13a04a | 297 | i386_alloc_frame_cache (void) |
acd5c798 MK |
298 | { |
299 | struct i386_frame_cache *cache; | |
300 | int i; | |
301 | ||
302 | cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache); | |
303 | ||
304 | /* Base address. */ | |
305 | cache->base = 0; | |
306 | cache->sp_offset = -4; | |
307 | cache->pc = 0; | |
308 | ||
fd13a04a AC |
309 | /* Saved registers. We initialize these to -1 since zero is a valid |
310 | offset (that's where %ebp is supposed to be stored). */ | |
311 | for (i = 0; i < I386_NUM_SAVED_REGS; i++) | |
312 | cache->saved_regs[i] = -1; | |
acd5c798 MK |
313 | cache->saved_sp = 0; |
314 | cache->pc_in_eax = 0; | |
315 | ||
316 | /* Frameless until proven otherwise. */ | |
317 | cache->locals = -1; | |
318 | ||
319 | return cache; | |
320 | } | |
c906108c | 321 | |
acd5c798 MK |
322 | /* If the instruction at PC is a jump, return the address of its |
323 | target. Otherwise, return PC. */ | |
c906108c | 324 | |
acd5c798 MK |
325 | static CORE_ADDR |
326 | i386_follow_jump (CORE_ADDR pc) | |
327 | { | |
328 | unsigned char op; | |
329 | long delta = 0; | |
330 | int data16 = 0; | |
c906108c | 331 | |
acd5c798 MK |
332 | op = read_memory_unsigned_integer (pc, 1); |
333 | if (op == 0x66) | |
c906108c | 334 | { |
c906108c | 335 | data16 = 1; |
acd5c798 | 336 | op = read_memory_unsigned_integer (pc + 1, 1); |
c906108c SS |
337 | } |
338 | ||
acd5c798 | 339 | switch (op) |
c906108c SS |
340 | { |
341 | case 0xe9: | |
fc338970 | 342 | /* Relative jump: if data16 == 0, disp32, else disp16. */ |
c906108c SS |
343 | if (data16) |
344 | { | |
acd5c798 | 345 | delta = read_memory_integer (pc + 2, 2); |
c906108c | 346 | |
fc338970 MK |
347 | /* Include the size of the jmp instruction (including the |
348 | 0x66 prefix). */ | |
acd5c798 | 349 | delta += 4; |
c906108c SS |
350 | } |
351 | else | |
352 | { | |
acd5c798 | 353 | delta = read_memory_integer (pc + 1, 4); |
c906108c | 354 | |
acd5c798 MK |
355 | /* Include the size of the jmp instruction. */ |
356 | delta += 5; | |
c906108c SS |
357 | } |
358 | break; | |
359 | case 0xeb: | |
fc338970 | 360 | /* Relative jump, disp8 (ignore data16). */ |
acd5c798 | 361 | delta = read_memory_integer (pc + data16 + 1, 1); |
c906108c | 362 | |
acd5c798 | 363 | delta += data16 + 2; |
c906108c SS |
364 | break; |
365 | } | |
c906108c | 366 | |
acd5c798 MK |
367 | return pc + delta; |
368 | } | |
fc338970 | 369 | |
acd5c798 MK |
370 | /* Check whether PC points at a prologue for a function returning a |
371 | structure or union. If so, it updates CACHE and returns the | |
372 | address of the first instruction after the code sequence that | |
373 | removes the "hidden" argument from the stack or CURRENT_PC, | |
374 | whichever is smaller. Otherwise, return PC. */ | |
c906108c | 375 | |
acd5c798 MK |
376 | static CORE_ADDR |
377 | i386_analyze_struct_return (CORE_ADDR pc, CORE_ADDR current_pc, | |
378 | struct i386_frame_cache *cache) | |
c906108c | 379 | { |
acd5c798 MK |
380 | /* Functions that return a structure or union start with: |
381 | ||
382 | popl %eax 0x58 | |
383 | xchgl %eax, (%esp) 0x87 0x04 0x24 | |
384 | or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00 | |
385 | ||
386 | (the System V compiler puts out the second `xchg' instruction, | |
387 | and the assembler doesn't try to optimize it, so the 'sib' form | |
388 | gets generated). This sequence is used to get the address of the | |
389 | return buffer for a function that returns a structure. */ | |
390 | static unsigned char proto1[3] = { 0x87, 0x04, 0x24 }; | |
391 | static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 }; | |
392 | unsigned char buf[4]; | |
c906108c SS |
393 | unsigned char op; |
394 | ||
acd5c798 MK |
395 | if (current_pc <= pc) |
396 | return pc; | |
397 | ||
398 | op = read_memory_unsigned_integer (pc, 1); | |
c906108c | 399 | |
acd5c798 MK |
400 | if (op != 0x58) /* popl %eax */ |
401 | return pc; | |
c906108c | 402 | |
acd5c798 MK |
403 | read_memory (pc + 1, buf, 4); |
404 | if (memcmp (buf, proto1, 3) != 0 && memcmp (buf, proto2, 4) != 0) | |
405 | return pc; | |
c906108c | 406 | |
acd5c798 | 407 | if (current_pc == pc) |
c906108c | 408 | { |
acd5c798 MK |
409 | cache->sp_offset += 4; |
410 | return current_pc; | |
c906108c SS |
411 | } |
412 | ||
acd5c798 | 413 | if (current_pc == pc + 1) |
c906108c | 414 | { |
acd5c798 MK |
415 | cache->pc_in_eax = 1; |
416 | return current_pc; | |
417 | } | |
418 | ||
419 | if (buf[1] == proto1[1]) | |
420 | return pc + 4; | |
421 | else | |
422 | return pc + 5; | |
423 | } | |
424 | ||
425 | static CORE_ADDR | |
426 | i386_skip_probe (CORE_ADDR pc) | |
427 | { | |
428 | /* A function may start with | |
fc338970 | 429 | |
acd5c798 MK |
430 | pushl constant |
431 | call _probe | |
432 | addl $4, %esp | |
fc338970 | 433 | |
acd5c798 MK |
434 | followed by |
435 | ||
436 | pushl %ebp | |
fc338970 | 437 | |
acd5c798 MK |
438 | etc. */ |
439 | unsigned char buf[8]; | |
440 | unsigned char op; | |
fc338970 | 441 | |
acd5c798 MK |
442 | op = read_memory_unsigned_integer (pc, 1); |
443 | ||
444 | if (op == 0x68 || op == 0x6a) | |
445 | { | |
446 | int delta; | |
c906108c | 447 | |
acd5c798 MK |
448 | /* Skip past the `pushl' instruction; it has either a one-byte or a |
449 | four-byte operand, depending on the opcode. */ | |
c906108c | 450 | if (op == 0x68) |
acd5c798 | 451 | delta = 5; |
c906108c | 452 | else |
acd5c798 | 453 | delta = 2; |
c906108c | 454 | |
acd5c798 MK |
455 | /* Read the following 8 bytes, which should be `call _probe' (6 |
456 | bytes) followed by `addl $4,%esp' (2 bytes). */ | |
457 | read_memory (pc + delta, buf, sizeof (buf)); | |
c906108c | 458 | if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4) |
acd5c798 | 459 | pc += delta + sizeof (buf); |
c906108c SS |
460 | } |
461 | ||
acd5c798 MK |
462 | return pc; |
463 | } | |
464 | ||
465 | /* Check whether PC points at a code that sets up a new stack frame. | |
466 | If so, it updates CACHE and returns the address of the first | |
467 | instruction after the sequence that sets removes the "hidden" | |
468 | argument from the stack or CURRENT_PC, whichever is smaller. | |
469 | Otherwise, return PC. */ | |
470 | ||
471 | static CORE_ADDR | |
472 | i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR current_pc, | |
473 | struct i386_frame_cache *cache) | |
474 | { | |
475 | unsigned char op; | |
26604a34 | 476 | int skip = 0; |
acd5c798 MK |
477 | |
478 | if (current_pc <= pc) | |
479 | return current_pc; | |
480 | ||
481 | op = read_memory_unsigned_integer (pc, 1); | |
482 | ||
c906108c | 483 | if (op == 0x55) /* pushl %ebp */ |
c5aa993b | 484 | { |
acd5c798 MK |
485 | /* Take into account that we've executed the `pushl %ebp' that |
486 | starts this instruction sequence. */ | |
fd13a04a | 487 | cache->saved_regs[I386_EBP_REGNUM] = 0; |
acd5c798 MK |
488 | cache->sp_offset += 4; |
489 | ||
490 | /* If that's all, return now. */ | |
491 | if (current_pc <= pc + 1) | |
492 | return current_pc; | |
493 | ||
acd5c798 | 494 | op = read_memory_unsigned_integer (pc + 1, 1); |
26604a34 MK |
495 | |
496 | /* Check for some special instructions that might be migrated | |
497 | by GCC into the prologue. We check for | |
498 | ||
499 | xorl %ebx, %ebx | |
500 | xorl %ecx, %ecx | |
501 | xorl %edx, %edx | |
7270b6ed | 502 | xorl %eax, %eax |
26604a34 MK |
503 | |
504 | and the equivalent | |
505 | ||
506 | subl %ebx, %ebx | |
507 | subl %ecx, %ecx | |
508 | subl %edx, %edx | |
7270b6ed | 509 | subl %eax, %eax |
26604a34 | 510 | |
5daa5b4e MK |
511 | Because of the symmetry, there are actually two ways to |
512 | encode these instructions; with opcode bytes 0x29 and 0x2b | |
513 | for `subl' and opcode bytes 0x31 and 0x33 for `xorl'. | |
514 | ||
26604a34 MK |
515 | Make sure we only skip these instructions if we later see the |
516 | `movl %esp, %ebp' that actually sets up the frame. */ | |
5daa5b4e | 517 | while (op == 0x29 || op == 0x2b || op == 0x31 || op == 0x33) |
26604a34 MK |
518 | { |
519 | op = read_memory_unsigned_integer (pc + skip + 2, 1); | |
520 | switch (op) | |
521 | { | |
522 | case 0xdb: /* %ebx */ | |
523 | case 0xc9: /* %ecx */ | |
524 | case 0xd2: /* %edx */ | |
7270b6ed | 525 | case 0xc0: /* %eax */ |
26604a34 MK |
526 | skip += 2; |
527 | break; | |
528 | default: | |
529 | return pc + 1; | |
530 | } | |
531 | ||
532 | op = read_memory_unsigned_integer (pc + skip + 1, 1); | |
533 | } | |
534 | ||
535 | /* Check for `movl %esp, %ebp' -- can be written in two ways. */ | |
acd5c798 | 536 | switch (op) |
c906108c SS |
537 | { |
538 | case 0x8b: | |
26604a34 | 539 | if (read_memory_unsigned_integer (pc + skip + 2, 1) != 0xec) |
acd5c798 | 540 | return pc + 1; |
c906108c SS |
541 | break; |
542 | case 0x89: | |
26604a34 | 543 | if (read_memory_unsigned_integer (pc + skip + 2, 1) != 0xe5) |
acd5c798 | 544 | return pc + 1; |
c906108c SS |
545 | break; |
546 | default: | |
acd5c798 | 547 | return pc + 1; |
c906108c | 548 | } |
acd5c798 | 549 | |
26604a34 MK |
550 | /* OK, we actually have a frame. We just don't know how large |
551 | it is yet. Set its size to zero. We'll adjust it if | |
552 | necessary. We also now commit to skipping the special | |
553 | instructions mentioned before. */ | |
acd5c798 | 554 | cache->locals = 0; |
26604a34 | 555 | pc += skip; |
acd5c798 MK |
556 | |
557 | /* If that's all, return now. */ | |
558 | if (current_pc <= pc + 3) | |
559 | return current_pc; | |
560 | ||
fc338970 MK |
561 | /* Check for stack adjustment |
562 | ||
acd5c798 | 563 | subl $XXX, %esp |
fc338970 MK |
564 | |
565 | NOTE: You can't subtract a 16 bit immediate from a 32 bit | |
566 | reg, so we don't have to worry about a data16 prefix. */ | |
acd5c798 | 567 | op = read_memory_unsigned_integer (pc + 3, 1); |
c906108c SS |
568 | if (op == 0x83) |
569 | { | |
fc338970 | 570 | /* `subl' with 8 bit immediate. */ |
acd5c798 | 571 | if (read_memory_unsigned_integer (pc + 4, 1) != 0xec) |
fc338970 | 572 | /* Some instruction starting with 0x83 other than `subl'. */ |
acd5c798 MK |
573 | return pc + 3; |
574 | ||
575 | /* `subl' with signed byte immediate (though it wouldn't make | |
576 | sense to be negative). */ | |
577 | cache->locals = read_memory_integer (pc + 5, 1); | |
578 | return pc + 6; | |
c906108c SS |
579 | } |
580 | else if (op == 0x81) | |
581 | { | |
fc338970 | 582 | /* Maybe it is `subl' with a 32 bit immedediate. */ |
acd5c798 | 583 | if (read_memory_unsigned_integer (pc + 4, 1) != 0xec) |
fc338970 | 584 | /* Some instruction starting with 0x81 other than `subl'. */ |
acd5c798 MK |
585 | return pc + 3; |
586 | ||
fc338970 | 587 | /* It is `subl' with a 32 bit immediate. */ |
acd5c798 MK |
588 | cache->locals = read_memory_integer (pc + 5, 4); |
589 | return pc + 9; | |
c906108c SS |
590 | } |
591 | else | |
592 | { | |
acd5c798 MK |
593 | /* Some instruction other than `subl'. */ |
594 | return pc + 3; | |
c906108c SS |
595 | } |
596 | } | |
acd5c798 | 597 | else if (op == 0xc8) /* enter $XXX */ |
c906108c | 598 | { |
acd5c798 MK |
599 | cache->locals = read_memory_unsigned_integer (pc + 1, 2); |
600 | return pc + 4; | |
c906108c | 601 | } |
21d0e8a4 | 602 | |
acd5c798 | 603 | return pc; |
21d0e8a4 MK |
604 | } |
605 | ||
acd5c798 MK |
606 | /* Check whether PC points at code that saves registers on the stack. |
607 | If so, it updates CACHE and returns the address of the first | |
608 | instruction after the register saves or CURRENT_PC, whichever is | |
609 | smaller. Otherwise, return PC. */ | |
6bff26de MK |
610 | |
611 | static CORE_ADDR | |
acd5c798 MK |
612 | i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc, |
613 | struct i386_frame_cache *cache) | |
6bff26de | 614 | { |
99ab4326 MK |
615 | CORE_ADDR offset = 0; |
616 | unsigned char op; | |
617 | int i; | |
c0d1d883 | 618 | |
99ab4326 MK |
619 | if (cache->locals > 0) |
620 | offset -= cache->locals; | |
621 | for (i = 0; i < 8 && pc < current_pc; i++) | |
622 | { | |
623 | op = read_memory_unsigned_integer (pc, 1); | |
624 | if (op < 0x50 || op > 0x57) | |
625 | break; | |
0d17c81d | 626 | |
99ab4326 MK |
627 | offset -= 4; |
628 | cache->saved_regs[op - 0x50] = offset; | |
629 | cache->sp_offset += 4; | |
630 | pc++; | |
6bff26de MK |
631 | } |
632 | ||
acd5c798 | 633 | return pc; |
22797942 AC |
634 | } |
635 | ||
acd5c798 MK |
636 | /* Do a full analysis of the prologue at PC and update CACHE |
637 | accordingly. Bail out early if CURRENT_PC is reached. Return the | |
638 | address where the analysis stopped. | |
ed84f6c1 | 639 | |
fc338970 MK |
640 | We handle these cases: |
641 | ||
642 | The startup sequence can be at the start of the function, or the | |
643 | function can start with a branch to startup code at the end. | |
644 | ||
645 | %ebp can be set up with either the 'enter' instruction, or "pushl | |
646 | %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was | |
647 | once used in the System V compiler). | |
648 | ||
649 | Local space is allocated just below the saved %ebp by either the | |
650 | 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16 | |
651 | bit unsigned argument for space to allocate, and the 'addl' | |
652 | instruction could have either a signed byte, or 32 bit immediate. | |
653 | ||
654 | Next, the registers used by this function are pushed. With the | |
655 | System V compiler they will always be in the order: %edi, %esi, | |
656 | %ebx (and sometimes a harmless bug causes it to also save but not | |
657 | restore %eax); however, the code below is willing to see the pushes | |
658 | in any order, and will handle up to 8 of them. | |
659 | ||
660 | If the setup sequence is at the end of the function, then the next | |
661 | instruction will be a branch back to the start. */ | |
c906108c | 662 | |
acd5c798 MK |
663 | static CORE_ADDR |
664 | i386_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc, | |
665 | struct i386_frame_cache *cache) | |
c906108c | 666 | { |
acd5c798 MK |
667 | pc = i386_follow_jump (pc); |
668 | pc = i386_analyze_struct_return (pc, current_pc, cache); | |
669 | pc = i386_skip_probe (pc); | |
670 | pc = i386_analyze_frame_setup (pc, current_pc, cache); | |
671 | return i386_analyze_register_saves (pc, current_pc, cache); | |
c906108c SS |
672 | } |
673 | ||
fc338970 | 674 | /* Return PC of first real instruction. */ |
c906108c | 675 | |
3a1e71e3 | 676 | static CORE_ADDR |
acd5c798 | 677 | i386_skip_prologue (CORE_ADDR start_pc) |
c906108c | 678 | { |
c5aa993b | 679 | static unsigned char pic_pat[6] = |
acd5c798 MK |
680 | { |
681 | 0xe8, 0, 0, 0, 0, /* call 0x0 */ | |
682 | 0x5b, /* popl %ebx */ | |
c5aa993b | 683 | }; |
acd5c798 MK |
684 | struct i386_frame_cache cache; |
685 | CORE_ADDR pc; | |
686 | unsigned char op; | |
687 | int i; | |
c5aa993b | 688 | |
acd5c798 MK |
689 | cache.locals = -1; |
690 | pc = i386_analyze_prologue (start_pc, 0xffffffff, &cache); | |
691 | if (cache.locals < 0) | |
692 | return start_pc; | |
c5aa993b | 693 | |
acd5c798 | 694 | /* Found valid frame setup. */ |
c906108c | 695 | |
fc338970 MK |
696 | /* The native cc on SVR4 in -K PIC mode inserts the following code |
697 | to get the address of the global offset table (GOT) into register | |
acd5c798 MK |
698 | %ebx: |
699 | ||
fc338970 MK |
700 | call 0x0 |
701 | popl %ebx | |
702 | movl %ebx,x(%ebp) (optional) | |
703 | addl y,%ebx | |
704 | ||
c906108c SS |
705 | This code is with the rest of the prologue (at the end of the |
706 | function), so we have to skip it to get to the first real | |
707 | instruction at the start of the function. */ | |
c5aa993b | 708 | |
c906108c SS |
709 | for (i = 0; i < 6; i++) |
710 | { | |
acd5c798 | 711 | op = read_memory_unsigned_integer (pc + i, 1); |
c5aa993b | 712 | if (pic_pat[i] != op) |
c906108c SS |
713 | break; |
714 | } | |
715 | if (i == 6) | |
716 | { | |
acd5c798 MK |
717 | int delta = 6; |
718 | ||
719 | op = read_memory_unsigned_integer (pc + delta, 1); | |
c906108c | 720 | |
c5aa993b | 721 | if (op == 0x89) /* movl %ebx, x(%ebp) */ |
c906108c | 722 | { |
acd5c798 MK |
723 | op = read_memory_unsigned_integer (pc + delta + 1, 1); |
724 | ||
fc338970 | 725 | if (op == 0x5d) /* One byte offset from %ebp. */ |
acd5c798 | 726 | delta += 3; |
fc338970 | 727 | else if (op == 0x9d) /* Four byte offset from %ebp. */ |
acd5c798 | 728 | delta += 6; |
fc338970 | 729 | else /* Unexpected instruction. */ |
acd5c798 MK |
730 | delta = 0; |
731 | ||
732 | op = read_memory_unsigned_integer (pc + delta, 1); | |
c906108c | 733 | } |
acd5c798 | 734 | |
c5aa993b | 735 | /* addl y,%ebx */ |
acd5c798 MK |
736 | if (delta > 0 && op == 0x81 |
737 | && read_memory_unsigned_integer (pc + delta + 1, 1) == 0xc3); | |
c906108c | 738 | { |
acd5c798 | 739 | pc += delta + 6; |
c906108c SS |
740 | } |
741 | } | |
c5aa993b | 742 | |
acd5c798 | 743 | return i386_follow_jump (pc); |
c906108c SS |
744 | } |
745 | ||
acd5c798 | 746 | /* This function is 64-bit safe. */ |
93924b6b | 747 | |
acd5c798 MK |
748 | static CORE_ADDR |
749 | i386_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
93924b6b | 750 | { |
acd5c798 MK |
751 | char buf[8]; |
752 | ||
753 | frame_unwind_register (next_frame, PC_REGNUM, buf); | |
754 | return extract_typed_address (buf, builtin_type_void_func_ptr); | |
93924b6b | 755 | } |
acd5c798 | 756 | \f |
93924b6b | 757 | |
acd5c798 | 758 | /* Normal frames. */ |
c5aa993b | 759 | |
acd5c798 MK |
760 | static struct i386_frame_cache * |
761 | i386_frame_cache (struct frame_info *next_frame, void **this_cache) | |
a7769679 | 762 | { |
acd5c798 | 763 | struct i386_frame_cache *cache; |
c0d1d883 | 764 | char buf[4]; |
acd5c798 MK |
765 | int i; |
766 | ||
767 | if (*this_cache) | |
768 | return *this_cache; | |
769 | ||
fd13a04a | 770 | cache = i386_alloc_frame_cache (); |
acd5c798 MK |
771 | *this_cache = cache; |
772 | ||
773 | /* In principle, for normal frames, %ebp holds the frame pointer, | |
774 | which holds the base address for the current stack frame. | |
775 | However, for functions that don't need it, the frame pointer is | |
776 | optional. For these "frameless" functions the frame pointer is | |
777 | actually the frame pointer of the calling frame. Signal | |
778 | trampolines are just a special case of a "frameless" function. | |
779 | They (usually) share their frame pointer with the frame that was | |
780 | in progress when the signal occurred. */ | |
781 | ||
782 | frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); | |
783 | cache->base = extract_unsigned_integer (buf, 4); | |
784 | if (cache->base == 0) | |
785 | return cache; | |
786 | ||
787 | /* For normal frames, %eip is stored at 4(%ebp). */ | |
fd13a04a | 788 | cache->saved_regs[I386_EIP_REGNUM] = 4; |
acd5c798 MK |
789 | |
790 | cache->pc = frame_func_unwind (next_frame); | |
791 | if (cache->pc != 0) | |
792 | i386_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache); | |
793 | ||
794 | if (cache->locals < 0) | |
795 | { | |
796 | /* We didn't find a valid frame, which means that CACHE->base | |
797 | currently holds the frame pointer for our calling frame. If | |
798 | we're at the start of a function, or somewhere half-way its | |
799 | prologue, the function's frame probably hasn't been fully | |
800 | setup yet. Try to reconstruct the base address for the stack | |
801 | frame by looking at the stack pointer. For truly "frameless" | |
802 | functions this might work too. */ | |
803 | ||
804 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); | |
805 | cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset; | |
806 | } | |
807 | ||
808 | /* Now that we have the base address for the stack frame we can | |
809 | calculate the value of %esp in the calling frame. */ | |
810 | cache->saved_sp = cache->base + 8; | |
a7769679 | 811 | |
acd5c798 MK |
812 | /* Adjust all the saved registers such that they contain addresses |
813 | instead of offsets. */ | |
814 | for (i = 0; i < I386_NUM_SAVED_REGS; i++) | |
fd13a04a AC |
815 | if (cache->saved_regs[i] != -1) |
816 | cache->saved_regs[i] += cache->base; | |
acd5c798 MK |
817 | |
818 | return cache; | |
a7769679 MK |
819 | } |
820 | ||
3a1e71e3 | 821 | static void |
acd5c798 MK |
822 | i386_frame_this_id (struct frame_info *next_frame, void **this_cache, |
823 | struct frame_id *this_id) | |
c906108c | 824 | { |
acd5c798 MK |
825 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); |
826 | ||
827 | /* This marks the outermost frame. */ | |
828 | if (cache->base == 0) | |
829 | return; | |
830 | ||
3e210248 | 831 | /* See the end of i386_push_dummy_call. */ |
acd5c798 MK |
832 | (*this_id) = frame_id_build (cache->base + 8, cache->pc); |
833 | } | |
834 | ||
835 | static void | |
836 | i386_frame_prev_register (struct frame_info *next_frame, void **this_cache, | |
837 | int regnum, int *optimizedp, | |
838 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
839 | int *realnump, void *valuep) | |
840 | { | |
841 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); | |
842 | ||
843 | gdb_assert (regnum >= 0); | |
844 | ||
845 | /* The System V ABI says that: | |
846 | ||
847 | "The flags register contains the system flags, such as the | |
848 | direction flag and the carry flag. The direction flag must be | |
849 | set to the forward (that is, zero) direction before entry and | |
850 | upon exit from a function. Other user flags have no specified | |
851 | role in the standard calling sequence and are not preserved." | |
852 | ||
853 | To guarantee the "upon exit" part of that statement we fake a | |
854 | saved flags register that has its direction flag cleared. | |
855 | ||
856 | Note that GCC doesn't seem to rely on the fact that the direction | |
857 | flag is cleared after a function return; it always explicitly | |
858 | clears the flag before operations where it matters. | |
859 | ||
860 | FIXME: kettenis/20030316: I'm not quite sure whether this is the | |
861 | right thing to do. The way we fake the flags register here makes | |
862 | it impossible to change it. */ | |
863 | ||
864 | if (regnum == I386_EFLAGS_REGNUM) | |
865 | { | |
866 | *optimizedp = 0; | |
867 | *lvalp = not_lval; | |
868 | *addrp = 0; | |
869 | *realnump = -1; | |
870 | if (valuep) | |
871 | { | |
872 | ULONGEST val; | |
c5aa993b | 873 | |
acd5c798 | 874 | /* Clear the direction flag. */ |
f837910f MK |
875 | val = frame_unwind_register_unsigned (next_frame, |
876 | I386_EFLAGS_REGNUM); | |
acd5c798 MK |
877 | val &= ~(1 << 10); |
878 | store_unsigned_integer (valuep, 4, val); | |
879 | } | |
880 | ||
881 | return; | |
882 | } | |
1211c4e4 | 883 | |
acd5c798 | 884 | if (regnum == I386_EIP_REGNUM && cache->pc_in_eax) |
c906108c | 885 | { |
acd5c798 MK |
886 | frame_register_unwind (next_frame, I386_EAX_REGNUM, |
887 | optimizedp, lvalp, addrp, realnump, valuep); | |
888 | return; | |
889 | } | |
890 | ||
891 | if (regnum == I386_ESP_REGNUM && cache->saved_sp) | |
892 | { | |
893 | *optimizedp = 0; | |
894 | *lvalp = not_lval; | |
895 | *addrp = 0; | |
896 | *realnump = -1; | |
897 | if (valuep) | |
c906108c | 898 | { |
acd5c798 MK |
899 | /* Store the value. */ |
900 | store_unsigned_integer (valuep, 4, cache->saved_sp); | |
c906108c | 901 | } |
acd5c798 | 902 | return; |
c906108c | 903 | } |
acd5c798 | 904 | |
fd13a04a AC |
905 | if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1) |
906 | { | |
907 | *optimizedp = 0; | |
908 | *lvalp = lval_memory; | |
909 | *addrp = cache->saved_regs[regnum]; | |
910 | *realnump = -1; | |
911 | if (valuep) | |
912 | { | |
913 | /* Read the value in from memory. */ | |
914 | read_memory (*addrp, valuep, | |
915 | register_size (current_gdbarch, regnum)); | |
916 | } | |
917 | return; | |
918 | } | |
919 | ||
920 | frame_register_unwind (next_frame, regnum, | |
921 | optimizedp, lvalp, addrp, realnump, valuep); | |
acd5c798 MK |
922 | } |
923 | ||
924 | static const struct frame_unwind i386_frame_unwind = | |
925 | { | |
926 | NORMAL_FRAME, | |
927 | i386_frame_this_id, | |
928 | i386_frame_prev_register | |
929 | }; | |
930 | ||
931 | static const struct frame_unwind * | |
336d1bba | 932 | i386_frame_sniffer (struct frame_info *next_frame) |
acd5c798 MK |
933 | { |
934 | return &i386_frame_unwind; | |
935 | } | |
936 | \f | |
937 | ||
938 | /* Signal trampolines. */ | |
939 | ||
940 | static struct i386_frame_cache * | |
941 | i386_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache) | |
942 | { | |
943 | struct i386_frame_cache *cache; | |
944 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
945 | CORE_ADDR addr; | |
946 | char buf[4]; | |
947 | ||
948 | if (*this_cache) | |
949 | return *this_cache; | |
950 | ||
fd13a04a | 951 | cache = i386_alloc_frame_cache (); |
acd5c798 MK |
952 | |
953 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); | |
954 | cache->base = extract_unsigned_integer (buf, 4) - 4; | |
955 | ||
956 | addr = tdep->sigcontext_addr (next_frame); | |
a3386186 MK |
957 | if (tdep->sc_reg_offset) |
958 | { | |
959 | int i; | |
960 | ||
961 | gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS); | |
962 | ||
963 | for (i = 0; i < tdep->sc_num_regs; i++) | |
964 | if (tdep->sc_reg_offset[i] != -1) | |
fd13a04a | 965 | cache->saved_regs[i] = addr + tdep->sc_reg_offset[i]; |
a3386186 MK |
966 | } |
967 | else | |
968 | { | |
fd13a04a AC |
969 | cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset; |
970 | cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset; | |
a3386186 | 971 | } |
acd5c798 MK |
972 | |
973 | *this_cache = cache; | |
974 | return cache; | |
975 | } | |
976 | ||
977 | static void | |
978 | i386_sigtramp_frame_this_id (struct frame_info *next_frame, void **this_cache, | |
979 | struct frame_id *this_id) | |
980 | { | |
981 | struct i386_frame_cache *cache = | |
982 | i386_sigtramp_frame_cache (next_frame, this_cache); | |
983 | ||
3e210248 | 984 | /* See the end of i386_push_dummy_call. */ |
acd5c798 MK |
985 | (*this_id) = frame_id_build (cache->base + 8, frame_pc_unwind (next_frame)); |
986 | } | |
987 | ||
988 | static void | |
989 | i386_sigtramp_frame_prev_register (struct frame_info *next_frame, | |
990 | void **this_cache, | |
991 | int regnum, int *optimizedp, | |
992 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
993 | int *realnump, void *valuep) | |
994 | { | |
995 | /* Make sure we've initialized the cache. */ | |
996 | i386_sigtramp_frame_cache (next_frame, this_cache); | |
997 | ||
998 | i386_frame_prev_register (next_frame, this_cache, regnum, | |
999 | optimizedp, lvalp, addrp, realnump, valuep); | |
c906108c | 1000 | } |
c0d1d883 | 1001 | |
acd5c798 MK |
1002 | static const struct frame_unwind i386_sigtramp_frame_unwind = |
1003 | { | |
1004 | SIGTRAMP_FRAME, | |
1005 | i386_sigtramp_frame_this_id, | |
1006 | i386_sigtramp_frame_prev_register | |
1007 | }; | |
1008 | ||
1009 | static const struct frame_unwind * | |
336d1bba | 1010 | i386_sigtramp_frame_sniffer (struct frame_info *next_frame) |
acd5c798 | 1011 | { |
336d1bba | 1012 | CORE_ADDR pc = frame_pc_unwind (next_frame); |
acd5c798 MK |
1013 | char *name; |
1014 | ||
1c3545ae MK |
1015 | /* We shouldn't even bother to try if the OSABI didn't register |
1016 | a sigcontext_addr handler. */ | |
1017 | if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr) | |
1018 | return NULL; | |
1019 | ||
acd5c798 MK |
1020 | find_pc_partial_function (pc, &name, NULL, NULL); |
1021 | if (PC_IN_SIGTRAMP (pc, name)) | |
1022 | return &i386_sigtramp_frame_unwind; | |
1023 | ||
1024 | return NULL; | |
1025 | } | |
1026 | \f | |
1027 | ||
1028 | static CORE_ADDR | |
1029 | i386_frame_base_address (struct frame_info *next_frame, void **this_cache) | |
1030 | { | |
1031 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); | |
1032 | ||
1033 | return cache->base; | |
1034 | } | |
1035 | ||
1036 | static const struct frame_base i386_frame_base = | |
1037 | { | |
1038 | &i386_frame_unwind, | |
1039 | i386_frame_base_address, | |
1040 | i386_frame_base_address, | |
1041 | i386_frame_base_address | |
1042 | }; | |
1043 | ||
acd5c798 MK |
1044 | static struct frame_id |
1045 | i386_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
1046 | { | |
1047 | char buf[4]; | |
1048 | CORE_ADDR fp; | |
1049 | ||
1050 | frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); | |
1051 | fp = extract_unsigned_integer (buf, 4); | |
1052 | ||
3e210248 | 1053 | /* See the end of i386_push_dummy_call. */ |
acd5c798 | 1054 | return frame_id_build (fp + 8, frame_pc_unwind (next_frame)); |
c0d1d883 | 1055 | } |
fc338970 | 1056 | \f |
c906108c | 1057 | |
fc338970 MK |
1058 | /* Figure out where the longjmp will land. Slurp the args out of the |
1059 | stack. We expect the first arg to be a pointer to the jmp_buf | |
8201327c | 1060 | structure from which we extract the address that we will land at. |
28bcfd30 | 1061 | This address is copied into PC. This routine returns non-zero on |
acd5c798 MK |
1062 | success. |
1063 | ||
1064 | This function is 64-bit safe. */ | |
c906108c | 1065 | |
8201327c MK |
1066 | static int |
1067 | i386_get_longjmp_target (CORE_ADDR *pc) | |
c906108c | 1068 | { |
28bcfd30 | 1069 | char buf[8]; |
c906108c | 1070 | CORE_ADDR sp, jb_addr; |
8201327c | 1071 | int jb_pc_offset = gdbarch_tdep (current_gdbarch)->jb_pc_offset; |
f9d3c2a8 | 1072 | int len = TYPE_LENGTH (builtin_type_void_func_ptr); |
c906108c | 1073 | |
8201327c MK |
1074 | /* If JB_PC_OFFSET is -1, we have no way to find out where the |
1075 | longjmp will land. */ | |
1076 | if (jb_pc_offset == -1) | |
c906108c SS |
1077 | return 0; |
1078 | ||
f837910f MK |
1079 | /* Don't use I386_ESP_REGNUM here, since this function is also used |
1080 | for AMD64. */ | |
1081 | regcache_cooked_read (current_regcache, SP_REGNUM, buf); | |
1082 | sp = extract_typed_address (buf, builtin_type_void_data_ptr); | |
28bcfd30 | 1083 | if (target_read_memory (sp + len, buf, len)) |
c906108c SS |
1084 | return 0; |
1085 | ||
f837910f | 1086 | jb_addr = extract_typed_address (buf, builtin_type_void_data_ptr); |
28bcfd30 | 1087 | if (target_read_memory (jb_addr + jb_pc_offset, buf, len)) |
8201327c | 1088 | return 0; |
c906108c | 1089 | |
f9d3c2a8 | 1090 | *pc = extract_typed_address (buf, builtin_type_void_func_ptr); |
c906108c SS |
1091 | return 1; |
1092 | } | |
fc338970 | 1093 | \f |
c906108c | 1094 | |
3a1e71e3 | 1095 | static CORE_ADDR |
6a65450a AC |
1096 | i386_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, |
1097 | struct regcache *regcache, CORE_ADDR bp_addr, int nargs, | |
1098 | struct value **args, CORE_ADDR sp, int struct_return, | |
1099 | CORE_ADDR struct_addr) | |
22f8ba57 | 1100 | { |
acd5c798 MK |
1101 | char buf[4]; |
1102 | int i; | |
1103 | ||
1104 | /* Push arguments in reverse order. */ | |
1105 | for (i = nargs - 1; i >= 0; i--) | |
22f8ba57 | 1106 | { |
acd5c798 MK |
1107 | int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args[i])); |
1108 | ||
1109 | /* The System V ABI says that: | |
1110 | ||
1111 | "An argument's size is increased, if necessary, to make it a | |
1112 | multiple of [32-bit] words. This may require tail padding, | |
1113 | depending on the size of the argument." | |
1114 | ||
1115 | This makes sure the stack says word-aligned. */ | |
1116 | sp -= (len + 3) & ~3; | |
1117 | write_memory (sp, VALUE_CONTENTS_ALL (args[i]), len); | |
1118 | } | |
22f8ba57 | 1119 | |
acd5c798 MK |
1120 | /* Push value address. */ |
1121 | if (struct_return) | |
1122 | { | |
22f8ba57 | 1123 | sp -= 4; |
fbd9dcd3 | 1124 | store_unsigned_integer (buf, 4, struct_addr); |
22f8ba57 MK |
1125 | write_memory (sp, buf, 4); |
1126 | } | |
1127 | ||
acd5c798 MK |
1128 | /* Store return address. */ |
1129 | sp -= 4; | |
6a65450a | 1130 | store_unsigned_integer (buf, 4, bp_addr); |
acd5c798 MK |
1131 | write_memory (sp, buf, 4); |
1132 | ||
1133 | /* Finally, update the stack pointer... */ | |
1134 | store_unsigned_integer (buf, 4, sp); | |
1135 | regcache_cooked_write (regcache, I386_ESP_REGNUM, buf); | |
1136 | ||
1137 | /* ...and fake a frame pointer. */ | |
1138 | regcache_cooked_write (regcache, I386_EBP_REGNUM, buf); | |
1139 | ||
3e210248 AC |
1140 | /* MarkK wrote: This "+ 8" is all over the place: |
1141 | (i386_frame_this_id, i386_sigtramp_frame_this_id, | |
1142 | i386_unwind_dummy_id). It's there, since all frame unwinders for | |
1143 | a given target have to agree (within a certain margin) on the | |
1144 | defenition of the stack address of a frame. Otherwise | |
1145 | frame_id_inner() won't work correctly. Since DWARF2/GCC uses the | |
1146 | stack address *before* the function call as a frame's CFA. On | |
1147 | the i386, when %ebp is used as a frame pointer, the offset | |
1148 | between the contents %ebp and the CFA as defined by GCC. */ | |
1149 | return sp + 8; | |
22f8ba57 MK |
1150 | } |
1151 | ||
1a309862 MK |
1152 | /* These registers are used for returning integers (and on some |
1153 | targets also for returning `struct' and `union' values when their | |
ef9dff19 | 1154 | size and alignment match an integer type). */ |
acd5c798 MK |
1155 | #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */ |
1156 | #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */ | |
1a309862 | 1157 | |
c5e656c1 MK |
1158 | /* Read, for architecture GDBARCH, a function return value of TYPE |
1159 | from REGCACHE, and copy that into VALBUF. */ | |
1a309862 | 1160 | |
3a1e71e3 | 1161 | static void |
c5e656c1 MK |
1162 | i386_extract_return_value (struct gdbarch *gdbarch, struct type *type, |
1163 | struct regcache *regcache, void *valbuf) | |
c906108c | 1164 | { |
c5e656c1 | 1165 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
1a309862 | 1166 | int len = TYPE_LENGTH (type); |
00f8375e | 1167 | char buf[I386_MAX_REGISTER_SIZE]; |
1a309862 | 1168 | |
1e8d0a7b | 1169 | if (TYPE_CODE (type) == TYPE_CODE_FLT) |
c906108c | 1170 | { |
5716833c | 1171 | if (tdep->st0_regnum < 0) |
1a309862 MK |
1172 | { |
1173 | warning ("Cannot find floating-point return value."); | |
1174 | memset (valbuf, 0, len); | |
ef9dff19 | 1175 | return; |
1a309862 MK |
1176 | } |
1177 | ||
c6ba6f0d MK |
1178 | /* Floating-point return values can be found in %st(0). Convert |
1179 | its contents to the desired type. This is probably not | |
1180 | exactly how it would happen on the target itself, but it is | |
1181 | the best we can do. */ | |
acd5c798 | 1182 | regcache_raw_read (regcache, I386_ST0_REGNUM, buf); |
00f8375e | 1183 | convert_typed_floating (buf, builtin_type_i387_ext, valbuf, type); |
c906108c SS |
1184 | } |
1185 | else | |
c5aa993b | 1186 | { |
f837910f MK |
1187 | int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM); |
1188 | int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM); | |
d4f3574e SS |
1189 | |
1190 | if (len <= low_size) | |
00f8375e | 1191 | { |
0818c12a | 1192 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e MK |
1193 | memcpy (valbuf, buf, len); |
1194 | } | |
d4f3574e SS |
1195 | else if (len <= (low_size + high_size)) |
1196 | { | |
0818c12a | 1197 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e | 1198 | memcpy (valbuf, buf, low_size); |
0818c12a | 1199 | regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf); |
c8048956 | 1200 | memcpy ((char *) valbuf + low_size, buf, len - low_size); |
d4f3574e SS |
1201 | } |
1202 | else | |
8e65ff28 AC |
1203 | internal_error (__FILE__, __LINE__, |
1204 | "Cannot extract return value of %d bytes long.", len); | |
c906108c SS |
1205 | } |
1206 | } | |
1207 | ||
c5e656c1 MK |
1208 | /* Write, for architecture GDBARCH, a function return value of TYPE |
1209 | from VALBUF into REGCACHE. */ | |
ef9dff19 | 1210 | |
3a1e71e3 | 1211 | static void |
c5e656c1 MK |
1212 | i386_store_return_value (struct gdbarch *gdbarch, struct type *type, |
1213 | struct regcache *regcache, const void *valbuf) | |
ef9dff19 | 1214 | { |
c5e656c1 | 1215 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
ef9dff19 MK |
1216 | int len = TYPE_LENGTH (type); |
1217 | ||
5716833c MK |
1218 | /* Define I387_ST0_REGNUM such that we use the proper definitions |
1219 | for the architecture. */ | |
1220 | #define I387_ST0_REGNUM I386_ST0_REGNUM | |
1221 | ||
1e8d0a7b | 1222 | if (TYPE_CODE (type) == TYPE_CODE_FLT) |
ef9dff19 | 1223 | { |
3d7f4f49 | 1224 | ULONGEST fstat; |
5716833c | 1225 | char buf[I386_MAX_REGISTER_SIZE]; |
ccb945b8 | 1226 | |
5716833c | 1227 | if (tdep->st0_regnum < 0) |
ef9dff19 MK |
1228 | { |
1229 | warning ("Cannot set floating-point return value."); | |
1230 | return; | |
1231 | } | |
1232 | ||
635b0cc1 MK |
1233 | /* Returning floating-point values is a bit tricky. Apart from |
1234 | storing the return value in %st(0), we have to simulate the | |
1235 | state of the FPU at function return point. */ | |
1236 | ||
c6ba6f0d MK |
1237 | /* Convert the value found in VALBUF to the extended |
1238 | floating-point format used by the FPU. This is probably | |
1239 | not exactly how it would happen on the target itself, but | |
1240 | it is the best we can do. */ | |
1241 | convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext); | |
acd5c798 | 1242 | regcache_raw_write (regcache, I386_ST0_REGNUM, buf); |
ccb945b8 | 1243 | |
635b0cc1 MK |
1244 | /* Set the top of the floating-point register stack to 7. The |
1245 | actual value doesn't really matter, but 7 is what a normal | |
1246 | function return would end up with if the program started out | |
1247 | with a freshly initialized FPU. */ | |
5716833c | 1248 | regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat); |
ccb945b8 | 1249 | fstat |= (7 << 11); |
5716833c | 1250 | regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM, fstat); |
ccb945b8 | 1251 | |
635b0cc1 MK |
1252 | /* Mark %st(1) through %st(7) as empty. Since we set the top of |
1253 | the floating-point register stack to 7, the appropriate value | |
1254 | for the tag word is 0x3fff. */ | |
5716833c | 1255 | regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM, 0x3fff); |
ef9dff19 MK |
1256 | } |
1257 | else | |
1258 | { | |
f837910f MK |
1259 | int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM); |
1260 | int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM); | |
ef9dff19 MK |
1261 | |
1262 | if (len <= low_size) | |
3d7f4f49 | 1263 | regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf); |
ef9dff19 MK |
1264 | else if (len <= (low_size + high_size)) |
1265 | { | |
3d7f4f49 MK |
1266 | regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf); |
1267 | regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0, | |
1268 | len - low_size, (char *) valbuf + low_size); | |
ef9dff19 MK |
1269 | } |
1270 | else | |
8e65ff28 AC |
1271 | internal_error (__FILE__, __LINE__, |
1272 | "Cannot store return value of %d bytes long.", len); | |
ef9dff19 | 1273 | } |
5716833c MK |
1274 | |
1275 | #undef I387_ST0_REGNUM | |
ef9dff19 | 1276 | } |
f7af9647 | 1277 | |
751f1375 MK |
1278 | /* Extract from REGCACHE, which contains the (raw) register state, the |
1279 | address in which a function should return its structure value, as a | |
1280 | CORE_ADDR. */ | |
f7af9647 | 1281 | |
3a1e71e3 | 1282 | static CORE_ADDR |
00f8375e | 1283 | i386_extract_struct_value_address (struct regcache *regcache) |
f7af9647 | 1284 | { |
acd5c798 | 1285 | char buf[4]; |
751f1375 | 1286 | |
acd5c798 MK |
1287 | regcache_cooked_read (regcache, I386_EAX_REGNUM, buf); |
1288 | return extract_unsigned_integer (buf, 4); | |
f7af9647 | 1289 | } |
fc338970 | 1290 | \f |
ef9dff19 | 1291 | |
8201327c MK |
1292 | /* This is the variable that is set with "set struct-convention", and |
1293 | its legitimate values. */ | |
1294 | static const char default_struct_convention[] = "default"; | |
1295 | static const char pcc_struct_convention[] = "pcc"; | |
1296 | static const char reg_struct_convention[] = "reg"; | |
1297 | static const char *valid_conventions[] = | |
1298 | { | |
1299 | default_struct_convention, | |
1300 | pcc_struct_convention, | |
1301 | reg_struct_convention, | |
1302 | NULL | |
1303 | }; | |
1304 | static const char *struct_convention = default_struct_convention; | |
1305 | ||
c5e656c1 MK |
1306 | /* Return non-zero if TYPE, which is assumed to be a structure or |
1307 | union type, should be returned in registers for architecture | |
1308 | GDBARCH. */ | |
1309 | ||
8201327c | 1310 | static int |
c5e656c1 | 1311 | i386_reg_struct_return_p (struct gdbarch *gdbarch, struct type *type) |
8201327c | 1312 | { |
c5e656c1 MK |
1313 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
1314 | enum type_code code = TYPE_CODE (type); | |
1315 | int len = TYPE_LENGTH (type); | |
8201327c | 1316 | |
c5e656c1 MK |
1317 | gdb_assert (code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION); |
1318 | ||
1319 | if (struct_convention == pcc_struct_convention | |
1320 | || (struct_convention == default_struct_convention | |
1321 | && tdep->struct_return == pcc_struct_return)) | |
1322 | return 0; | |
1323 | ||
1324 | return (len == 1 || len == 2 || len == 4 || len == 8); | |
1325 | } | |
1326 | ||
1327 | /* Determine, for architecture GDBARCH, how a return value of TYPE | |
1328 | should be returned. If it is supposed to be returned in registers, | |
1329 | and READBUF is non-zero, read the appropriate value from REGCACHE, | |
1330 | and copy it into READBUF. If WRITEBUF is non-zero, write the value | |
1331 | from WRITEBUF into REGCACHE. */ | |
1332 | ||
1333 | static enum return_value_convention | |
1334 | i386_return_value (struct gdbarch *gdbarch, struct type *type, | |
1335 | struct regcache *regcache, void *readbuf, | |
1336 | const void *writebuf) | |
1337 | { | |
1338 | enum type_code code = TYPE_CODE (type); | |
1339 | ||
1340 | if ((code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION) | |
1341 | && !i386_reg_struct_return_p (gdbarch, type)) | |
1342 | return RETURN_VALUE_STRUCT_CONVENTION; | |
1343 | ||
1344 | /* This special case is for structures consisting of a single | |
1345 | `float' or `double' member. These structures are returned in | |
1346 | %st(0). For these structures, we call ourselves recursively, | |
1347 | changing TYPE into the type of the first member of the structure. | |
1348 | Since that should work for all structures that have only one | |
1349 | member, we don't bother to check the member's type here. */ | |
1350 | if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1) | |
1351 | { | |
1352 | type = check_typedef (TYPE_FIELD_TYPE (type, 0)); | |
1353 | return i386_return_value (gdbarch, type, regcache, readbuf, writebuf); | |
1354 | } | |
1355 | ||
1356 | if (readbuf) | |
1357 | i386_extract_return_value (gdbarch, type, regcache, readbuf); | |
1358 | if (writebuf) | |
1359 | i386_store_return_value (gdbarch, type, regcache, writebuf); | |
8201327c | 1360 | |
c5e656c1 | 1361 | return RETURN_VALUE_REGISTER_CONVENTION; |
8201327c MK |
1362 | } |
1363 | \f | |
1364 | ||
d7a0d72c MK |
1365 | /* Return the GDB type object for the "standard" data type of data in |
1366 | register REGNUM. Perhaps %esi and %edi should go here, but | |
1367 | potentially they could be used for things other than address. */ | |
1368 | ||
3a1e71e3 | 1369 | static struct type * |
4e259f09 | 1370 | i386_register_type (struct gdbarch *gdbarch, int regnum) |
d7a0d72c | 1371 | { |
acd5c798 MK |
1372 | if (regnum == I386_EIP_REGNUM |
1373 | || regnum == I386_EBP_REGNUM || regnum == I386_ESP_REGNUM) | |
d7a0d72c MK |
1374 | return lookup_pointer_type (builtin_type_void); |
1375 | ||
23a34459 | 1376 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1377 | return builtin_type_i387_ext; |
d7a0d72c | 1378 | |
5716833c | 1379 | if (i386_sse_regnum_p (gdbarch, regnum)) |
3139facc | 1380 | return builtin_type_vec128i; |
d7a0d72c | 1381 | |
5716833c | 1382 | if (i386_mmx_regnum_p (gdbarch, regnum)) |
28fc6740 AC |
1383 | return builtin_type_vec64i; |
1384 | ||
d7a0d72c MK |
1385 | return builtin_type_int; |
1386 | } | |
1387 | ||
28fc6740 | 1388 | /* Map a cooked register onto a raw register or memory. For the i386, |
acd5c798 | 1389 | the MMX registers need to be mapped onto floating point registers. */ |
28fc6740 AC |
1390 | |
1391 | static int | |
c86c27af | 1392 | i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum) |
28fc6740 | 1393 | { |
5716833c MK |
1394 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); |
1395 | int mmxreg, fpreg; | |
28fc6740 AC |
1396 | ULONGEST fstat; |
1397 | int tos; | |
c86c27af | 1398 | |
5716833c MK |
1399 | /* Define I387_ST0_REGNUM such that we use the proper definitions |
1400 | for REGCACHE's architecture. */ | |
1401 | #define I387_ST0_REGNUM tdep->st0_regnum | |
1402 | ||
1403 | mmxreg = regnum - tdep->mm0_regnum; | |
1404 | regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat); | |
28fc6740 | 1405 | tos = (fstat >> 11) & 0x7; |
5716833c MK |
1406 | fpreg = (mmxreg + tos) % 8; |
1407 | ||
1408 | return (I387_ST0_REGNUM + fpreg); | |
c86c27af | 1409 | |
5716833c | 1410 | #undef I387_ST0_REGNUM |
28fc6740 AC |
1411 | } |
1412 | ||
1413 | static void | |
1414 | i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, | |
1415 | int regnum, void *buf) | |
1416 | { | |
5716833c | 1417 | if (i386_mmx_regnum_p (gdbarch, regnum)) |
28fc6740 | 1418 | { |
d9d9c31f | 1419 | char mmx_buf[MAX_REGISTER_SIZE]; |
c86c27af MK |
1420 | int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); |
1421 | ||
28fc6740 | 1422 | /* Extract (always little endian). */ |
c86c27af | 1423 | regcache_raw_read (regcache, fpnum, mmx_buf); |
f837910f | 1424 | memcpy (buf, mmx_buf, register_size (gdbarch, regnum)); |
28fc6740 AC |
1425 | } |
1426 | else | |
1427 | regcache_raw_read (regcache, regnum, buf); | |
1428 | } | |
1429 | ||
1430 | static void | |
1431 | i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
1432 | int regnum, const void *buf) | |
1433 | { | |
5716833c | 1434 | if (i386_mmx_regnum_p (gdbarch, regnum)) |
28fc6740 | 1435 | { |
d9d9c31f | 1436 | char mmx_buf[MAX_REGISTER_SIZE]; |
c86c27af MK |
1437 | int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); |
1438 | ||
28fc6740 AC |
1439 | /* Read ... */ |
1440 | regcache_raw_read (regcache, fpnum, mmx_buf); | |
1441 | /* ... Modify ... (always little endian). */ | |
f837910f | 1442 | memcpy (mmx_buf, buf, register_size (gdbarch, regnum)); |
28fc6740 AC |
1443 | /* ... Write. */ |
1444 | regcache_raw_write (regcache, fpnum, mmx_buf); | |
1445 | } | |
1446 | else | |
1447 | regcache_raw_write (regcache, regnum, buf); | |
1448 | } | |
ff2e87ac AC |
1449 | \f |
1450 | ||
ff2e87ac AC |
1451 | /* Return the register number of the register allocated by GCC after |
1452 | REGNUM, or -1 if there is no such register. */ | |
1453 | ||
1454 | static int | |
1455 | i386_next_regnum (int regnum) | |
1456 | { | |
1457 | /* GCC allocates the registers in the order: | |
1458 | ||
1459 | %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ... | |
1460 | ||
1461 | Since storing a variable in %esp doesn't make any sense we return | |
1462 | -1 for %ebp and for %esp itself. */ | |
1463 | static int next_regnum[] = | |
1464 | { | |
1465 | I386_EDX_REGNUM, /* Slot for %eax. */ | |
1466 | I386_EBX_REGNUM, /* Slot for %ecx. */ | |
1467 | I386_ECX_REGNUM, /* Slot for %edx. */ | |
1468 | I386_ESI_REGNUM, /* Slot for %ebx. */ | |
1469 | -1, -1, /* Slots for %esp and %ebp. */ | |
1470 | I386_EDI_REGNUM, /* Slot for %esi. */ | |
1471 | I386_EBP_REGNUM /* Slot for %edi. */ | |
1472 | }; | |
1473 | ||
de5b9bb9 | 1474 | if (regnum >= 0 && regnum < sizeof (next_regnum) / sizeof (next_regnum[0])) |
ff2e87ac | 1475 | return next_regnum[regnum]; |
28fc6740 | 1476 | |
ff2e87ac AC |
1477 | return -1; |
1478 | } | |
1479 | ||
1480 | /* Return nonzero if a value of type TYPE stored in register REGNUM | |
1481 | needs any special handling. */ | |
d7a0d72c | 1482 | |
3a1e71e3 | 1483 | static int |
ff2e87ac | 1484 | i386_convert_register_p (int regnum, struct type *type) |
d7a0d72c | 1485 | { |
de5b9bb9 MK |
1486 | int len = TYPE_LENGTH (type); |
1487 | ||
ff2e87ac AC |
1488 | /* Values may be spread across multiple registers. Most debugging |
1489 | formats aren't expressive enough to specify the locations, so | |
1490 | some heuristics is involved. Right now we only handle types that | |
de5b9bb9 MK |
1491 | have a length that is a multiple of the word size, since GCC |
1492 | doesn't seem to put any other types into registers. */ | |
1493 | if (len > 4 && len % 4 == 0) | |
1494 | { | |
1495 | int last_regnum = regnum; | |
1496 | ||
1497 | while (len > 4) | |
1498 | { | |
1499 | last_regnum = i386_next_regnum (last_regnum); | |
1500 | len -= 4; | |
1501 | } | |
1502 | ||
1503 | if (last_regnum != -1) | |
1504 | return 1; | |
1505 | } | |
ff2e87ac | 1506 | |
23a34459 | 1507 | return i386_fp_regnum_p (regnum); |
d7a0d72c MK |
1508 | } |
1509 | ||
ff2e87ac AC |
1510 | /* Read a value of type TYPE from register REGNUM in frame FRAME, and |
1511 | return its contents in TO. */ | |
ac27f131 | 1512 | |
3a1e71e3 | 1513 | static void |
ff2e87ac AC |
1514 | i386_register_to_value (struct frame_info *frame, int regnum, |
1515 | struct type *type, void *to) | |
ac27f131 | 1516 | { |
de5b9bb9 MK |
1517 | int len = TYPE_LENGTH (type); |
1518 | char *buf = to; | |
1519 | ||
ff2e87ac AC |
1520 | /* FIXME: kettenis/20030609: What should we do if REGNUM isn't |
1521 | available in FRAME (i.e. if it wasn't saved)? */ | |
3d261580 | 1522 | |
ff2e87ac | 1523 | if (i386_fp_regnum_p (regnum)) |
8d7f6b4a | 1524 | { |
d532c08f MK |
1525 | i387_register_to_value (frame, regnum, type, to); |
1526 | return; | |
8d7f6b4a | 1527 | } |
ff2e87ac | 1528 | |
de5b9bb9 MK |
1529 | /* Read a value spread accross multiple registers. */ |
1530 | ||
1531 | gdb_assert (len > 4 && len % 4 == 0); | |
3d261580 | 1532 | |
de5b9bb9 MK |
1533 | while (len > 0) |
1534 | { | |
1535 | gdb_assert (regnum != -1); | |
1536 | gdb_assert (register_size (current_gdbarch, regnum) == 4); | |
d532c08f | 1537 | |
f837910f | 1538 | get_frame_register (frame, regnum, buf); |
de5b9bb9 MK |
1539 | regnum = i386_next_regnum (regnum); |
1540 | len -= 4; | |
1541 | buf += 4; | |
1542 | } | |
ac27f131 MK |
1543 | } |
1544 | ||
ff2e87ac AC |
1545 | /* Write the contents FROM of a value of type TYPE into register |
1546 | REGNUM in frame FRAME. */ | |
ac27f131 | 1547 | |
3a1e71e3 | 1548 | static void |
ff2e87ac AC |
1549 | i386_value_to_register (struct frame_info *frame, int regnum, |
1550 | struct type *type, const void *from) | |
ac27f131 | 1551 | { |
de5b9bb9 MK |
1552 | int len = TYPE_LENGTH (type); |
1553 | const char *buf = from; | |
1554 | ||
ff2e87ac | 1555 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1556 | { |
d532c08f MK |
1557 | i387_value_to_register (frame, regnum, type, from); |
1558 | return; | |
1559 | } | |
3d261580 | 1560 | |
de5b9bb9 MK |
1561 | /* Write a value spread accross multiple registers. */ |
1562 | ||
1563 | gdb_assert (len > 4 && len % 4 == 0); | |
ff2e87ac | 1564 | |
de5b9bb9 MK |
1565 | while (len > 0) |
1566 | { | |
1567 | gdb_assert (regnum != -1); | |
1568 | gdb_assert (register_size (current_gdbarch, regnum) == 4); | |
d532c08f | 1569 | |
de5b9bb9 MK |
1570 | put_frame_register (frame, regnum, buf); |
1571 | regnum = i386_next_regnum (regnum); | |
1572 | len -= 4; | |
1573 | buf += 4; | |
1574 | } | |
ac27f131 | 1575 | } |
ff2e87ac | 1576 | \f |
473f17b0 MK |
1577 | /* Supply register REGNUM from the general-purpose register set REGSET |
1578 | to register cache REGCACHE. If REGNUM is -1, do this for all | |
1579 | registers in REGSET. */ | |
ff2e87ac | 1580 | |
20187ed5 | 1581 | void |
473f17b0 MK |
1582 | i386_supply_gregset (const struct regset *regset, struct regcache *regcache, |
1583 | int regnum, const void *gregs, size_t len) | |
1584 | { | |
1585 | const struct gdbarch_tdep *tdep = regset->descr; | |
1586 | const char *regs = gregs; | |
1587 | int i; | |
1588 | ||
1589 | gdb_assert (len == tdep->sizeof_gregset); | |
1590 | ||
1591 | for (i = 0; i < tdep->gregset_num_regs; i++) | |
1592 | { | |
1593 | if ((regnum == i || regnum == -1) | |
1594 | && tdep->gregset_reg_offset[i] != -1) | |
1595 | regcache_raw_supply (regcache, i, regs + tdep->gregset_reg_offset[i]); | |
1596 | } | |
1597 | } | |
1598 | ||
1599 | /* Supply register REGNUM from the floating-point register set REGSET | |
1600 | to register cache REGCACHE. If REGNUM is -1, do this for all | |
1601 | registers in REGSET. */ | |
1602 | ||
1603 | static void | |
1604 | i386_supply_fpregset (const struct regset *regset, struct regcache *regcache, | |
1605 | int regnum, const void *fpregs, size_t len) | |
1606 | { | |
1607 | const struct gdbarch_tdep *tdep = regset->descr; | |
1608 | ||
66a72d25 MK |
1609 | if (len == I387_SIZEOF_FXSAVE) |
1610 | { | |
1611 | i387_supply_fxsave (regcache, regnum, fpregs); | |
1612 | return; | |
1613 | } | |
1614 | ||
473f17b0 MK |
1615 | gdb_assert (len == tdep->sizeof_fpregset); |
1616 | i387_supply_fsave (regcache, regnum, fpregs); | |
1617 | } | |
8446b36a MK |
1618 | |
1619 | /* Return the appropriate register set for the core section identified | |
1620 | by SECT_NAME and SECT_SIZE. */ | |
1621 | ||
1622 | const struct regset * | |
1623 | i386_regset_from_core_section (struct gdbarch *gdbarch, | |
1624 | const char *sect_name, size_t sect_size) | |
1625 | { | |
1626 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
1627 | ||
1628 | if (strcmp (sect_name, ".reg") == 0 && sect_size == tdep->sizeof_gregset) | |
1629 | { | |
1630 | if (tdep->gregset == NULL) | |
1631 | { | |
1632 | tdep->gregset = XMALLOC (struct regset); | |
1633 | tdep->gregset->descr = tdep; | |
1634 | tdep->gregset->supply_regset = i386_supply_gregset; | |
1635 | } | |
1636 | return tdep->gregset; | |
1637 | } | |
1638 | ||
66a72d25 MK |
1639 | if ((strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset) |
1640 | || (strcmp (sect_name, ".reg-xfp") == 0 | |
1641 | && sect_size == I387_SIZEOF_FXSAVE)) | |
8446b36a MK |
1642 | { |
1643 | if (tdep->fpregset == NULL) | |
1644 | { | |
1645 | tdep->fpregset = XMALLOC (struct regset); | |
1646 | tdep->fpregset->descr = tdep; | |
1647 | tdep->fpregset->supply_regset = i386_supply_fpregset; | |
1648 | } | |
1649 | return tdep->fpregset; | |
1650 | } | |
1651 | ||
1652 | return NULL; | |
1653 | } | |
473f17b0 | 1654 | \f |
fc338970 | 1655 | |
c906108c | 1656 | #ifdef STATIC_TRANSFORM_NAME |
fc338970 MK |
1657 | /* SunPRO encodes the static variables. This is not related to C++ |
1658 | mangling, it is done for C too. */ | |
c906108c SS |
1659 | |
1660 | char * | |
fba45db2 | 1661 | sunpro_static_transform_name (char *name) |
c906108c SS |
1662 | { |
1663 | char *p; | |
1664 | if (IS_STATIC_TRANSFORM_NAME (name)) | |
1665 | { | |
fc338970 MK |
1666 | /* For file-local statics there will be a period, a bunch of |
1667 | junk (the contents of which match a string given in the | |
c5aa993b JM |
1668 | N_OPT), a period and the name. For function-local statics |
1669 | there will be a bunch of junk (which seems to change the | |
1670 | second character from 'A' to 'B'), a period, the name of the | |
1671 | function, and the name. So just skip everything before the | |
1672 | last period. */ | |
c906108c SS |
1673 | p = strrchr (name, '.'); |
1674 | if (p != NULL) | |
1675 | name = p + 1; | |
1676 | } | |
1677 | return name; | |
1678 | } | |
1679 | #endif /* STATIC_TRANSFORM_NAME */ | |
fc338970 | 1680 | \f |
c906108c | 1681 | |
fc338970 | 1682 | /* Stuff for WIN32 PE style DLL's but is pretty generic really. */ |
c906108c SS |
1683 | |
1684 | CORE_ADDR | |
1cce71eb | 1685 | i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name) |
c906108c | 1686 | { |
fc338970 | 1687 | if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */ |
c906108c | 1688 | { |
c5aa993b | 1689 | unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4); |
c906108c | 1690 | struct minimal_symbol *indsym = |
fc338970 | 1691 | indirect ? lookup_minimal_symbol_by_pc (indirect) : 0; |
645dd519 | 1692 | char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0; |
c906108c | 1693 | |
c5aa993b | 1694 | if (symname) |
c906108c | 1695 | { |
c5aa993b JM |
1696 | if (strncmp (symname, "__imp_", 6) == 0 |
1697 | || strncmp (symname, "_imp_", 5) == 0) | |
c906108c SS |
1698 | return name ? 1 : read_memory_unsigned_integer (indirect, 4); |
1699 | } | |
1700 | } | |
fc338970 | 1701 | return 0; /* Not a trampoline. */ |
c906108c | 1702 | } |
fc338970 MK |
1703 | \f |
1704 | ||
8201327c MK |
1705 | /* Return non-zero if PC and NAME show that we are in a signal |
1706 | trampoline. */ | |
1707 | ||
1708 | static int | |
1709 | i386_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1710 | { | |
1711 | return (name && strcmp ("_sigtramp", name) == 0); | |
1712 | } | |
1713 | \f | |
1714 | ||
fc338970 MK |
1715 | /* We have two flavours of disassembly. The machinery on this page |
1716 | deals with switching between those. */ | |
c906108c SS |
1717 | |
1718 | static int | |
a89aa300 | 1719 | i386_print_insn (bfd_vma pc, struct disassemble_info *info) |
c906108c | 1720 | { |
5e3397bb MK |
1721 | gdb_assert (disassembly_flavor == att_flavor |
1722 | || disassembly_flavor == intel_flavor); | |
1723 | ||
1724 | /* FIXME: kettenis/20020915: Until disassembler_options is properly | |
1725 | constified, cast to prevent a compiler warning. */ | |
1726 | info->disassembler_options = (char *) disassembly_flavor; | |
1727 | info->mach = gdbarch_bfd_arch_info (current_gdbarch)->mach; | |
1728 | ||
1729 | return print_insn_i386 (pc, info); | |
7a292a7a | 1730 | } |
fc338970 | 1731 | \f |
3ce1502b | 1732 | |
8201327c MK |
1733 | /* There are a few i386 architecture variants that differ only |
1734 | slightly from the generic i386 target. For now, we don't give them | |
1735 | their own source file, but include them here. As a consequence, | |
1736 | they'll always be included. */ | |
3ce1502b | 1737 | |
8201327c | 1738 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1739 | |
8201327c MK |
1740 | static int |
1741 | i386_svr4_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
d2a7c97a | 1742 | { |
acd5c798 MK |
1743 | /* UnixWare uses _sigacthandler. The origin of the other symbols is |
1744 | currently unknown. */ | |
8201327c MK |
1745 | return (name && (strcmp ("_sigreturn", name) == 0 |
1746 | || strcmp ("_sigacthandler", name) == 0 | |
1747 | || strcmp ("sigvechandler", name) == 0)); | |
1748 | } | |
d2a7c97a | 1749 | |
acd5c798 MK |
1750 | /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp |
1751 | routine, return the address of the associated sigcontext (ucontext) | |
1752 | structure. */ | |
3ce1502b | 1753 | |
3a1e71e3 | 1754 | static CORE_ADDR |
acd5c798 | 1755 | i386_svr4_sigcontext_addr (struct frame_info *next_frame) |
8201327c | 1756 | { |
acd5c798 MK |
1757 | char buf[4]; |
1758 | CORE_ADDR sp; | |
3ce1502b | 1759 | |
acd5c798 MK |
1760 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); |
1761 | sp = extract_unsigned_integer (buf, 4); | |
21d0e8a4 | 1762 | |
acd5c798 | 1763 | return read_memory_unsigned_integer (sp + 8, 4); |
8201327c MK |
1764 | } |
1765 | \f | |
3ce1502b | 1766 | |
8201327c | 1767 | /* DJGPP. */ |
d2a7c97a | 1768 | |
8201327c MK |
1769 | static int |
1770 | i386_go32_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1771 | { | |
1772 | /* DJGPP doesn't have any special frames for signal handlers. */ | |
1773 | return 0; | |
1774 | } | |
1775 | \f | |
d2a7c97a | 1776 | |
8201327c | 1777 | /* Generic ELF. */ |
d2a7c97a | 1778 | |
8201327c MK |
1779 | void |
1780 | i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1781 | { | |
1782 | /* We typically use stabs-in-ELF with the DWARF register numbering. */ | |
1783 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1784 | } | |
3ce1502b | 1785 | |
8201327c | 1786 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1787 | |
8201327c MK |
1788 | void |
1789 | i386_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1790 | { | |
1791 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
3ce1502b | 1792 | |
8201327c MK |
1793 | /* System V Release 4 uses ELF. */ |
1794 | i386_elf_init_abi (info, gdbarch); | |
3ce1502b | 1795 | |
dfe01d39 MK |
1796 | /* System V Release 4 has shared libraries. */ |
1797 | set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section); | |
1798 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); | |
1799 | ||
8201327c | 1800 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_svr4_pc_in_sigtramp); |
21d0e8a4 | 1801 | tdep->sigcontext_addr = i386_svr4_sigcontext_addr; |
acd5c798 MK |
1802 | tdep->sc_pc_offset = 36 + 14 * 4; |
1803 | tdep->sc_sp_offset = 36 + 17 * 4; | |
3ce1502b | 1804 | |
8201327c | 1805 | tdep->jb_pc_offset = 20; |
3ce1502b MK |
1806 | } |
1807 | ||
8201327c | 1808 | /* DJGPP. */ |
3ce1502b | 1809 | |
3a1e71e3 | 1810 | static void |
8201327c | 1811 | i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1812 | { |
8201327c | 1813 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1814 | |
8201327c | 1815 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_go32_pc_in_sigtramp); |
3ce1502b | 1816 | |
8201327c | 1817 | tdep->jb_pc_offset = 36; |
3ce1502b MK |
1818 | } |
1819 | ||
8201327c | 1820 | /* NetWare. */ |
3ce1502b | 1821 | |
3a1e71e3 | 1822 | static void |
8201327c | 1823 | i386_nw_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1824 | { |
8201327c | 1825 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1826 | |
8201327c | 1827 | tdep->jb_pc_offset = 24; |
d2a7c97a | 1828 | } |
8201327c | 1829 | \f |
2acceee2 | 1830 | |
38c968cf AC |
1831 | /* i386 register groups. In addition to the normal groups, add "mmx" |
1832 | and "sse". */ | |
1833 | ||
1834 | static struct reggroup *i386_sse_reggroup; | |
1835 | static struct reggroup *i386_mmx_reggroup; | |
1836 | ||
1837 | static void | |
1838 | i386_init_reggroups (void) | |
1839 | { | |
1840 | i386_sse_reggroup = reggroup_new ("sse", USER_REGGROUP); | |
1841 | i386_mmx_reggroup = reggroup_new ("mmx", USER_REGGROUP); | |
1842 | } | |
1843 | ||
1844 | static void | |
1845 | i386_add_reggroups (struct gdbarch *gdbarch) | |
1846 | { | |
1847 | reggroup_add (gdbarch, i386_sse_reggroup); | |
1848 | reggroup_add (gdbarch, i386_mmx_reggroup); | |
1849 | reggroup_add (gdbarch, general_reggroup); | |
1850 | reggroup_add (gdbarch, float_reggroup); | |
1851 | reggroup_add (gdbarch, all_reggroup); | |
1852 | reggroup_add (gdbarch, save_reggroup); | |
1853 | reggroup_add (gdbarch, restore_reggroup); | |
1854 | reggroup_add (gdbarch, vector_reggroup); | |
1855 | reggroup_add (gdbarch, system_reggroup); | |
1856 | } | |
1857 | ||
1858 | int | |
1859 | i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
1860 | struct reggroup *group) | |
1861 | { | |
5716833c MK |
1862 | int sse_regnum_p = (i386_sse_regnum_p (gdbarch, regnum) |
1863 | || i386_mxcsr_regnum_p (gdbarch, regnum)); | |
38c968cf AC |
1864 | int fp_regnum_p = (i386_fp_regnum_p (regnum) |
1865 | || i386_fpc_regnum_p (regnum)); | |
5716833c | 1866 | int mmx_regnum_p = (i386_mmx_regnum_p (gdbarch, regnum)); |
acd5c798 | 1867 | |
38c968cf AC |
1868 | if (group == i386_mmx_reggroup) |
1869 | return mmx_regnum_p; | |
1870 | if (group == i386_sse_reggroup) | |
1871 | return sse_regnum_p; | |
1872 | if (group == vector_reggroup) | |
1873 | return (mmx_regnum_p || sse_regnum_p); | |
1874 | if (group == float_reggroup) | |
1875 | return fp_regnum_p; | |
1876 | if (group == general_reggroup) | |
1877 | return (!fp_regnum_p && !mmx_regnum_p && !sse_regnum_p); | |
acd5c798 | 1878 | |
38c968cf AC |
1879 | return default_register_reggroup_p (gdbarch, regnum, group); |
1880 | } | |
38c968cf | 1881 | \f |
acd5c798 | 1882 | |
f837910f MK |
1883 | /* Get the ARGIth function argument for the current function. */ |
1884 | ||
42c466d7 | 1885 | static CORE_ADDR |
143985b7 AF |
1886 | i386_fetch_pointer_argument (struct frame_info *frame, int argi, |
1887 | struct type *type) | |
1888 | { | |
f837910f MK |
1889 | CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM); |
1890 | return read_memory_unsigned_integer (sp + (4 * (argi + 1)), 4); | |
143985b7 AF |
1891 | } |
1892 | ||
1893 | \f | |
3a1e71e3 | 1894 | static struct gdbarch * |
a62cc96e AC |
1895 | i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1896 | { | |
cd3c07fc | 1897 | struct gdbarch_tdep *tdep; |
a62cc96e AC |
1898 | struct gdbarch *gdbarch; |
1899 | ||
4be87837 DJ |
1900 | /* If there is already a candidate, use it. */ |
1901 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1902 | if (arches != NULL) | |
1903 | return arches->gdbarch; | |
a62cc96e AC |
1904 | |
1905 | /* Allocate space for the new architecture. */ | |
1906 | tdep = XMALLOC (struct gdbarch_tdep); | |
1907 | gdbarch = gdbarch_alloc (&info, tdep); | |
1908 | ||
473f17b0 MK |
1909 | /* General-purpose registers. */ |
1910 | tdep->gregset = NULL; | |
1911 | tdep->gregset_reg_offset = NULL; | |
1912 | tdep->gregset_num_regs = I386_NUM_GREGS; | |
1913 | tdep->sizeof_gregset = 0; | |
1914 | ||
1915 | /* Floating-point registers. */ | |
1916 | tdep->fpregset = NULL; | |
1917 | tdep->sizeof_fpregset = I387_SIZEOF_FSAVE; | |
1918 | ||
5716833c MK |
1919 | /* The default settings include the FPU registers, the MMX registers |
1920 | and the SSE registers. This can be overidden for a specific ABI | |
1921 | by adjusting the members `st0_regnum', `mm0_regnum' and | |
1922 | `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers | |
1923 | will show up in the output of "info all-registers". Ideally we | |
1924 | should try to autodetect whether they are available, such that we | |
1925 | can prevent "info all-registers" from displaying registers that | |
1926 | aren't available. | |
1927 | ||
1928 | NOTE: kevinb/2003-07-13: ... if it's a choice between printing | |
1929 | [the SSE registers] always (even when they don't exist) or never | |
1930 | showing them to the user (even when they do exist), I prefer the | |
1931 | former over the latter. */ | |
1932 | ||
1933 | tdep->st0_regnum = I386_ST0_REGNUM; | |
1934 | ||
1935 | /* The MMX registers are implemented as pseudo-registers. Put off | |
1936 | caclulating the register number for %mm0 until we know the number | |
1937 | of raw registers. */ | |
1938 | tdep->mm0_regnum = 0; | |
1939 | ||
1940 | /* I386_NUM_XREGS includes %mxcsr, so substract one. */ | |
49ed40de | 1941 | tdep->num_xmm_regs = I386_NUM_XREGS - 1; |
d2a7c97a | 1942 | |
8201327c MK |
1943 | tdep->jb_pc_offset = -1; |
1944 | tdep->struct_return = pcc_struct_return; | |
8201327c MK |
1945 | tdep->sigtramp_start = 0; |
1946 | tdep->sigtramp_end = 0; | |
21d0e8a4 | 1947 | tdep->sigcontext_addr = NULL; |
a3386186 | 1948 | tdep->sc_reg_offset = NULL; |
8201327c | 1949 | tdep->sc_pc_offset = -1; |
21d0e8a4 | 1950 | tdep->sc_sp_offset = -1; |
8201327c | 1951 | |
896fb97d MK |
1952 | /* The format used for `long double' on almost all i386 targets is |
1953 | the i387 extended floating-point format. In fact, of all targets | |
1954 | in the GCC 2.95 tree, only OSF/1 does it different, and insists | |
1955 | on having a `long double' that's not `long' at all. */ | |
1956 | set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext); | |
21d0e8a4 | 1957 | |
66da5fd8 | 1958 | /* Although the i387 extended floating-point has only 80 significant |
896fb97d MK |
1959 | bits, a `long double' actually takes up 96, probably to enforce |
1960 | alignment. */ | |
1961 | set_gdbarch_long_double_bit (gdbarch, 96); | |
1962 | ||
49ed40de KB |
1963 | /* The default ABI includes general-purpose registers, |
1964 | floating-point registers, and the SSE registers. */ | |
1965 | set_gdbarch_num_regs (gdbarch, I386_SSE_NUM_REGS); | |
acd5c798 MK |
1966 | set_gdbarch_register_name (gdbarch, i386_register_name); |
1967 | set_gdbarch_register_type (gdbarch, i386_register_type); | |
21d0e8a4 | 1968 | |
acd5c798 MK |
1969 | /* Register numbers of various important registers. */ |
1970 | set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */ | |
1971 | set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */ | |
1972 | set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */ | |
1973 | set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */ | |
356a6b3e MK |
1974 | |
1975 | /* Use the "default" register numbering scheme for stabs and COFF. */ | |
1976 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1977 | set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1978 | ||
1979 | /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */ | |
1980 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1981 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1982 | ||
1983 | /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to | |
1984 | be in use on any of the supported i386 targets. */ | |
1985 | ||
61113f8b MK |
1986 | set_gdbarch_print_float_info (gdbarch, i387_print_float_info); |
1987 | ||
8201327c | 1988 | set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target); |
96297dab | 1989 | |
a62cc96e | 1990 | /* Call dummy code. */ |
acd5c798 | 1991 | set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call); |
a62cc96e | 1992 | |
ff2e87ac AC |
1993 | set_gdbarch_convert_register_p (gdbarch, i386_convert_register_p); |
1994 | set_gdbarch_register_to_value (gdbarch, i386_register_to_value); | |
1995 | set_gdbarch_value_to_register (gdbarch, i386_value_to_register); | |
b6197528 | 1996 | |
c5e656c1 | 1997 | set_gdbarch_return_value (gdbarch, i386_return_value); |
00f8375e | 1998 | set_gdbarch_extract_struct_value_address (gdbarch, |
fc08ec52 | 1999 | i386_extract_struct_value_address); |
8201327c | 2000 | |
93924b6b MK |
2001 | set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue); |
2002 | ||
2003 | /* Stack grows downward. */ | |
2004 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
2005 | ||
2006 | set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc); | |
2007 | set_gdbarch_decr_pc_after_break (gdbarch, 1); | |
2008 | set_gdbarch_function_start_offset (gdbarch, 0); | |
42fdc8df | 2009 | |
42fdc8df | 2010 | set_gdbarch_frame_args_skip (gdbarch, 8); |
8201327c MK |
2011 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_pc_in_sigtramp); |
2012 | ||
28fc6740 | 2013 | /* Wire in the MMX registers. */ |
0f751ff2 | 2014 | set_gdbarch_num_pseudo_regs (gdbarch, i386_num_mmx_regs); |
28fc6740 AC |
2015 | set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read); |
2016 | set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write); | |
2017 | ||
5e3397bb MK |
2018 | set_gdbarch_print_insn (gdbarch, i386_print_insn); |
2019 | ||
acd5c798 | 2020 | set_gdbarch_unwind_dummy_id (gdbarch, i386_unwind_dummy_id); |
acd5c798 MK |
2021 | |
2022 | set_gdbarch_unwind_pc (gdbarch, i386_unwind_pc); | |
2023 | ||
38c968cf AC |
2024 | /* Add the i386 register groups. */ |
2025 | i386_add_reggroups (gdbarch); | |
2026 | set_gdbarch_register_reggroup_p (gdbarch, i386_register_reggroup_p); | |
2027 | ||
143985b7 AF |
2028 | /* Helper for function argument information. */ |
2029 | set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument); | |
2030 | ||
6405b0a6 | 2031 | /* Hook in the DWARF CFI frame unwinder. */ |
336d1bba | 2032 | frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); |
6405b0a6 | 2033 | |
acd5c798 | 2034 | frame_base_set_default (gdbarch, &i386_frame_base); |
6c0e89ed | 2035 | |
3ce1502b | 2036 | /* Hook in ABI-specific overrides, if they have been registered. */ |
4be87837 | 2037 | gdbarch_init_osabi (info, gdbarch); |
3ce1502b | 2038 | |
336d1bba AC |
2039 | frame_unwind_append_sniffer (gdbarch, i386_sigtramp_frame_sniffer); |
2040 | frame_unwind_append_sniffer (gdbarch, i386_frame_sniffer); | |
acd5c798 | 2041 | |
8446b36a MK |
2042 | /* If we have a register mapping, enable the generic core file |
2043 | support, unless it has already been enabled. */ | |
2044 | if (tdep->gregset_reg_offset | |
2045 | && !gdbarch_regset_from_core_section_p (gdbarch)) | |
2046 | set_gdbarch_regset_from_core_section (gdbarch, | |
2047 | i386_regset_from_core_section); | |
2048 | ||
5716833c MK |
2049 | /* Unless support for MMX has been disabled, make %mm0 the first |
2050 | pseudo-register. */ | |
2051 | if (tdep->mm0_regnum == 0) | |
2052 | tdep->mm0_regnum = gdbarch_num_regs (gdbarch); | |
2053 | ||
a62cc96e AC |
2054 | return gdbarch; |
2055 | } | |
2056 | ||
8201327c MK |
2057 | static enum gdb_osabi |
2058 | i386_coff_osabi_sniffer (bfd *abfd) | |
2059 | { | |
762c5349 MK |
2060 | if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0 |
2061 | || strcmp (bfd_get_target (abfd), "coff-go32") == 0) | |
8201327c MK |
2062 | return GDB_OSABI_GO32; |
2063 | ||
2064 | return GDB_OSABI_UNKNOWN; | |
2065 | } | |
2066 | ||
2067 | static enum gdb_osabi | |
2068 | i386_nlm_osabi_sniffer (bfd *abfd) | |
2069 | { | |
2070 | return GDB_OSABI_NETWARE; | |
2071 | } | |
2072 | \f | |
2073 | ||
28e9e0f0 MK |
2074 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
2075 | void _initialize_i386_tdep (void); | |
2076 | ||
c906108c | 2077 | void |
fba45db2 | 2078 | _initialize_i386_tdep (void) |
c906108c | 2079 | { |
a62cc96e AC |
2080 | register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init); |
2081 | ||
fc338970 | 2082 | /* Add the variable that controls the disassembly flavor. */ |
917317f4 JM |
2083 | { |
2084 | struct cmd_list_element *new_cmd; | |
7a292a7a | 2085 | |
917317f4 JM |
2086 | new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class, |
2087 | valid_flavors, | |
1ed2a135 | 2088 | &disassembly_flavor, |
fc338970 MK |
2089 | "\ |
2090 | Set the disassembly flavor, the valid values are \"att\" and \"intel\", \ | |
c906108c | 2091 | and the default value is \"att\".", |
917317f4 | 2092 | &setlist); |
917317f4 JM |
2093 | add_show_from_set (new_cmd, &showlist); |
2094 | } | |
8201327c MK |
2095 | |
2096 | /* Add the variable that controls the convention for returning | |
2097 | structs. */ | |
2098 | { | |
2099 | struct cmd_list_element *new_cmd; | |
2100 | ||
2101 | new_cmd = add_set_enum_cmd ("struct-convention", no_class, | |
5e3397bb | 2102 | valid_conventions, |
8201327c MK |
2103 | &struct_convention, "\ |
2104 | Set the convention for returning small structs, valid values \ | |
2105 | are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".", | |
2106 | &setlist); | |
2107 | add_show_from_set (new_cmd, &showlist); | |
2108 | } | |
2109 | ||
2110 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour, | |
2111 | i386_coff_osabi_sniffer); | |
2112 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_nlm_flavour, | |
2113 | i386_nlm_osabi_sniffer); | |
2114 | ||
05816f70 | 2115 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4, |
8201327c | 2116 | i386_svr4_init_abi); |
05816f70 | 2117 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_GO32, |
8201327c | 2118 | i386_go32_init_abi); |
05816f70 | 2119 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_NETWARE, |
8201327c | 2120 | i386_nw_init_abi); |
38c968cf AC |
2121 | |
2122 | /* Initialize the i386 specific register groups. */ | |
2123 | i386_init_reggroups (); | |
c906108c | 2124 | } |