Commit | Line | Data |
---|---|---|
c906108c | 1 | /* Intel 386 target-dependent stuff. |
349c5d5f AC |
2 | |
3 | Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, | |
4be87837 | 4 | 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
c906108c | 5 | |
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | #include "defs.h" | |
acd5c798 MK |
24 | #include "arch-utils.h" |
25 | #include "command.h" | |
26 | #include "dummy-frame.h" | |
6405b0a6 | 27 | #include "dwarf2-frame.h" |
acd5c798 MK |
28 | #include "doublest.h" |
29 | #include "floatformat.h" | |
c906108c | 30 | #include "frame.h" |
acd5c798 MK |
31 | #include "frame-base.h" |
32 | #include "frame-unwind.h" | |
c906108c | 33 | #include "inferior.h" |
acd5c798 | 34 | #include "gdbcmd.h" |
c906108c | 35 | #include "gdbcore.h" |
dfe01d39 | 36 | #include "objfiles.h" |
acd5c798 MK |
37 | #include "osabi.h" |
38 | #include "regcache.h" | |
39 | #include "reggroups.h" | |
c0d1d883 | 40 | #include "symfile.h" |
c906108c | 41 | #include "symtab.h" |
acd5c798 | 42 | #include "target.h" |
fd0407d6 | 43 | #include "value.h" |
acd5c798 | 44 | |
3d261580 | 45 | #include "gdb_assert.h" |
acd5c798 | 46 | #include "gdb_string.h" |
3d261580 | 47 | |
d2a7c97a | 48 | #include "i386-tdep.h" |
61113f8b | 49 | #include "i387-tdep.h" |
d2a7c97a | 50 | |
fc633446 MK |
51 | /* Names of the registers. The first 10 registers match the register |
52 | numbering scheme used by GCC for stabs and DWARF. */ | |
c40e1eab | 53 | |
fc633446 MK |
54 | static char *i386_register_names[] = |
55 | { | |
56 | "eax", "ecx", "edx", "ebx", | |
57 | "esp", "ebp", "esi", "edi", | |
58 | "eip", "eflags", "cs", "ss", | |
59 | "ds", "es", "fs", "gs", | |
60 | "st0", "st1", "st2", "st3", | |
61 | "st4", "st5", "st6", "st7", | |
62 | "fctrl", "fstat", "ftag", "fiseg", | |
63 | "fioff", "foseg", "fooff", "fop", | |
64 | "xmm0", "xmm1", "xmm2", "xmm3", | |
65 | "xmm4", "xmm5", "xmm6", "xmm7", | |
66 | "mxcsr" | |
67 | }; | |
68 | ||
c40e1eab MK |
69 | static const int i386_num_register_names = |
70 | (sizeof (i386_register_names) / sizeof (*i386_register_names)); | |
71 | ||
28fc6740 AC |
72 | /* MMX registers. */ |
73 | ||
74 | static char *i386_mmx_names[] = | |
75 | { | |
76 | "mm0", "mm1", "mm2", "mm3", | |
77 | "mm4", "mm5", "mm6", "mm7" | |
78 | }; | |
c40e1eab MK |
79 | |
80 | static const int i386_num_mmx_regs = | |
81 | (sizeof (i386_mmx_names) / sizeof (i386_mmx_names[0])); | |
82 | ||
83 | #define MM0_REGNUM NUM_REGS | |
28fc6740 AC |
84 | |
85 | static int | |
c40e1eab | 86 | i386_mmx_regnum_p (int regnum) |
28fc6740 | 87 | { |
c40e1eab MK |
88 | return (regnum >= MM0_REGNUM |
89 | && regnum < MM0_REGNUM + i386_num_mmx_regs); | |
28fc6740 AC |
90 | } |
91 | ||
23a34459 AC |
92 | /* FP register? */ |
93 | ||
94 | int | |
95 | i386_fp_regnum_p (int regnum) | |
96 | { | |
97 | return (regnum < NUM_REGS | |
c40e1eab | 98 | && (FP0_REGNUM && FP0_REGNUM <= regnum && regnum < FPC_REGNUM)); |
23a34459 AC |
99 | } |
100 | ||
101 | int | |
102 | i386_fpc_regnum_p (int regnum) | |
103 | { | |
104 | return (regnum < NUM_REGS | |
c40e1eab | 105 | && (FPC_REGNUM <= regnum && regnum < XMM0_REGNUM)); |
23a34459 AC |
106 | } |
107 | ||
108 | /* SSE register? */ | |
109 | ||
110 | int | |
111 | i386_sse_regnum_p (int regnum) | |
112 | { | |
113 | return (regnum < NUM_REGS | |
c40e1eab | 114 | && (XMM0_REGNUM <= regnum && regnum < MXCSR_REGNUM)); |
23a34459 AC |
115 | } |
116 | ||
117 | int | |
118 | i386_mxcsr_regnum_p (int regnum) | |
119 | { | |
120 | return (regnum < NUM_REGS | |
c40e1eab | 121 | && regnum == MXCSR_REGNUM); |
23a34459 AC |
122 | } |
123 | ||
fc633446 MK |
124 | /* Return the name of register REG. */ |
125 | ||
fa88f677 | 126 | const char * |
fc633446 MK |
127 | i386_register_name (int reg) |
128 | { | |
23a34459 | 129 | if (i386_mmx_regnum_p (reg)) |
28fc6740 | 130 | return i386_mmx_names[reg - MM0_REGNUM]; |
fc633446 | 131 | |
70913449 MK |
132 | if (reg >= 0 && reg < i386_num_register_names) |
133 | return i386_register_names[reg]; | |
134 | ||
c40e1eab | 135 | return NULL; |
fc633446 MK |
136 | } |
137 | ||
85540d8c MK |
138 | /* Convert stabs register number REG to the appropriate register |
139 | number used by GDB. */ | |
140 | ||
8201327c | 141 | static int |
85540d8c MK |
142 | i386_stab_reg_to_regnum (int reg) |
143 | { | |
144 | /* This implements what GCC calls the "default" register map. */ | |
145 | if (reg >= 0 && reg <= 7) | |
146 | { | |
acd5c798 | 147 | /* General-purpose registers. */ |
85540d8c MK |
148 | return reg; |
149 | } | |
150 | else if (reg >= 12 && reg <= 19) | |
151 | { | |
152 | /* Floating-point registers. */ | |
153 | return reg - 12 + FP0_REGNUM; | |
154 | } | |
155 | else if (reg >= 21 && reg <= 28) | |
156 | { | |
157 | /* SSE registers. */ | |
158 | return reg - 21 + XMM0_REGNUM; | |
159 | } | |
160 | else if (reg >= 29 && reg <= 36) | |
161 | { | |
162 | /* MMX registers. */ | |
7d12f766 | 163 | return reg - 29 + MM0_REGNUM; |
85540d8c MK |
164 | } |
165 | ||
166 | /* This will hopefully provoke a warning. */ | |
167 | return NUM_REGS + NUM_PSEUDO_REGS; | |
168 | } | |
169 | ||
8201327c | 170 | /* Convert DWARF register number REG to the appropriate register |
85540d8c MK |
171 | number used by GDB. */ |
172 | ||
8201327c | 173 | static int |
85540d8c MK |
174 | i386_dwarf_reg_to_regnum (int reg) |
175 | { | |
176 | /* The DWARF register numbering includes %eip and %eflags, and | |
177 | numbers the floating point registers differently. */ | |
178 | if (reg >= 0 && reg <= 9) | |
179 | { | |
acd5c798 | 180 | /* General-purpose registers. */ |
85540d8c MK |
181 | return reg; |
182 | } | |
183 | else if (reg >= 11 && reg <= 18) | |
184 | { | |
185 | /* Floating-point registers. */ | |
186 | return reg - 11 + FP0_REGNUM; | |
187 | } | |
188 | else if (reg >= 21) | |
189 | { | |
190 | /* The SSE and MMX registers have identical numbers as in stabs. */ | |
191 | return i386_stab_reg_to_regnum (reg); | |
192 | } | |
193 | ||
194 | /* This will hopefully provoke a warning. */ | |
195 | return NUM_REGS + NUM_PSEUDO_REGS; | |
196 | } | |
fc338970 | 197 | \f |
917317f4 | 198 | |
fc338970 MK |
199 | /* This is the variable that is set with "set disassembly-flavor", and |
200 | its legitimate values. */ | |
53904c9e AC |
201 | static const char att_flavor[] = "att"; |
202 | static const char intel_flavor[] = "intel"; | |
203 | static const char *valid_flavors[] = | |
c5aa993b | 204 | { |
c906108c SS |
205 | att_flavor, |
206 | intel_flavor, | |
207 | NULL | |
208 | }; | |
53904c9e | 209 | static const char *disassembly_flavor = att_flavor; |
acd5c798 | 210 | \f |
c906108c | 211 | |
acd5c798 MK |
212 | /* Use the program counter to determine the contents and size of a |
213 | breakpoint instruction. Return a pointer to a string of bytes that | |
214 | encode a breakpoint instruction, store the length of the string in | |
215 | *LEN and optionally adjust *PC to point to the correct memory | |
216 | location for inserting the breakpoint. | |
c906108c | 217 | |
acd5c798 MK |
218 | On the i386 we have a single breakpoint that fits in a single byte |
219 | and can be inserted anywhere. | |
c906108c | 220 | |
acd5c798 MK |
221 | This function is 64-bit safe. */ |
222 | ||
223 | static const unsigned char * | |
224 | i386_breakpoint_from_pc (CORE_ADDR *pc, int *len) | |
c906108c | 225 | { |
acd5c798 MK |
226 | static unsigned char break_insn[] = { 0xcc }; /* int 3 */ |
227 | ||
228 | *len = sizeof (break_insn); | |
229 | return break_insn; | |
c906108c | 230 | } |
fc338970 | 231 | \f |
acd5c798 MK |
232 | #ifdef I386_REGNO_TO_SYMMETRY |
233 | #error "The Sequent Symmetry is no longer supported." | |
234 | #endif | |
c906108c | 235 | |
acd5c798 MK |
236 | /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi |
237 | and %esp "belong" to the calling function. Therefore these | |
238 | registers should be saved if they're going to be modified. */ | |
c906108c | 239 | |
acd5c798 MK |
240 | /* The maximum number of saved registers. This should include all |
241 | registers mentioned above, and %eip. */ | |
a3386186 | 242 | #define I386_NUM_SAVED_REGS I386_NUM_GREGS |
acd5c798 MK |
243 | |
244 | struct i386_frame_cache | |
c906108c | 245 | { |
acd5c798 MK |
246 | /* Base address. */ |
247 | CORE_ADDR base; | |
248 | CORE_ADDR sp_offset; | |
249 | CORE_ADDR pc; | |
250 | ||
fd13a04a AC |
251 | /* Saved registers. */ |
252 | CORE_ADDR saved_regs[I386_NUM_SAVED_REGS]; | |
acd5c798 MK |
253 | CORE_ADDR saved_sp; |
254 | int pc_in_eax; | |
255 | ||
256 | /* Stack space reserved for local variables. */ | |
257 | long locals; | |
258 | }; | |
259 | ||
260 | /* Allocate and initialize a frame cache. */ | |
261 | ||
262 | static struct i386_frame_cache * | |
fd13a04a | 263 | i386_alloc_frame_cache (void) |
acd5c798 MK |
264 | { |
265 | struct i386_frame_cache *cache; | |
266 | int i; | |
267 | ||
268 | cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache); | |
269 | ||
270 | /* Base address. */ | |
271 | cache->base = 0; | |
272 | cache->sp_offset = -4; | |
273 | cache->pc = 0; | |
274 | ||
fd13a04a AC |
275 | /* Saved registers. We initialize these to -1 since zero is a valid |
276 | offset (that's where %ebp is supposed to be stored). */ | |
277 | for (i = 0; i < I386_NUM_SAVED_REGS; i++) | |
278 | cache->saved_regs[i] = -1; | |
acd5c798 MK |
279 | cache->saved_sp = 0; |
280 | cache->pc_in_eax = 0; | |
281 | ||
282 | /* Frameless until proven otherwise. */ | |
283 | cache->locals = -1; | |
284 | ||
285 | return cache; | |
286 | } | |
c906108c | 287 | |
acd5c798 MK |
288 | /* If the instruction at PC is a jump, return the address of its |
289 | target. Otherwise, return PC. */ | |
c906108c | 290 | |
acd5c798 MK |
291 | static CORE_ADDR |
292 | i386_follow_jump (CORE_ADDR pc) | |
293 | { | |
294 | unsigned char op; | |
295 | long delta = 0; | |
296 | int data16 = 0; | |
c906108c | 297 | |
acd5c798 MK |
298 | op = read_memory_unsigned_integer (pc, 1); |
299 | if (op == 0x66) | |
c906108c | 300 | { |
c906108c | 301 | data16 = 1; |
acd5c798 | 302 | op = read_memory_unsigned_integer (pc + 1, 1); |
c906108c SS |
303 | } |
304 | ||
acd5c798 | 305 | switch (op) |
c906108c SS |
306 | { |
307 | case 0xe9: | |
fc338970 | 308 | /* Relative jump: if data16 == 0, disp32, else disp16. */ |
c906108c SS |
309 | if (data16) |
310 | { | |
acd5c798 | 311 | delta = read_memory_integer (pc + 2, 2); |
c906108c | 312 | |
fc338970 MK |
313 | /* Include the size of the jmp instruction (including the |
314 | 0x66 prefix). */ | |
acd5c798 | 315 | delta += 4; |
c906108c SS |
316 | } |
317 | else | |
318 | { | |
acd5c798 | 319 | delta = read_memory_integer (pc + 1, 4); |
c906108c | 320 | |
acd5c798 MK |
321 | /* Include the size of the jmp instruction. */ |
322 | delta += 5; | |
c906108c SS |
323 | } |
324 | break; | |
325 | case 0xeb: | |
fc338970 | 326 | /* Relative jump, disp8 (ignore data16). */ |
acd5c798 | 327 | delta = read_memory_integer (pc + data16 + 1, 1); |
c906108c | 328 | |
acd5c798 | 329 | delta += data16 + 2; |
c906108c SS |
330 | break; |
331 | } | |
c906108c | 332 | |
acd5c798 MK |
333 | return pc + delta; |
334 | } | |
fc338970 | 335 | |
acd5c798 MK |
336 | /* Check whether PC points at a prologue for a function returning a |
337 | structure or union. If so, it updates CACHE and returns the | |
338 | address of the first instruction after the code sequence that | |
339 | removes the "hidden" argument from the stack or CURRENT_PC, | |
340 | whichever is smaller. Otherwise, return PC. */ | |
c906108c | 341 | |
acd5c798 MK |
342 | static CORE_ADDR |
343 | i386_analyze_struct_return (CORE_ADDR pc, CORE_ADDR current_pc, | |
344 | struct i386_frame_cache *cache) | |
c906108c | 345 | { |
acd5c798 MK |
346 | /* Functions that return a structure or union start with: |
347 | ||
348 | popl %eax 0x58 | |
349 | xchgl %eax, (%esp) 0x87 0x04 0x24 | |
350 | or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00 | |
351 | ||
352 | (the System V compiler puts out the second `xchg' instruction, | |
353 | and the assembler doesn't try to optimize it, so the 'sib' form | |
354 | gets generated). This sequence is used to get the address of the | |
355 | return buffer for a function that returns a structure. */ | |
356 | static unsigned char proto1[3] = { 0x87, 0x04, 0x24 }; | |
357 | static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 }; | |
358 | unsigned char buf[4]; | |
c906108c SS |
359 | unsigned char op; |
360 | ||
acd5c798 MK |
361 | if (current_pc <= pc) |
362 | return pc; | |
363 | ||
364 | op = read_memory_unsigned_integer (pc, 1); | |
c906108c | 365 | |
acd5c798 MK |
366 | if (op != 0x58) /* popl %eax */ |
367 | return pc; | |
c906108c | 368 | |
acd5c798 MK |
369 | read_memory (pc + 1, buf, 4); |
370 | if (memcmp (buf, proto1, 3) != 0 && memcmp (buf, proto2, 4) != 0) | |
371 | return pc; | |
c906108c | 372 | |
acd5c798 | 373 | if (current_pc == pc) |
c906108c | 374 | { |
acd5c798 MK |
375 | cache->sp_offset += 4; |
376 | return current_pc; | |
c906108c SS |
377 | } |
378 | ||
acd5c798 | 379 | if (current_pc == pc + 1) |
c906108c | 380 | { |
acd5c798 MK |
381 | cache->pc_in_eax = 1; |
382 | return current_pc; | |
383 | } | |
384 | ||
385 | if (buf[1] == proto1[1]) | |
386 | return pc + 4; | |
387 | else | |
388 | return pc + 5; | |
389 | } | |
390 | ||
391 | static CORE_ADDR | |
392 | i386_skip_probe (CORE_ADDR pc) | |
393 | { | |
394 | /* A function may start with | |
fc338970 | 395 | |
acd5c798 MK |
396 | pushl constant |
397 | call _probe | |
398 | addl $4, %esp | |
fc338970 | 399 | |
acd5c798 MK |
400 | followed by |
401 | ||
402 | pushl %ebp | |
fc338970 | 403 | |
acd5c798 MK |
404 | etc. */ |
405 | unsigned char buf[8]; | |
406 | unsigned char op; | |
fc338970 | 407 | |
acd5c798 MK |
408 | op = read_memory_unsigned_integer (pc, 1); |
409 | ||
410 | if (op == 0x68 || op == 0x6a) | |
411 | { | |
412 | int delta; | |
c906108c | 413 | |
acd5c798 MK |
414 | /* Skip past the `pushl' instruction; it has either a one-byte or a |
415 | four-byte operand, depending on the opcode. */ | |
c906108c | 416 | if (op == 0x68) |
acd5c798 | 417 | delta = 5; |
c906108c | 418 | else |
acd5c798 | 419 | delta = 2; |
c906108c | 420 | |
acd5c798 MK |
421 | /* Read the following 8 bytes, which should be `call _probe' (6 |
422 | bytes) followed by `addl $4,%esp' (2 bytes). */ | |
423 | read_memory (pc + delta, buf, sizeof (buf)); | |
c906108c | 424 | if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4) |
acd5c798 | 425 | pc += delta + sizeof (buf); |
c906108c SS |
426 | } |
427 | ||
acd5c798 MK |
428 | return pc; |
429 | } | |
430 | ||
431 | /* Check whether PC points at a code that sets up a new stack frame. | |
432 | If so, it updates CACHE and returns the address of the first | |
433 | instruction after the sequence that sets removes the "hidden" | |
434 | argument from the stack or CURRENT_PC, whichever is smaller. | |
435 | Otherwise, return PC. */ | |
436 | ||
437 | static CORE_ADDR | |
438 | i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR current_pc, | |
439 | struct i386_frame_cache *cache) | |
440 | { | |
441 | unsigned char op; | |
26604a34 | 442 | int skip = 0; |
acd5c798 MK |
443 | |
444 | if (current_pc <= pc) | |
445 | return current_pc; | |
446 | ||
447 | op = read_memory_unsigned_integer (pc, 1); | |
448 | ||
c906108c | 449 | if (op == 0x55) /* pushl %ebp */ |
c5aa993b | 450 | { |
acd5c798 MK |
451 | /* Take into account that we've executed the `pushl %ebp' that |
452 | starts this instruction sequence. */ | |
fd13a04a | 453 | cache->saved_regs[I386_EBP_REGNUM] = 0; |
acd5c798 MK |
454 | cache->sp_offset += 4; |
455 | ||
456 | /* If that's all, return now. */ | |
457 | if (current_pc <= pc + 1) | |
458 | return current_pc; | |
459 | ||
acd5c798 | 460 | op = read_memory_unsigned_integer (pc + 1, 1); |
26604a34 MK |
461 | |
462 | /* Check for some special instructions that might be migrated | |
463 | by GCC into the prologue. We check for | |
464 | ||
465 | xorl %ebx, %ebx | |
466 | xorl %ecx, %ecx | |
467 | xorl %edx, %edx | |
468 | ||
469 | and the equivalent | |
470 | ||
471 | subl %ebx, %ebx | |
472 | subl %ecx, %ecx | |
473 | subl %edx, %edx | |
474 | ||
475 | Make sure we only skip these instructions if we later see the | |
476 | `movl %esp, %ebp' that actually sets up the frame. */ | |
477 | while (op == 0x29 || op == 0x31) | |
478 | { | |
479 | op = read_memory_unsigned_integer (pc + skip + 2, 1); | |
480 | switch (op) | |
481 | { | |
482 | case 0xdb: /* %ebx */ | |
483 | case 0xc9: /* %ecx */ | |
484 | case 0xd2: /* %edx */ | |
485 | skip += 2; | |
486 | break; | |
487 | default: | |
488 | return pc + 1; | |
489 | } | |
490 | ||
491 | op = read_memory_unsigned_integer (pc + skip + 1, 1); | |
492 | } | |
493 | ||
494 | /* Check for `movl %esp, %ebp' -- can be written in two ways. */ | |
acd5c798 | 495 | switch (op) |
c906108c SS |
496 | { |
497 | case 0x8b: | |
26604a34 | 498 | if (read_memory_unsigned_integer (pc + skip + 2, 1) != 0xec) |
acd5c798 | 499 | return pc + 1; |
c906108c SS |
500 | break; |
501 | case 0x89: | |
26604a34 | 502 | if (read_memory_unsigned_integer (pc + skip + 2, 1) != 0xe5) |
acd5c798 | 503 | return pc + 1; |
c906108c SS |
504 | break; |
505 | default: | |
acd5c798 | 506 | return pc + 1; |
c906108c | 507 | } |
acd5c798 | 508 | |
26604a34 MK |
509 | /* OK, we actually have a frame. We just don't know how large |
510 | it is yet. Set its size to zero. We'll adjust it if | |
511 | necessary. We also now commit to skipping the special | |
512 | instructions mentioned before. */ | |
acd5c798 | 513 | cache->locals = 0; |
26604a34 | 514 | pc += skip; |
acd5c798 MK |
515 | |
516 | /* If that's all, return now. */ | |
517 | if (current_pc <= pc + 3) | |
518 | return current_pc; | |
519 | ||
fc338970 MK |
520 | /* Check for stack adjustment |
521 | ||
acd5c798 | 522 | subl $XXX, %esp |
fc338970 MK |
523 | |
524 | NOTE: You can't subtract a 16 bit immediate from a 32 bit | |
525 | reg, so we don't have to worry about a data16 prefix. */ | |
acd5c798 | 526 | op = read_memory_unsigned_integer (pc + 3, 1); |
c906108c SS |
527 | if (op == 0x83) |
528 | { | |
fc338970 | 529 | /* `subl' with 8 bit immediate. */ |
acd5c798 | 530 | if (read_memory_unsigned_integer (pc + 4, 1) != 0xec) |
fc338970 | 531 | /* Some instruction starting with 0x83 other than `subl'. */ |
acd5c798 MK |
532 | return pc + 3; |
533 | ||
534 | /* `subl' with signed byte immediate (though it wouldn't make | |
535 | sense to be negative). */ | |
536 | cache->locals = read_memory_integer (pc + 5, 1); | |
537 | return pc + 6; | |
c906108c SS |
538 | } |
539 | else if (op == 0x81) | |
540 | { | |
fc338970 | 541 | /* Maybe it is `subl' with a 32 bit immedediate. */ |
acd5c798 | 542 | if (read_memory_unsigned_integer (pc + 4, 1) != 0xec) |
fc338970 | 543 | /* Some instruction starting with 0x81 other than `subl'. */ |
acd5c798 MK |
544 | return pc + 3; |
545 | ||
fc338970 | 546 | /* It is `subl' with a 32 bit immediate. */ |
acd5c798 MK |
547 | cache->locals = read_memory_integer (pc + 5, 4); |
548 | return pc + 9; | |
c906108c SS |
549 | } |
550 | else | |
551 | { | |
acd5c798 MK |
552 | /* Some instruction other than `subl'. */ |
553 | return pc + 3; | |
c906108c SS |
554 | } |
555 | } | |
acd5c798 | 556 | else if (op == 0xc8) /* enter $XXX */ |
c906108c | 557 | { |
acd5c798 MK |
558 | cache->locals = read_memory_unsigned_integer (pc + 1, 2); |
559 | return pc + 4; | |
c906108c | 560 | } |
21d0e8a4 | 561 | |
acd5c798 | 562 | return pc; |
21d0e8a4 MK |
563 | } |
564 | ||
acd5c798 MK |
565 | /* Check whether PC points at code that saves registers on the stack. |
566 | If so, it updates CACHE and returns the address of the first | |
567 | instruction after the register saves or CURRENT_PC, whichever is | |
568 | smaller. Otherwise, return PC. */ | |
6bff26de MK |
569 | |
570 | static CORE_ADDR | |
acd5c798 MK |
571 | i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc, |
572 | struct i386_frame_cache *cache) | |
6bff26de | 573 | { |
99ab4326 MK |
574 | CORE_ADDR offset = 0; |
575 | unsigned char op; | |
576 | int i; | |
c0d1d883 | 577 | |
99ab4326 MK |
578 | if (cache->locals > 0) |
579 | offset -= cache->locals; | |
580 | for (i = 0; i < 8 && pc < current_pc; i++) | |
581 | { | |
582 | op = read_memory_unsigned_integer (pc, 1); | |
583 | if (op < 0x50 || op > 0x57) | |
584 | break; | |
0d17c81d | 585 | |
99ab4326 MK |
586 | offset -= 4; |
587 | cache->saved_regs[op - 0x50] = offset; | |
588 | cache->sp_offset += 4; | |
589 | pc++; | |
6bff26de MK |
590 | } |
591 | ||
acd5c798 | 592 | return pc; |
22797942 AC |
593 | } |
594 | ||
acd5c798 MK |
595 | /* Do a full analysis of the prologue at PC and update CACHE |
596 | accordingly. Bail out early if CURRENT_PC is reached. Return the | |
597 | address where the analysis stopped. | |
ed84f6c1 | 598 | |
fc338970 MK |
599 | We handle these cases: |
600 | ||
601 | The startup sequence can be at the start of the function, or the | |
602 | function can start with a branch to startup code at the end. | |
603 | ||
604 | %ebp can be set up with either the 'enter' instruction, or "pushl | |
605 | %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was | |
606 | once used in the System V compiler). | |
607 | ||
608 | Local space is allocated just below the saved %ebp by either the | |
609 | 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16 | |
610 | bit unsigned argument for space to allocate, and the 'addl' | |
611 | instruction could have either a signed byte, or 32 bit immediate. | |
612 | ||
613 | Next, the registers used by this function are pushed. With the | |
614 | System V compiler they will always be in the order: %edi, %esi, | |
615 | %ebx (and sometimes a harmless bug causes it to also save but not | |
616 | restore %eax); however, the code below is willing to see the pushes | |
617 | in any order, and will handle up to 8 of them. | |
618 | ||
619 | If the setup sequence is at the end of the function, then the next | |
620 | instruction will be a branch back to the start. */ | |
c906108c | 621 | |
acd5c798 MK |
622 | static CORE_ADDR |
623 | i386_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc, | |
624 | struct i386_frame_cache *cache) | |
c906108c | 625 | { |
acd5c798 MK |
626 | pc = i386_follow_jump (pc); |
627 | pc = i386_analyze_struct_return (pc, current_pc, cache); | |
628 | pc = i386_skip_probe (pc); | |
629 | pc = i386_analyze_frame_setup (pc, current_pc, cache); | |
630 | return i386_analyze_register_saves (pc, current_pc, cache); | |
c906108c SS |
631 | } |
632 | ||
fc338970 | 633 | /* Return PC of first real instruction. */ |
c906108c | 634 | |
3a1e71e3 | 635 | static CORE_ADDR |
acd5c798 | 636 | i386_skip_prologue (CORE_ADDR start_pc) |
c906108c | 637 | { |
c5aa993b | 638 | static unsigned char pic_pat[6] = |
acd5c798 MK |
639 | { |
640 | 0xe8, 0, 0, 0, 0, /* call 0x0 */ | |
641 | 0x5b, /* popl %ebx */ | |
c5aa993b | 642 | }; |
acd5c798 MK |
643 | struct i386_frame_cache cache; |
644 | CORE_ADDR pc; | |
645 | unsigned char op; | |
646 | int i; | |
c5aa993b | 647 | |
acd5c798 MK |
648 | cache.locals = -1; |
649 | pc = i386_analyze_prologue (start_pc, 0xffffffff, &cache); | |
650 | if (cache.locals < 0) | |
651 | return start_pc; | |
c5aa993b | 652 | |
acd5c798 | 653 | /* Found valid frame setup. */ |
c906108c | 654 | |
fc338970 MK |
655 | /* The native cc on SVR4 in -K PIC mode inserts the following code |
656 | to get the address of the global offset table (GOT) into register | |
acd5c798 MK |
657 | %ebx: |
658 | ||
fc338970 MK |
659 | call 0x0 |
660 | popl %ebx | |
661 | movl %ebx,x(%ebp) (optional) | |
662 | addl y,%ebx | |
663 | ||
c906108c SS |
664 | This code is with the rest of the prologue (at the end of the |
665 | function), so we have to skip it to get to the first real | |
666 | instruction at the start of the function. */ | |
c5aa993b | 667 | |
c906108c SS |
668 | for (i = 0; i < 6; i++) |
669 | { | |
acd5c798 | 670 | op = read_memory_unsigned_integer (pc + i, 1); |
c5aa993b | 671 | if (pic_pat[i] != op) |
c906108c SS |
672 | break; |
673 | } | |
674 | if (i == 6) | |
675 | { | |
acd5c798 MK |
676 | int delta = 6; |
677 | ||
678 | op = read_memory_unsigned_integer (pc + delta, 1); | |
c906108c | 679 | |
c5aa993b | 680 | if (op == 0x89) /* movl %ebx, x(%ebp) */ |
c906108c | 681 | { |
acd5c798 MK |
682 | op = read_memory_unsigned_integer (pc + delta + 1, 1); |
683 | ||
fc338970 | 684 | if (op == 0x5d) /* One byte offset from %ebp. */ |
acd5c798 | 685 | delta += 3; |
fc338970 | 686 | else if (op == 0x9d) /* Four byte offset from %ebp. */ |
acd5c798 | 687 | delta += 6; |
fc338970 | 688 | else /* Unexpected instruction. */ |
acd5c798 MK |
689 | delta = 0; |
690 | ||
691 | op = read_memory_unsigned_integer (pc + delta, 1); | |
c906108c | 692 | } |
acd5c798 | 693 | |
c5aa993b | 694 | /* addl y,%ebx */ |
acd5c798 MK |
695 | if (delta > 0 && op == 0x81 |
696 | && read_memory_unsigned_integer (pc + delta + 1, 1) == 0xc3); | |
c906108c | 697 | { |
acd5c798 | 698 | pc += delta + 6; |
c906108c SS |
699 | } |
700 | } | |
c5aa993b | 701 | |
acd5c798 | 702 | return i386_follow_jump (pc); |
c906108c SS |
703 | } |
704 | ||
acd5c798 | 705 | /* This function is 64-bit safe. */ |
93924b6b | 706 | |
acd5c798 MK |
707 | static CORE_ADDR |
708 | i386_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
93924b6b | 709 | { |
acd5c798 MK |
710 | char buf[8]; |
711 | ||
712 | frame_unwind_register (next_frame, PC_REGNUM, buf); | |
713 | return extract_typed_address (buf, builtin_type_void_func_ptr); | |
93924b6b | 714 | } |
acd5c798 | 715 | \f |
93924b6b | 716 | |
acd5c798 | 717 | /* Normal frames. */ |
c5aa993b | 718 | |
acd5c798 MK |
719 | static struct i386_frame_cache * |
720 | i386_frame_cache (struct frame_info *next_frame, void **this_cache) | |
a7769679 | 721 | { |
acd5c798 | 722 | struct i386_frame_cache *cache; |
c0d1d883 | 723 | char buf[4]; |
acd5c798 MK |
724 | int i; |
725 | ||
726 | if (*this_cache) | |
727 | return *this_cache; | |
728 | ||
fd13a04a | 729 | cache = i386_alloc_frame_cache (); |
acd5c798 MK |
730 | *this_cache = cache; |
731 | ||
732 | /* In principle, for normal frames, %ebp holds the frame pointer, | |
733 | which holds the base address for the current stack frame. | |
734 | However, for functions that don't need it, the frame pointer is | |
735 | optional. For these "frameless" functions the frame pointer is | |
736 | actually the frame pointer of the calling frame. Signal | |
737 | trampolines are just a special case of a "frameless" function. | |
738 | They (usually) share their frame pointer with the frame that was | |
739 | in progress when the signal occurred. */ | |
740 | ||
741 | frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); | |
742 | cache->base = extract_unsigned_integer (buf, 4); | |
743 | if (cache->base == 0) | |
744 | return cache; | |
745 | ||
746 | /* For normal frames, %eip is stored at 4(%ebp). */ | |
fd13a04a | 747 | cache->saved_regs[I386_EIP_REGNUM] = 4; |
acd5c798 MK |
748 | |
749 | cache->pc = frame_func_unwind (next_frame); | |
750 | if (cache->pc != 0) | |
751 | i386_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache); | |
752 | ||
753 | if (cache->locals < 0) | |
754 | { | |
755 | /* We didn't find a valid frame, which means that CACHE->base | |
756 | currently holds the frame pointer for our calling frame. If | |
757 | we're at the start of a function, or somewhere half-way its | |
758 | prologue, the function's frame probably hasn't been fully | |
759 | setup yet. Try to reconstruct the base address for the stack | |
760 | frame by looking at the stack pointer. For truly "frameless" | |
761 | functions this might work too. */ | |
762 | ||
763 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); | |
764 | cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset; | |
765 | } | |
766 | ||
767 | /* Now that we have the base address for the stack frame we can | |
768 | calculate the value of %esp in the calling frame. */ | |
769 | cache->saved_sp = cache->base + 8; | |
a7769679 | 770 | |
acd5c798 MK |
771 | /* Adjust all the saved registers such that they contain addresses |
772 | instead of offsets. */ | |
773 | for (i = 0; i < I386_NUM_SAVED_REGS; i++) | |
fd13a04a AC |
774 | if (cache->saved_regs[i] != -1) |
775 | cache->saved_regs[i] += cache->base; | |
acd5c798 MK |
776 | |
777 | return cache; | |
a7769679 MK |
778 | } |
779 | ||
3a1e71e3 | 780 | static void |
acd5c798 MK |
781 | i386_frame_this_id (struct frame_info *next_frame, void **this_cache, |
782 | struct frame_id *this_id) | |
c906108c | 783 | { |
acd5c798 MK |
784 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); |
785 | ||
786 | /* This marks the outermost frame. */ | |
787 | if (cache->base == 0) | |
788 | return; | |
789 | ||
3e210248 | 790 | /* See the end of i386_push_dummy_call. */ |
acd5c798 MK |
791 | (*this_id) = frame_id_build (cache->base + 8, cache->pc); |
792 | } | |
793 | ||
794 | static void | |
795 | i386_frame_prev_register (struct frame_info *next_frame, void **this_cache, | |
796 | int regnum, int *optimizedp, | |
797 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
798 | int *realnump, void *valuep) | |
799 | { | |
800 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); | |
801 | ||
802 | gdb_assert (regnum >= 0); | |
803 | ||
804 | /* The System V ABI says that: | |
805 | ||
806 | "The flags register contains the system flags, such as the | |
807 | direction flag and the carry flag. The direction flag must be | |
808 | set to the forward (that is, zero) direction before entry and | |
809 | upon exit from a function. Other user flags have no specified | |
810 | role in the standard calling sequence and are not preserved." | |
811 | ||
812 | To guarantee the "upon exit" part of that statement we fake a | |
813 | saved flags register that has its direction flag cleared. | |
814 | ||
815 | Note that GCC doesn't seem to rely on the fact that the direction | |
816 | flag is cleared after a function return; it always explicitly | |
817 | clears the flag before operations where it matters. | |
818 | ||
819 | FIXME: kettenis/20030316: I'm not quite sure whether this is the | |
820 | right thing to do. The way we fake the flags register here makes | |
821 | it impossible to change it. */ | |
822 | ||
823 | if (regnum == I386_EFLAGS_REGNUM) | |
824 | { | |
825 | *optimizedp = 0; | |
826 | *lvalp = not_lval; | |
827 | *addrp = 0; | |
828 | *realnump = -1; | |
829 | if (valuep) | |
830 | { | |
831 | ULONGEST val; | |
c5aa993b | 832 | |
acd5c798 | 833 | /* Clear the direction flag. */ |
f837910f MK |
834 | val = frame_unwind_register_unsigned (next_frame, |
835 | I386_EFLAGS_REGNUM); | |
acd5c798 MK |
836 | val &= ~(1 << 10); |
837 | store_unsigned_integer (valuep, 4, val); | |
838 | } | |
839 | ||
840 | return; | |
841 | } | |
1211c4e4 | 842 | |
acd5c798 | 843 | if (regnum == I386_EIP_REGNUM && cache->pc_in_eax) |
c906108c | 844 | { |
acd5c798 MK |
845 | frame_register_unwind (next_frame, I386_EAX_REGNUM, |
846 | optimizedp, lvalp, addrp, realnump, valuep); | |
847 | return; | |
848 | } | |
849 | ||
850 | if (regnum == I386_ESP_REGNUM && cache->saved_sp) | |
851 | { | |
852 | *optimizedp = 0; | |
853 | *lvalp = not_lval; | |
854 | *addrp = 0; | |
855 | *realnump = -1; | |
856 | if (valuep) | |
c906108c | 857 | { |
acd5c798 MK |
858 | /* Store the value. */ |
859 | store_unsigned_integer (valuep, 4, cache->saved_sp); | |
c906108c | 860 | } |
acd5c798 | 861 | return; |
c906108c | 862 | } |
acd5c798 | 863 | |
fd13a04a AC |
864 | if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1) |
865 | { | |
866 | *optimizedp = 0; | |
867 | *lvalp = lval_memory; | |
868 | *addrp = cache->saved_regs[regnum]; | |
869 | *realnump = -1; | |
870 | if (valuep) | |
871 | { | |
872 | /* Read the value in from memory. */ | |
873 | read_memory (*addrp, valuep, | |
874 | register_size (current_gdbarch, regnum)); | |
875 | } | |
876 | return; | |
877 | } | |
878 | ||
879 | frame_register_unwind (next_frame, regnum, | |
880 | optimizedp, lvalp, addrp, realnump, valuep); | |
acd5c798 MK |
881 | } |
882 | ||
883 | static const struct frame_unwind i386_frame_unwind = | |
884 | { | |
885 | NORMAL_FRAME, | |
886 | i386_frame_this_id, | |
887 | i386_frame_prev_register | |
888 | }; | |
889 | ||
890 | static const struct frame_unwind * | |
336d1bba | 891 | i386_frame_sniffer (struct frame_info *next_frame) |
acd5c798 MK |
892 | { |
893 | return &i386_frame_unwind; | |
894 | } | |
895 | \f | |
896 | ||
897 | /* Signal trampolines. */ | |
898 | ||
899 | static struct i386_frame_cache * | |
900 | i386_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache) | |
901 | { | |
902 | struct i386_frame_cache *cache; | |
903 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
904 | CORE_ADDR addr; | |
905 | char buf[4]; | |
906 | ||
907 | if (*this_cache) | |
908 | return *this_cache; | |
909 | ||
fd13a04a | 910 | cache = i386_alloc_frame_cache (); |
acd5c798 MK |
911 | |
912 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); | |
913 | cache->base = extract_unsigned_integer (buf, 4) - 4; | |
914 | ||
915 | addr = tdep->sigcontext_addr (next_frame); | |
a3386186 MK |
916 | if (tdep->sc_reg_offset) |
917 | { | |
918 | int i; | |
919 | ||
920 | gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS); | |
921 | ||
922 | for (i = 0; i < tdep->sc_num_regs; i++) | |
923 | if (tdep->sc_reg_offset[i] != -1) | |
fd13a04a | 924 | cache->saved_regs[i] = addr + tdep->sc_reg_offset[i]; |
a3386186 MK |
925 | } |
926 | else | |
927 | { | |
fd13a04a AC |
928 | cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset; |
929 | cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset; | |
a3386186 | 930 | } |
acd5c798 MK |
931 | |
932 | *this_cache = cache; | |
933 | return cache; | |
934 | } | |
935 | ||
936 | static void | |
937 | i386_sigtramp_frame_this_id (struct frame_info *next_frame, void **this_cache, | |
938 | struct frame_id *this_id) | |
939 | { | |
940 | struct i386_frame_cache *cache = | |
941 | i386_sigtramp_frame_cache (next_frame, this_cache); | |
942 | ||
3e210248 | 943 | /* See the end of i386_push_dummy_call. */ |
acd5c798 MK |
944 | (*this_id) = frame_id_build (cache->base + 8, frame_pc_unwind (next_frame)); |
945 | } | |
946 | ||
947 | static void | |
948 | i386_sigtramp_frame_prev_register (struct frame_info *next_frame, | |
949 | void **this_cache, | |
950 | int regnum, int *optimizedp, | |
951 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
952 | int *realnump, void *valuep) | |
953 | { | |
954 | /* Make sure we've initialized the cache. */ | |
955 | i386_sigtramp_frame_cache (next_frame, this_cache); | |
956 | ||
957 | i386_frame_prev_register (next_frame, this_cache, regnum, | |
958 | optimizedp, lvalp, addrp, realnump, valuep); | |
c906108c | 959 | } |
c0d1d883 | 960 | |
acd5c798 MK |
961 | static const struct frame_unwind i386_sigtramp_frame_unwind = |
962 | { | |
963 | SIGTRAMP_FRAME, | |
964 | i386_sigtramp_frame_this_id, | |
965 | i386_sigtramp_frame_prev_register | |
966 | }; | |
967 | ||
968 | static const struct frame_unwind * | |
336d1bba | 969 | i386_sigtramp_frame_sniffer (struct frame_info *next_frame) |
acd5c798 | 970 | { |
336d1bba | 971 | CORE_ADDR pc = frame_pc_unwind (next_frame); |
acd5c798 MK |
972 | char *name; |
973 | ||
1c3545ae MK |
974 | /* We shouldn't even bother to try if the OSABI didn't register |
975 | a sigcontext_addr handler. */ | |
976 | if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr) | |
977 | return NULL; | |
978 | ||
acd5c798 MK |
979 | find_pc_partial_function (pc, &name, NULL, NULL); |
980 | if (PC_IN_SIGTRAMP (pc, name)) | |
981 | return &i386_sigtramp_frame_unwind; | |
982 | ||
983 | return NULL; | |
984 | } | |
985 | \f | |
986 | ||
987 | static CORE_ADDR | |
988 | i386_frame_base_address (struct frame_info *next_frame, void **this_cache) | |
989 | { | |
990 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); | |
991 | ||
992 | return cache->base; | |
993 | } | |
994 | ||
995 | static const struct frame_base i386_frame_base = | |
996 | { | |
997 | &i386_frame_unwind, | |
998 | i386_frame_base_address, | |
999 | i386_frame_base_address, | |
1000 | i386_frame_base_address | |
1001 | }; | |
1002 | ||
acd5c798 MK |
1003 | static struct frame_id |
1004 | i386_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
1005 | { | |
1006 | char buf[4]; | |
1007 | CORE_ADDR fp; | |
1008 | ||
1009 | frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); | |
1010 | fp = extract_unsigned_integer (buf, 4); | |
1011 | ||
3e210248 | 1012 | /* See the end of i386_push_dummy_call. */ |
acd5c798 | 1013 | return frame_id_build (fp + 8, frame_pc_unwind (next_frame)); |
c0d1d883 | 1014 | } |
fc338970 | 1015 | \f |
c906108c | 1016 | |
fc338970 MK |
1017 | /* Figure out where the longjmp will land. Slurp the args out of the |
1018 | stack. We expect the first arg to be a pointer to the jmp_buf | |
8201327c | 1019 | structure from which we extract the address that we will land at. |
28bcfd30 | 1020 | This address is copied into PC. This routine returns non-zero on |
acd5c798 MK |
1021 | success. |
1022 | ||
1023 | This function is 64-bit safe. */ | |
c906108c | 1024 | |
8201327c MK |
1025 | static int |
1026 | i386_get_longjmp_target (CORE_ADDR *pc) | |
c906108c | 1027 | { |
28bcfd30 | 1028 | char buf[8]; |
c906108c | 1029 | CORE_ADDR sp, jb_addr; |
8201327c | 1030 | int jb_pc_offset = gdbarch_tdep (current_gdbarch)->jb_pc_offset; |
f9d3c2a8 | 1031 | int len = TYPE_LENGTH (builtin_type_void_func_ptr); |
c906108c | 1032 | |
8201327c MK |
1033 | /* If JB_PC_OFFSET is -1, we have no way to find out where the |
1034 | longjmp will land. */ | |
1035 | if (jb_pc_offset == -1) | |
c906108c SS |
1036 | return 0; |
1037 | ||
f837910f MK |
1038 | /* Don't use I386_ESP_REGNUM here, since this function is also used |
1039 | for AMD64. */ | |
1040 | regcache_cooked_read (current_regcache, SP_REGNUM, buf); | |
1041 | sp = extract_typed_address (buf, builtin_type_void_data_ptr); | |
28bcfd30 | 1042 | if (target_read_memory (sp + len, buf, len)) |
c906108c SS |
1043 | return 0; |
1044 | ||
f837910f | 1045 | jb_addr = extract_typed_address (buf, builtin_type_void_data_ptr); |
28bcfd30 | 1046 | if (target_read_memory (jb_addr + jb_pc_offset, buf, len)) |
8201327c | 1047 | return 0; |
c906108c | 1048 | |
f9d3c2a8 | 1049 | *pc = extract_typed_address (buf, builtin_type_void_func_ptr); |
c906108c SS |
1050 | return 1; |
1051 | } | |
fc338970 | 1052 | \f |
c906108c | 1053 | |
3a1e71e3 | 1054 | static CORE_ADDR |
6a65450a AC |
1055 | i386_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, |
1056 | struct regcache *regcache, CORE_ADDR bp_addr, int nargs, | |
1057 | struct value **args, CORE_ADDR sp, int struct_return, | |
1058 | CORE_ADDR struct_addr) | |
22f8ba57 | 1059 | { |
acd5c798 MK |
1060 | char buf[4]; |
1061 | int i; | |
1062 | ||
1063 | /* Push arguments in reverse order. */ | |
1064 | for (i = nargs - 1; i >= 0; i--) | |
22f8ba57 | 1065 | { |
acd5c798 MK |
1066 | int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args[i])); |
1067 | ||
1068 | /* The System V ABI says that: | |
1069 | ||
1070 | "An argument's size is increased, if necessary, to make it a | |
1071 | multiple of [32-bit] words. This may require tail padding, | |
1072 | depending on the size of the argument." | |
1073 | ||
1074 | This makes sure the stack says word-aligned. */ | |
1075 | sp -= (len + 3) & ~3; | |
1076 | write_memory (sp, VALUE_CONTENTS_ALL (args[i]), len); | |
1077 | } | |
22f8ba57 | 1078 | |
acd5c798 MK |
1079 | /* Push value address. */ |
1080 | if (struct_return) | |
1081 | { | |
22f8ba57 | 1082 | sp -= 4; |
fbd9dcd3 | 1083 | store_unsigned_integer (buf, 4, struct_addr); |
22f8ba57 MK |
1084 | write_memory (sp, buf, 4); |
1085 | } | |
1086 | ||
acd5c798 MK |
1087 | /* Store return address. */ |
1088 | sp -= 4; | |
6a65450a | 1089 | store_unsigned_integer (buf, 4, bp_addr); |
acd5c798 MK |
1090 | write_memory (sp, buf, 4); |
1091 | ||
1092 | /* Finally, update the stack pointer... */ | |
1093 | store_unsigned_integer (buf, 4, sp); | |
1094 | regcache_cooked_write (regcache, I386_ESP_REGNUM, buf); | |
1095 | ||
1096 | /* ...and fake a frame pointer. */ | |
1097 | regcache_cooked_write (regcache, I386_EBP_REGNUM, buf); | |
1098 | ||
3e210248 AC |
1099 | /* MarkK wrote: This "+ 8" is all over the place: |
1100 | (i386_frame_this_id, i386_sigtramp_frame_this_id, | |
1101 | i386_unwind_dummy_id). It's there, since all frame unwinders for | |
1102 | a given target have to agree (within a certain margin) on the | |
1103 | defenition of the stack address of a frame. Otherwise | |
1104 | frame_id_inner() won't work correctly. Since DWARF2/GCC uses the | |
1105 | stack address *before* the function call as a frame's CFA. On | |
1106 | the i386, when %ebp is used as a frame pointer, the offset | |
1107 | between the contents %ebp and the CFA as defined by GCC. */ | |
1108 | return sp + 8; | |
22f8ba57 MK |
1109 | } |
1110 | ||
1a309862 MK |
1111 | /* These registers are used for returning integers (and on some |
1112 | targets also for returning `struct' and `union' values when their | |
ef9dff19 | 1113 | size and alignment match an integer type). */ |
acd5c798 MK |
1114 | #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */ |
1115 | #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */ | |
1a309862 MK |
1116 | |
1117 | /* Extract from an array REGBUF containing the (raw) register state, a | |
1118 | function return value of TYPE, and copy that, in virtual format, | |
1119 | into VALBUF. */ | |
1120 | ||
3a1e71e3 | 1121 | static void |
00f8375e | 1122 | i386_extract_return_value (struct type *type, struct regcache *regcache, |
ebba8386 | 1123 | void *dst) |
c906108c | 1124 | { |
ebba8386 | 1125 | bfd_byte *valbuf = dst; |
1a309862 | 1126 | int len = TYPE_LENGTH (type); |
00f8375e | 1127 | char buf[I386_MAX_REGISTER_SIZE]; |
1a309862 | 1128 | |
1e8d0a7b MK |
1129 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1130 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 | 1131 | { |
00f8375e | 1132 | i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); |
3df1b9b4 MK |
1133 | return; |
1134 | } | |
1e8d0a7b MK |
1135 | |
1136 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
c906108c | 1137 | { |
94ea66b3 | 1138 | if (FP0_REGNUM < 0) |
1a309862 MK |
1139 | { |
1140 | warning ("Cannot find floating-point return value."); | |
1141 | memset (valbuf, 0, len); | |
ef9dff19 | 1142 | return; |
1a309862 MK |
1143 | } |
1144 | ||
c6ba6f0d MK |
1145 | /* Floating-point return values can be found in %st(0). Convert |
1146 | its contents to the desired type. This is probably not | |
1147 | exactly how it would happen on the target itself, but it is | |
1148 | the best we can do. */ | |
acd5c798 | 1149 | regcache_raw_read (regcache, I386_ST0_REGNUM, buf); |
00f8375e | 1150 | convert_typed_floating (buf, builtin_type_i387_ext, valbuf, type); |
c906108c SS |
1151 | } |
1152 | else | |
c5aa993b | 1153 | { |
f837910f MK |
1154 | int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM); |
1155 | int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM); | |
d4f3574e SS |
1156 | |
1157 | if (len <= low_size) | |
00f8375e | 1158 | { |
0818c12a | 1159 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e MK |
1160 | memcpy (valbuf, buf, len); |
1161 | } | |
d4f3574e SS |
1162 | else if (len <= (low_size + high_size)) |
1163 | { | |
0818c12a | 1164 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e | 1165 | memcpy (valbuf, buf, low_size); |
0818c12a | 1166 | regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf); |
00f8375e | 1167 | memcpy (valbuf + low_size, buf, len - low_size); |
d4f3574e SS |
1168 | } |
1169 | else | |
8e65ff28 AC |
1170 | internal_error (__FILE__, __LINE__, |
1171 | "Cannot extract return value of %d bytes long.", len); | |
c906108c SS |
1172 | } |
1173 | } | |
1174 | ||
ef9dff19 MK |
1175 | /* Write into the appropriate registers a function return value stored |
1176 | in VALBUF of type TYPE, given in virtual format. */ | |
1177 | ||
3a1e71e3 | 1178 | static void |
3d7f4f49 MK |
1179 | i386_store_return_value (struct type *type, struct regcache *regcache, |
1180 | const void *valbuf) | |
ef9dff19 MK |
1181 | { |
1182 | int len = TYPE_LENGTH (type); | |
1183 | ||
1e8d0a7b MK |
1184 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1185 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 | 1186 | { |
3d7f4f49 | 1187 | i386_store_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); |
3df1b9b4 MK |
1188 | return; |
1189 | } | |
1e8d0a7b MK |
1190 | |
1191 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
ef9dff19 | 1192 | { |
3d7f4f49 | 1193 | ULONGEST fstat; |
c6ba6f0d | 1194 | char buf[FPU_REG_RAW_SIZE]; |
ccb945b8 | 1195 | |
94ea66b3 | 1196 | if (FP0_REGNUM < 0) |
ef9dff19 MK |
1197 | { |
1198 | warning ("Cannot set floating-point return value."); | |
1199 | return; | |
1200 | } | |
1201 | ||
635b0cc1 MK |
1202 | /* Returning floating-point values is a bit tricky. Apart from |
1203 | storing the return value in %st(0), we have to simulate the | |
1204 | state of the FPU at function return point. */ | |
1205 | ||
c6ba6f0d MK |
1206 | /* Convert the value found in VALBUF to the extended |
1207 | floating-point format used by the FPU. This is probably | |
1208 | not exactly how it would happen on the target itself, but | |
1209 | it is the best we can do. */ | |
1210 | convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext); | |
acd5c798 | 1211 | regcache_raw_write (regcache, I386_ST0_REGNUM, buf); |
ccb945b8 | 1212 | |
635b0cc1 MK |
1213 | /* Set the top of the floating-point register stack to 7. The |
1214 | actual value doesn't really matter, but 7 is what a normal | |
1215 | function return would end up with if the program started out | |
1216 | with a freshly initialized FPU. */ | |
3d7f4f49 | 1217 | regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat); |
ccb945b8 | 1218 | fstat |= (7 << 11); |
3d7f4f49 | 1219 | regcache_raw_write_unsigned (regcache, FSTAT_REGNUM, fstat); |
ccb945b8 | 1220 | |
635b0cc1 MK |
1221 | /* Mark %st(1) through %st(7) as empty. Since we set the top of |
1222 | the floating-point register stack to 7, the appropriate value | |
1223 | for the tag word is 0x3fff. */ | |
3d7f4f49 | 1224 | regcache_raw_write_unsigned (regcache, FTAG_REGNUM, 0x3fff); |
ef9dff19 MK |
1225 | } |
1226 | else | |
1227 | { | |
f837910f MK |
1228 | int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM); |
1229 | int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM); | |
ef9dff19 MK |
1230 | |
1231 | if (len <= low_size) | |
3d7f4f49 | 1232 | regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf); |
ef9dff19 MK |
1233 | else if (len <= (low_size + high_size)) |
1234 | { | |
3d7f4f49 MK |
1235 | regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf); |
1236 | regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0, | |
1237 | len - low_size, (char *) valbuf + low_size); | |
ef9dff19 MK |
1238 | } |
1239 | else | |
8e65ff28 AC |
1240 | internal_error (__FILE__, __LINE__, |
1241 | "Cannot store return value of %d bytes long.", len); | |
ef9dff19 MK |
1242 | } |
1243 | } | |
f7af9647 | 1244 | |
751f1375 MK |
1245 | /* Extract from REGCACHE, which contains the (raw) register state, the |
1246 | address in which a function should return its structure value, as a | |
1247 | CORE_ADDR. */ | |
f7af9647 | 1248 | |
3a1e71e3 | 1249 | static CORE_ADDR |
00f8375e | 1250 | i386_extract_struct_value_address (struct regcache *regcache) |
f7af9647 | 1251 | { |
acd5c798 | 1252 | char buf[4]; |
751f1375 | 1253 | |
acd5c798 MK |
1254 | regcache_cooked_read (regcache, I386_EAX_REGNUM, buf); |
1255 | return extract_unsigned_integer (buf, 4); | |
f7af9647 | 1256 | } |
fc338970 | 1257 | \f |
ef9dff19 | 1258 | |
8201327c MK |
1259 | /* This is the variable that is set with "set struct-convention", and |
1260 | its legitimate values. */ | |
1261 | static const char default_struct_convention[] = "default"; | |
1262 | static const char pcc_struct_convention[] = "pcc"; | |
1263 | static const char reg_struct_convention[] = "reg"; | |
1264 | static const char *valid_conventions[] = | |
1265 | { | |
1266 | default_struct_convention, | |
1267 | pcc_struct_convention, | |
1268 | reg_struct_convention, | |
1269 | NULL | |
1270 | }; | |
1271 | static const char *struct_convention = default_struct_convention; | |
1272 | ||
1273 | static int | |
1274 | i386_use_struct_convention (int gcc_p, struct type *type) | |
1275 | { | |
1276 | enum struct_return struct_return; | |
1277 | ||
1278 | if (struct_convention == default_struct_convention) | |
1279 | struct_return = gdbarch_tdep (current_gdbarch)->struct_return; | |
1280 | else if (struct_convention == pcc_struct_convention) | |
1281 | struct_return = pcc_struct_return; | |
1282 | else | |
1283 | struct_return = reg_struct_return; | |
1284 | ||
1285 | return generic_use_struct_convention (struct_return == reg_struct_return, | |
1286 | type); | |
1287 | } | |
1288 | \f | |
1289 | ||
d7a0d72c MK |
1290 | /* Return the GDB type object for the "standard" data type of data in |
1291 | register REGNUM. Perhaps %esi and %edi should go here, but | |
1292 | potentially they could be used for things other than address. */ | |
1293 | ||
3a1e71e3 | 1294 | static struct type * |
4e259f09 | 1295 | i386_register_type (struct gdbarch *gdbarch, int regnum) |
d7a0d72c | 1296 | { |
acd5c798 MK |
1297 | if (regnum == I386_EIP_REGNUM |
1298 | || regnum == I386_EBP_REGNUM || regnum == I386_ESP_REGNUM) | |
d7a0d72c MK |
1299 | return lookup_pointer_type (builtin_type_void); |
1300 | ||
23a34459 | 1301 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1302 | return builtin_type_i387_ext; |
d7a0d72c | 1303 | |
23a34459 | 1304 | if (i386_sse_regnum_p (regnum)) |
3139facc | 1305 | return builtin_type_vec128i; |
d7a0d72c | 1306 | |
23a34459 | 1307 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 AC |
1308 | return builtin_type_vec64i; |
1309 | ||
d7a0d72c MK |
1310 | return builtin_type_int; |
1311 | } | |
1312 | ||
28fc6740 | 1313 | /* Map a cooked register onto a raw register or memory. For the i386, |
acd5c798 | 1314 | the MMX registers need to be mapped onto floating point registers. */ |
28fc6740 AC |
1315 | |
1316 | static int | |
c86c27af | 1317 | i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum) |
28fc6740 AC |
1318 | { |
1319 | int mmxi; | |
1320 | ULONGEST fstat; | |
1321 | int tos; | |
1322 | int fpi; | |
c86c27af | 1323 | |
28fc6740 AC |
1324 | mmxi = regnum - MM0_REGNUM; |
1325 | regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat); | |
1326 | tos = (fstat >> 11) & 0x7; | |
1327 | fpi = (mmxi + tos) % 8; | |
c86c27af | 1328 | |
28fc6740 AC |
1329 | return (FP0_REGNUM + fpi); |
1330 | } | |
1331 | ||
1332 | static void | |
1333 | i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, | |
1334 | int regnum, void *buf) | |
1335 | { | |
23a34459 | 1336 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 | 1337 | { |
d9d9c31f | 1338 | char mmx_buf[MAX_REGISTER_SIZE]; |
c86c27af MK |
1339 | int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); |
1340 | ||
28fc6740 | 1341 | /* Extract (always little endian). */ |
c86c27af | 1342 | regcache_raw_read (regcache, fpnum, mmx_buf); |
f837910f | 1343 | memcpy (buf, mmx_buf, register_size (gdbarch, regnum)); |
28fc6740 AC |
1344 | } |
1345 | else | |
1346 | regcache_raw_read (regcache, regnum, buf); | |
1347 | } | |
1348 | ||
1349 | static void | |
1350 | i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
1351 | int regnum, const void *buf) | |
1352 | { | |
23a34459 | 1353 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 | 1354 | { |
d9d9c31f | 1355 | char mmx_buf[MAX_REGISTER_SIZE]; |
c86c27af MK |
1356 | int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); |
1357 | ||
28fc6740 AC |
1358 | /* Read ... */ |
1359 | regcache_raw_read (regcache, fpnum, mmx_buf); | |
1360 | /* ... Modify ... (always little endian). */ | |
f837910f | 1361 | memcpy (mmx_buf, buf, register_size (gdbarch, regnum)); |
28fc6740 AC |
1362 | /* ... Write. */ |
1363 | regcache_raw_write (regcache, fpnum, mmx_buf); | |
1364 | } | |
1365 | else | |
1366 | regcache_raw_write (regcache, regnum, buf); | |
1367 | } | |
ff2e87ac AC |
1368 | \f |
1369 | ||
1370 | /* These registers don't have pervasive standard uses. Move them to | |
1371 | i386-tdep.h if necessary. */ | |
1372 | ||
1373 | #define I386_EBX_REGNUM 3 /* %ebx */ | |
1374 | #define I386_ECX_REGNUM 1 /* %ecx */ | |
1375 | #define I386_ESI_REGNUM 6 /* %esi */ | |
1376 | #define I386_EDI_REGNUM 7 /* %edi */ | |
1377 | ||
1378 | /* Return the register number of the register allocated by GCC after | |
1379 | REGNUM, or -1 if there is no such register. */ | |
1380 | ||
1381 | static int | |
1382 | i386_next_regnum (int regnum) | |
1383 | { | |
1384 | /* GCC allocates the registers in the order: | |
1385 | ||
1386 | %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ... | |
1387 | ||
1388 | Since storing a variable in %esp doesn't make any sense we return | |
1389 | -1 for %ebp and for %esp itself. */ | |
1390 | static int next_regnum[] = | |
1391 | { | |
1392 | I386_EDX_REGNUM, /* Slot for %eax. */ | |
1393 | I386_EBX_REGNUM, /* Slot for %ecx. */ | |
1394 | I386_ECX_REGNUM, /* Slot for %edx. */ | |
1395 | I386_ESI_REGNUM, /* Slot for %ebx. */ | |
1396 | -1, -1, /* Slots for %esp and %ebp. */ | |
1397 | I386_EDI_REGNUM, /* Slot for %esi. */ | |
1398 | I386_EBP_REGNUM /* Slot for %edi. */ | |
1399 | }; | |
1400 | ||
de5b9bb9 | 1401 | if (regnum >= 0 && regnum < sizeof (next_regnum) / sizeof (next_regnum[0])) |
ff2e87ac | 1402 | return next_regnum[regnum]; |
28fc6740 | 1403 | |
ff2e87ac AC |
1404 | return -1; |
1405 | } | |
1406 | ||
1407 | /* Return nonzero if a value of type TYPE stored in register REGNUM | |
1408 | needs any special handling. */ | |
d7a0d72c | 1409 | |
3a1e71e3 | 1410 | static int |
ff2e87ac | 1411 | i386_convert_register_p (int regnum, struct type *type) |
d7a0d72c | 1412 | { |
de5b9bb9 MK |
1413 | int len = TYPE_LENGTH (type); |
1414 | ||
ff2e87ac AC |
1415 | /* Values may be spread across multiple registers. Most debugging |
1416 | formats aren't expressive enough to specify the locations, so | |
1417 | some heuristics is involved. Right now we only handle types that | |
de5b9bb9 MK |
1418 | have a length that is a multiple of the word size, since GCC |
1419 | doesn't seem to put any other types into registers. */ | |
1420 | if (len > 4 && len % 4 == 0) | |
1421 | { | |
1422 | int last_regnum = regnum; | |
1423 | ||
1424 | while (len > 4) | |
1425 | { | |
1426 | last_regnum = i386_next_regnum (last_regnum); | |
1427 | len -= 4; | |
1428 | } | |
1429 | ||
1430 | if (last_regnum != -1) | |
1431 | return 1; | |
1432 | } | |
ff2e87ac | 1433 | |
23a34459 | 1434 | return i386_fp_regnum_p (regnum); |
d7a0d72c MK |
1435 | } |
1436 | ||
ff2e87ac AC |
1437 | /* Read a value of type TYPE from register REGNUM in frame FRAME, and |
1438 | return its contents in TO. */ | |
ac27f131 | 1439 | |
3a1e71e3 | 1440 | static void |
ff2e87ac AC |
1441 | i386_register_to_value (struct frame_info *frame, int regnum, |
1442 | struct type *type, void *to) | |
ac27f131 | 1443 | { |
de5b9bb9 MK |
1444 | int len = TYPE_LENGTH (type); |
1445 | char *buf = to; | |
1446 | ||
ff2e87ac AC |
1447 | /* FIXME: kettenis/20030609: What should we do if REGNUM isn't |
1448 | available in FRAME (i.e. if it wasn't saved)? */ | |
3d261580 | 1449 | |
ff2e87ac | 1450 | if (i386_fp_regnum_p (regnum)) |
8d7f6b4a | 1451 | { |
d532c08f MK |
1452 | i387_register_to_value (frame, regnum, type, to); |
1453 | return; | |
8d7f6b4a | 1454 | } |
ff2e87ac | 1455 | |
de5b9bb9 MK |
1456 | /* Read a value spread accross multiple registers. */ |
1457 | ||
1458 | gdb_assert (len > 4 && len % 4 == 0); | |
3d261580 | 1459 | |
de5b9bb9 MK |
1460 | while (len > 0) |
1461 | { | |
1462 | gdb_assert (regnum != -1); | |
1463 | gdb_assert (register_size (current_gdbarch, regnum) == 4); | |
d532c08f | 1464 | |
f837910f | 1465 | get_frame_register (frame, regnum, buf); |
de5b9bb9 MK |
1466 | regnum = i386_next_regnum (regnum); |
1467 | len -= 4; | |
1468 | buf += 4; | |
1469 | } | |
ac27f131 MK |
1470 | } |
1471 | ||
ff2e87ac AC |
1472 | /* Write the contents FROM of a value of type TYPE into register |
1473 | REGNUM in frame FRAME. */ | |
ac27f131 | 1474 | |
3a1e71e3 | 1475 | static void |
ff2e87ac AC |
1476 | i386_value_to_register (struct frame_info *frame, int regnum, |
1477 | struct type *type, const void *from) | |
ac27f131 | 1478 | { |
de5b9bb9 MK |
1479 | int len = TYPE_LENGTH (type); |
1480 | const char *buf = from; | |
1481 | ||
ff2e87ac | 1482 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1483 | { |
d532c08f MK |
1484 | i387_value_to_register (frame, regnum, type, from); |
1485 | return; | |
1486 | } | |
3d261580 | 1487 | |
de5b9bb9 MK |
1488 | /* Write a value spread accross multiple registers. */ |
1489 | ||
1490 | gdb_assert (len > 4 && len % 4 == 0); | |
ff2e87ac | 1491 | |
de5b9bb9 MK |
1492 | while (len > 0) |
1493 | { | |
1494 | gdb_assert (regnum != -1); | |
1495 | gdb_assert (register_size (current_gdbarch, regnum) == 4); | |
d532c08f | 1496 | |
de5b9bb9 MK |
1497 | put_frame_register (frame, regnum, buf); |
1498 | regnum = i386_next_regnum (regnum); | |
1499 | len -= 4; | |
1500 | buf += 4; | |
1501 | } | |
ac27f131 | 1502 | } |
ff2e87ac AC |
1503 | \f |
1504 | ||
fc338970 | 1505 | |
c906108c | 1506 | #ifdef STATIC_TRANSFORM_NAME |
fc338970 MK |
1507 | /* SunPRO encodes the static variables. This is not related to C++ |
1508 | mangling, it is done for C too. */ | |
c906108c SS |
1509 | |
1510 | char * | |
fba45db2 | 1511 | sunpro_static_transform_name (char *name) |
c906108c SS |
1512 | { |
1513 | char *p; | |
1514 | if (IS_STATIC_TRANSFORM_NAME (name)) | |
1515 | { | |
fc338970 MK |
1516 | /* For file-local statics there will be a period, a bunch of |
1517 | junk (the contents of which match a string given in the | |
c5aa993b JM |
1518 | N_OPT), a period and the name. For function-local statics |
1519 | there will be a bunch of junk (which seems to change the | |
1520 | second character from 'A' to 'B'), a period, the name of the | |
1521 | function, and the name. So just skip everything before the | |
1522 | last period. */ | |
c906108c SS |
1523 | p = strrchr (name, '.'); |
1524 | if (p != NULL) | |
1525 | name = p + 1; | |
1526 | } | |
1527 | return name; | |
1528 | } | |
1529 | #endif /* STATIC_TRANSFORM_NAME */ | |
fc338970 | 1530 | \f |
c906108c | 1531 | |
fc338970 | 1532 | /* Stuff for WIN32 PE style DLL's but is pretty generic really. */ |
c906108c SS |
1533 | |
1534 | CORE_ADDR | |
1cce71eb | 1535 | i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name) |
c906108c | 1536 | { |
fc338970 | 1537 | if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */ |
c906108c | 1538 | { |
c5aa993b | 1539 | unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4); |
c906108c | 1540 | struct minimal_symbol *indsym = |
fc338970 | 1541 | indirect ? lookup_minimal_symbol_by_pc (indirect) : 0; |
645dd519 | 1542 | char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0; |
c906108c | 1543 | |
c5aa993b | 1544 | if (symname) |
c906108c | 1545 | { |
c5aa993b JM |
1546 | if (strncmp (symname, "__imp_", 6) == 0 |
1547 | || strncmp (symname, "_imp_", 5) == 0) | |
c906108c SS |
1548 | return name ? 1 : read_memory_unsigned_integer (indirect, 4); |
1549 | } | |
1550 | } | |
fc338970 | 1551 | return 0; /* Not a trampoline. */ |
c906108c | 1552 | } |
fc338970 MK |
1553 | \f |
1554 | ||
8201327c MK |
1555 | /* Return non-zero if PC and NAME show that we are in a signal |
1556 | trampoline. */ | |
1557 | ||
1558 | static int | |
1559 | i386_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1560 | { | |
1561 | return (name && strcmp ("_sigtramp", name) == 0); | |
1562 | } | |
1563 | \f | |
1564 | ||
fc338970 MK |
1565 | /* We have two flavours of disassembly. The machinery on this page |
1566 | deals with switching between those. */ | |
c906108c SS |
1567 | |
1568 | static int | |
5e3397bb | 1569 | i386_print_insn (bfd_vma pc, disassemble_info *info) |
c906108c | 1570 | { |
5e3397bb MK |
1571 | gdb_assert (disassembly_flavor == att_flavor |
1572 | || disassembly_flavor == intel_flavor); | |
1573 | ||
1574 | /* FIXME: kettenis/20020915: Until disassembler_options is properly | |
1575 | constified, cast to prevent a compiler warning. */ | |
1576 | info->disassembler_options = (char *) disassembly_flavor; | |
1577 | info->mach = gdbarch_bfd_arch_info (current_gdbarch)->mach; | |
1578 | ||
1579 | return print_insn_i386 (pc, info); | |
7a292a7a | 1580 | } |
fc338970 | 1581 | \f |
3ce1502b | 1582 | |
8201327c MK |
1583 | /* There are a few i386 architecture variants that differ only |
1584 | slightly from the generic i386 target. For now, we don't give them | |
1585 | their own source file, but include them here. As a consequence, | |
1586 | they'll always be included. */ | |
3ce1502b | 1587 | |
8201327c | 1588 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1589 | |
8201327c MK |
1590 | static int |
1591 | i386_svr4_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
d2a7c97a | 1592 | { |
acd5c798 MK |
1593 | /* UnixWare uses _sigacthandler. The origin of the other symbols is |
1594 | currently unknown. */ | |
8201327c MK |
1595 | return (name && (strcmp ("_sigreturn", name) == 0 |
1596 | || strcmp ("_sigacthandler", name) == 0 | |
1597 | || strcmp ("sigvechandler", name) == 0)); | |
1598 | } | |
d2a7c97a | 1599 | |
acd5c798 MK |
1600 | /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp |
1601 | routine, return the address of the associated sigcontext (ucontext) | |
1602 | structure. */ | |
3ce1502b | 1603 | |
3a1e71e3 | 1604 | static CORE_ADDR |
acd5c798 | 1605 | i386_svr4_sigcontext_addr (struct frame_info *next_frame) |
8201327c | 1606 | { |
acd5c798 MK |
1607 | char buf[4]; |
1608 | CORE_ADDR sp; | |
3ce1502b | 1609 | |
acd5c798 MK |
1610 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); |
1611 | sp = extract_unsigned_integer (buf, 4); | |
21d0e8a4 | 1612 | |
acd5c798 | 1613 | return read_memory_unsigned_integer (sp + 8, 4); |
8201327c MK |
1614 | } |
1615 | \f | |
3ce1502b | 1616 | |
8201327c | 1617 | /* DJGPP. */ |
d2a7c97a | 1618 | |
8201327c MK |
1619 | static int |
1620 | i386_go32_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1621 | { | |
1622 | /* DJGPP doesn't have any special frames for signal handlers. */ | |
1623 | return 0; | |
1624 | } | |
1625 | \f | |
d2a7c97a | 1626 | |
8201327c | 1627 | /* Generic ELF. */ |
d2a7c97a | 1628 | |
8201327c MK |
1629 | void |
1630 | i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1631 | { | |
1632 | /* We typically use stabs-in-ELF with the DWARF register numbering. */ | |
1633 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1634 | } | |
3ce1502b | 1635 | |
8201327c | 1636 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1637 | |
8201327c MK |
1638 | void |
1639 | i386_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1640 | { | |
1641 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
3ce1502b | 1642 | |
8201327c MK |
1643 | /* System V Release 4 uses ELF. */ |
1644 | i386_elf_init_abi (info, gdbarch); | |
3ce1502b | 1645 | |
dfe01d39 MK |
1646 | /* System V Release 4 has shared libraries. */ |
1647 | set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section); | |
1648 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); | |
1649 | ||
8201327c | 1650 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_svr4_pc_in_sigtramp); |
21d0e8a4 | 1651 | tdep->sigcontext_addr = i386_svr4_sigcontext_addr; |
acd5c798 MK |
1652 | tdep->sc_pc_offset = 36 + 14 * 4; |
1653 | tdep->sc_sp_offset = 36 + 17 * 4; | |
3ce1502b | 1654 | |
8201327c | 1655 | tdep->jb_pc_offset = 20; |
3ce1502b MK |
1656 | } |
1657 | ||
8201327c | 1658 | /* DJGPP. */ |
3ce1502b | 1659 | |
3a1e71e3 | 1660 | static void |
8201327c | 1661 | i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1662 | { |
8201327c | 1663 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1664 | |
8201327c | 1665 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_go32_pc_in_sigtramp); |
3ce1502b | 1666 | |
8201327c | 1667 | tdep->jb_pc_offset = 36; |
3ce1502b MK |
1668 | } |
1669 | ||
8201327c | 1670 | /* NetWare. */ |
3ce1502b | 1671 | |
3a1e71e3 | 1672 | static void |
8201327c | 1673 | i386_nw_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1674 | { |
8201327c | 1675 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1676 | |
8201327c | 1677 | tdep->jb_pc_offset = 24; |
d2a7c97a | 1678 | } |
8201327c | 1679 | \f |
2acceee2 | 1680 | |
38c968cf AC |
1681 | /* i386 register groups. In addition to the normal groups, add "mmx" |
1682 | and "sse". */ | |
1683 | ||
1684 | static struct reggroup *i386_sse_reggroup; | |
1685 | static struct reggroup *i386_mmx_reggroup; | |
1686 | ||
1687 | static void | |
1688 | i386_init_reggroups (void) | |
1689 | { | |
1690 | i386_sse_reggroup = reggroup_new ("sse", USER_REGGROUP); | |
1691 | i386_mmx_reggroup = reggroup_new ("mmx", USER_REGGROUP); | |
1692 | } | |
1693 | ||
1694 | static void | |
1695 | i386_add_reggroups (struct gdbarch *gdbarch) | |
1696 | { | |
1697 | reggroup_add (gdbarch, i386_sse_reggroup); | |
1698 | reggroup_add (gdbarch, i386_mmx_reggroup); | |
1699 | reggroup_add (gdbarch, general_reggroup); | |
1700 | reggroup_add (gdbarch, float_reggroup); | |
1701 | reggroup_add (gdbarch, all_reggroup); | |
1702 | reggroup_add (gdbarch, save_reggroup); | |
1703 | reggroup_add (gdbarch, restore_reggroup); | |
1704 | reggroup_add (gdbarch, vector_reggroup); | |
1705 | reggroup_add (gdbarch, system_reggroup); | |
1706 | } | |
1707 | ||
1708 | int | |
1709 | i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
1710 | struct reggroup *group) | |
1711 | { | |
1712 | int sse_regnum_p = (i386_sse_regnum_p (regnum) | |
1713 | || i386_mxcsr_regnum_p (regnum)); | |
1714 | int fp_regnum_p = (i386_fp_regnum_p (regnum) | |
1715 | || i386_fpc_regnum_p (regnum)); | |
1716 | int mmx_regnum_p = (i386_mmx_regnum_p (regnum)); | |
acd5c798 | 1717 | |
38c968cf AC |
1718 | if (group == i386_mmx_reggroup) |
1719 | return mmx_regnum_p; | |
1720 | if (group == i386_sse_reggroup) | |
1721 | return sse_regnum_p; | |
1722 | if (group == vector_reggroup) | |
1723 | return (mmx_regnum_p || sse_regnum_p); | |
1724 | if (group == float_reggroup) | |
1725 | return fp_regnum_p; | |
1726 | if (group == general_reggroup) | |
1727 | return (!fp_regnum_p && !mmx_regnum_p && !sse_regnum_p); | |
acd5c798 | 1728 | |
38c968cf AC |
1729 | return default_register_reggroup_p (gdbarch, regnum, group); |
1730 | } | |
38c968cf | 1731 | \f |
acd5c798 | 1732 | |
f837910f MK |
1733 | /* Get the ARGIth function argument for the current function. */ |
1734 | ||
42c466d7 | 1735 | static CORE_ADDR |
143985b7 AF |
1736 | i386_fetch_pointer_argument (struct frame_info *frame, int argi, |
1737 | struct type *type) | |
1738 | { | |
f837910f MK |
1739 | CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM); |
1740 | return read_memory_unsigned_integer (sp + (4 * (argi + 1)), 4); | |
143985b7 AF |
1741 | } |
1742 | ||
1743 | \f | |
3a1e71e3 | 1744 | static struct gdbarch * |
a62cc96e AC |
1745 | i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1746 | { | |
cd3c07fc | 1747 | struct gdbarch_tdep *tdep; |
a62cc96e AC |
1748 | struct gdbarch *gdbarch; |
1749 | ||
4be87837 DJ |
1750 | /* If there is already a candidate, use it. */ |
1751 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1752 | if (arches != NULL) | |
1753 | return arches->gdbarch; | |
a62cc96e AC |
1754 | |
1755 | /* Allocate space for the new architecture. */ | |
1756 | tdep = XMALLOC (struct gdbarch_tdep); | |
1757 | gdbarch = gdbarch_alloc (&info, tdep); | |
1758 | ||
49ed40de KB |
1759 | /* The i386 default settings now include the SSE registers. |
1760 | I386_NUM_XREGS includes mxcsr, and we don't want to count | |
1761 | this as one of the xmm regs -- which is why we subtract one. | |
1762 | ||
1763 | Note: kevinb/2003-07-14: Whatever Mark's concerns are about the | |
1764 | FPU registers in the FIXME below apply to the SSE registers as well. | |
1765 | The only problem that I see is that these registers will show up | |
1766 | in "info all-registers" even on CPUs where they don't exist. IMO, | |
1767 | however, if it's a choice between printing them always (even when | |
1768 | they don't exist) or never showing them to the user (even when they | |
1769 | do exist), I prefer the former over the latter. Ideally, of course, | |
1770 | we'd somehow autodetect that we have them (or not) and display them | |
1771 | when we have them and suppress them when we don't. | |
1772 | ||
356a6b3e MK |
1773 | FIXME: kettenis/20020614: They do include the FPU registers for |
1774 | now, which probably is not quite right. */ | |
49ed40de | 1775 | tdep->num_xmm_regs = I386_NUM_XREGS - 1; |
d2a7c97a | 1776 | |
8201327c MK |
1777 | tdep->jb_pc_offset = -1; |
1778 | tdep->struct_return = pcc_struct_return; | |
8201327c MK |
1779 | tdep->sigtramp_start = 0; |
1780 | tdep->sigtramp_end = 0; | |
21d0e8a4 | 1781 | tdep->sigcontext_addr = NULL; |
a3386186 | 1782 | tdep->sc_reg_offset = NULL; |
8201327c | 1783 | tdep->sc_pc_offset = -1; |
21d0e8a4 | 1784 | tdep->sc_sp_offset = -1; |
8201327c | 1785 | |
896fb97d MK |
1786 | /* The format used for `long double' on almost all i386 targets is |
1787 | the i387 extended floating-point format. In fact, of all targets | |
1788 | in the GCC 2.95 tree, only OSF/1 does it different, and insists | |
1789 | on having a `long double' that's not `long' at all. */ | |
1790 | set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext); | |
21d0e8a4 | 1791 | |
66da5fd8 | 1792 | /* Although the i387 extended floating-point has only 80 significant |
896fb97d MK |
1793 | bits, a `long double' actually takes up 96, probably to enforce |
1794 | alignment. */ | |
1795 | set_gdbarch_long_double_bit (gdbarch, 96); | |
1796 | ||
49ed40de KB |
1797 | /* The default ABI includes general-purpose registers, |
1798 | floating-point registers, and the SSE registers. */ | |
1799 | set_gdbarch_num_regs (gdbarch, I386_SSE_NUM_REGS); | |
acd5c798 MK |
1800 | set_gdbarch_register_name (gdbarch, i386_register_name); |
1801 | set_gdbarch_register_type (gdbarch, i386_register_type); | |
21d0e8a4 | 1802 | |
acd5c798 MK |
1803 | /* Register numbers of various important registers. */ |
1804 | set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */ | |
1805 | set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */ | |
1806 | set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */ | |
1807 | set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */ | |
356a6b3e MK |
1808 | |
1809 | /* Use the "default" register numbering scheme for stabs and COFF. */ | |
1810 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1811 | set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1812 | ||
1813 | /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */ | |
1814 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1815 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1816 | ||
1817 | /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to | |
1818 | be in use on any of the supported i386 targets. */ | |
1819 | ||
61113f8b MK |
1820 | set_gdbarch_print_float_info (gdbarch, i387_print_float_info); |
1821 | ||
8201327c | 1822 | set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target); |
96297dab | 1823 | |
a62cc96e | 1824 | /* Call dummy code. */ |
acd5c798 | 1825 | set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call); |
a62cc96e | 1826 | |
ff2e87ac AC |
1827 | set_gdbarch_convert_register_p (gdbarch, i386_convert_register_p); |
1828 | set_gdbarch_register_to_value (gdbarch, i386_register_to_value); | |
1829 | set_gdbarch_value_to_register (gdbarch, i386_value_to_register); | |
b6197528 | 1830 | |
00f8375e | 1831 | set_gdbarch_extract_return_value (gdbarch, i386_extract_return_value); |
3d7f4f49 | 1832 | set_gdbarch_store_return_value (gdbarch, i386_store_return_value); |
00f8375e | 1833 | set_gdbarch_extract_struct_value_address (gdbarch, |
fc08ec52 | 1834 | i386_extract_struct_value_address); |
8201327c MK |
1835 | set_gdbarch_use_struct_convention (gdbarch, i386_use_struct_convention); |
1836 | ||
93924b6b MK |
1837 | set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue); |
1838 | ||
1839 | /* Stack grows downward. */ | |
1840 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1841 | ||
1842 | set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc); | |
1843 | set_gdbarch_decr_pc_after_break (gdbarch, 1); | |
1844 | set_gdbarch_function_start_offset (gdbarch, 0); | |
42fdc8df | 1845 | |
42fdc8df | 1846 | set_gdbarch_frame_args_skip (gdbarch, 8); |
8201327c MK |
1847 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_pc_in_sigtramp); |
1848 | ||
28fc6740 | 1849 | /* Wire in the MMX registers. */ |
0f751ff2 | 1850 | set_gdbarch_num_pseudo_regs (gdbarch, i386_num_mmx_regs); |
28fc6740 AC |
1851 | set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read); |
1852 | set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write); | |
1853 | ||
5e3397bb MK |
1854 | set_gdbarch_print_insn (gdbarch, i386_print_insn); |
1855 | ||
acd5c798 | 1856 | set_gdbarch_unwind_dummy_id (gdbarch, i386_unwind_dummy_id); |
acd5c798 MK |
1857 | |
1858 | set_gdbarch_unwind_pc (gdbarch, i386_unwind_pc); | |
1859 | ||
38c968cf AC |
1860 | /* Add the i386 register groups. */ |
1861 | i386_add_reggroups (gdbarch); | |
1862 | set_gdbarch_register_reggroup_p (gdbarch, i386_register_reggroup_p); | |
1863 | ||
143985b7 AF |
1864 | /* Helper for function argument information. */ |
1865 | set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument); | |
1866 | ||
6405b0a6 | 1867 | /* Hook in the DWARF CFI frame unwinder. */ |
336d1bba | 1868 | frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); |
6405b0a6 | 1869 | |
acd5c798 | 1870 | frame_base_set_default (gdbarch, &i386_frame_base); |
6c0e89ed | 1871 | |
3ce1502b | 1872 | /* Hook in ABI-specific overrides, if they have been registered. */ |
4be87837 | 1873 | gdbarch_init_osabi (info, gdbarch); |
3ce1502b | 1874 | |
336d1bba AC |
1875 | frame_unwind_append_sniffer (gdbarch, i386_sigtramp_frame_sniffer); |
1876 | frame_unwind_append_sniffer (gdbarch, i386_frame_sniffer); | |
acd5c798 | 1877 | |
a62cc96e AC |
1878 | return gdbarch; |
1879 | } | |
1880 | ||
8201327c MK |
1881 | static enum gdb_osabi |
1882 | i386_coff_osabi_sniffer (bfd *abfd) | |
1883 | { | |
762c5349 MK |
1884 | if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0 |
1885 | || strcmp (bfd_get_target (abfd), "coff-go32") == 0) | |
8201327c MK |
1886 | return GDB_OSABI_GO32; |
1887 | ||
1888 | return GDB_OSABI_UNKNOWN; | |
1889 | } | |
1890 | ||
1891 | static enum gdb_osabi | |
1892 | i386_nlm_osabi_sniffer (bfd *abfd) | |
1893 | { | |
1894 | return GDB_OSABI_NETWARE; | |
1895 | } | |
1896 | \f | |
1897 | ||
28e9e0f0 MK |
1898 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1899 | void _initialize_i386_tdep (void); | |
1900 | ||
c906108c | 1901 | void |
fba45db2 | 1902 | _initialize_i386_tdep (void) |
c906108c | 1903 | { |
a62cc96e AC |
1904 | register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init); |
1905 | ||
fc338970 | 1906 | /* Add the variable that controls the disassembly flavor. */ |
917317f4 JM |
1907 | { |
1908 | struct cmd_list_element *new_cmd; | |
7a292a7a | 1909 | |
917317f4 JM |
1910 | new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class, |
1911 | valid_flavors, | |
1ed2a135 | 1912 | &disassembly_flavor, |
fc338970 MK |
1913 | "\ |
1914 | Set the disassembly flavor, the valid values are \"att\" and \"intel\", \ | |
c906108c | 1915 | and the default value is \"att\".", |
917317f4 | 1916 | &setlist); |
917317f4 JM |
1917 | add_show_from_set (new_cmd, &showlist); |
1918 | } | |
8201327c MK |
1919 | |
1920 | /* Add the variable that controls the convention for returning | |
1921 | structs. */ | |
1922 | { | |
1923 | struct cmd_list_element *new_cmd; | |
1924 | ||
1925 | new_cmd = add_set_enum_cmd ("struct-convention", no_class, | |
5e3397bb | 1926 | valid_conventions, |
8201327c MK |
1927 | &struct_convention, "\ |
1928 | Set the convention for returning small structs, valid values \ | |
1929 | are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".", | |
1930 | &setlist); | |
1931 | add_show_from_set (new_cmd, &showlist); | |
1932 | } | |
1933 | ||
1934 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour, | |
1935 | i386_coff_osabi_sniffer); | |
1936 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_nlm_flavour, | |
1937 | i386_nlm_osabi_sniffer); | |
1938 | ||
05816f70 | 1939 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4, |
8201327c | 1940 | i386_svr4_init_abi); |
05816f70 | 1941 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_GO32, |
8201327c | 1942 | i386_go32_init_abi); |
05816f70 | 1943 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_NETWARE, |
8201327c | 1944 | i386_nw_init_abi); |
38c968cf AC |
1945 | |
1946 | /* Initialize the i386 specific register groups. */ | |
1947 | i386_init_reggroups (); | |
c906108c | 1948 | } |