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[deliverable/binutils-gdb.git] / gdb / i386-tdep.c
CommitLineData
c906108c 1/* Intel 386 target-dependent stuff.
b6ba6518
KB
2 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001
c906108c
SS
4 Free Software Foundation, Inc.
5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
JM
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c906108c
SS
22
23#include "defs.h"
24#include "gdb_string.h"
25#include "frame.h"
26#include "inferior.h"
27#include "gdbcore.h"
28#include "target.h"
29#include "floatformat.h"
30#include "symtab.h"
31#include "gdbcmd.h"
32#include "command.h"
b4a20239 33#include "arch-utils.h"
4e052eda 34#include "regcache.h"
c906108c 35
a14ed312 36static long i386_get_frame_setup (CORE_ADDR);
c906108c 37
a14ed312 38static void i386_follow_jump (void);
c906108c 39
a14ed312 40static void codestream_read (unsigned char *, int);
c906108c 41
a14ed312 42static void codestream_seek (CORE_ADDR);
c906108c 43
a14ed312 44static unsigned char codestream_fill (int);
c906108c 45
a14ed312 46CORE_ADDR skip_trampoline_code (CORE_ADDR, char *);
c906108c
SS
47
48static int gdb_print_insn_i386 (bfd_vma, disassemble_info *);
49
a14ed312 50void _initialize_i386_tdep (void);
c906108c 51
917317f4
JM
52/* i386_register_byte[i] is the offset into the register file of the
53 start of register number i. We initialize this from
54 i386_register_raw_size. */
55int i386_register_byte[MAX_NUM_REGS];
56
ceb4951f
JB
57/* i386_register_raw_size[i] is the number of bytes of storage in
58 GDB's register array occupied by register i. */
917317f4
JM
59int i386_register_raw_size[MAX_NUM_REGS] = {
60 4, 4, 4, 4,
61 4, 4, 4, 4,
62 4, 4, 4, 4,
63 4, 4, 4, 4,
64 10, 10, 10, 10,
65 10, 10, 10, 10,
66 4, 4, 4, 4,
67 4, 4, 4, 4,
68 16, 16, 16, 16,
69 16, 16, 16, 16,
70 4
71};
72
73/* i386_register_virtual_size[i] is the size in bytes of the virtual
74 type of register i. */
75int i386_register_virtual_size[MAX_NUM_REGS];
76
77
c906108c 78/* This is the variable the is set with "set disassembly-flavor",
c5aa993b 79 and its legitimate values. */
53904c9e
AC
80static const char att_flavor[] = "att";
81static const char intel_flavor[] = "intel";
82static const char *valid_flavors[] =
c5aa993b 83{
c906108c
SS
84 att_flavor,
85 intel_flavor,
86 NULL
87};
53904c9e 88static const char *disassembly_flavor = att_flavor;
c906108c 89
a14ed312 90static void i386_print_register (char *, int, int);
d4f3574e 91
7a292a7a 92/* This is used to keep the bfd arch_info in sync with the disassembly flavor. */
a14ed312
KB
93static void set_disassembly_flavor_sfunc (char *, int,
94 struct cmd_list_element *);
95static void set_disassembly_flavor (void);
7a292a7a 96
c906108c
SS
97/* Stdio style buffering was used to minimize calls to ptrace, but this
98 buffering did not take into account that the code section being accessed
99 may not be an even number of buffers long (even if the buffer is only
100 sizeof(int) long). In cases where the code section size happened to
101 be a non-integral number of buffers long, attempting to read the last
102 buffer would fail. Simply using target_read_memory and ignoring errors,
103 rather than read_memory, is not the correct solution, since legitimate
104 access errors would then be totally ignored. To properly handle this
105 situation and continue to use buffering would require that this code
106 be able to determine the minimum code section size granularity (not the
107 alignment of the section itself, since the actual failing case that
108 pointed out this problem had a section alignment of 4 but was not a
109 multiple of 4 bytes long), on a target by target basis, and then
110 adjust it's buffer size accordingly. This is messy, but potentially
111 feasible. It probably needs the bfd library's help and support. For
112 now, the buffer size is set to 1. (FIXME -fnf) */
113
114#define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */
115static CORE_ADDR codestream_next_addr;
116static CORE_ADDR codestream_addr;
117static unsigned char codestream_buf[CODESTREAM_BUFSIZ];
118static int codestream_off;
119static int codestream_cnt;
120
121#define codestream_tell() (codestream_addr + codestream_off)
122#define codestream_peek() (codestream_cnt == 0 ? \
123 codestream_fill(1): codestream_buf[codestream_off])
124#define codestream_get() (codestream_cnt-- == 0 ? \
125 codestream_fill(0) : codestream_buf[codestream_off++])
126
c5aa993b 127static unsigned char
fba45db2 128codestream_fill (int peek_flag)
c906108c
SS
129{
130 codestream_addr = codestream_next_addr;
131 codestream_next_addr += CODESTREAM_BUFSIZ;
132 codestream_off = 0;
133 codestream_cnt = CODESTREAM_BUFSIZ;
134 read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ);
c5aa993b 135
c906108c 136 if (peek_flag)
c5aa993b 137 return (codestream_peek ());
c906108c 138 else
c5aa993b 139 return (codestream_get ());
c906108c
SS
140}
141
142static void
fba45db2 143codestream_seek (CORE_ADDR place)
c906108c
SS
144{
145 codestream_next_addr = place / CODESTREAM_BUFSIZ;
146 codestream_next_addr *= CODESTREAM_BUFSIZ;
147 codestream_cnt = 0;
148 codestream_fill (1);
c5aa993b 149 while (codestream_tell () != place)
c906108c
SS
150 codestream_get ();
151}
152
153static void
fba45db2 154codestream_read (unsigned char *buf, int count)
c906108c
SS
155{
156 unsigned char *p;
157 int i;
158 p = buf;
159 for (i = 0; i < count; i++)
160 *p++ = codestream_get ();
161}
162
163/* next instruction is a jump, move to target */
164
165static void
fba45db2 166i386_follow_jump (void)
c906108c
SS
167{
168 unsigned char buf[4];
169 long delta;
170
171 int data16;
172 CORE_ADDR pos;
173
174 pos = codestream_tell ();
175
176 data16 = 0;
177 if (codestream_peek () == 0x66)
178 {
179 codestream_get ();
180 data16 = 1;
181 }
182
183 switch (codestream_get ())
184 {
185 case 0xe9:
186 /* relative jump: if data16 == 0, disp32, else disp16 */
187 if (data16)
188 {
189 codestream_read (buf, 2);
190 delta = extract_signed_integer (buf, 2);
191
192 /* include size of jmp inst (including the 0x66 prefix). */
c5aa993b 193 pos += delta + 4;
c906108c
SS
194 }
195 else
196 {
197 codestream_read (buf, 4);
198 delta = extract_signed_integer (buf, 4);
199
200 pos += delta + 5;
201 }
202 break;
203 case 0xeb:
204 /* relative jump, disp8 (ignore data16) */
205 codestream_read (buf, 1);
206 /* Sign-extend it. */
207 delta = extract_signed_integer (buf, 1);
208
209 pos += delta + 2;
210 break;
211 }
212 codestream_seek (pos);
213}
214
215/*
216 * find & return amound a local space allocated, and advance codestream to
217 * first register push (if any)
218 *
219 * if entry sequence doesn't make sense, return -1, and leave
220 * codestream pointer random
221 */
222
223static long
fba45db2 224i386_get_frame_setup (CORE_ADDR pc)
c906108c
SS
225{
226 unsigned char op;
227
228 codestream_seek (pc);
229
230 i386_follow_jump ();
231
232 op = codestream_get ();
233
234 if (op == 0x58) /* popl %eax */
235 {
236 /*
237 * this function must start with
238 *
c5aa993b 239 * popl %eax 0x58
c906108c
SS
240 * xchgl %eax, (%esp) 0x87 0x04 0x24
241 * or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
242 *
243 * (the system 5 compiler puts out the second xchg
244 * inst, and the assembler doesn't try to optimize it,
245 * so the 'sib' form gets generated)
246 *
247 * this sequence is used to get the address of the return
248 * buffer for a function that returns a structure
249 */
250 int pos;
251 unsigned char buf[4];
c5aa993b
JM
252 static unsigned char proto1[3] =
253 {0x87, 0x04, 0x24};
254 static unsigned char proto2[4] =
255 {0x87, 0x44, 0x24, 0x00};
c906108c
SS
256 pos = codestream_tell ();
257 codestream_read (buf, 4);
258 if (memcmp (buf, proto1, 3) == 0)
259 pos += 3;
260 else if (memcmp (buf, proto2, 4) == 0)
261 pos += 4;
262
263 codestream_seek (pos);
c5aa993b 264 op = codestream_get (); /* update next opcode */
c906108c
SS
265 }
266
267 if (op == 0x68 || op == 0x6a)
268 {
269 /*
270 * this function may start with
271 *
272 * pushl constant
273 * call _probe
274 * addl $4, %esp
275 * followed by
276 * pushl %ebp
277 * etc.
278 */
279 int pos;
280 unsigned char buf[8];
281
282 /* Skip past the pushl instruction; it has either a one-byte
283 or a four-byte operand, depending on the opcode. */
284 pos = codestream_tell ();
285 if (op == 0x68)
286 pos += 4;
287 else
288 pos += 1;
289 codestream_seek (pos);
290
291 /* Read the following 8 bytes, which should be "call _probe" (6 bytes)
292 followed by "addl $4,%esp" (2 bytes). */
293 codestream_read (buf, sizeof (buf));
294 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
295 pos += sizeof (buf);
296 codestream_seek (pos);
c5aa993b 297 op = codestream_get (); /* update next opcode */
c906108c
SS
298 }
299
300 if (op == 0x55) /* pushl %ebp */
c5aa993b 301 {
c906108c
SS
302 /* check for movl %esp, %ebp - can be written two ways */
303 switch (codestream_get ())
304 {
305 case 0x8b:
306 if (codestream_get () != 0xec)
307 return (-1);
308 break;
309 case 0x89:
310 if (codestream_get () != 0xe5)
311 return (-1);
312 break;
313 default:
314 return (-1);
315 }
316 /* check for stack adjustment
c5aa993b 317
c906108c
SS
318 * subl $XXX, %esp
319 *
320 * note: you can't subtract a 16 bit immediate
321 * from a 32 bit reg, so we don't have to worry
322 * about a data16 prefix
323 */
324 op = codestream_peek ();
325 if (op == 0x83)
326 {
327 /* subl with 8 bit immed */
328 codestream_get ();
329 if (codestream_get () != 0xec)
330 /* Some instruction starting with 0x83 other than subl. */
331 {
332 codestream_seek (codestream_tell () - 2);
333 return 0;
334 }
335 /* subl with signed byte immediate
336 * (though it wouldn't make sense to be negative)
337 */
c5aa993b 338 return (codestream_get ());
c906108c
SS
339 }
340 else if (op == 0x81)
341 {
342 char buf[4];
343 /* Maybe it is subl with 32 bit immedediate. */
c5aa993b 344 codestream_get ();
c906108c
SS
345 if (codestream_get () != 0xec)
346 /* Some instruction starting with 0x81 other than subl. */
347 {
348 codestream_seek (codestream_tell () - 2);
349 return 0;
350 }
351 /* It is subl with 32 bit immediate. */
c5aa993b 352 codestream_read ((unsigned char *) buf, 4);
c906108c
SS
353 return extract_signed_integer (buf, 4);
354 }
355 else
356 {
357 return (0);
358 }
359 }
360 else if (op == 0xc8)
361 {
362 char buf[2];
363 /* enter instruction: arg is 16 bit unsigned immed */
c5aa993b
JM
364 codestream_read ((unsigned char *) buf, 2);
365 codestream_get (); /* flush final byte of enter instruction */
c906108c
SS
366 return extract_unsigned_integer (buf, 2);
367 }
368 return (-1);
369}
370
371/* Return number of args passed to a frame.
372 Can return -1, meaning no way to tell. */
373
374int
fba45db2 375i386_frame_num_args (struct frame_info *fi)
c906108c
SS
376{
377#if 1
378 return -1;
379#else
380 /* This loses because not only might the compiler not be popping the
381 args right after the function call, it might be popping args from both
382 this call and a previous one, and we would say there are more args
383 than there really are. */
384
c5aa993b
JM
385 int retpc;
386 unsigned char op;
c906108c
SS
387 struct frame_info *pfi;
388
389 /* on the 386, the instruction following the call could be:
390 popl %ecx - one arg
391 addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits
392 anything else - zero args */
393
394 int frameless;
395
392a587b 396 frameless = FRAMELESS_FUNCTION_INVOCATION (fi);
c906108c
SS
397 if (frameless)
398 /* In the absence of a frame pointer, GDB doesn't get correct values
399 for nameless arguments. Return -1, so it doesn't print any
400 nameless arguments. */
401 return -1;
402
c5aa993b 403 pfi = get_prev_frame (fi);
c906108c
SS
404 if (pfi == 0)
405 {
406 /* Note: this can happen if we are looking at the frame for
c5aa993b
JM
407 main, because FRAME_CHAIN_VALID won't let us go into
408 start. If we have debugging symbols, that's not really
409 a big deal; it just means it will only show as many arguments
410 to main as are declared. */
c906108c
SS
411 return -1;
412 }
413 else
414 {
c5aa993b
JM
415 retpc = pfi->pc;
416 op = read_memory_integer (retpc, 1);
417 if (op == 0x59)
418 /* pop %ecx */
419 return 1;
c906108c
SS
420 else if (op == 0x83)
421 {
c5aa993b
JM
422 op = read_memory_integer (retpc + 1, 1);
423 if (op == 0xc4)
424 /* addl $<signed imm 8 bits>, %esp */
425 return (read_memory_integer (retpc + 2, 1) & 0xff) / 4;
c906108c
SS
426 else
427 return 0;
428 }
429 else if (op == 0x81)
c5aa993b
JM
430 { /* add with 32 bit immediate */
431 op = read_memory_integer (retpc + 1, 1);
432 if (op == 0xc4)
433 /* addl $<imm 32>, %esp */
434 return read_memory_integer (retpc + 2, 4) / 4;
c906108c
SS
435 else
436 return 0;
437 }
438 else
439 {
440 return 0;
441 }
442 }
443#endif
444}
445
446/*
447 * parse the first few instructions of the function to see
448 * what registers were stored.
449 *
450 * We handle these cases:
451 *
452 * The startup sequence can be at the start of the function,
453 * or the function can start with a branch to startup code at the end.
454 *
455 * %ebp can be set up with either the 'enter' instruction, or
456 * 'pushl %ebp, movl %esp, %ebp' (enter is too slow to be useful,
457 * but was once used in the sys5 compiler)
458 *
459 * Local space is allocated just below the saved %ebp by either the
460 * 'enter' instruction, or by 'subl $<size>, %esp'. 'enter' has
461 * a 16 bit unsigned argument for space to allocate, and the
462 * 'addl' instruction could have either a signed byte, or
463 * 32 bit immediate.
464 *
465 * Next, the registers used by this function are pushed. In
466 * the sys5 compiler they will always be in the order: %edi, %esi, %ebx
467 * (and sometimes a harmless bug causes it to also save but not restore %eax);
468 * however, the code below is willing to see the pushes in any order,
469 * and will handle up to 8 of them.
470 *
471 * If the setup sequence is at the end of the function, then the
472 * next instruction will be a branch back to the start.
473 */
474
475void
fba45db2 476i386_frame_init_saved_regs (struct frame_info *fip)
c906108c
SS
477{
478 long locals = -1;
479 unsigned char op;
480 CORE_ADDR dummy_bottom;
481 CORE_ADDR adr;
482 CORE_ADDR pc;
483 int i;
c5aa993b 484
1211c4e4
AC
485 if (fip->saved_regs)
486 return;
487
488 frame_saved_regs_zalloc (fip);
c5aa993b 489
c906108c
SS
490 /* if frame is the end of a dummy, compute where the
491 * beginning would be
492 */
493 dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH;
c5aa993b 494
c906108c 495 /* check if the PC is in the stack, in a dummy frame */
c5aa993b 496 if (dummy_bottom <= fip->pc && fip->pc <= fip->frame)
c906108c
SS
497 {
498 /* all regs were saved by push_call_dummy () */
499 adr = fip->frame;
c5aa993b 500 for (i = 0; i < NUM_REGS; i++)
c906108c
SS
501 {
502 adr -= REGISTER_RAW_SIZE (i);
1211c4e4 503 fip->saved_regs[i] = adr;
c906108c
SS
504 }
505 return;
506 }
c5aa993b 507
c906108c
SS
508 pc = get_pc_function_start (fip->pc);
509 if (pc != 0)
510 locals = i386_get_frame_setup (pc);
c5aa993b
JM
511
512 if (locals >= 0)
c906108c
SS
513 {
514 adr = fip->frame - 4 - locals;
c5aa993b 515 for (i = 0; i < 8; i++)
c906108c
SS
516 {
517 op = codestream_get ();
518 if (op < 0x50 || op > 0x57)
519 break;
520#ifdef I386_REGNO_TO_SYMMETRY
521 /* Dynix uses different internal numbering. Ick. */
1211c4e4 522 fip->saved_regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = adr;
c906108c 523#else
1211c4e4 524 fip->saved_regs[op - 0x50] = adr;
c906108c
SS
525#endif
526 adr -= 4;
527 }
528 }
c5aa993b 529
1211c4e4
AC
530 fip->saved_regs[PC_REGNUM] = fip->frame + 4;
531 fip->saved_regs[FP_REGNUM] = fip->frame;
c906108c
SS
532}
533
534/* return pc of first real instruction */
535
536int
fba45db2 537i386_skip_prologue (int pc)
c906108c
SS
538{
539 unsigned char op;
540 int i;
c5aa993b
JM
541 static unsigned char pic_pat[6] =
542 {0xe8, 0, 0, 0, 0, /* call 0x0 */
543 0x5b, /* popl %ebx */
544 };
c906108c 545 CORE_ADDR pos;
c5aa993b 546
c906108c
SS
547 if (i386_get_frame_setup (pc) < 0)
548 return (pc);
c5aa993b 549
c906108c
SS
550 /* found valid frame setup - codestream now points to
551 * start of push instructions for saving registers
552 */
c5aa993b 553
c906108c
SS
554 /* skip over register saves */
555 for (i = 0; i < 8; i++)
556 {
557 op = codestream_peek ();
558 /* break if not pushl inst */
c5aa993b 559 if (op < 0x50 || op > 0x57)
c906108c
SS
560 break;
561 codestream_get ();
562 }
563
564 /* The native cc on SVR4 in -K PIC mode inserts the following code to get
565 the address of the global offset table (GOT) into register %ebx.
c5aa993b
JM
566 call 0x0
567 popl %ebx
568 movl %ebx,x(%ebp) (optional)
569 addl y,%ebx
c906108c
SS
570 This code is with the rest of the prologue (at the end of the
571 function), so we have to skip it to get to the first real
572 instruction at the start of the function. */
c5aa993b 573
c906108c
SS
574 pos = codestream_tell ();
575 for (i = 0; i < 6; i++)
576 {
577 op = codestream_get ();
c5aa993b 578 if (pic_pat[i] != op)
c906108c
SS
579 break;
580 }
581 if (i == 6)
582 {
583 unsigned char buf[4];
584 long delta = 6;
585
586 op = codestream_get ();
c5aa993b 587 if (op == 0x89) /* movl %ebx, x(%ebp) */
c906108c
SS
588 {
589 op = codestream_get ();
c5aa993b 590 if (op == 0x5d) /* one byte offset from %ebp */
c906108c
SS
591 {
592 delta += 3;
593 codestream_read (buf, 1);
594 }
c5aa993b 595 else if (op == 0x9d) /* four byte offset from %ebp */
c906108c
SS
596 {
597 delta += 6;
598 codestream_read (buf, 4);
599 }
c5aa993b
JM
600 else /* unexpected instruction */
601 delta = -1;
602 op = codestream_get ();
c906108c 603 }
c5aa993b
JM
604 /* addl y,%ebx */
605 if (delta > 0 && op == 0x81 && codestream_get () == 0xc3)
c906108c 606 {
c5aa993b 607 pos += delta + 6;
c906108c
SS
608 }
609 }
610 codestream_seek (pos);
c5aa993b 611
c906108c 612 i386_follow_jump ();
c5aa993b 613
c906108c
SS
614 return (codestream_tell ());
615}
616
617void
fba45db2 618i386_push_dummy_frame (void)
c906108c
SS
619{
620 CORE_ADDR sp = read_register (SP_REGNUM);
621 int regnum;
622 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 623
c906108c
SS
624 sp = push_word (sp, read_register (PC_REGNUM));
625 sp = push_word (sp, read_register (FP_REGNUM));
626 write_register (FP_REGNUM, sp);
627 for (regnum = 0; regnum < NUM_REGS; regnum++)
628 {
629 read_register_gen (regnum, regbuf);
630 sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum));
631 }
632 write_register (SP_REGNUM, sp);
633}
634
a7769679
MK
635/* Insert the (relative) function address into the call sequence
636 stored at DYMMY. */
637
638void
639i386_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
640 value_ptr *args, struct type *type, int gcc_p)
641{
642 int from, to, delta, loc;
643
644 loc = (int)(read_register (SP_REGNUM) - CALL_DUMMY_LENGTH);
645 from = loc + 5;
646 to = (int)(fun);
647 delta = to - from;
648
649 *((char *)(dummy) + 1) = (delta & 0xff);
650 *((char *)(dummy) + 2) = ((delta >> 8) & 0xff);
651 *((char *)(dummy) + 3) = ((delta >> 16) & 0xff);
652 *((char *)(dummy) + 4) = ((delta >> 24) & 0xff);
653}
654
c906108c 655void
fba45db2 656i386_pop_frame (void)
c906108c
SS
657{
658 struct frame_info *frame = get_current_frame ();
659 CORE_ADDR fp;
660 int regnum;
c906108c 661 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 662
c906108c 663 fp = FRAME_FP (frame);
1211c4e4
AC
664 i386_frame_init_saved_regs (frame);
665
c5aa993b 666 for (regnum = 0; regnum < NUM_REGS; regnum++)
c906108c
SS
667 {
668 CORE_ADDR adr;
1211c4e4 669 adr = frame->saved_regs[regnum];
c906108c
SS
670 if (adr)
671 {
672 read_memory (adr, regbuf, REGISTER_RAW_SIZE (regnum));
673 write_register_bytes (REGISTER_BYTE (regnum), regbuf,
674 REGISTER_RAW_SIZE (regnum));
675 }
676 }
677 write_register (FP_REGNUM, read_memory_integer (fp, 4));
678 write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
679 write_register (SP_REGNUM, fp + 8);
680 flush_cached_frames ();
681}
682
683#ifdef GET_LONGJMP_TARGET
684
685/* Figure out where the longjmp will land. Slurp the args out of the stack.
686 We expect the first arg to be a pointer to the jmp_buf structure from which
687 we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
688 This routine returns true on success. */
689
690int
fba45db2 691get_longjmp_target (CORE_ADDR *pc)
c906108c
SS
692{
693 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
694 CORE_ADDR sp, jb_addr;
695
696 sp = read_register (SP_REGNUM);
697
c5aa993b 698 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack */
c906108c
SS
699 buf,
700 TARGET_PTR_BIT / TARGET_CHAR_BIT))
701 return 0;
702
703 jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
704
705 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
706 TARGET_PTR_BIT / TARGET_CHAR_BIT))
707 return 0;
708
709 *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
710
711 return 1;
712}
713
714#endif /* GET_LONGJMP_TARGET */
715
1a309862
MK
716/* These registers are used for returning integers (and on some
717 targets also for returning `struct' and `union' values when their
ef9dff19 718 size and alignment match an integer type). */
1a309862
MK
719#define LOW_RETURN_REGNUM 0 /* %eax */
720#define HIGH_RETURN_REGNUM 2 /* %edx */
721
722/* Extract from an array REGBUF containing the (raw) register state, a
723 function return value of TYPE, and copy that, in virtual format,
724 into VALBUF. */
725
c906108c 726void
1a309862 727i386_extract_return_value (struct type *type, char *regbuf, char *valbuf)
c906108c 728{
1a309862
MK
729 int len = TYPE_LENGTH (type);
730
c5aa993b 731 if (TYPE_CODE_FLT == TYPE_CODE (type))
c906108c 732 {
1a309862
MK
733 if (NUM_FREGS == 0)
734 {
735 warning ("Cannot find floating-point return value.");
736 memset (valbuf, 0, len);
ef9dff19 737 return;
1a309862
MK
738 }
739
740 /* Floating-point return values can be found in %st(0). */
741 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
742 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
743 {
744 /* Copy straight over, but take care of the padding. */
745 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM)],
746 FPU_REG_RAW_SIZE);
747 memset (valbuf + FPU_REG_RAW_SIZE, 0, len - FPU_REG_RAW_SIZE);
748 }
749 else
750 {
751 /* Convert the extended floating-point number found in
752 %st(0) to the desired type. This is probably not exactly
753 how it would happen on the target itself, but it is the
754 best we can do. */
755 DOUBLEST val;
756 floatformat_to_doublest (&floatformat_i387_ext,
757 &regbuf[REGISTER_BYTE (FP0_REGNUM)], &val);
758 store_floating (valbuf, TYPE_LENGTH (type), val);
759 }
c906108c
SS
760 }
761 else
c5aa993b 762 {
d4f3574e
SS
763 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
764 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
765
766 if (len <= low_size)
1a309862 767 memcpy (valbuf, &regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)], len);
d4f3574e
SS
768 else if (len <= (low_size + high_size))
769 {
770 memcpy (valbuf,
1a309862 771 &regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)], low_size);
d4f3574e 772 memcpy (valbuf + low_size,
1a309862 773 &regbuf[REGISTER_BYTE (HIGH_RETURN_REGNUM)], len - low_size);
d4f3574e
SS
774 }
775 else
8e65ff28
AC
776 internal_error (__FILE__, __LINE__,
777 "Cannot extract return value of %d bytes long.", len);
c906108c
SS
778 }
779}
780
ef9dff19
MK
781/* Write into the appropriate registers a function return value stored
782 in VALBUF of type TYPE, given in virtual format. */
783
784void
785i386_store_return_value (struct type *type, char *valbuf)
786{
787 int len = TYPE_LENGTH (type);
788
789 if (TYPE_CODE_FLT == TYPE_CODE (type))
790 {
791 if (NUM_FREGS == 0)
792 {
793 warning ("Cannot set floating-point return value.");
794 return;
795 }
796
797 /* Floating-point return values can be found in %st(0). */
798 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
799 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
800 {
801 /* Copy straight over. */
802 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf,
803 FPU_REG_RAW_SIZE);
804 }
805 else
806 {
807 char buf[FPU_REG_RAW_SIZE];
808 DOUBLEST val;
809
810 /* Convert the value found in VALBUF to the extended
811 floating point format used by the FPU. This is probably
812 not exactly how it would happen on the target itself, but
813 it is the best we can do. */
814 val = extract_floating (valbuf, TYPE_LENGTH (type));
815 floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
816 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf,
817 FPU_REG_RAW_SIZE);
818 }
819 }
820 else
821 {
822 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
823 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
824
825 if (len <= low_size)
826 write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM), valbuf, len);
827 else if (len <= (low_size + high_size))
828 {
829 write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM),
830 valbuf, low_size);
831 write_register_bytes (REGISTER_BYTE (HIGH_RETURN_REGNUM),
832 valbuf + low_size, len - low_size);
833 }
834 else
8e65ff28
AC
835 internal_error (__FILE__, __LINE__,
836 "Cannot store return value of %d bytes long.", len);
ef9dff19
MK
837 }
838}
839
ac27f131
MK
840/* Convert data from raw format for register REGNUM in buffer FROM to
841 virtual format with type TYPE in buffer TO. In principle both
842 formats are identical except that the virtual format has two extra
843 bytes appended that aren't used. We set these to zero. */
844
845void
846i386_register_convert_to_virtual (int regnum, struct type *type,
847 char *from, char *to)
848{
849 /* Copy straight over, but take care of the padding. */
850 memcpy (to, from, FPU_REG_RAW_SIZE);
851 memset (to + FPU_REG_RAW_SIZE, 0, TYPE_LENGTH (type) - FPU_REG_RAW_SIZE);
852}
853
854/* Convert data from virtual format with type TYPE in buffer FROM to
855 raw format for register REGNUM in buffer TO. Simply omit the two
856 unused bytes. */
857
858void
859i386_register_convert_to_raw (struct type *type, int regnum,
860 char *from, char *to)
861{
862 memcpy (to, from, FPU_REG_RAW_SIZE);
863}
864
865\f
c906108c
SS
866#ifdef I386V4_SIGTRAMP_SAVED_PC
867/* Get saved user PC for sigtramp from the pushed ucontext on the stack
868 for all three variants of SVR4 sigtramps. */
869
870CORE_ADDR
fba45db2 871i386v4_sigtramp_saved_pc (struct frame_info *frame)
c906108c
SS
872{
873 CORE_ADDR saved_pc_offset = 4;
874 char *name = NULL;
875
876 find_pc_partial_function (frame->pc, &name, NULL, NULL);
877 if (name)
878 {
879 if (STREQ (name, "_sigreturn"))
880 saved_pc_offset = 132 + 14 * 4;
881 else if (STREQ (name, "_sigacthandler"))
882 saved_pc_offset = 80 + 14 * 4;
883 else if (STREQ (name, "sigvechandler"))
884 saved_pc_offset = 120 + 14 * 4;
885 }
886
887 if (frame->next)
888 return read_memory_integer (frame->next->frame + saved_pc_offset, 4);
889 return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4);
890}
891#endif /* I386V4_SIGTRAMP_SAVED_PC */
892
a0b3c4fd 893
c906108c
SS
894#ifdef STATIC_TRANSFORM_NAME
895/* SunPRO encodes the static variables. This is not related to C++ mangling,
896 it is done for C too. */
897
898char *
fba45db2 899sunpro_static_transform_name (char *name)
c906108c
SS
900{
901 char *p;
902 if (IS_STATIC_TRANSFORM_NAME (name))
903 {
904 /* For file-local statics there will be a period, a bunch
c5aa993b
JM
905 of junk (the contents of which match a string given in the
906 N_OPT), a period and the name. For function-local statics
907 there will be a bunch of junk (which seems to change the
908 second character from 'A' to 'B'), a period, the name of the
909 function, and the name. So just skip everything before the
910 last period. */
c906108c
SS
911 p = strrchr (name, '.');
912 if (p != NULL)
913 name = p + 1;
914 }
915 return name;
916}
917#endif /* STATIC_TRANSFORM_NAME */
918
919
920
921/* Stuff for WIN32 PE style DLL's but is pretty generic really. */
922
923CORE_ADDR
fba45db2 924skip_trampoline_code (CORE_ADDR pc, char *name)
c906108c 925{
c5aa993b 926 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
c906108c 927 {
c5aa993b 928 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
c906108c 929 struct minimal_symbol *indsym =
c5aa993b
JM
930 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
931 char *symname = indsym ? SYMBOL_NAME (indsym) : 0;
c906108c 932
c5aa993b 933 if (symname)
c906108c 934 {
c5aa993b
JM
935 if (strncmp (symname, "__imp_", 6) == 0
936 || strncmp (symname, "_imp_", 5) == 0)
c906108c
SS
937 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
938 }
939 }
940 return 0; /* not a trampoline */
941}
942
943static int
fba45db2 944gdb_print_insn_i386 (bfd_vma memaddr, disassemble_info *info)
c906108c
SS
945{
946 if (disassembly_flavor == att_flavor)
947 return print_insn_i386_att (memaddr, info);
948 else if (disassembly_flavor == intel_flavor)
949 return print_insn_i386_intel (memaddr, info);
7a292a7a
SS
950 /* Never reached - disassembly_flavour is always either att_flavor
951 or intel_flavor */
e1e9e218 952 internal_error (__FILE__, __LINE__, "failed internal consistency check");
7a292a7a
SS
953}
954
955/* If the disassembly mode is intel, we have to also switch the
956 bfd mach_type. This function is run in the set disassembly_flavor
957 command, and does that. */
958
959static void
fba45db2
KB
960set_disassembly_flavor_sfunc (char *args, int from_tty,
961 struct cmd_list_element *c)
7a292a7a
SS
962{
963 set_disassembly_flavor ();
7a292a7a
SS
964}
965
966static void
fba45db2 967set_disassembly_flavor (void)
7a292a7a
SS
968{
969 if (disassembly_flavor == att_flavor)
970 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386);
971 else if (disassembly_flavor == intel_flavor)
972 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386_intel_syntax);
c906108c
SS
973}
974
2acceee2 975
c906108c 976void
fba45db2 977_initialize_i386_tdep (void)
c906108c 978{
917317f4
JM
979 /* Initialize the table saying where each register starts in the
980 register file. */
981 {
982 int i, offset;
983
984 offset = 0;
985 for (i = 0; i < MAX_NUM_REGS; i++)
986 {
987 i386_register_byte[i] = offset;
988 offset += i386_register_raw_size[i];
989 }
990 }
991
992 /* Initialize the table of virtual register sizes. */
993 {
994 int i;
995
996 for (i = 0; i < MAX_NUM_REGS; i++)
997 i386_register_virtual_size[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i));
998 }
c5aa993b 999
c906108c
SS
1000 tm_print_insn = gdb_print_insn_i386;
1001 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach;
1002
1003 /* Add the variable that controls the disassembly flavor */
917317f4
JM
1004 {
1005 struct cmd_list_element *new_cmd;
7a292a7a 1006
917317f4
JM
1007 new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class,
1008 valid_flavors,
1ed2a135 1009 &disassembly_flavor,
917317f4 1010 "Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
c906108c 1011and the default value is \"att\".",
917317f4
JM
1012 &setlist);
1013 new_cmd->function.sfunc = set_disassembly_flavor_sfunc;
1014 add_show_from_set (new_cmd, &showlist);
1015 }
c5aa993b 1016
7a292a7a
SS
1017 /* Finally, initialize the disassembly flavor to the default given
1018 in the disassembly_flavor variable */
c906108c 1019
7a292a7a 1020 set_disassembly_flavor ();
c906108c 1021}
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