Commit | Line | Data |
---|---|---|
c906108c | 1 | /* Intel 386 target-dependent stuff. |
349c5d5f | 2 | |
6aba47ca DJ |
3 | Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, |
4 | 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 | |
5ae96ec1 | 5 | Free Software Foundation, Inc. |
c906108c | 6 | |
c5aa993b | 7 | This file is part of GDB. |
c906108c | 8 | |
c5aa993b JM |
9 | This program is free software; you can redistribute it and/or modify |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2 of the License, or | |
12 | (at your option) any later version. | |
c906108c | 13 | |
c5aa993b JM |
14 | This program is distributed in the hope that it will be useful, |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
c906108c | 18 | |
c5aa993b JM |
19 | You should have received a copy of the GNU General Public License |
20 | along with this program; if not, write to the Free Software | |
197e01b6 EZ |
21 | Foundation, Inc., 51 Franklin Street, Fifth Floor, |
22 | Boston, MA 02110-1301, USA. */ | |
c906108c SS |
23 | |
24 | #include "defs.h" | |
acd5c798 MK |
25 | #include "arch-utils.h" |
26 | #include "command.h" | |
27 | #include "dummy-frame.h" | |
6405b0a6 | 28 | #include "dwarf2-frame.h" |
acd5c798 | 29 | #include "doublest.h" |
c906108c | 30 | #include "frame.h" |
acd5c798 MK |
31 | #include "frame-base.h" |
32 | #include "frame-unwind.h" | |
c906108c | 33 | #include "inferior.h" |
acd5c798 | 34 | #include "gdbcmd.h" |
c906108c | 35 | #include "gdbcore.h" |
e6bb342a | 36 | #include "gdbtypes.h" |
dfe01d39 | 37 | #include "objfiles.h" |
acd5c798 MK |
38 | #include "osabi.h" |
39 | #include "regcache.h" | |
40 | #include "reggroups.h" | |
473f17b0 | 41 | #include "regset.h" |
c0d1d883 | 42 | #include "symfile.h" |
c906108c | 43 | #include "symtab.h" |
acd5c798 | 44 | #include "target.h" |
fd0407d6 | 45 | #include "value.h" |
a89aa300 | 46 | #include "dis-asm.h" |
acd5c798 | 47 | |
3d261580 | 48 | #include "gdb_assert.h" |
acd5c798 | 49 | #include "gdb_string.h" |
3d261580 | 50 | |
d2a7c97a | 51 | #include "i386-tdep.h" |
61113f8b | 52 | #include "i387-tdep.h" |
d2a7c97a | 53 | |
c4fc7f1b | 54 | /* Register names. */ |
c40e1eab | 55 | |
fc633446 MK |
56 | static char *i386_register_names[] = |
57 | { | |
58 | "eax", "ecx", "edx", "ebx", | |
59 | "esp", "ebp", "esi", "edi", | |
60 | "eip", "eflags", "cs", "ss", | |
61 | "ds", "es", "fs", "gs", | |
62 | "st0", "st1", "st2", "st3", | |
63 | "st4", "st5", "st6", "st7", | |
64 | "fctrl", "fstat", "ftag", "fiseg", | |
65 | "fioff", "foseg", "fooff", "fop", | |
66 | "xmm0", "xmm1", "xmm2", "xmm3", | |
67 | "xmm4", "xmm5", "xmm6", "xmm7", | |
68 | "mxcsr" | |
69 | }; | |
70 | ||
1cb97e17 | 71 | static const int i386_num_register_names = ARRAY_SIZE (i386_register_names); |
c40e1eab | 72 | |
c4fc7f1b | 73 | /* Register names for MMX pseudo-registers. */ |
28fc6740 AC |
74 | |
75 | static char *i386_mmx_names[] = | |
76 | { | |
77 | "mm0", "mm1", "mm2", "mm3", | |
78 | "mm4", "mm5", "mm6", "mm7" | |
79 | }; | |
c40e1eab | 80 | |
1cb97e17 | 81 | static const int i386_num_mmx_regs = ARRAY_SIZE (i386_mmx_names); |
c40e1eab | 82 | |
28fc6740 | 83 | static int |
5716833c | 84 | i386_mmx_regnum_p (struct gdbarch *gdbarch, int regnum) |
28fc6740 | 85 | { |
5716833c MK |
86 | int mm0_regnum = gdbarch_tdep (gdbarch)->mm0_regnum; |
87 | ||
88 | if (mm0_regnum < 0) | |
89 | return 0; | |
90 | ||
91 | return (regnum >= mm0_regnum && regnum < mm0_regnum + i386_num_mmx_regs); | |
28fc6740 AC |
92 | } |
93 | ||
5716833c | 94 | /* SSE register? */ |
23a34459 | 95 | |
5716833c MK |
96 | static int |
97 | i386_sse_regnum_p (struct gdbarch *gdbarch, int regnum) | |
23a34459 | 98 | { |
5716833c MK |
99 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
100 | ||
101 | #define I387_ST0_REGNUM tdep->st0_regnum | |
102 | #define I387_NUM_XMM_REGS tdep->num_xmm_regs | |
103 | ||
104 | if (I387_NUM_XMM_REGS == 0) | |
105 | return 0; | |
106 | ||
107 | return (I387_XMM0_REGNUM <= regnum && regnum < I387_MXCSR_REGNUM); | |
108 | ||
109 | #undef I387_ST0_REGNUM | |
110 | #undef I387_NUM_XMM_REGS | |
23a34459 AC |
111 | } |
112 | ||
5716833c MK |
113 | static int |
114 | i386_mxcsr_regnum_p (struct gdbarch *gdbarch, int regnum) | |
23a34459 | 115 | { |
5716833c MK |
116 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
117 | ||
118 | #define I387_ST0_REGNUM tdep->st0_regnum | |
119 | #define I387_NUM_XMM_REGS tdep->num_xmm_regs | |
120 | ||
121 | if (I387_NUM_XMM_REGS == 0) | |
122 | return 0; | |
123 | ||
124 | return (regnum == I387_MXCSR_REGNUM); | |
125 | ||
126 | #undef I387_ST0_REGNUM | |
127 | #undef I387_NUM_XMM_REGS | |
23a34459 AC |
128 | } |
129 | ||
5716833c MK |
130 | #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum) |
131 | #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum) | |
132 | #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs) | |
133 | ||
134 | /* FP register? */ | |
23a34459 AC |
135 | |
136 | int | |
5716833c | 137 | i386_fp_regnum_p (int regnum) |
23a34459 | 138 | { |
5716833c MK |
139 | if (I387_ST0_REGNUM < 0) |
140 | return 0; | |
141 | ||
142 | return (I387_ST0_REGNUM <= regnum && regnum < I387_FCTRL_REGNUM); | |
23a34459 AC |
143 | } |
144 | ||
145 | int | |
5716833c | 146 | i386_fpc_regnum_p (int regnum) |
23a34459 | 147 | { |
5716833c MK |
148 | if (I387_ST0_REGNUM < 0) |
149 | return 0; | |
150 | ||
151 | return (I387_FCTRL_REGNUM <= regnum && regnum < I387_XMM0_REGNUM); | |
23a34459 AC |
152 | } |
153 | ||
30b0e2d8 | 154 | /* Return the name of register REGNUM. */ |
fc633446 | 155 | |
fa88f677 | 156 | const char * |
30b0e2d8 | 157 | i386_register_name (int regnum) |
fc633446 | 158 | { |
30b0e2d8 MK |
159 | if (i386_mmx_regnum_p (current_gdbarch, regnum)) |
160 | return i386_mmx_names[regnum - I387_MM0_REGNUM]; | |
fc633446 | 161 | |
30b0e2d8 MK |
162 | if (regnum >= 0 && regnum < i386_num_register_names) |
163 | return i386_register_names[regnum]; | |
70913449 | 164 | |
c40e1eab | 165 | return NULL; |
fc633446 MK |
166 | } |
167 | ||
c4fc7f1b | 168 | /* Convert a dbx register number REG to the appropriate register |
85540d8c MK |
169 | number used by GDB. */ |
170 | ||
8201327c | 171 | static int |
c4fc7f1b | 172 | i386_dbx_reg_to_regnum (int reg) |
85540d8c | 173 | { |
c4fc7f1b MK |
174 | /* This implements what GCC calls the "default" register map |
175 | (dbx_register_map[]). */ | |
176 | ||
85540d8c MK |
177 | if (reg >= 0 && reg <= 7) |
178 | { | |
9872ad24 JB |
179 | /* General-purpose registers. The debug info calls %ebp |
180 | register 4, and %esp register 5. */ | |
181 | if (reg == 4) | |
182 | return 5; | |
183 | else if (reg == 5) | |
184 | return 4; | |
185 | else return reg; | |
85540d8c MK |
186 | } |
187 | else if (reg >= 12 && reg <= 19) | |
188 | { | |
189 | /* Floating-point registers. */ | |
5716833c | 190 | return reg - 12 + I387_ST0_REGNUM; |
85540d8c MK |
191 | } |
192 | else if (reg >= 21 && reg <= 28) | |
193 | { | |
194 | /* SSE registers. */ | |
5716833c | 195 | return reg - 21 + I387_XMM0_REGNUM; |
85540d8c MK |
196 | } |
197 | else if (reg >= 29 && reg <= 36) | |
198 | { | |
199 | /* MMX registers. */ | |
5716833c | 200 | return reg - 29 + I387_MM0_REGNUM; |
85540d8c MK |
201 | } |
202 | ||
203 | /* This will hopefully provoke a warning. */ | |
f57d151a UW |
204 | return gdbarch_num_regs (current_gdbarch) |
205 | + gdbarch_num_pseudo_regs (current_gdbarch); | |
85540d8c MK |
206 | } |
207 | ||
c4fc7f1b MK |
208 | /* Convert SVR4 register number REG to the appropriate register number |
209 | used by GDB. */ | |
85540d8c | 210 | |
8201327c | 211 | static int |
c4fc7f1b | 212 | i386_svr4_reg_to_regnum (int reg) |
85540d8c | 213 | { |
c4fc7f1b MK |
214 | /* This implements the GCC register map that tries to be compatible |
215 | with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */ | |
216 | ||
217 | /* The SVR4 register numbering includes %eip and %eflags, and | |
85540d8c MK |
218 | numbers the floating point registers differently. */ |
219 | if (reg >= 0 && reg <= 9) | |
220 | { | |
acd5c798 | 221 | /* General-purpose registers. */ |
85540d8c MK |
222 | return reg; |
223 | } | |
224 | else if (reg >= 11 && reg <= 18) | |
225 | { | |
226 | /* Floating-point registers. */ | |
5716833c | 227 | return reg - 11 + I387_ST0_REGNUM; |
85540d8c | 228 | } |
c6f4c129 | 229 | else if (reg >= 21 && reg <= 36) |
85540d8c | 230 | { |
c4fc7f1b MK |
231 | /* The SSE and MMX registers have the same numbers as with dbx. */ |
232 | return i386_dbx_reg_to_regnum (reg); | |
85540d8c MK |
233 | } |
234 | ||
c6f4c129 JB |
235 | switch (reg) |
236 | { | |
237 | case 37: return I387_FCTRL_REGNUM; | |
238 | case 38: return I387_FSTAT_REGNUM; | |
239 | case 39: return I387_MXCSR_REGNUM; | |
240 | case 40: return I386_ES_REGNUM; | |
241 | case 41: return I386_CS_REGNUM; | |
242 | case 42: return I386_SS_REGNUM; | |
243 | case 43: return I386_DS_REGNUM; | |
244 | case 44: return I386_FS_REGNUM; | |
245 | case 45: return I386_GS_REGNUM; | |
246 | } | |
247 | ||
85540d8c | 248 | /* This will hopefully provoke a warning. */ |
f57d151a UW |
249 | return gdbarch_num_regs (current_gdbarch) |
250 | + gdbarch_num_pseudo_regs (current_gdbarch); | |
85540d8c | 251 | } |
5716833c MK |
252 | |
253 | #undef I387_ST0_REGNUM | |
254 | #undef I387_MM0_REGNUM | |
255 | #undef I387_NUM_XMM_REGS | |
fc338970 | 256 | \f |
917317f4 | 257 | |
fc338970 MK |
258 | /* This is the variable that is set with "set disassembly-flavor", and |
259 | its legitimate values. */ | |
53904c9e AC |
260 | static const char att_flavor[] = "att"; |
261 | static const char intel_flavor[] = "intel"; | |
262 | static const char *valid_flavors[] = | |
c5aa993b | 263 | { |
c906108c SS |
264 | att_flavor, |
265 | intel_flavor, | |
266 | NULL | |
267 | }; | |
53904c9e | 268 | static const char *disassembly_flavor = att_flavor; |
acd5c798 | 269 | \f |
c906108c | 270 | |
acd5c798 MK |
271 | /* Use the program counter to determine the contents and size of a |
272 | breakpoint instruction. Return a pointer to a string of bytes that | |
273 | encode a breakpoint instruction, store the length of the string in | |
274 | *LEN and optionally adjust *PC to point to the correct memory | |
275 | location for inserting the breakpoint. | |
c906108c | 276 | |
acd5c798 MK |
277 | On the i386 we have a single breakpoint that fits in a single byte |
278 | and can be inserted anywhere. | |
c906108c | 279 | |
acd5c798 | 280 | This function is 64-bit safe. */ |
63c0089f MK |
281 | |
282 | static const gdb_byte * | |
acd5c798 | 283 | i386_breakpoint_from_pc (CORE_ADDR *pc, int *len) |
c906108c | 284 | { |
63c0089f MK |
285 | static gdb_byte break_insn[] = { 0xcc }; /* int 3 */ |
286 | ||
acd5c798 MK |
287 | *len = sizeof (break_insn); |
288 | return break_insn; | |
c906108c | 289 | } |
fc338970 | 290 | \f |
acd5c798 MK |
291 | #ifdef I386_REGNO_TO_SYMMETRY |
292 | #error "The Sequent Symmetry is no longer supported." | |
293 | #endif | |
c906108c | 294 | |
acd5c798 MK |
295 | /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi |
296 | and %esp "belong" to the calling function. Therefore these | |
297 | registers should be saved if they're going to be modified. */ | |
c906108c | 298 | |
acd5c798 MK |
299 | /* The maximum number of saved registers. This should include all |
300 | registers mentioned above, and %eip. */ | |
a3386186 | 301 | #define I386_NUM_SAVED_REGS I386_NUM_GREGS |
acd5c798 MK |
302 | |
303 | struct i386_frame_cache | |
c906108c | 304 | { |
acd5c798 MK |
305 | /* Base address. */ |
306 | CORE_ADDR base; | |
772562f8 | 307 | LONGEST sp_offset; |
acd5c798 MK |
308 | CORE_ADDR pc; |
309 | ||
fd13a04a AC |
310 | /* Saved registers. */ |
311 | CORE_ADDR saved_regs[I386_NUM_SAVED_REGS]; | |
acd5c798 | 312 | CORE_ADDR saved_sp; |
92dd43fa | 313 | int stack_align; |
acd5c798 MK |
314 | int pc_in_eax; |
315 | ||
316 | /* Stack space reserved for local variables. */ | |
317 | long locals; | |
318 | }; | |
319 | ||
320 | /* Allocate and initialize a frame cache. */ | |
321 | ||
322 | static struct i386_frame_cache * | |
fd13a04a | 323 | i386_alloc_frame_cache (void) |
acd5c798 MK |
324 | { |
325 | struct i386_frame_cache *cache; | |
326 | int i; | |
327 | ||
328 | cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache); | |
329 | ||
330 | /* Base address. */ | |
331 | cache->base = 0; | |
332 | cache->sp_offset = -4; | |
333 | cache->pc = 0; | |
334 | ||
fd13a04a AC |
335 | /* Saved registers. We initialize these to -1 since zero is a valid |
336 | offset (that's where %ebp is supposed to be stored). */ | |
337 | for (i = 0; i < I386_NUM_SAVED_REGS; i++) | |
338 | cache->saved_regs[i] = -1; | |
acd5c798 | 339 | cache->saved_sp = 0; |
92dd43fa | 340 | cache->stack_align = 0; |
acd5c798 MK |
341 | cache->pc_in_eax = 0; |
342 | ||
343 | /* Frameless until proven otherwise. */ | |
344 | cache->locals = -1; | |
345 | ||
346 | return cache; | |
347 | } | |
c906108c | 348 | |
acd5c798 MK |
349 | /* If the instruction at PC is a jump, return the address of its |
350 | target. Otherwise, return PC. */ | |
c906108c | 351 | |
acd5c798 MK |
352 | static CORE_ADDR |
353 | i386_follow_jump (CORE_ADDR pc) | |
354 | { | |
63c0089f | 355 | gdb_byte op; |
acd5c798 MK |
356 | long delta = 0; |
357 | int data16 = 0; | |
c906108c | 358 | |
24a2a654 | 359 | read_memory_nobpt (pc, &op, 1); |
acd5c798 | 360 | if (op == 0x66) |
c906108c | 361 | { |
c906108c | 362 | data16 = 1; |
acd5c798 | 363 | op = read_memory_unsigned_integer (pc + 1, 1); |
c906108c SS |
364 | } |
365 | ||
acd5c798 | 366 | switch (op) |
c906108c SS |
367 | { |
368 | case 0xe9: | |
fc338970 | 369 | /* Relative jump: if data16 == 0, disp32, else disp16. */ |
c906108c SS |
370 | if (data16) |
371 | { | |
acd5c798 | 372 | delta = read_memory_integer (pc + 2, 2); |
c906108c | 373 | |
fc338970 MK |
374 | /* Include the size of the jmp instruction (including the |
375 | 0x66 prefix). */ | |
acd5c798 | 376 | delta += 4; |
c906108c SS |
377 | } |
378 | else | |
379 | { | |
acd5c798 | 380 | delta = read_memory_integer (pc + 1, 4); |
c906108c | 381 | |
acd5c798 MK |
382 | /* Include the size of the jmp instruction. */ |
383 | delta += 5; | |
c906108c SS |
384 | } |
385 | break; | |
386 | case 0xeb: | |
fc338970 | 387 | /* Relative jump, disp8 (ignore data16). */ |
acd5c798 | 388 | delta = read_memory_integer (pc + data16 + 1, 1); |
c906108c | 389 | |
acd5c798 | 390 | delta += data16 + 2; |
c906108c SS |
391 | break; |
392 | } | |
c906108c | 393 | |
acd5c798 MK |
394 | return pc + delta; |
395 | } | |
fc338970 | 396 | |
acd5c798 MK |
397 | /* Check whether PC points at a prologue for a function returning a |
398 | structure or union. If so, it updates CACHE and returns the | |
399 | address of the first instruction after the code sequence that | |
400 | removes the "hidden" argument from the stack or CURRENT_PC, | |
401 | whichever is smaller. Otherwise, return PC. */ | |
c906108c | 402 | |
acd5c798 MK |
403 | static CORE_ADDR |
404 | i386_analyze_struct_return (CORE_ADDR pc, CORE_ADDR current_pc, | |
405 | struct i386_frame_cache *cache) | |
c906108c | 406 | { |
acd5c798 MK |
407 | /* Functions that return a structure or union start with: |
408 | ||
409 | popl %eax 0x58 | |
410 | xchgl %eax, (%esp) 0x87 0x04 0x24 | |
411 | or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00 | |
412 | ||
413 | (the System V compiler puts out the second `xchg' instruction, | |
414 | and the assembler doesn't try to optimize it, so the 'sib' form | |
415 | gets generated). This sequence is used to get the address of the | |
416 | return buffer for a function that returns a structure. */ | |
63c0089f MK |
417 | static gdb_byte proto1[3] = { 0x87, 0x04, 0x24 }; |
418 | static gdb_byte proto2[4] = { 0x87, 0x44, 0x24, 0x00 }; | |
419 | gdb_byte buf[4]; | |
420 | gdb_byte op; | |
c906108c | 421 | |
acd5c798 MK |
422 | if (current_pc <= pc) |
423 | return pc; | |
424 | ||
24a2a654 | 425 | read_memory_nobpt (pc, &op, 1); |
c906108c | 426 | |
acd5c798 MK |
427 | if (op != 0x58) /* popl %eax */ |
428 | return pc; | |
c906108c | 429 | |
24a2a654 | 430 | read_memory_nobpt (pc + 1, buf, 4); |
acd5c798 MK |
431 | if (memcmp (buf, proto1, 3) != 0 && memcmp (buf, proto2, 4) != 0) |
432 | return pc; | |
c906108c | 433 | |
acd5c798 | 434 | if (current_pc == pc) |
c906108c | 435 | { |
acd5c798 MK |
436 | cache->sp_offset += 4; |
437 | return current_pc; | |
c906108c SS |
438 | } |
439 | ||
acd5c798 | 440 | if (current_pc == pc + 1) |
c906108c | 441 | { |
acd5c798 MK |
442 | cache->pc_in_eax = 1; |
443 | return current_pc; | |
444 | } | |
445 | ||
446 | if (buf[1] == proto1[1]) | |
447 | return pc + 4; | |
448 | else | |
449 | return pc + 5; | |
450 | } | |
451 | ||
452 | static CORE_ADDR | |
453 | i386_skip_probe (CORE_ADDR pc) | |
454 | { | |
455 | /* A function may start with | |
fc338970 | 456 | |
acd5c798 MK |
457 | pushl constant |
458 | call _probe | |
459 | addl $4, %esp | |
fc338970 | 460 | |
acd5c798 MK |
461 | followed by |
462 | ||
463 | pushl %ebp | |
fc338970 | 464 | |
acd5c798 | 465 | etc. */ |
63c0089f MK |
466 | gdb_byte buf[8]; |
467 | gdb_byte op; | |
fc338970 | 468 | |
24a2a654 | 469 | read_memory_nobpt (pc, &op, 1); |
acd5c798 MK |
470 | |
471 | if (op == 0x68 || op == 0x6a) | |
472 | { | |
473 | int delta; | |
c906108c | 474 | |
acd5c798 MK |
475 | /* Skip past the `pushl' instruction; it has either a one-byte or a |
476 | four-byte operand, depending on the opcode. */ | |
c906108c | 477 | if (op == 0x68) |
acd5c798 | 478 | delta = 5; |
c906108c | 479 | else |
acd5c798 | 480 | delta = 2; |
c906108c | 481 | |
acd5c798 MK |
482 | /* Read the following 8 bytes, which should be `call _probe' (6 |
483 | bytes) followed by `addl $4,%esp' (2 bytes). */ | |
484 | read_memory (pc + delta, buf, sizeof (buf)); | |
c906108c | 485 | if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4) |
acd5c798 | 486 | pc += delta + sizeof (buf); |
c906108c SS |
487 | } |
488 | ||
acd5c798 MK |
489 | return pc; |
490 | } | |
491 | ||
92dd43fa MK |
492 | /* GCC 4.1 and later, can put code in the prologue to realign the |
493 | stack pointer. Check whether PC points to such code, and update | |
494 | CACHE accordingly. Return the first instruction after the code | |
495 | sequence or CURRENT_PC, whichever is smaller. If we don't | |
496 | recognize the code, return PC. */ | |
497 | ||
498 | static CORE_ADDR | |
499 | i386_analyze_stack_align (CORE_ADDR pc, CORE_ADDR current_pc, | |
500 | struct i386_frame_cache *cache) | |
501 | { | |
92a56b20 JB |
502 | /* The register used by the compiler to perform the stack re-alignment |
503 | is, in order of preference, either %ecx, %edx, or %eax. GCC should | |
504 | never use %ebx as it always treats it as callee-saved, whereas | |
505 | the compiler can only use caller-saved registers. */ | |
ade52156 | 506 | static const gdb_byte insns_ecx[10] = { |
92dd43fa MK |
507 | 0x8d, 0x4c, 0x24, 0x04, /* leal 4(%esp), %ecx */ |
508 | 0x83, 0xe4, 0xf0, /* andl $-16, %esp */ | |
509 | 0xff, 0x71, 0xfc /* pushl -4(%ecx) */ | |
510 | }; | |
ade52156 JB |
511 | static const gdb_byte insns_edx[10] = { |
512 | 0x8d, 0x54, 0x24, 0x04, /* leal 4(%esp), %edx */ | |
513 | 0x83, 0xe4, 0xf0, /* andl $-16, %esp */ | |
514 | 0xff, 0x72, 0xfc /* pushl -4(%edx) */ | |
515 | }; | |
516 | static const gdb_byte insns_eax[10] = { | |
517 | 0x8d, 0x44, 0x24, 0x04, /* leal 4(%esp), %eax */ | |
518 | 0x83, 0xe4, 0xf0, /* andl $-16, %esp */ | |
519 | 0xff, 0x70, 0xfc /* pushl -4(%eax) */ | |
520 | }; | |
92dd43fa MK |
521 | gdb_byte buf[10]; |
522 | ||
523 | if (target_read_memory (pc, buf, sizeof buf) | |
ade52156 JB |
524 | || (memcmp (buf, insns_ecx, sizeof buf) != 0 |
525 | && memcmp (buf, insns_edx, sizeof buf) != 0 | |
526 | && memcmp (buf, insns_eax, sizeof buf) != 0)) | |
92dd43fa MK |
527 | return pc; |
528 | ||
529 | if (current_pc > pc + 4) | |
530 | cache->stack_align = 1; | |
531 | ||
532 | return min (pc + 10, current_pc); | |
533 | } | |
534 | ||
37bdc87e MK |
535 | /* Maximum instruction length we need to handle. */ |
536 | #define I386_MAX_INSN_LEN 6 | |
537 | ||
538 | /* Instruction description. */ | |
539 | struct i386_insn | |
540 | { | |
541 | size_t len; | |
63c0089f MK |
542 | gdb_byte insn[I386_MAX_INSN_LEN]; |
543 | gdb_byte mask[I386_MAX_INSN_LEN]; | |
37bdc87e MK |
544 | }; |
545 | ||
546 | /* Search for the instruction at PC in the list SKIP_INSNS. Return | |
547 | the first instruction description that matches. Otherwise, return | |
548 | NULL. */ | |
549 | ||
550 | static struct i386_insn * | |
551 | i386_match_insn (CORE_ADDR pc, struct i386_insn *skip_insns) | |
552 | { | |
553 | struct i386_insn *insn; | |
63c0089f | 554 | gdb_byte op; |
37bdc87e | 555 | |
24a2a654 | 556 | read_memory_nobpt (pc, &op, 1); |
37bdc87e MK |
557 | |
558 | for (insn = skip_insns; insn->len > 0; insn++) | |
559 | { | |
560 | if ((op & insn->mask[0]) == insn->insn[0]) | |
561 | { | |
613e8135 MK |
562 | gdb_byte buf[I386_MAX_INSN_LEN - 1]; |
563 | int insn_matched = 1; | |
37bdc87e MK |
564 | size_t i; |
565 | ||
566 | gdb_assert (insn->len > 1); | |
567 | gdb_assert (insn->len <= I386_MAX_INSN_LEN); | |
568 | ||
24a2a654 | 569 | read_memory_nobpt (pc + 1, buf, insn->len - 1); |
37bdc87e MK |
570 | for (i = 1; i < insn->len; i++) |
571 | { | |
572 | if ((buf[i - 1] & insn->mask[i]) != insn->insn[i]) | |
613e8135 | 573 | insn_matched = 0; |
37bdc87e | 574 | } |
613e8135 MK |
575 | |
576 | if (insn_matched) | |
577 | return insn; | |
37bdc87e MK |
578 | } |
579 | } | |
580 | ||
581 | return NULL; | |
582 | } | |
583 | ||
584 | /* Some special instructions that might be migrated by GCC into the | |
585 | part of the prologue that sets up the new stack frame. Because the | |
586 | stack frame hasn't been setup yet, no registers have been saved | |
587 | yet, and only the scratch registers %eax, %ecx and %edx can be | |
588 | touched. */ | |
589 | ||
590 | struct i386_insn i386_frame_setup_skip_insns[] = | |
591 | { | |
592 | /* Check for `movb imm8, r' and `movl imm32, r'. | |
593 | ||
594 | ??? Should we handle 16-bit operand-sizes here? */ | |
595 | ||
596 | /* `movb imm8, %al' and `movb imm8, %ah' */ | |
597 | /* `movb imm8, %cl' and `movb imm8, %ch' */ | |
598 | { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } }, | |
599 | /* `movb imm8, %dl' and `movb imm8, %dh' */ | |
600 | { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } }, | |
601 | /* `movl imm32, %eax' and `movl imm32, %ecx' */ | |
602 | { 5, { 0xb8 }, { 0xfe } }, | |
603 | /* `movl imm32, %edx' */ | |
604 | { 5, { 0xba }, { 0xff } }, | |
605 | ||
606 | /* Check for `mov imm32, r32'. Note that there is an alternative | |
607 | encoding for `mov m32, %eax'. | |
608 | ||
609 | ??? Should we handle SIB adressing here? | |
610 | ??? Should we handle 16-bit operand-sizes here? */ | |
611 | ||
612 | /* `movl m32, %eax' */ | |
613 | { 5, { 0xa1 }, { 0xff } }, | |
614 | /* `movl m32, %eax' and `mov; m32, %ecx' */ | |
615 | { 6, { 0x89, 0x05 }, {0xff, 0xf7 } }, | |
616 | /* `movl m32, %edx' */ | |
617 | { 6, { 0x89, 0x15 }, {0xff, 0xff } }, | |
618 | ||
619 | /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'. | |
620 | Because of the symmetry, there are actually two ways to encode | |
621 | these instructions; opcode bytes 0x29 and 0x2b for `subl' and | |
622 | opcode bytes 0x31 and 0x33 for `xorl'. */ | |
623 | ||
624 | /* `subl %eax, %eax' */ | |
625 | { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } }, | |
626 | /* `subl %ecx, %ecx' */ | |
627 | { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } }, | |
628 | /* `subl %edx, %edx' */ | |
629 | { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } }, | |
630 | /* `xorl %eax, %eax' */ | |
631 | { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } }, | |
632 | /* `xorl %ecx, %ecx' */ | |
633 | { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } }, | |
634 | /* `xorl %edx, %edx' */ | |
635 | { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } }, | |
636 | { 0 } | |
637 | }; | |
638 | ||
acd5c798 MK |
639 | /* Check whether PC points at a code that sets up a new stack frame. |
640 | If so, it updates CACHE and returns the address of the first | |
37bdc87e MK |
641 | instruction after the sequence that sets up the frame or LIMIT, |
642 | whichever is smaller. If we don't recognize the code, return PC. */ | |
acd5c798 MK |
643 | |
644 | static CORE_ADDR | |
37bdc87e | 645 | i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR limit, |
acd5c798 MK |
646 | struct i386_frame_cache *cache) |
647 | { | |
37bdc87e | 648 | struct i386_insn *insn; |
63c0089f | 649 | gdb_byte op; |
26604a34 | 650 | int skip = 0; |
acd5c798 | 651 | |
37bdc87e MK |
652 | if (limit <= pc) |
653 | return limit; | |
acd5c798 | 654 | |
24a2a654 | 655 | read_memory_nobpt (pc, &op, 1); |
acd5c798 | 656 | |
c906108c | 657 | if (op == 0x55) /* pushl %ebp */ |
c5aa993b | 658 | { |
acd5c798 MK |
659 | /* Take into account that we've executed the `pushl %ebp' that |
660 | starts this instruction sequence. */ | |
fd13a04a | 661 | cache->saved_regs[I386_EBP_REGNUM] = 0; |
acd5c798 | 662 | cache->sp_offset += 4; |
37bdc87e | 663 | pc++; |
acd5c798 MK |
664 | |
665 | /* If that's all, return now. */ | |
37bdc87e MK |
666 | if (limit <= pc) |
667 | return limit; | |
26604a34 | 668 | |
b4632131 | 669 | /* Check for some special instructions that might be migrated by |
37bdc87e MK |
670 | GCC into the prologue and skip them. At this point in the |
671 | prologue, code should only touch the scratch registers %eax, | |
672 | %ecx and %edx, so while the number of posibilities is sheer, | |
673 | it is limited. | |
5daa5b4e | 674 | |
26604a34 MK |
675 | Make sure we only skip these instructions if we later see the |
676 | `movl %esp, %ebp' that actually sets up the frame. */ | |
37bdc87e | 677 | while (pc + skip < limit) |
26604a34 | 678 | { |
37bdc87e MK |
679 | insn = i386_match_insn (pc + skip, i386_frame_setup_skip_insns); |
680 | if (insn == NULL) | |
681 | break; | |
b4632131 | 682 | |
37bdc87e | 683 | skip += insn->len; |
26604a34 MK |
684 | } |
685 | ||
37bdc87e MK |
686 | /* If that's all, return now. */ |
687 | if (limit <= pc + skip) | |
688 | return limit; | |
689 | ||
24a2a654 | 690 | read_memory_nobpt (pc + skip, &op, 1); |
37bdc87e | 691 | |
26604a34 | 692 | /* Check for `movl %esp, %ebp' -- can be written in two ways. */ |
acd5c798 | 693 | switch (op) |
c906108c SS |
694 | { |
695 | case 0x8b: | |
37bdc87e MK |
696 | if (read_memory_unsigned_integer (pc + skip + 1, 1) != 0xec) |
697 | return pc; | |
c906108c SS |
698 | break; |
699 | case 0x89: | |
37bdc87e MK |
700 | if (read_memory_unsigned_integer (pc + skip + 1, 1) != 0xe5) |
701 | return pc; | |
c906108c SS |
702 | break; |
703 | default: | |
37bdc87e | 704 | return pc; |
c906108c | 705 | } |
acd5c798 | 706 | |
26604a34 MK |
707 | /* OK, we actually have a frame. We just don't know how large |
708 | it is yet. Set its size to zero. We'll adjust it if | |
709 | necessary. We also now commit to skipping the special | |
710 | instructions mentioned before. */ | |
acd5c798 | 711 | cache->locals = 0; |
37bdc87e | 712 | pc += (skip + 2); |
acd5c798 MK |
713 | |
714 | /* If that's all, return now. */ | |
37bdc87e MK |
715 | if (limit <= pc) |
716 | return limit; | |
acd5c798 | 717 | |
fc338970 MK |
718 | /* Check for stack adjustment |
719 | ||
acd5c798 | 720 | subl $XXX, %esp |
fc338970 | 721 | |
fd35795f | 722 | NOTE: You can't subtract a 16-bit immediate from a 32-bit |
fc338970 | 723 | reg, so we don't have to worry about a data16 prefix. */ |
24a2a654 | 724 | read_memory_nobpt (pc, &op, 1); |
c906108c SS |
725 | if (op == 0x83) |
726 | { | |
fd35795f | 727 | /* `subl' with 8-bit immediate. */ |
37bdc87e | 728 | if (read_memory_unsigned_integer (pc + 1, 1) != 0xec) |
fc338970 | 729 | /* Some instruction starting with 0x83 other than `subl'. */ |
37bdc87e | 730 | return pc; |
acd5c798 | 731 | |
37bdc87e MK |
732 | /* `subl' with signed 8-bit immediate (though it wouldn't |
733 | make sense to be negative). */ | |
734 | cache->locals = read_memory_integer (pc + 2, 1); | |
735 | return pc + 3; | |
c906108c SS |
736 | } |
737 | else if (op == 0x81) | |
738 | { | |
fd35795f | 739 | /* Maybe it is `subl' with a 32-bit immediate. */ |
37bdc87e | 740 | if (read_memory_unsigned_integer (pc + 1, 1) != 0xec) |
fc338970 | 741 | /* Some instruction starting with 0x81 other than `subl'. */ |
37bdc87e | 742 | return pc; |
acd5c798 | 743 | |
fd35795f | 744 | /* It is `subl' with a 32-bit immediate. */ |
37bdc87e MK |
745 | cache->locals = read_memory_integer (pc + 2, 4); |
746 | return pc + 6; | |
c906108c SS |
747 | } |
748 | else | |
749 | { | |
acd5c798 | 750 | /* Some instruction other than `subl'. */ |
37bdc87e | 751 | return pc; |
c906108c SS |
752 | } |
753 | } | |
37bdc87e | 754 | else if (op == 0xc8) /* enter */ |
c906108c | 755 | { |
acd5c798 MK |
756 | cache->locals = read_memory_unsigned_integer (pc + 1, 2); |
757 | return pc + 4; | |
c906108c | 758 | } |
21d0e8a4 | 759 | |
acd5c798 | 760 | return pc; |
21d0e8a4 MK |
761 | } |
762 | ||
acd5c798 MK |
763 | /* Check whether PC points at code that saves registers on the stack. |
764 | If so, it updates CACHE and returns the address of the first | |
765 | instruction after the register saves or CURRENT_PC, whichever is | |
766 | smaller. Otherwise, return PC. */ | |
6bff26de MK |
767 | |
768 | static CORE_ADDR | |
acd5c798 MK |
769 | i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc, |
770 | struct i386_frame_cache *cache) | |
6bff26de | 771 | { |
99ab4326 | 772 | CORE_ADDR offset = 0; |
63c0089f | 773 | gdb_byte op; |
99ab4326 | 774 | int i; |
c0d1d883 | 775 | |
99ab4326 MK |
776 | if (cache->locals > 0) |
777 | offset -= cache->locals; | |
778 | for (i = 0; i < 8 && pc < current_pc; i++) | |
779 | { | |
24a2a654 | 780 | read_memory_nobpt (pc, &op, 1); |
99ab4326 MK |
781 | if (op < 0x50 || op > 0x57) |
782 | break; | |
0d17c81d | 783 | |
99ab4326 MK |
784 | offset -= 4; |
785 | cache->saved_regs[op - 0x50] = offset; | |
786 | cache->sp_offset += 4; | |
787 | pc++; | |
6bff26de MK |
788 | } |
789 | ||
acd5c798 | 790 | return pc; |
22797942 AC |
791 | } |
792 | ||
acd5c798 MK |
793 | /* Do a full analysis of the prologue at PC and update CACHE |
794 | accordingly. Bail out early if CURRENT_PC is reached. Return the | |
795 | address where the analysis stopped. | |
ed84f6c1 | 796 | |
fc338970 MK |
797 | We handle these cases: |
798 | ||
799 | The startup sequence can be at the start of the function, or the | |
800 | function can start with a branch to startup code at the end. | |
801 | ||
802 | %ebp can be set up with either the 'enter' instruction, or "pushl | |
803 | %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was | |
804 | once used in the System V compiler). | |
805 | ||
806 | Local space is allocated just below the saved %ebp by either the | |
fd35795f MK |
807 | 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a |
808 | 16-bit unsigned argument for space to allocate, and the 'addl' | |
809 | instruction could have either a signed byte, or 32-bit immediate. | |
fc338970 MK |
810 | |
811 | Next, the registers used by this function are pushed. With the | |
812 | System V compiler they will always be in the order: %edi, %esi, | |
813 | %ebx (and sometimes a harmless bug causes it to also save but not | |
814 | restore %eax); however, the code below is willing to see the pushes | |
815 | in any order, and will handle up to 8 of them. | |
816 | ||
817 | If the setup sequence is at the end of the function, then the next | |
818 | instruction will be a branch back to the start. */ | |
c906108c | 819 | |
acd5c798 MK |
820 | static CORE_ADDR |
821 | i386_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc, | |
822 | struct i386_frame_cache *cache) | |
c906108c | 823 | { |
acd5c798 MK |
824 | pc = i386_follow_jump (pc); |
825 | pc = i386_analyze_struct_return (pc, current_pc, cache); | |
826 | pc = i386_skip_probe (pc); | |
92dd43fa | 827 | pc = i386_analyze_stack_align (pc, current_pc, cache); |
acd5c798 MK |
828 | pc = i386_analyze_frame_setup (pc, current_pc, cache); |
829 | return i386_analyze_register_saves (pc, current_pc, cache); | |
c906108c SS |
830 | } |
831 | ||
fc338970 | 832 | /* Return PC of first real instruction. */ |
c906108c | 833 | |
3a1e71e3 | 834 | static CORE_ADDR |
acd5c798 | 835 | i386_skip_prologue (CORE_ADDR start_pc) |
c906108c | 836 | { |
63c0089f | 837 | static gdb_byte pic_pat[6] = |
acd5c798 MK |
838 | { |
839 | 0xe8, 0, 0, 0, 0, /* call 0x0 */ | |
840 | 0x5b, /* popl %ebx */ | |
c5aa993b | 841 | }; |
acd5c798 MK |
842 | struct i386_frame_cache cache; |
843 | CORE_ADDR pc; | |
63c0089f | 844 | gdb_byte op; |
acd5c798 | 845 | int i; |
c5aa993b | 846 | |
acd5c798 MK |
847 | cache.locals = -1; |
848 | pc = i386_analyze_prologue (start_pc, 0xffffffff, &cache); | |
849 | if (cache.locals < 0) | |
850 | return start_pc; | |
c5aa993b | 851 | |
acd5c798 | 852 | /* Found valid frame setup. */ |
c906108c | 853 | |
fc338970 MK |
854 | /* The native cc on SVR4 in -K PIC mode inserts the following code |
855 | to get the address of the global offset table (GOT) into register | |
acd5c798 MK |
856 | %ebx: |
857 | ||
fc338970 MK |
858 | call 0x0 |
859 | popl %ebx | |
860 | movl %ebx,x(%ebp) (optional) | |
861 | addl y,%ebx | |
862 | ||
c906108c SS |
863 | This code is with the rest of the prologue (at the end of the |
864 | function), so we have to skip it to get to the first real | |
865 | instruction at the start of the function. */ | |
c5aa993b | 866 | |
c906108c SS |
867 | for (i = 0; i < 6; i++) |
868 | { | |
24a2a654 | 869 | read_memory_nobpt (pc + i, &op, 1); |
c5aa993b | 870 | if (pic_pat[i] != op) |
c906108c SS |
871 | break; |
872 | } | |
873 | if (i == 6) | |
874 | { | |
acd5c798 MK |
875 | int delta = 6; |
876 | ||
24a2a654 | 877 | read_memory_nobpt (pc + delta, &op, 1); |
c906108c | 878 | |
c5aa993b | 879 | if (op == 0x89) /* movl %ebx, x(%ebp) */ |
c906108c | 880 | { |
acd5c798 MK |
881 | op = read_memory_unsigned_integer (pc + delta + 1, 1); |
882 | ||
fc338970 | 883 | if (op == 0x5d) /* One byte offset from %ebp. */ |
acd5c798 | 884 | delta += 3; |
fc338970 | 885 | else if (op == 0x9d) /* Four byte offset from %ebp. */ |
acd5c798 | 886 | delta += 6; |
fc338970 | 887 | else /* Unexpected instruction. */ |
acd5c798 MK |
888 | delta = 0; |
889 | ||
24a2a654 | 890 | read_memory_nobpt (pc + delta, &op, 1); |
c906108c | 891 | } |
acd5c798 | 892 | |
c5aa993b | 893 | /* addl y,%ebx */ |
acd5c798 | 894 | if (delta > 0 && op == 0x81 |
d5d6fca5 | 895 | && read_memory_unsigned_integer (pc + delta + 1, 1) == 0xc3) |
c906108c | 896 | { |
acd5c798 | 897 | pc += delta + 6; |
c906108c SS |
898 | } |
899 | } | |
c5aa993b | 900 | |
e63bbc88 MK |
901 | /* If the function starts with a branch (to startup code at the end) |
902 | the last instruction should bring us back to the first | |
903 | instruction of the real code. */ | |
904 | if (i386_follow_jump (start_pc) != start_pc) | |
905 | pc = i386_follow_jump (pc); | |
906 | ||
907 | return pc; | |
c906108c SS |
908 | } |
909 | ||
acd5c798 | 910 | /* This function is 64-bit safe. */ |
93924b6b | 911 | |
acd5c798 MK |
912 | static CORE_ADDR |
913 | i386_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
93924b6b | 914 | { |
63c0089f | 915 | gdb_byte buf[8]; |
acd5c798 MK |
916 | |
917 | frame_unwind_register (next_frame, PC_REGNUM, buf); | |
918 | return extract_typed_address (buf, builtin_type_void_func_ptr); | |
93924b6b | 919 | } |
acd5c798 | 920 | \f |
93924b6b | 921 | |
acd5c798 | 922 | /* Normal frames. */ |
c5aa993b | 923 | |
acd5c798 MK |
924 | static struct i386_frame_cache * |
925 | i386_frame_cache (struct frame_info *next_frame, void **this_cache) | |
a7769679 | 926 | { |
acd5c798 | 927 | struct i386_frame_cache *cache; |
63c0089f | 928 | gdb_byte buf[4]; |
acd5c798 MK |
929 | int i; |
930 | ||
931 | if (*this_cache) | |
932 | return *this_cache; | |
933 | ||
fd13a04a | 934 | cache = i386_alloc_frame_cache (); |
acd5c798 MK |
935 | *this_cache = cache; |
936 | ||
937 | /* In principle, for normal frames, %ebp holds the frame pointer, | |
938 | which holds the base address for the current stack frame. | |
939 | However, for functions that don't need it, the frame pointer is | |
940 | optional. For these "frameless" functions the frame pointer is | |
941 | actually the frame pointer of the calling frame. Signal | |
942 | trampolines are just a special case of a "frameless" function. | |
943 | They (usually) share their frame pointer with the frame that was | |
944 | in progress when the signal occurred. */ | |
945 | ||
946 | frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); | |
947 | cache->base = extract_unsigned_integer (buf, 4); | |
948 | if (cache->base == 0) | |
949 | return cache; | |
950 | ||
951 | /* For normal frames, %eip is stored at 4(%ebp). */ | |
fd13a04a | 952 | cache->saved_regs[I386_EIP_REGNUM] = 4; |
acd5c798 | 953 | |
93d42b30 | 954 | cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME); |
acd5c798 MK |
955 | if (cache->pc != 0) |
956 | i386_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache); | |
957 | ||
92dd43fa MK |
958 | if (cache->stack_align) |
959 | { | |
960 | /* Saved stack pointer has been saved in %ecx. */ | |
961 | frame_unwind_register (next_frame, I386_ECX_REGNUM, buf); | |
962 | cache->saved_sp = extract_unsigned_integer(buf, 4); | |
963 | } | |
964 | ||
acd5c798 MK |
965 | if (cache->locals < 0) |
966 | { | |
967 | /* We didn't find a valid frame, which means that CACHE->base | |
968 | currently holds the frame pointer for our calling frame. If | |
969 | we're at the start of a function, or somewhere half-way its | |
970 | prologue, the function's frame probably hasn't been fully | |
971 | setup yet. Try to reconstruct the base address for the stack | |
972 | frame by looking at the stack pointer. For truly "frameless" | |
973 | functions this might work too. */ | |
974 | ||
92dd43fa MK |
975 | if (cache->stack_align) |
976 | { | |
977 | /* We're halfway aligning the stack. */ | |
978 | cache->base = ((cache->saved_sp - 4) & 0xfffffff0) - 4; | |
979 | cache->saved_regs[I386_EIP_REGNUM] = cache->saved_sp - 4; | |
980 | ||
981 | /* This will be added back below. */ | |
982 | cache->saved_regs[I386_EIP_REGNUM] -= cache->base; | |
983 | } | |
984 | else | |
985 | { | |
986 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); | |
987 | cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset; | |
988 | } | |
acd5c798 MK |
989 | } |
990 | ||
991 | /* Now that we have the base address for the stack frame we can | |
992 | calculate the value of %esp in the calling frame. */ | |
92dd43fa MK |
993 | if (cache->saved_sp == 0) |
994 | cache->saved_sp = cache->base + 8; | |
a7769679 | 995 | |
acd5c798 MK |
996 | /* Adjust all the saved registers such that they contain addresses |
997 | instead of offsets. */ | |
998 | for (i = 0; i < I386_NUM_SAVED_REGS; i++) | |
fd13a04a AC |
999 | if (cache->saved_regs[i] != -1) |
1000 | cache->saved_regs[i] += cache->base; | |
acd5c798 MK |
1001 | |
1002 | return cache; | |
a7769679 MK |
1003 | } |
1004 | ||
3a1e71e3 | 1005 | static void |
acd5c798 MK |
1006 | i386_frame_this_id (struct frame_info *next_frame, void **this_cache, |
1007 | struct frame_id *this_id) | |
c906108c | 1008 | { |
acd5c798 MK |
1009 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); |
1010 | ||
1011 | /* This marks the outermost frame. */ | |
1012 | if (cache->base == 0) | |
1013 | return; | |
1014 | ||
3e210248 | 1015 | /* See the end of i386_push_dummy_call. */ |
acd5c798 MK |
1016 | (*this_id) = frame_id_build (cache->base + 8, cache->pc); |
1017 | } | |
1018 | ||
1019 | static void | |
1020 | i386_frame_prev_register (struct frame_info *next_frame, void **this_cache, | |
1021 | int regnum, int *optimizedp, | |
1022 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
c6826062 | 1023 | int *realnump, gdb_byte *valuep) |
acd5c798 MK |
1024 | { |
1025 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); | |
1026 | ||
1027 | gdb_assert (regnum >= 0); | |
1028 | ||
1029 | /* The System V ABI says that: | |
1030 | ||
1031 | "The flags register contains the system flags, such as the | |
1032 | direction flag and the carry flag. The direction flag must be | |
1033 | set to the forward (that is, zero) direction before entry and | |
1034 | upon exit from a function. Other user flags have no specified | |
1035 | role in the standard calling sequence and are not preserved." | |
1036 | ||
1037 | To guarantee the "upon exit" part of that statement we fake a | |
1038 | saved flags register that has its direction flag cleared. | |
1039 | ||
1040 | Note that GCC doesn't seem to rely on the fact that the direction | |
1041 | flag is cleared after a function return; it always explicitly | |
1042 | clears the flag before operations where it matters. | |
1043 | ||
1044 | FIXME: kettenis/20030316: I'm not quite sure whether this is the | |
1045 | right thing to do. The way we fake the flags register here makes | |
1046 | it impossible to change it. */ | |
1047 | ||
1048 | if (regnum == I386_EFLAGS_REGNUM) | |
1049 | { | |
1050 | *optimizedp = 0; | |
1051 | *lvalp = not_lval; | |
1052 | *addrp = 0; | |
1053 | *realnump = -1; | |
1054 | if (valuep) | |
1055 | { | |
1056 | ULONGEST val; | |
c5aa993b | 1057 | |
acd5c798 | 1058 | /* Clear the direction flag. */ |
f837910f MK |
1059 | val = frame_unwind_register_unsigned (next_frame, |
1060 | I386_EFLAGS_REGNUM); | |
acd5c798 MK |
1061 | val &= ~(1 << 10); |
1062 | store_unsigned_integer (valuep, 4, val); | |
1063 | } | |
1064 | ||
1065 | return; | |
1066 | } | |
1211c4e4 | 1067 | |
acd5c798 | 1068 | if (regnum == I386_EIP_REGNUM && cache->pc_in_eax) |
c906108c | 1069 | { |
00b25ff3 AC |
1070 | *optimizedp = 0; |
1071 | *lvalp = lval_register; | |
1072 | *addrp = 0; | |
1073 | *realnump = I386_EAX_REGNUM; | |
1074 | if (valuep) | |
1075 | frame_unwind_register (next_frame, (*realnump), valuep); | |
acd5c798 MK |
1076 | return; |
1077 | } | |
1078 | ||
1079 | if (regnum == I386_ESP_REGNUM && cache->saved_sp) | |
1080 | { | |
1081 | *optimizedp = 0; | |
1082 | *lvalp = not_lval; | |
1083 | *addrp = 0; | |
1084 | *realnump = -1; | |
1085 | if (valuep) | |
c906108c | 1086 | { |
acd5c798 MK |
1087 | /* Store the value. */ |
1088 | store_unsigned_integer (valuep, 4, cache->saved_sp); | |
c906108c | 1089 | } |
acd5c798 | 1090 | return; |
c906108c | 1091 | } |
acd5c798 | 1092 | |
fd13a04a AC |
1093 | if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1) |
1094 | { | |
1095 | *optimizedp = 0; | |
1096 | *lvalp = lval_memory; | |
1097 | *addrp = cache->saved_regs[regnum]; | |
1098 | *realnump = -1; | |
1099 | if (valuep) | |
1100 | { | |
1101 | /* Read the value in from memory. */ | |
1102 | read_memory (*addrp, valuep, | |
1103 | register_size (current_gdbarch, regnum)); | |
1104 | } | |
1105 | return; | |
1106 | } | |
1107 | ||
00b25ff3 AC |
1108 | *optimizedp = 0; |
1109 | *lvalp = lval_register; | |
1110 | *addrp = 0; | |
1111 | *realnump = regnum; | |
1112 | if (valuep) | |
1113 | frame_unwind_register (next_frame, (*realnump), valuep); | |
acd5c798 MK |
1114 | } |
1115 | ||
1116 | static const struct frame_unwind i386_frame_unwind = | |
1117 | { | |
1118 | NORMAL_FRAME, | |
1119 | i386_frame_this_id, | |
1120 | i386_frame_prev_register | |
1121 | }; | |
1122 | ||
1123 | static const struct frame_unwind * | |
336d1bba | 1124 | i386_frame_sniffer (struct frame_info *next_frame) |
acd5c798 MK |
1125 | { |
1126 | return &i386_frame_unwind; | |
1127 | } | |
1128 | \f | |
1129 | ||
1130 | /* Signal trampolines. */ | |
1131 | ||
1132 | static struct i386_frame_cache * | |
1133 | i386_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache) | |
1134 | { | |
1135 | struct i386_frame_cache *cache; | |
1136 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
1137 | CORE_ADDR addr; | |
63c0089f | 1138 | gdb_byte buf[4]; |
acd5c798 MK |
1139 | |
1140 | if (*this_cache) | |
1141 | return *this_cache; | |
1142 | ||
fd13a04a | 1143 | cache = i386_alloc_frame_cache (); |
acd5c798 MK |
1144 | |
1145 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); | |
1146 | cache->base = extract_unsigned_integer (buf, 4) - 4; | |
1147 | ||
1148 | addr = tdep->sigcontext_addr (next_frame); | |
a3386186 MK |
1149 | if (tdep->sc_reg_offset) |
1150 | { | |
1151 | int i; | |
1152 | ||
1153 | gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS); | |
1154 | ||
1155 | for (i = 0; i < tdep->sc_num_regs; i++) | |
1156 | if (tdep->sc_reg_offset[i] != -1) | |
fd13a04a | 1157 | cache->saved_regs[i] = addr + tdep->sc_reg_offset[i]; |
a3386186 MK |
1158 | } |
1159 | else | |
1160 | { | |
fd13a04a AC |
1161 | cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset; |
1162 | cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset; | |
a3386186 | 1163 | } |
acd5c798 MK |
1164 | |
1165 | *this_cache = cache; | |
1166 | return cache; | |
1167 | } | |
1168 | ||
1169 | static void | |
1170 | i386_sigtramp_frame_this_id (struct frame_info *next_frame, void **this_cache, | |
1171 | struct frame_id *this_id) | |
1172 | { | |
1173 | struct i386_frame_cache *cache = | |
1174 | i386_sigtramp_frame_cache (next_frame, this_cache); | |
1175 | ||
3e210248 | 1176 | /* See the end of i386_push_dummy_call. */ |
acd5c798 MK |
1177 | (*this_id) = frame_id_build (cache->base + 8, frame_pc_unwind (next_frame)); |
1178 | } | |
1179 | ||
1180 | static void | |
1181 | i386_sigtramp_frame_prev_register (struct frame_info *next_frame, | |
1182 | void **this_cache, | |
1183 | int regnum, int *optimizedp, | |
1184 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
c6826062 | 1185 | int *realnump, gdb_byte *valuep) |
acd5c798 MK |
1186 | { |
1187 | /* Make sure we've initialized the cache. */ | |
1188 | i386_sigtramp_frame_cache (next_frame, this_cache); | |
1189 | ||
1190 | i386_frame_prev_register (next_frame, this_cache, regnum, | |
1191 | optimizedp, lvalp, addrp, realnump, valuep); | |
c906108c | 1192 | } |
c0d1d883 | 1193 | |
acd5c798 MK |
1194 | static const struct frame_unwind i386_sigtramp_frame_unwind = |
1195 | { | |
1196 | SIGTRAMP_FRAME, | |
1197 | i386_sigtramp_frame_this_id, | |
1198 | i386_sigtramp_frame_prev_register | |
1199 | }; | |
1200 | ||
1201 | static const struct frame_unwind * | |
336d1bba | 1202 | i386_sigtramp_frame_sniffer (struct frame_info *next_frame) |
acd5c798 | 1203 | { |
911bc6ee | 1204 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (next_frame)); |
acd5c798 | 1205 | |
911bc6ee MK |
1206 | /* We shouldn't even bother if we don't have a sigcontext_addr |
1207 | handler. */ | |
1208 | if (tdep->sigcontext_addr == NULL) | |
1c3545ae MK |
1209 | return NULL; |
1210 | ||
911bc6ee MK |
1211 | if (tdep->sigtramp_p != NULL) |
1212 | { | |
1213 | if (tdep->sigtramp_p (next_frame)) | |
1214 | return &i386_sigtramp_frame_unwind; | |
1215 | } | |
1216 | ||
1217 | if (tdep->sigtramp_start != 0) | |
1218 | { | |
1219 | CORE_ADDR pc = frame_pc_unwind (next_frame); | |
1220 | ||
1221 | gdb_assert (tdep->sigtramp_end != 0); | |
1222 | if (pc >= tdep->sigtramp_start && pc < tdep->sigtramp_end) | |
1223 | return &i386_sigtramp_frame_unwind; | |
1224 | } | |
acd5c798 MK |
1225 | |
1226 | return NULL; | |
1227 | } | |
1228 | \f | |
1229 | ||
1230 | static CORE_ADDR | |
1231 | i386_frame_base_address (struct frame_info *next_frame, void **this_cache) | |
1232 | { | |
1233 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); | |
1234 | ||
1235 | return cache->base; | |
1236 | } | |
1237 | ||
1238 | static const struct frame_base i386_frame_base = | |
1239 | { | |
1240 | &i386_frame_unwind, | |
1241 | i386_frame_base_address, | |
1242 | i386_frame_base_address, | |
1243 | i386_frame_base_address | |
1244 | }; | |
1245 | ||
acd5c798 MK |
1246 | static struct frame_id |
1247 | i386_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
1248 | { | |
63c0089f | 1249 | gdb_byte buf[4]; |
acd5c798 MK |
1250 | CORE_ADDR fp; |
1251 | ||
1252 | frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); | |
1253 | fp = extract_unsigned_integer (buf, 4); | |
1254 | ||
3e210248 | 1255 | /* See the end of i386_push_dummy_call. */ |
acd5c798 | 1256 | return frame_id_build (fp + 8, frame_pc_unwind (next_frame)); |
c0d1d883 | 1257 | } |
fc338970 | 1258 | \f |
c906108c | 1259 | |
fc338970 MK |
1260 | /* Figure out where the longjmp will land. Slurp the args out of the |
1261 | stack. We expect the first arg to be a pointer to the jmp_buf | |
8201327c | 1262 | structure from which we extract the address that we will land at. |
28bcfd30 | 1263 | This address is copied into PC. This routine returns non-zero on |
acd5c798 MK |
1264 | success. |
1265 | ||
1266 | This function is 64-bit safe. */ | |
c906108c | 1267 | |
8201327c MK |
1268 | static int |
1269 | i386_get_longjmp_target (CORE_ADDR *pc) | |
c906108c | 1270 | { |
63c0089f | 1271 | gdb_byte buf[8]; |
c906108c | 1272 | CORE_ADDR sp, jb_addr; |
8201327c | 1273 | int jb_pc_offset = gdbarch_tdep (current_gdbarch)->jb_pc_offset; |
f9d3c2a8 | 1274 | int len = TYPE_LENGTH (builtin_type_void_func_ptr); |
c906108c | 1275 | |
8201327c MK |
1276 | /* If JB_PC_OFFSET is -1, we have no way to find out where the |
1277 | longjmp will land. */ | |
1278 | if (jb_pc_offset == -1) | |
c906108c SS |
1279 | return 0; |
1280 | ||
f837910f MK |
1281 | /* Don't use I386_ESP_REGNUM here, since this function is also used |
1282 | for AMD64. */ | |
1283 | regcache_cooked_read (current_regcache, SP_REGNUM, buf); | |
1284 | sp = extract_typed_address (buf, builtin_type_void_data_ptr); | |
28bcfd30 | 1285 | if (target_read_memory (sp + len, buf, len)) |
c906108c SS |
1286 | return 0; |
1287 | ||
f837910f | 1288 | jb_addr = extract_typed_address (buf, builtin_type_void_data_ptr); |
28bcfd30 | 1289 | if (target_read_memory (jb_addr + jb_pc_offset, buf, len)) |
8201327c | 1290 | return 0; |
c906108c | 1291 | |
f9d3c2a8 | 1292 | *pc = extract_typed_address (buf, builtin_type_void_func_ptr); |
c906108c SS |
1293 | return 1; |
1294 | } | |
fc338970 | 1295 | \f |
c906108c | 1296 | |
3a1e71e3 | 1297 | static CORE_ADDR |
7d9b040b | 1298 | i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
6a65450a AC |
1299 | struct regcache *regcache, CORE_ADDR bp_addr, int nargs, |
1300 | struct value **args, CORE_ADDR sp, int struct_return, | |
1301 | CORE_ADDR struct_addr) | |
22f8ba57 | 1302 | { |
63c0089f | 1303 | gdb_byte buf[4]; |
acd5c798 MK |
1304 | int i; |
1305 | ||
1306 | /* Push arguments in reverse order. */ | |
1307 | for (i = nargs - 1; i >= 0; i--) | |
22f8ba57 | 1308 | { |
4754a64e | 1309 | int len = TYPE_LENGTH (value_enclosing_type (args[i])); |
acd5c798 MK |
1310 | |
1311 | /* The System V ABI says that: | |
1312 | ||
1313 | "An argument's size is increased, if necessary, to make it a | |
1314 | multiple of [32-bit] words. This may require tail padding, | |
1315 | depending on the size of the argument." | |
1316 | ||
cf913f37 | 1317 | This makes sure the stack stays word-aligned. */ |
acd5c798 | 1318 | sp -= (len + 3) & ~3; |
46615f07 | 1319 | write_memory (sp, value_contents_all (args[i]), len); |
acd5c798 | 1320 | } |
22f8ba57 | 1321 | |
acd5c798 MK |
1322 | /* Push value address. */ |
1323 | if (struct_return) | |
1324 | { | |
22f8ba57 | 1325 | sp -= 4; |
fbd9dcd3 | 1326 | store_unsigned_integer (buf, 4, struct_addr); |
22f8ba57 MK |
1327 | write_memory (sp, buf, 4); |
1328 | } | |
1329 | ||
acd5c798 MK |
1330 | /* Store return address. */ |
1331 | sp -= 4; | |
6a65450a | 1332 | store_unsigned_integer (buf, 4, bp_addr); |
acd5c798 MK |
1333 | write_memory (sp, buf, 4); |
1334 | ||
1335 | /* Finally, update the stack pointer... */ | |
1336 | store_unsigned_integer (buf, 4, sp); | |
1337 | regcache_cooked_write (regcache, I386_ESP_REGNUM, buf); | |
1338 | ||
1339 | /* ...and fake a frame pointer. */ | |
1340 | regcache_cooked_write (regcache, I386_EBP_REGNUM, buf); | |
1341 | ||
3e210248 AC |
1342 | /* MarkK wrote: This "+ 8" is all over the place: |
1343 | (i386_frame_this_id, i386_sigtramp_frame_this_id, | |
1344 | i386_unwind_dummy_id). It's there, since all frame unwinders for | |
1345 | a given target have to agree (within a certain margin) on the | |
fd35795f | 1346 | definition of the stack address of a frame. Otherwise |
3e210248 AC |
1347 | frame_id_inner() won't work correctly. Since DWARF2/GCC uses the |
1348 | stack address *before* the function call as a frame's CFA. On | |
1349 | the i386, when %ebp is used as a frame pointer, the offset | |
1350 | between the contents %ebp and the CFA as defined by GCC. */ | |
1351 | return sp + 8; | |
22f8ba57 MK |
1352 | } |
1353 | ||
1a309862 MK |
1354 | /* These registers are used for returning integers (and on some |
1355 | targets also for returning `struct' and `union' values when their | |
ef9dff19 | 1356 | size and alignment match an integer type). */ |
acd5c798 MK |
1357 | #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */ |
1358 | #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */ | |
1a309862 | 1359 | |
c5e656c1 MK |
1360 | /* Read, for architecture GDBARCH, a function return value of TYPE |
1361 | from REGCACHE, and copy that into VALBUF. */ | |
1a309862 | 1362 | |
3a1e71e3 | 1363 | static void |
c5e656c1 | 1364 | i386_extract_return_value (struct gdbarch *gdbarch, struct type *type, |
63c0089f | 1365 | struct regcache *regcache, gdb_byte *valbuf) |
c906108c | 1366 | { |
c5e656c1 | 1367 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
1a309862 | 1368 | int len = TYPE_LENGTH (type); |
63c0089f | 1369 | gdb_byte buf[I386_MAX_REGISTER_SIZE]; |
1a309862 | 1370 | |
1e8d0a7b | 1371 | if (TYPE_CODE (type) == TYPE_CODE_FLT) |
c906108c | 1372 | { |
5716833c | 1373 | if (tdep->st0_regnum < 0) |
1a309862 | 1374 | { |
8a3fe4f8 | 1375 | warning (_("Cannot find floating-point return value.")); |
1a309862 | 1376 | memset (valbuf, 0, len); |
ef9dff19 | 1377 | return; |
1a309862 MK |
1378 | } |
1379 | ||
c6ba6f0d MK |
1380 | /* Floating-point return values can be found in %st(0). Convert |
1381 | its contents to the desired type. This is probably not | |
1382 | exactly how it would happen on the target itself, but it is | |
1383 | the best we can do. */ | |
acd5c798 | 1384 | regcache_raw_read (regcache, I386_ST0_REGNUM, buf); |
00f8375e | 1385 | convert_typed_floating (buf, builtin_type_i387_ext, valbuf, type); |
c906108c SS |
1386 | } |
1387 | else | |
c5aa993b | 1388 | { |
f837910f MK |
1389 | int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM); |
1390 | int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM); | |
d4f3574e SS |
1391 | |
1392 | if (len <= low_size) | |
00f8375e | 1393 | { |
0818c12a | 1394 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e MK |
1395 | memcpy (valbuf, buf, len); |
1396 | } | |
d4f3574e SS |
1397 | else if (len <= (low_size + high_size)) |
1398 | { | |
0818c12a | 1399 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e | 1400 | memcpy (valbuf, buf, low_size); |
0818c12a | 1401 | regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf); |
63c0089f | 1402 | memcpy (valbuf + low_size, buf, len - low_size); |
d4f3574e SS |
1403 | } |
1404 | else | |
8e65ff28 | 1405 | internal_error (__FILE__, __LINE__, |
e2e0b3e5 | 1406 | _("Cannot extract return value of %d bytes long."), len); |
c906108c SS |
1407 | } |
1408 | } | |
1409 | ||
c5e656c1 MK |
1410 | /* Write, for architecture GDBARCH, a function return value of TYPE |
1411 | from VALBUF into REGCACHE. */ | |
ef9dff19 | 1412 | |
3a1e71e3 | 1413 | static void |
c5e656c1 | 1414 | i386_store_return_value (struct gdbarch *gdbarch, struct type *type, |
63c0089f | 1415 | struct regcache *regcache, const gdb_byte *valbuf) |
ef9dff19 | 1416 | { |
c5e656c1 | 1417 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
ef9dff19 MK |
1418 | int len = TYPE_LENGTH (type); |
1419 | ||
5716833c MK |
1420 | /* Define I387_ST0_REGNUM such that we use the proper definitions |
1421 | for the architecture. */ | |
1422 | #define I387_ST0_REGNUM I386_ST0_REGNUM | |
1423 | ||
1e8d0a7b | 1424 | if (TYPE_CODE (type) == TYPE_CODE_FLT) |
ef9dff19 | 1425 | { |
3d7f4f49 | 1426 | ULONGEST fstat; |
63c0089f | 1427 | gdb_byte buf[I386_MAX_REGISTER_SIZE]; |
ccb945b8 | 1428 | |
5716833c | 1429 | if (tdep->st0_regnum < 0) |
ef9dff19 | 1430 | { |
8a3fe4f8 | 1431 | warning (_("Cannot set floating-point return value.")); |
ef9dff19 MK |
1432 | return; |
1433 | } | |
1434 | ||
635b0cc1 MK |
1435 | /* Returning floating-point values is a bit tricky. Apart from |
1436 | storing the return value in %st(0), we have to simulate the | |
1437 | state of the FPU at function return point. */ | |
1438 | ||
c6ba6f0d MK |
1439 | /* Convert the value found in VALBUF to the extended |
1440 | floating-point format used by the FPU. This is probably | |
1441 | not exactly how it would happen on the target itself, but | |
1442 | it is the best we can do. */ | |
1443 | convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext); | |
acd5c798 | 1444 | regcache_raw_write (regcache, I386_ST0_REGNUM, buf); |
ccb945b8 | 1445 | |
635b0cc1 MK |
1446 | /* Set the top of the floating-point register stack to 7. The |
1447 | actual value doesn't really matter, but 7 is what a normal | |
1448 | function return would end up with if the program started out | |
1449 | with a freshly initialized FPU. */ | |
5716833c | 1450 | regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat); |
ccb945b8 | 1451 | fstat |= (7 << 11); |
5716833c | 1452 | regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM, fstat); |
ccb945b8 | 1453 | |
635b0cc1 MK |
1454 | /* Mark %st(1) through %st(7) as empty. Since we set the top of |
1455 | the floating-point register stack to 7, the appropriate value | |
1456 | for the tag word is 0x3fff. */ | |
5716833c | 1457 | regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM, 0x3fff); |
ef9dff19 MK |
1458 | } |
1459 | else | |
1460 | { | |
f837910f MK |
1461 | int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM); |
1462 | int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM); | |
ef9dff19 MK |
1463 | |
1464 | if (len <= low_size) | |
3d7f4f49 | 1465 | regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf); |
ef9dff19 MK |
1466 | else if (len <= (low_size + high_size)) |
1467 | { | |
3d7f4f49 MK |
1468 | regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf); |
1469 | regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0, | |
63c0089f | 1470 | len - low_size, valbuf + low_size); |
ef9dff19 MK |
1471 | } |
1472 | else | |
8e65ff28 | 1473 | internal_error (__FILE__, __LINE__, |
e2e0b3e5 | 1474 | _("Cannot store return value of %d bytes long."), len); |
ef9dff19 | 1475 | } |
5716833c MK |
1476 | |
1477 | #undef I387_ST0_REGNUM | |
ef9dff19 | 1478 | } |
fc338970 | 1479 | \f |
ef9dff19 | 1480 | |
8201327c MK |
1481 | /* This is the variable that is set with "set struct-convention", and |
1482 | its legitimate values. */ | |
1483 | static const char default_struct_convention[] = "default"; | |
1484 | static const char pcc_struct_convention[] = "pcc"; | |
1485 | static const char reg_struct_convention[] = "reg"; | |
1486 | static const char *valid_conventions[] = | |
1487 | { | |
1488 | default_struct_convention, | |
1489 | pcc_struct_convention, | |
1490 | reg_struct_convention, | |
1491 | NULL | |
1492 | }; | |
1493 | static const char *struct_convention = default_struct_convention; | |
1494 | ||
0e4377e1 JB |
1495 | /* Return non-zero if TYPE, which is assumed to be a structure, |
1496 | a union type, or an array type, should be returned in registers | |
1497 | for architecture GDBARCH. */ | |
c5e656c1 | 1498 | |
8201327c | 1499 | static int |
c5e656c1 | 1500 | i386_reg_struct_return_p (struct gdbarch *gdbarch, struct type *type) |
8201327c | 1501 | { |
c5e656c1 MK |
1502 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
1503 | enum type_code code = TYPE_CODE (type); | |
1504 | int len = TYPE_LENGTH (type); | |
8201327c | 1505 | |
0e4377e1 JB |
1506 | gdb_assert (code == TYPE_CODE_STRUCT |
1507 | || code == TYPE_CODE_UNION | |
1508 | || code == TYPE_CODE_ARRAY); | |
c5e656c1 MK |
1509 | |
1510 | if (struct_convention == pcc_struct_convention | |
1511 | || (struct_convention == default_struct_convention | |
1512 | && tdep->struct_return == pcc_struct_return)) | |
1513 | return 0; | |
1514 | ||
9edde48e MK |
1515 | /* Structures consisting of a single `float', `double' or 'long |
1516 | double' member are returned in %st(0). */ | |
1517 | if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1) | |
1518 | { | |
1519 | type = check_typedef (TYPE_FIELD_TYPE (type, 0)); | |
1520 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
1521 | return (len == 4 || len == 8 || len == 12); | |
1522 | } | |
1523 | ||
c5e656c1 MK |
1524 | return (len == 1 || len == 2 || len == 4 || len == 8); |
1525 | } | |
1526 | ||
1527 | /* Determine, for architecture GDBARCH, how a return value of TYPE | |
1528 | should be returned. If it is supposed to be returned in registers, | |
1529 | and READBUF is non-zero, read the appropriate value from REGCACHE, | |
1530 | and copy it into READBUF. If WRITEBUF is non-zero, write the value | |
1531 | from WRITEBUF into REGCACHE. */ | |
1532 | ||
1533 | static enum return_value_convention | |
1534 | i386_return_value (struct gdbarch *gdbarch, struct type *type, | |
42835c2b MK |
1535 | struct regcache *regcache, gdb_byte *readbuf, |
1536 | const gdb_byte *writebuf) | |
c5e656c1 MK |
1537 | { |
1538 | enum type_code code = TYPE_CODE (type); | |
1539 | ||
0e4377e1 JB |
1540 | if ((code == TYPE_CODE_STRUCT |
1541 | || code == TYPE_CODE_UNION | |
1542 | || code == TYPE_CODE_ARRAY) | |
c5e656c1 | 1543 | && !i386_reg_struct_return_p (gdbarch, type)) |
31db7b6c MK |
1544 | { |
1545 | /* The System V ABI says that: | |
1546 | ||
1547 | "A function that returns a structure or union also sets %eax | |
1548 | to the value of the original address of the caller's area | |
1549 | before it returns. Thus when the caller receives control | |
1550 | again, the address of the returned object resides in register | |
1551 | %eax and can be used to access the object." | |
1552 | ||
1553 | So the ABI guarantees that we can always find the return | |
1554 | value just after the function has returned. */ | |
1555 | ||
0e4377e1 JB |
1556 | /* Note that the ABI doesn't mention functions returning arrays, |
1557 | which is something possible in certain languages such as Ada. | |
1558 | In this case, the value is returned as if it was wrapped in | |
1559 | a record, so the convention applied to records also applies | |
1560 | to arrays. */ | |
1561 | ||
31db7b6c MK |
1562 | if (readbuf) |
1563 | { | |
1564 | ULONGEST addr; | |
1565 | ||
1566 | regcache_raw_read_unsigned (regcache, I386_EAX_REGNUM, &addr); | |
1567 | read_memory (addr, readbuf, TYPE_LENGTH (type)); | |
1568 | } | |
1569 | ||
1570 | return RETURN_VALUE_ABI_RETURNS_ADDRESS; | |
1571 | } | |
c5e656c1 MK |
1572 | |
1573 | /* This special case is for structures consisting of a single | |
9edde48e MK |
1574 | `float', `double' or 'long double' member. These structures are |
1575 | returned in %st(0). For these structures, we call ourselves | |
1576 | recursively, changing TYPE into the type of the first member of | |
1577 | the structure. Since that should work for all structures that | |
1578 | have only one member, we don't bother to check the member's type | |
1579 | here. */ | |
c5e656c1 MK |
1580 | if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1) |
1581 | { | |
1582 | type = check_typedef (TYPE_FIELD_TYPE (type, 0)); | |
1583 | return i386_return_value (gdbarch, type, regcache, readbuf, writebuf); | |
1584 | } | |
1585 | ||
1586 | if (readbuf) | |
1587 | i386_extract_return_value (gdbarch, type, regcache, readbuf); | |
1588 | if (writebuf) | |
1589 | i386_store_return_value (gdbarch, type, regcache, writebuf); | |
8201327c | 1590 | |
c5e656c1 | 1591 | return RETURN_VALUE_REGISTER_CONVENTION; |
8201327c MK |
1592 | } |
1593 | \f | |
1594 | ||
5ae96ec1 MK |
1595 | /* Type for %eflags. */ |
1596 | struct type *i386_eflags_type; | |
1597 | ||
21b4b2f2 | 1598 | /* Types for the MMX and SSE registers. */ |
5ae96ec1 MK |
1599 | struct type *i386_mmx_type; |
1600 | struct type *i386_sse_type; | |
878d9193 | 1601 | struct type *i386_mxcsr_type; |
5ae96ec1 MK |
1602 | |
1603 | /* Construct types for ISA-specific registers. */ | |
1604 | static void | |
1605 | i386_init_types (void) | |
1606 | { | |
1607 | struct type *type; | |
1608 | ||
1609 | type = init_flags_type ("builtin_type_i386_eflags", 4); | |
1610 | append_flags_type_flag (type, 0, "CF"); | |
1611 | append_flags_type_flag (type, 1, NULL); | |
1612 | append_flags_type_flag (type, 2, "PF"); | |
1613 | append_flags_type_flag (type, 4, "AF"); | |
1614 | append_flags_type_flag (type, 6, "ZF"); | |
1615 | append_flags_type_flag (type, 7, "SF"); | |
1616 | append_flags_type_flag (type, 8, "TF"); | |
1617 | append_flags_type_flag (type, 9, "IF"); | |
1618 | append_flags_type_flag (type, 10, "DF"); | |
1619 | append_flags_type_flag (type, 11, "OF"); | |
1620 | append_flags_type_flag (type, 14, "NT"); | |
1621 | append_flags_type_flag (type, 16, "RF"); | |
1622 | append_flags_type_flag (type, 17, "VM"); | |
1623 | append_flags_type_flag (type, 18, "AC"); | |
1624 | append_flags_type_flag (type, 19, "VIF"); | |
1625 | append_flags_type_flag (type, 20, "VIP"); | |
1626 | append_flags_type_flag (type, 21, "ID"); | |
1627 | i386_eflags_type = type; | |
21b4b2f2 | 1628 | |
21b4b2f2 JB |
1629 | /* The type we're building is this: */ |
1630 | #if 0 | |
5ae96ec1 | 1631 | union __gdb_builtin_type_vec64i |
21b4b2f2 JB |
1632 | { |
1633 | int64_t uint64; | |
1634 | int32_t v2_int32[2]; | |
1635 | int16_t v4_int16[4]; | |
1636 | int8_t v8_int8[8]; | |
1637 | }; | |
1638 | #endif | |
1639 | ||
5ae96ec1 MK |
1640 | type = init_composite_type ("__gdb_builtin_type_vec64i", TYPE_CODE_UNION); |
1641 | append_composite_type_field (type, "uint64", builtin_type_int64); | |
1642 | append_composite_type_field (type, "v2_int32", builtin_type_v2_int32); | |
1643 | append_composite_type_field (type, "v4_int16", builtin_type_v4_int16); | |
1644 | append_composite_type_field (type, "v8_int8", builtin_type_v8_int8); | |
1645 | TYPE_FLAGS (type) |= TYPE_FLAG_VECTOR; | |
1646 | TYPE_NAME (type) = "builtin_type_vec64i"; | |
1647 | i386_mmx_type = type; | |
21b4b2f2 | 1648 | |
5ae96ec1 MK |
1649 | /* The type we're building is this: */ |
1650 | #if 0 | |
1651 | union __gdb_builtin_type_vec128i | |
1652 | { | |
1653 | int128_t uint128; | |
1654 | int64_t v2_int64[2]; | |
1655 | int32_t v4_int32[4]; | |
1656 | int16_t v8_int16[8]; | |
1657 | int8_t v16_int8[16]; | |
1658 | double v2_double[2]; | |
1659 | float v4_float[4]; | |
1660 | }; | |
1661 | #endif | |
21b4b2f2 | 1662 | |
5ae96ec1 MK |
1663 | type = init_composite_type ("__gdb_builtin_type_vec128i", TYPE_CODE_UNION); |
1664 | append_composite_type_field (type, "v4_float", builtin_type_v4_float); | |
1665 | append_composite_type_field (type, "v2_double", builtin_type_v2_double); | |
1666 | append_composite_type_field (type, "v16_int8", builtin_type_v16_int8); | |
1667 | append_composite_type_field (type, "v8_int16", builtin_type_v8_int16); | |
1668 | append_composite_type_field (type, "v4_int32", builtin_type_v4_int32); | |
1669 | append_composite_type_field (type, "v2_int64", builtin_type_v2_int64); | |
1670 | append_composite_type_field (type, "uint128", builtin_type_int128); | |
1671 | TYPE_FLAGS (type) |= TYPE_FLAG_VECTOR; | |
1672 | TYPE_NAME (type) = "builtin_type_vec128i"; | |
1673 | i386_sse_type = type; | |
878d9193 MK |
1674 | |
1675 | type = init_flags_type ("builtin_type_i386_mxcsr", 4); | |
1676 | append_flags_type_flag (type, 0, "IE"); | |
1677 | append_flags_type_flag (type, 1, "DE"); | |
1678 | append_flags_type_flag (type, 2, "ZE"); | |
1679 | append_flags_type_flag (type, 3, "OE"); | |
1680 | append_flags_type_flag (type, 4, "UE"); | |
1681 | append_flags_type_flag (type, 5, "PE"); | |
1682 | append_flags_type_flag (type, 6, "DAZ"); | |
1683 | append_flags_type_flag (type, 7, "IM"); | |
1684 | append_flags_type_flag (type, 8, "DM"); | |
1685 | append_flags_type_flag (type, 9, "ZM"); | |
1686 | append_flags_type_flag (type, 10, "OM"); | |
1687 | append_flags_type_flag (type, 11, "UM"); | |
1688 | append_flags_type_flag (type, 12, "PM"); | |
1689 | append_flags_type_flag (type, 15, "FZ"); | |
1690 | i386_mxcsr_type = type; | |
21b4b2f2 JB |
1691 | } |
1692 | ||
d7a0d72c MK |
1693 | /* Return the GDB type object for the "standard" data type of data in |
1694 | register REGNUM. Perhaps %esi and %edi should go here, but | |
1695 | potentially they could be used for things other than address. */ | |
1696 | ||
3a1e71e3 | 1697 | static struct type * |
4e259f09 | 1698 | i386_register_type (struct gdbarch *gdbarch, int regnum) |
d7a0d72c | 1699 | { |
ab533587 MK |
1700 | if (regnum == I386_EIP_REGNUM) |
1701 | return builtin_type_void_func_ptr; | |
1702 | ||
5ae96ec1 MK |
1703 | if (regnum == I386_EFLAGS_REGNUM) |
1704 | return i386_eflags_type; | |
1705 | ||
ab533587 MK |
1706 | if (regnum == I386_EBP_REGNUM || regnum == I386_ESP_REGNUM) |
1707 | return builtin_type_void_data_ptr; | |
d7a0d72c | 1708 | |
23a34459 | 1709 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1710 | return builtin_type_i387_ext; |
d7a0d72c | 1711 | |
878d9193 MK |
1712 | if (i386_mmx_regnum_p (gdbarch, regnum)) |
1713 | return i386_mmx_type; | |
1714 | ||
5716833c | 1715 | if (i386_sse_regnum_p (gdbarch, regnum)) |
5ae96ec1 | 1716 | return i386_sse_type; |
d7a0d72c | 1717 | |
878d9193 MK |
1718 | #define I387_ST0_REGNUM I386_ST0_REGNUM |
1719 | #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs) | |
1720 | ||
1721 | if (regnum == I387_MXCSR_REGNUM) | |
1722 | return i386_mxcsr_type; | |
1723 | ||
1724 | #undef I387_ST0_REGNUM | |
1725 | #undef I387_NUM_XMM_REGS | |
28fc6740 | 1726 | |
d7a0d72c MK |
1727 | return builtin_type_int; |
1728 | } | |
1729 | ||
28fc6740 | 1730 | /* Map a cooked register onto a raw register or memory. For the i386, |
acd5c798 | 1731 | the MMX registers need to be mapped onto floating point registers. */ |
28fc6740 AC |
1732 | |
1733 | static int | |
c86c27af | 1734 | i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum) |
28fc6740 | 1735 | { |
5716833c MK |
1736 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); |
1737 | int mmxreg, fpreg; | |
28fc6740 AC |
1738 | ULONGEST fstat; |
1739 | int tos; | |
c86c27af | 1740 | |
5716833c MK |
1741 | /* Define I387_ST0_REGNUM such that we use the proper definitions |
1742 | for REGCACHE's architecture. */ | |
1743 | #define I387_ST0_REGNUM tdep->st0_regnum | |
1744 | ||
1745 | mmxreg = regnum - tdep->mm0_regnum; | |
1746 | regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat); | |
28fc6740 | 1747 | tos = (fstat >> 11) & 0x7; |
5716833c MK |
1748 | fpreg = (mmxreg + tos) % 8; |
1749 | ||
1750 | return (I387_ST0_REGNUM + fpreg); | |
c86c27af | 1751 | |
5716833c | 1752 | #undef I387_ST0_REGNUM |
28fc6740 AC |
1753 | } |
1754 | ||
1755 | static void | |
1756 | i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, | |
42835c2b | 1757 | int regnum, gdb_byte *buf) |
28fc6740 | 1758 | { |
5716833c | 1759 | if (i386_mmx_regnum_p (gdbarch, regnum)) |
28fc6740 | 1760 | { |
63c0089f | 1761 | gdb_byte mmx_buf[MAX_REGISTER_SIZE]; |
c86c27af MK |
1762 | int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); |
1763 | ||
28fc6740 | 1764 | /* Extract (always little endian). */ |
c86c27af | 1765 | regcache_raw_read (regcache, fpnum, mmx_buf); |
f837910f | 1766 | memcpy (buf, mmx_buf, register_size (gdbarch, regnum)); |
28fc6740 AC |
1767 | } |
1768 | else | |
1769 | regcache_raw_read (regcache, regnum, buf); | |
1770 | } | |
1771 | ||
1772 | static void | |
1773 | i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
42835c2b | 1774 | int regnum, const gdb_byte *buf) |
28fc6740 | 1775 | { |
5716833c | 1776 | if (i386_mmx_regnum_p (gdbarch, regnum)) |
28fc6740 | 1777 | { |
63c0089f | 1778 | gdb_byte mmx_buf[MAX_REGISTER_SIZE]; |
c86c27af MK |
1779 | int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); |
1780 | ||
28fc6740 AC |
1781 | /* Read ... */ |
1782 | regcache_raw_read (regcache, fpnum, mmx_buf); | |
1783 | /* ... Modify ... (always little endian). */ | |
f837910f | 1784 | memcpy (mmx_buf, buf, register_size (gdbarch, regnum)); |
28fc6740 AC |
1785 | /* ... Write. */ |
1786 | regcache_raw_write (regcache, fpnum, mmx_buf); | |
1787 | } | |
1788 | else | |
1789 | regcache_raw_write (regcache, regnum, buf); | |
1790 | } | |
ff2e87ac AC |
1791 | \f |
1792 | ||
ff2e87ac AC |
1793 | /* Return the register number of the register allocated by GCC after |
1794 | REGNUM, or -1 if there is no such register. */ | |
1795 | ||
1796 | static int | |
1797 | i386_next_regnum (int regnum) | |
1798 | { | |
1799 | /* GCC allocates the registers in the order: | |
1800 | ||
1801 | %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ... | |
1802 | ||
1803 | Since storing a variable in %esp doesn't make any sense we return | |
1804 | -1 for %ebp and for %esp itself. */ | |
1805 | static int next_regnum[] = | |
1806 | { | |
1807 | I386_EDX_REGNUM, /* Slot for %eax. */ | |
1808 | I386_EBX_REGNUM, /* Slot for %ecx. */ | |
1809 | I386_ECX_REGNUM, /* Slot for %edx. */ | |
1810 | I386_ESI_REGNUM, /* Slot for %ebx. */ | |
1811 | -1, -1, /* Slots for %esp and %ebp. */ | |
1812 | I386_EDI_REGNUM, /* Slot for %esi. */ | |
1813 | I386_EBP_REGNUM /* Slot for %edi. */ | |
1814 | }; | |
1815 | ||
de5b9bb9 | 1816 | if (regnum >= 0 && regnum < sizeof (next_regnum) / sizeof (next_regnum[0])) |
ff2e87ac | 1817 | return next_regnum[regnum]; |
28fc6740 | 1818 | |
ff2e87ac AC |
1819 | return -1; |
1820 | } | |
1821 | ||
1822 | /* Return nonzero if a value of type TYPE stored in register REGNUM | |
1823 | needs any special handling. */ | |
d7a0d72c | 1824 | |
3a1e71e3 | 1825 | static int |
ff2e87ac | 1826 | i386_convert_register_p (int regnum, struct type *type) |
d7a0d72c | 1827 | { |
de5b9bb9 MK |
1828 | int len = TYPE_LENGTH (type); |
1829 | ||
ff2e87ac AC |
1830 | /* Values may be spread across multiple registers. Most debugging |
1831 | formats aren't expressive enough to specify the locations, so | |
1832 | some heuristics is involved. Right now we only handle types that | |
de5b9bb9 MK |
1833 | have a length that is a multiple of the word size, since GCC |
1834 | doesn't seem to put any other types into registers. */ | |
1835 | if (len > 4 && len % 4 == 0) | |
1836 | { | |
1837 | int last_regnum = regnum; | |
1838 | ||
1839 | while (len > 4) | |
1840 | { | |
1841 | last_regnum = i386_next_regnum (last_regnum); | |
1842 | len -= 4; | |
1843 | } | |
1844 | ||
1845 | if (last_regnum != -1) | |
1846 | return 1; | |
1847 | } | |
ff2e87ac | 1848 | |
23a34459 | 1849 | return i386_fp_regnum_p (regnum); |
d7a0d72c MK |
1850 | } |
1851 | ||
ff2e87ac AC |
1852 | /* Read a value of type TYPE from register REGNUM in frame FRAME, and |
1853 | return its contents in TO. */ | |
ac27f131 | 1854 | |
3a1e71e3 | 1855 | static void |
ff2e87ac | 1856 | i386_register_to_value (struct frame_info *frame, int regnum, |
42835c2b | 1857 | struct type *type, gdb_byte *to) |
ac27f131 | 1858 | { |
de5b9bb9 | 1859 | int len = TYPE_LENGTH (type); |
de5b9bb9 | 1860 | |
ff2e87ac AC |
1861 | /* FIXME: kettenis/20030609: What should we do if REGNUM isn't |
1862 | available in FRAME (i.e. if it wasn't saved)? */ | |
3d261580 | 1863 | |
ff2e87ac | 1864 | if (i386_fp_regnum_p (regnum)) |
8d7f6b4a | 1865 | { |
d532c08f MK |
1866 | i387_register_to_value (frame, regnum, type, to); |
1867 | return; | |
8d7f6b4a | 1868 | } |
ff2e87ac | 1869 | |
fd35795f | 1870 | /* Read a value spread across multiple registers. */ |
de5b9bb9 MK |
1871 | |
1872 | gdb_assert (len > 4 && len % 4 == 0); | |
3d261580 | 1873 | |
de5b9bb9 MK |
1874 | while (len > 0) |
1875 | { | |
1876 | gdb_assert (regnum != -1); | |
1877 | gdb_assert (register_size (current_gdbarch, regnum) == 4); | |
d532c08f | 1878 | |
42835c2b | 1879 | get_frame_register (frame, regnum, to); |
de5b9bb9 MK |
1880 | regnum = i386_next_regnum (regnum); |
1881 | len -= 4; | |
42835c2b | 1882 | to += 4; |
de5b9bb9 | 1883 | } |
ac27f131 MK |
1884 | } |
1885 | ||
ff2e87ac AC |
1886 | /* Write the contents FROM of a value of type TYPE into register |
1887 | REGNUM in frame FRAME. */ | |
ac27f131 | 1888 | |
3a1e71e3 | 1889 | static void |
ff2e87ac | 1890 | i386_value_to_register (struct frame_info *frame, int regnum, |
42835c2b | 1891 | struct type *type, const gdb_byte *from) |
ac27f131 | 1892 | { |
de5b9bb9 | 1893 | int len = TYPE_LENGTH (type); |
de5b9bb9 | 1894 | |
ff2e87ac | 1895 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1896 | { |
d532c08f MK |
1897 | i387_value_to_register (frame, regnum, type, from); |
1898 | return; | |
1899 | } | |
3d261580 | 1900 | |
fd35795f | 1901 | /* Write a value spread across multiple registers. */ |
de5b9bb9 MK |
1902 | |
1903 | gdb_assert (len > 4 && len % 4 == 0); | |
ff2e87ac | 1904 | |
de5b9bb9 MK |
1905 | while (len > 0) |
1906 | { | |
1907 | gdb_assert (regnum != -1); | |
1908 | gdb_assert (register_size (current_gdbarch, regnum) == 4); | |
d532c08f | 1909 | |
42835c2b | 1910 | put_frame_register (frame, regnum, from); |
de5b9bb9 MK |
1911 | regnum = i386_next_regnum (regnum); |
1912 | len -= 4; | |
42835c2b | 1913 | from += 4; |
de5b9bb9 | 1914 | } |
ac27f131 | 1915 | } |
ff2e87ac | 1916 | \f |
7fdafb5a MK |
1917 | /* Supply register REGNUM from the buffer specified by GREGS and LEN |
1918 | in the general-purpose register set REGSET to register cache | |
1919 | REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */ | |
ff2e87ac | 1920 | |
20187ed5 | 1921 | void |
473f17b0 MK |
1922 | i386_supply_gregset (const struct regset *regset, struct regcache *regcache, |
1923 | int regnum, const void *gregs, size_t len) | |
1924 | { | |
9ea75c57 | 1925 | const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch); |
156cdbee | 1926 | const gdb_byte *regs = gregs; |
473f17b0 MK |
1927 | int i; |
1928 | ||
1929 | gdb_assert (len == tdep->sizeof_gregset); | |
1930 | ||
1931 | for (i = 0; i < tdep->gregset_num_regs; i++) | |
1932 | { | |
1933 | if ((regnum == i || regnum == -1) | |
1934 | && tdep->gregset_reg_offset[i] != -1) | |
1935 | regcache_raw_supply (regcache, i, regs + tdep->gregset_reg_offset[i]); | |
1936 | } | |
1937 | } | |
1938 | ||
7fdafb5a MK |
1939 | /* Collect register REGNUM from the register cache REGCACHE and store |
1940 | it in the buffer specified by GREGS and LEN as described by the | |
1941 | general-purpose register set REGSET. If REGNUM is -1, do this for | |
1942 | all registers in REGSET. */ | |
1943 | ||
1944 | void | |
1945 | i386_collect_gregset (const struct regset *regset, | |
1946 | const struct regcache *regcache, | |
1947 | int regnum, void *gregs, size_t len) | |
1948 | { | |
1949 | const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch); | |
156cdbee | 1950 | gdb_byte *regs = gregs; |
7fdafb5a MK |
1951 | int i; |
1952 | ||
1953 | gdb_assert (len == tdep->sizeof_gregset); | |
1954 | ||
1955 | for (i = 0; i < tdep->gregset_num_regs; i++) | |
1956 | { | |
1957 | if ((regnum == i || regnum == -1) | |
1958 | && tdep->gregset_reg_offset[i] != -1) | |
1959 | regcache_raw_collect (regcache, i, regs + tdep->gregset_reg_offset[i]); | |
1960 | } | |
1961 | } | |
1962 | ||
1963 | /* Supply register REGNUM from the buffer specified by FPREGS and LEN | |
1964 | in the floating-point register set REGSET to register cache | |
1965 | REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */ | |
473f17b0 MK |
1966 | |
1967 | static void | |
1968 | i386_supply_fpregset (const struct regset *regset, struct regcache *regcache, | |
1969 | int regnum, const void *fpregs, size_t len) | |
1970 | { | |
9ea75c57 | 1971 | const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch); |
473f17b0 | 1972 | |
66a72d25 MK |
1973 | if (len == I387_SIZEOF_FXSAVE) |
1974 | { | |
1975 | i387_supply_fxsave (regcache, regnum, fpregs); | |
1976 | return; | |
1977 | } | |
1978 | ||
473f17b0 MK |
1979 | gdb_assert (len == tdep->sizeof_fpregset); |
1980 | i387_supply_fsave (regcache, regnum, fpregs); | |
1981 | } | |
8446b36a | 1982 | |
2f305df1 MK |
1983 | /* Collect register REGNUM from the register cache REGCACHE and store |
1984 | it in the buffer specified by FPREGS and LEN as described by the | |
1985 | floating-point register set REGSET. If REGNUM is -1, do this for | |
1986 | all registers in REGSET. */ | |
7fdafb5a MK |
1987 | |
1988 | static void | |
1989 | i386_collect_fpregset (const struct regset *regset, | |
1990 | const struct regcache *regcache, | |
1991 | int regnum, void *fpregs, size_t len) | |
1992 | { | |
1993 | const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch); | |
1994 | ||
1995 | if (len == I387_SIZEOF_FXSAVE) | |
1996 | { | |
1997 | i387_collect_fxsave (regcache, regnum, fpregs); | |
1998 | return; | |
1999 | } | |
2000 | ||
2001 | gdb_assert (len == tdep->sizeof_fpregset); | |
2002 | i387_collect_fsave (regcache, regnum, fpregs); | |
2003 | } | |
2004 | ||
8446b36a MK |
2005 | /* Return the appropriate register set for the core section identified |
2006 | by SECT_NAME and SECT_SIZE. */ | |
2007 | ||
2008 | const struct regset * | |
2009 | i386_regset_from_core_section (struct gdbarch *gdbarch, | |
2010 | const char *sect_name, size_t sect_size) | |
2011 | { | |
2012 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
2013 | ||
2014 | if (strcmp (sect_name, ".reg") == 0 && sect_size == tdep->sizeof_gregset) | |
2015 | { | |
2016 | if (tdep->gregset == NULL) | |
7fdafb5a MK |
2017 | tdep->gregset = regset_alloc (gdbarch, i386_supply_gregset, |
2018 | i386_collect_gregset); | |
8446b36a MK |
2019 | return tdep->gregset; |
2020 | } | |
2021 | ||
66a72d25 MK |
2022 | if ((strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset) |
2023 | || (strcmp (sect_name, ".reg-xfp") == 0 | |
2024 | && sect_size == I387_SIZEOF_FXSAVE)) | |
8446b36a MK |
2025 | { |
2026 | if (tdep->fpregset == NULL) | |
7fdafb5a MK |
2027 | tdep->fpregset = regset_alloc (gdbarch, i386_supply_fpregset, |
2028 | i386_collect_fpregset); | |
8446b36a MK |
2029 | return tdep->fpregset; |
2030 | } | |
2031 | ||
2032 | return NULL; | |
2033 | } | |
473f17b0 | 2034 | \f |
fc338970 | 2035 | |
c906108c | 2036 | #ifdef STATIC_TRANSFORM_NAME |
fc338970 MK |
2037 | /* SunPRO encodes the static variables. This is not related to C++ |
2038 | mangling, it is done for C too. */ | |
c906108c SS |
2039 | |
2040 | char * | |
fba45db2 | 2041 | sunpro_static_transform_name (char *name) |
c906108c SS |
2042 | { |
2043 | char *p; | |
2044 | if (IS_STATIC_TRANSFORM_NAME (name)) | |
2045 | { | |
fc338970 MK |
2046 | /* For file-local statics there will be a period, a bunch of |
2047 | junk (the contents of which match a string given in the | |
c5aa993b JM |
2048 | N_OPT), a period and the name. For function-local statics |
2049 | there will be a bunch of junk (which seems to change the | |
2050 | second character from 'A' to 'B'), a period, the name of the | |
2051 | function, and the name. So just skip everything before the | |
2052 | last period. */ | |
c906108c SS |
2053 | p = strrchr (name, '.'); |
2054 | if (p != NULL) | |
2055 | name = p + 1; | |
2056 | } | |
2057 | return name; | |
2058 | } | |
2059 | #endif /* STATIC_TRANSFORM_NAME */ | |
fc338970 | 2060 | \f |
c906108c | 2061 | |
fc338970 | 2062 | /* Stuff for WIN32 PE style DLL's but is pretty generic really. */ |
c906108c SS |
2063 | |
2064 | CORE_ADDR | |
1cce71eb | 2065 | i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name) |
c906108c | 2066 | { |
fc338970 | 2067 | if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */ |
c906108c | 2068 | { |
c5aa993b | 2069 | unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4); |
c906108c | 2070 | struct minimal_symbol *indsym = |
fc338970 | 2071 | indirect ? lookup_minimal_symbol_by_pc (indirect) : 0; |
645dd519 | 2072 | char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0; |
c906108c | 2073 | |
c5aa993b | 2074 | if (symname) |
c906108c | 2075 | { |
c5aa993b JM |
2076 | if (strncmp (symname, "__imp_", 6) == 0 |
2077 | || strncmp (symname, "_imp_", 5) == 0) | |
c906108c SS |
2078 | return name ? 1 : read_memory_unsigned_integer (indirect, 4); |
2079 | } | |
2080 | } | |
fc338970 | 2081 | return 0; /* Not a trampoline. */ |
c906108c | 2082 | } |
fc338970 MK |
2083 | \f |
2084 | ||
377d9ebd | 2085 | /* Return whether the frame preceding NEXT_FRAME corresponds to a |
911bc6ee | 2086 | sigtramp routine. */ |
8201327c MK |
2087 | |
2088 | static int | |
911bc6ee | 2089 | i386_sigtramp_p (struct frame_info *next_frame) |
8201327c | 2090 | { |
911bc6ee MK |
2091 | CORE_ADDR pc = frame_pc_unwind (next_frame); |
2092 | char *name; | |
2093 | ||
2094 | find_pc_partial_function (pc, &name, NULL, NULL); | |
8201327c MK |
2095 | return (name && strcmp ("_sigtramp", name) == 0); |
2096 | } | |
2097 | \f | |
2098 | ||
fc338970 MK |
2099 | /* We have two flavours of disassembly. The machinery on this page |
2100 | deals with switching between those. */ | |
c906108c SS |
2101 | |
2102 | static int | |
a89aa300 | 2103 | i386_print_insn (bfd_vma pc, struct disassemble_info *info) |
c906108c | 2104 | { |
5e3397bb MK |
2105 | gdb_assert (disassembly_flavor == att_flavor |
2106 | || disassembly_flavor == intel_flavor); | |
2107 | ||
2108 | /* FIXME: kettenis/20020915: Until disassembler_options is properly | |
2109 | constified, cast to prevent a compiler warning. */ | |
2110 | info->disassembler_options = (char *) disassembly_flavor; | |
2111 | info->mach = gdbarch_bfd_arch_info (current_gdbarch)->mach; | |
2112 | ||
2113 | return print_insn_i386 (pc, info); | |
7a292a7a | 2114 | } |
fc338970 | 2115 | \f |
3ce1502b | 2116 | |
8201327c MK |
2117 | /* There are a few i386 architecture variants that differ only |
2118 | slightly from the generic i386 target. For now, we don't give them | |
2119 | their own source file, but include them here. As a consequence, | |
2120 | they'll always be included. */ | |
3ce1502b | 2121 | |
8201327c | 2122 | /* System V Release 4 (SVR4). */ |
3ce1502b | 2123 | |
377d9ebd | 2124 | /* Return whether the frame preceding NEXT_FRAME corresponds to a SVR4 |
911bc6ee MK |
2125 | sigtramp routine. */ |
2126 | ||
8201327c | 2127 | static int |
911bc6ee | 2128 | i386_svr4_sigtramp_p (struct frame_info *next_frame) |
d2a7c97a | 2129 | { |
911bc6ee MK |
2130 | CORE_ADDR pc = frame_pc_unwind (next_frame); |
2131 | char *name; | |
2132 | ||
acd5c798 MK |
2133 | /* UnixWare uses _sigacthandler. The origin of the other symbols is |
2134 | currently unknown. */ | |
911bc6ee | 2135 | find_pc_partial_function (pc, &name, NULL, NULL); |
8201327c MK |
2136 | return (name && (strcmp ("_sigreturn", name) == 0 |
2137 | || strcmp ("_sigacthandler", name) == 0 | |
2138 | || strcmp ("sigvechandler", name) == 0)); | |
2139 | } | |
d2a7c97a | 2140 | |
acd5c798 MK |
2141 | /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp |
2142 | routine, return the address of the associated sigcontext (ucontext) | |
2143 | structure. */ | |
3ce1502b | 2144 | |
3a1e71e3 | 2145 | static CORE_ADDR |
acd5c798 | 2146 | i386_svr4_sigcontext_addr (struct frame_info *next_frame) |
8201327c | 2147 | { |
63c0089f | 2148 | gdb_byte buf[4]; |
acd5c798 | 2149 | CORE_ADDR sp; |
3ce1502b | 2150 | |
acd5c798 MK |
2151 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); |
2152 | sp = extract_unsigned_integer (buf, 4); | |
21d0e8a4 | 2153 | |
acd5c798 | 2154 | return read_memory_unsigned_integer (sp + 8, 4); |
8201327c MK |
2155 | } |
2156 | \f | |
3ce1502b | 2157 | |
8201327c | 2158 | /* Generic ELF. */ |
d2a7c97a | 2159 | |
8201327c MK |
2160 | void |
2161 | i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
2162 | { | |
c4fc7f1b MK |
2163 | /* We typically use stabs-in-ELF with the SVR4 register numbering. */ |
2164 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum); | |
8201327c | 2165 | } |
3ce1502b | 2166 | |
8201327c | 2167 | /* System V Release 4 (SVR4). */ |
3ce1502b | 2168 | |
8201327c MK |
2169 | void |
2170 | i386_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
2171 | { | |
2172 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
3ce1502b | 2173 | |
8201327c MK |
2174 | /* System V Release 4 uses ELF. */ |
2175 | i386_elf_init_abi (info, gdbarch); | |
3ce1502b | 2176 | |
dfe01d39 | 2177 | /* System V Release 4 has shared libraries. */ |
dfe01d39 MK |
2178 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
2179 | ||
911bc6ee | 2180 | tdep->sigtramp_p = i386_svr4_sigtramp_p; |
21d0e8a4 | 2181 | tdep->sigcontext_addr = i386_svr4_sigcontext_addr; |
acd5c798 MK |
2182 | tdep->sc_pc_offset = 36 + 14 * 4; |
2183 | tdep->sc_sp_offset = 36 + 17 * 4; | |
3ce1502b | 2184 | |
8201327c | 2185 | tdep->jb_pc_offset = 20; |
3ce1502b MK |
2186 | } |
2187 | ||
8201327c | 2188 | /* DJGPP. */ |
3ce1502b | 2189 | |
3a1e71e3 | 2190 | static void |
8201327c | 2191 | i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 2192 | { |
8201327c | 2193 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 2194 | |
911bc6ee MK |
2195 | /* DJGPP doesn't have any special frames for signal handlers. */ |
2196 | tdep->sigtramp_p = NULL; | |
3ce1502b | 2197 | |
8201327c | 2198 | tdep->jb_pc_offset = 36; |
3ce1502b | 2199 | } |
8201327c | 2200 | \f |
2acceee2 | 2201 | |
38c968cf AC |
2202 | /* i386 register groups. In addition to the normal groups, add "mmx" |
2203 | and "sse". */ | |
2204 | ||
2205 | static struct reggroup *i386_sse_reggroup; | |
2206 | static struct reggroup *i386_mmx_reggroup; | |
2207 | ||
2208 | static void | |
2209 | i386_init_reggroups (void) | |
2210 | { | |
2211 | i386_sse_reggroup = reggroup_new ("sse", USER_REGGROUP); | |
2212 | i386_mmx_reggroup = reggroup_new ("mmx", USER_REGGROUP); | |
2213 | } | |
2214 | ||
2215 | static void | |
2216 | i386_add_reggroups (struct gdbarch *gdbarch) | |
2217 | { | |
2218 | reggroup_add (gdbarch, i386_sse_reggroup); | |
2219 | reggroup_add (gdbarch, i386_mmx_reggroup); | |
2220 | reggroup_add (gdbarch, general_reggroup); | |
2221 | reggroup_add (gdbarch, float_reggroup); | |
2222 | reggroup_add (gdbarch, all_reggroup); | |
2223 | reggroup_add (gdbarch, save_reggroup); | |
2224 | reggroup_add (gdbarch, restore_reggroup); | |
2225 | reggroup_add (gdbarch, vector_reggroup); | |
2226 | reggroup_add (gdbarch, system_reggroup); | |
2227 | } | |
2228 | ||
2229 | int | |
2230 | i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
2231 | struct reggroup *group) | |
2232 | { | |
5716833c MK |
2233 | int sse_regnum_p = (i386_sse_regnum_p (gdbarch, regnum) |
2234 | || i386_mxcsr_regnum_p (gdbarch, regnum)); | |
38c968cf AC |
2235 | int fp_regnum_p = (i386_fp_regnum_p (regnum) |
2236 | || i386_fpc_regnum_p (regnum)); | |
5716833c | 2237 | int mmx_regnum_p = (i386_mmx_regnum_p (gdbarch, regnum)); |
acd5c798 | 2238 | |
38c968cf AC |
2239 | if (group == i386_mmx_reggroup) |
2240 | return mmx_regnum_p; | |
2241 | if (group == i386_sse_reggroup) | |
2242 | return sse_regnum_p; | |
2243 | if (group == vector_reggroup) | |
2244 | return (mmx_regnum_p || sse_regnum_p); | |
2245 | if (group == float_reggroup) | |
2246 | return fp_regnum_p; | |
2247 | if (group == general_reggroup) | |
2248 | return (!fp_regnum_p && !mmx_regnum_p && !sse_regnum_p); | |
acd5c798 | 2249 | |
38c968cf AC |
2250 | return default_register_reggroup_p (gdbarch, regnum, group); |
2251 | } | |
38c968cf | 2252 | \f |
acd5c798 | 2253 | |
f837910f MK |
2254 | /* Get the ARGIth function argument for the current function. */ |
2255 | ||
42c466d7 | 2256 | static CORE_ADDR |
143985b7 AF |
2257 | i386_fetch_pointer_argument (struct frame_info *frame, int argi, |
2258 | struct type *type) | |
2259 | { | |
f837910f MK |
2260 | CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM); |
2261 | return read_memory_unsigned_integer (sp + (4 * (argi + 1)), 4); | |
143985b7 AF |
2262 | } |
2263 | ||
2264 | \f | |
3a1e71e3 | 2265 | static struct gdbarch * |
a62cc96e AC |
2266 | i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
2267 | { | |
cd3c07fc | 2268 | struct gdbarch_tdep *tdep; |
a62cc96e AC |
2269 | struct gdbarch *gdbarch; |
2270 | ||
4be87837 DJ |
2271 | /* If there is already a candidate, use it. */ |
2272 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
2273 | if (arches != NULL) | |
2274 | return arches->gdbarch; | |
a62cc96e AC |
2275 | |
2276 | /* Allocate space for the new architecture. */ | |
2277 | tdep = XMALLOC (struct gdbarch_tdep); | |
2278 | gdbarch = gdbarch_alloc (&info, tdep); | |
2279 | ||
473f17b0 MK |
2280 | /* General-purpose registers. */ |
2281 | tdep->gregset = NULL; | |
2282 | tdep->gregset_reg_offset = NULL; | |
2283 | tdep->gregset_num_regs = I386_NUM_GREGS; | |
2284 | tdep->sizeof_gregset = 0; | |
2285 | ||
2286 | /* Floating-point registers. */ | |
2287 | tdep->fpregset = NULL; | |
2288 | tdep->sizeof_fpregset = I387_SIZEOF_FSAVE; | |
2289 | ||
5716833c | 2290 | /* The default settings include the FPU registers, the MMX registers |
fd35795f | 2291 | and the SSE registers. This can be overridden for a specific ABI |
5716833c MK |
2292 | by adjusting the members `st0_regnum', `mm0_regnum' and |
2293 | `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers | |
2294 | will show up in the output of "info all-registers". Ideally we | |
2295 | should try to autodetect whether they are available, such that we | |
2296 | can prevent "info all-registers" from displaying registers that | |
2297 | aren't available. | |
2298 | ||
2299 | NOTE: kevinb/2003-07-13: ... if it's a choice between printing | |
2300 | [the SSE registers] always (even when they don't exist) or never | |
2301 | showing them to the user (even when they do exist), I prefer the | |
2302 | former over the latter. */ | |
2303 | ||
2304 | tdep->st0_regnum = I386_ST0_REGNUM; | |
2305 | ||
2306 | /* The MMX registers are implemented as pseudo-registers. Put off | |
fd35795f | 2307 | calculating the register number for %mm0 until we know the number |
5716833c MK |
2308 | of raw registers. */ |
2309 | tdep->mm0_regnum = 0; | |
2310 | ||
2311 | /* I386_NUM_XREGS includes %mxcsr, so substract one. */ | |
49ed40de | 2312 | tdep->num_xmm_regs = I386_NUM_XREGS - 1; |
d2a7c97a | 2313 | |
8201327c MK |
2314 | tdep->jb_pc_offset = -1; |
2315 | tdep->struct_return = pcc_struct_return; | |
8201327c MK |
2316 | tdep->sigtramp_start = 0; |
2317 | tdep->sigtramp_end = 0; | |
911bc6ee | 2318 | tdep->sigtramp_p = i386_sigtramp_p; |
21d0e8a4 | 2319 | tdep->sigcontext_addr = NULL; |
a3386186 | 2320 | tdep->sc_reg_offset = NULL; |
8201327c | 2321 | tdep->sc_pc_offset = -1; |
21d0e8a4 | 2322 | tdep->sc_sp_offset = -1; |
8201327c | 2323 | |
896fb97d MK |
2324 | /* The format used for `long double' on almost all i386 targets is |
2325 | the i387 extended floating-point format. In fact, of all targets | |
2326 | in the GCC 2.95 tree, only OSF/1 does it different, and insists | |
2327 | on having a `long double' that's not `long' at all. */ | |
8da61cc4 | 2328 | set_gdbarch_long_double_format (gdbarch, floatformats_i387_ext); |
21d0e8a4 | 2329 | |
66da5fd8 | 2330 | /* Although the i387 extended floating-point has only 80 significant |
896fb97d MK |
2331 | bits, a `long double' actually takes up 96, probably to enforce |
2332 | alignment. */ | |
2333 | set_gdbarch_long_double_bit (gdbarch, 96); | |
2334 | ||
49ed40de KB |
2335 | /* The default ABI includes general-purpose registers, |
2336 | floating-point registers, and the SSE registers. */ | |
2337 | set_gdbarch_num_regs (gdbarch, I386_SSE_NUM_REGS); | |
acd5c798 MK |
2338 | set_gdbarch_register_name (gdbarch, i386_register_name); |
2339 | set_gdbarch_register_type (gdbarch, i386_register_type); | |
21d0e8a4 | 2340 | |
acd5c798 MK |
2341 | /* Register numbers of various important registers. */ |
2342 | set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */ | |
2343 | set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */ | |
2344 | set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */ | |
2345 | set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */ | |
356a6b3e | 2346 | |
c4fc7f1b MK |
2347 | /* NOTE: kettenis/20040418: GCC does have two possible register |
2348 | numbering schemes on the i386: dbx and SVR4. These schemes | |
2349 | differ in how they number %ebp, %esp, %eflags, and the | |
fd35795f | 2350 | floating-point registers, and are implemented by the arrays |
c4fc7f1b MK |
2351 | dbx_register_map[] and svr4_dbx_register_map in |
2352 | gcc/config/i386.c. GCC also defines a third numbering scheme in | |
2353 | gcc/config/i386.c, which it designates as the "default" register | |
2354 | map used in 64bit mode. This last register numbering scheme is | |
d4dc1a91 | 2355 | implemented in dbx64_register_map, and is used for AMD64; see |
c4fc7f1b MK |
2356 | amd64-tdep.c. |
2357 | ||
2358 | Currently, each GCC i386 target always uses the same register | |
2359 | numbering scheme across all its supported debugging formats | |
2360 | i.e. SDB (COFF), stabs and DWARF 2. This is because | |
2361 | gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the | |
2362 | DBX_REGISTER_NUMBER macro which is defined by each target's | |
2363 | respective config header in a manner independent of the requested | |
2364 | output debugging format. | |
2365 | ||
2366 | This does not match the arrangement below, which presumes that | |
2367 | the SDB and stabs numbering schemes differ from the DWARF and | |
2368 | DWARF 2 ones. The reason for this arrangement is that it is | |
2369 | likely to get the numbering scheme for the target's | |
2370 | default/native debug format right. For targets where GCC is the | |
2371 | native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for | |
2372 | targets where the native toolchain uses a different numbering | |
2373 | scheme for a particular debug format (stabs-in-ELF on Solaris) | |
d4dc1a91 BF |
2374 | the defaults below will have to be overridden, like |
2375 | i386_elf_init_abi() does. */ | |
c4fc7f1b MK |
2376 | |
2377 | /* Use the dbx register numbering scheme for stabs and COFF. */ | |
2378 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_dbx_reg_to_regnum); | |
2379 | set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_dbx_reg_to_regnum); | |
2380 | ||
2381 | /* Use the SVR4 register numbering scheme for DWARF and DWARF 2. */ | |
2382 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum); | |
2383 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum); | |
356a6b3e MK |
2384 | |
2385 | /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to | |
2386 | be in use on any of the supported i386 targets. */ | |
2387 | ||
61113f8b MK |
2388 | set_gdbarch_print_float_info (gdbarch, i387_print_float_info); |
2389 | ||
8201327c | 2390 | set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target); |
96297dab | 2391 | |
a62cc96e | 2392 | /* Call dummy code. */ |
acd5c798 | 2393 | set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call); |
a62cc96e | 2394 | |
ff2e87ac AC |
2395 | set_gdbarch_convert_register_p (gdbarch, i386_convert_register_p); |
2396 | set_gdbarch_register_to_value (gdbarch, i386_register_to_value); | |
2397 | set_gdbarch_value_to_register (gdbarch, i386_value_to_register); | |
b6197528 | 2398 | |
c5e656c1 | 2399 | set_gdbarch_return_value (gdbarch, i386_return_value); |
8201327c | 2400 | |
93924b6b MK |
2401 | set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue); |
2402 | ||
2403 | /* Stack grows downward. */ | |
2404 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
2405 | ||
2406 | set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc); | |
2407 | set_gdbarch_decr_pc_after_break (gdbarch, 1); | |
42fdc8df | 2408 | |
42fdc8df | 2409 | set_gdbarch_frame_args_skip (gdbarch, 8); |
8201327c | 2410 | |
28fc6740 | 2411 | /* Wire in the MMX registers. */ |
0f751ff2 | 2412 | set_gdbarch_num_pseudo_regs (gdbarch, i386_num_mmx_regs); |
28fc6740 AC |
2413 | set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read); |
2414 | set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write); | |
2415 | ||
5e3397bb MK |
2416 | set_gdbarch_print_insn (gdbarch, i386_print_insn); |
2417 | ||
acd5c798 | 2418 | set_gdbarch_unwind_dummy_id (gdbarch, i386_unwind_dummy_id); |
acd5c798 MK |
2419 | |
2420 | set_gdbarch_unwind_pc (gdbarch, i386_unwind_pc); | |
2421 | ||
38c968cf AC |
2422 | /* Add the i386 register groups. */ |
2423 | i386_add_reggroups (gdbarch); | |
2424 | set_gdbarch_register_reggroup_p (gdbarch, i386_register_reggroup_p); | |
2425 | ||
143985b7 AF |
2426 | /* Helper for function argument information. */ |
2427 | set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument); | |
2428 | ||
6405b0a6 | 2429 | /* Hook in the DWARF CFI frame unwinder. */ |
336d1bba | 2430 | frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); |
6405b0a6 | 2431 | |
acd5c798 | 2432 | frame_base_set_default (gdbarch, &i386_frame_base); |
6c0e89ed | 2433 | |
3ce1502b | 2434 | /* Hook in ABI-specific overrides, if they have been registered. */ |
4be87837 | 2435 | gdbarch_init_osabi (info, gdbarch); |
3ce1502b | 2436 | |
336d1bba AC |
2437 | frame_unwind_append_sniffer (gdbarch, i386_sigtramp_frame_sniffer); |
2438 | frame_unwind_append_sniffer (gdbarch, i386_frame_sniffer); | |
acd5c798 | 2439 | |
8446b36a MK |
2440 | /* If we have a register mapping, enable the generic core file |
2441 | support, unless it has already been enabled. */ | |
2442 | if (tdep->gregset_reg_offset | |
2443 | && !gdbarch_regset_from_core_section_p (gdbarch)) | |
2444 | set_gdbarch_regset_from_core_section (gdbarch, | |
2445 | i386_regset_from_core_section); | |
2446 | ||
5716833c MK |
2447 | /* Unless support for MMX has been disabled, make %mm0 the first |
2448 | pseudo-register. */ | |
2449 | if (tdep->mm0_regnum == 0) | |
2450 | tdep->mm0_regnum = gdbarch_num_regs (gdbarch); | |
2451 | ||
a62cc96e AC |
2452 | return gdbarch; |
2453 | } | |
2454 | ||
8201327c MK |
2455 | static enum gdb_osabi |
2456 | i386_coff_osabi_sniffer (bfd *abfd) | |
2457 | { | |
762c5349 MK |
2458 | if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0 |
2459 | || strcmp (bfd_get_target (abfd), "coff-go32") == 0) | |
8201327c MK |
2460 | return GDB_OSABI_GO32; |
2461 | ||
2462 | return GDB_OSABI_UNKNOWN; | |
2463 | } | |
8201327c MK |
2464 | \f |
2465 | ||
28e9e0f0 MK |
2466 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
2467 | void _initialize_i386_tdep (void); | |
2468 | ||
c906108c | 2469 | void |
fba45db2 | 2470 | _initialize_i386_tdep (void) |
c906108c | 2471 | { |
a62cc96e AC |
2472 | register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init); |
2473 | ||
fc338970 | 2474 | /* Add the variable that controls the disassembly flavor. */ |
7ab04401 AC |
2475 | add_setshow_enum_cmd ("disassembly-flavor", no_class, valid_flavors, |
2476 | &disassembly_flavor, _("\ | |
2477 | Set the disassembly flavor."), _("\ | |
2478 | Show the disassembly flavor."), _("\ | |
2479 | The valid values are \"att\" and \"intel\", and the default value is \"att\"."), | |
2480 | NULL, | |
2481 | NULL, /* FIXME: i18n: */ | |
2482 | &setlist, &showlist); | |
8201327c MK |
2483 | |
2484 | /* Add the variable that controls the convention for returning | |
2485 | structs. */ | |
7ab04401 AC |
2486 | add_setshow_enum_cmd ("struct-convention", no_class, valid_conventions, |
2487 | &struct_convention, _("\ | |
2488 | Set the convention for returning small structs."), _("\ | |
2489 | Show the convention for returning small structs."), _("\ | |
2490 | Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\ | |
2491 | is \"default\"."), | |
2492 | NULL, | |
2493 | NULL, /* FIXME: i18n: */ | |
2494 | &setlist, &showlist); | |
8201327c MK |
2495 | |
2496 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour, | |
2497 | i386_coff_osabi_sniffer); | |
8201327c | 2498 | |
05816f70 | 2499 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4, |
8201327c | 2500 | i386_svr4_init_abi); |
05816f70 | 2501 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_GO32, |
8201327c | 2502 | i386_go32_init_abi); |
38c968cf | 2503 | |
5ae96ec1 | 2504 | /* Initialize the i386-specific register groups & types. */ |
38c968cf | 2505 | i386_init_reggroups (); |
5ae96ec1 | 2506 | i386_init_types(); |
c906108c | 2507 | } |