Commit | Line | Data |
---|---|---|
c906108c | 1 | /* Intel 386 target-dependent stuff. |
349c5d5f AC |
2 | |
3 | Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, | |
4be87837 | 4 | 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
c906108c | 5 | |
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | #include "defs.h" | |
acd5c798 MK |
24 | #include "arch-utils.h" |
25 | #include "command.h" | |
26 | #include "dummy-frame.h" | |
6405b0a6 | 27 | #include "dwarf2-frame.h" |
acd5c798 MK |
28 | #include "doublest.h" |
29 | #include "floatformat.h" | |
c906108c | 30 | #include "frame.h" |
acd5c798 MK |
31 | #include "frame-base.h" |
32 | #include "frame-unwind.h" | |
c906108c | 33 | #include "inferior.h" |
acd5c798 | 34 | #include "gdbcmd.h" |
c906108c | 35 | #include "gdbcore.h" |
dfe01d39 | 36 | #include "objfiles.h" |
acd5c798 MK |
37 | #include "osabi.h" |
38 | #include "regcache.h" | |
39 | #include "reggroups.h" | |
c0d1d883 | 40 | #include "symfile.h" |
c906108c | 41 | #include "symtab.h" |
acd5c798 | 42 | #include "target.h" |
fd0407d6 | 43 | #include "value.h" |
a89aa300 | 44 | #include "dis-asm.h" |
acd5c798 | 45 | |
3d261580 | 46 | #include "gdb_assert.h" |
acd5c798 | 47 | #include "gdb_string.h" |
3d261580 | 48 | |
d2a7c97a | 49 | #include "i386-tdep.h" |
61113f8b | 50 | #include "i387-tdep.h" |
d2a7c97a | 51 | |
fc633446 MK |
52 | /* Names of the registers. The first 10 registers match the register |
53 | numbering scheme used by GCC for stabs and DWARF. */ | |
c40e1eab | 54 | |
fc633446 MK |
55 | static char *i386_register_names[] = |
56 | { | |
57 | "eax", "ecx", "edx", "ebx", | |
58 | "esp", "ebp", "esi", "edi", | |
59 | "eip", "eflags", "cs", "ss", | |
60 | "ds", "es", "fs", "gs", | |
61 | "st0", "st1", "st2", "st3", | |
62 | "st4", "st5", "st6", "st7", | |
63 | "fctrl", "fstat", "ftag", "fiseg", | |
64 | "fioff", "foseg", "fooff", "fop", | |
65 | "xmm0", "xmm1", "xmm2", "xmm3", | |
66 | "xmm4", "xmm5", "xmm6", "xmm7", | |
67 | "mxcsr" | |
68 | }; | |
69 | ||
1cb97e17 | 70 | static const int i386_num_register_names = ARRAY_SIZE (i386_register_names); |
c40e1eab | 71 | |
28fc6740 AC |
72 | /* MMX registers. */ |
73 | ||
74 | static char *i386_mmx_names[] = | |
75 | { | |
76 | "mm0", "mm1", "mm2", "mm3", | |
77 | "mm4", "mm5", "mm6", "mm7" | |
78 | }; | |
c40e1eab | 79 | |
1cb97e17 | 80 | static const int i386_num_mmx_regs = ARRAY_SIZE (i386_mmx_names); |
c40e1eab | 81 | |
28fc6740 | 82 | static int |
5716833c | 83 | i386_mmx_regnum_p (struct gdbarch *gdbarch, int regnum) |
28fc6740 | 84 | { |
5716833c MK |
85 | int mm0_regnum = gdbarch_tdep (gdbarch)->mm0_regnum; |
86 | ||
87 | if (mm0_regnum < 0) | |
88 | return 0; | |
89 | ||
90 | return (regnum >= mm0_regnum && regnum < mm0_regnum + i386_num_mmx_regs); | |
28fc6740 AC |
91 | } |
92 | ||
5716833c | 93 | /* SSE register? */ |
23a34459 | 94 | |
5716833c MK |
95 | static int |
96 | i386_sse_regnum_p (struct gdbarch *gdbarch, int regnum) | |
23a34459 | 97 | { |
5716833c MK |
98 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
99 | ||
100 | #define I387_ST0_REGNUM tdep->st0_regnum | |
101 | #define I387_NUM_XMM_REGS tdep->num_xmm_regs | |
102 | ||
103 | if (I387_NUM_XMM_REGS == 0) | |
104 | return 0; | |
105 | ||
106 | return (I387_XMM0_REGNUM <= regnum && regnum < I387_MXCSR_REGNUM); | |
107 | ||
108 | #undef I387_ST0_REGNUM | |
109 | #undef I387_NUM_XMM_REGS | |
23a34459 AC |
110 | } |
111 | ||
5716833c MK |
112 | static int |
113 | i386_mxcsr_regnum_p (struct gdbarch *gdbarch, int regnum) | |
23a34459 | 114 | { |
5716833c MK |
115 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
116 | ||
117 | #define I387_ST0_REGNUM tdep->st0_regnum | |
118 | #define I387_NUM_XMM_REGS tdep->num_xmm_regs | |
119 | ||
120 | if (I387_NUM_XMM_REGS == 0) | |
121 | return 0; | |
122 | ||
123 | return (regnum == I387_MXCSR_REGNUM); | |
124 | ||
125 | #undef I387_ST0_REGNUM | |
126 | #undef I387_NUM_XMM_REGS | |
23a34459 AC |
127 | } |
128 | ||
5716833c MK |
129 | #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum) |
130 | #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum) | |
131 | #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs) | |
132 | ||
133 | /* FP register? */ | |
23a34459 AC |
134 | |
135 | int | |
5716833c | 136 | i386_fp_regnum_p (int regnum) |
23a34459 | 137 | { |
5716833c MK |
138 | if (I387_ST0_REGNUM < 0) |
139 | return 0; | |
140 | ||
141 | return (I387_ST0_REGNUM <= regnum && regnum < I387_FCTRL_REGNUM); | |
23a34459 AC |
142 | } |
143 | ||
144 | int | |
5716833c | 145 | i386_fpc_regnum_p (int regnum) |
23a34459 | 146 | { |
5716833c MK |
147 | if (I387_ST0_REGNUM < 0) |
148 | return 0; | |
149 | ||
150 | return (I387_FCTRL_REGNUM <= regnum && regnum < I387_XMM0_REGNUM); | |
23a34459 AC |
151 | } |
152 | ||
fc633446 MK |
153 | /* Return the name of register REG. */ |
154 | ||
fa88f677 | 155 | const char * |
fc633446 MK |
156 | i386_register_name (int reg) |
157 | { | |
5716833c MK |
158 | if (i386_mmx_regnum_p (current_gdbarch, reg)) |
159 | return i386_mmx_names[reg - I387_MM0_REGNUM]; | |
fc633446 | 160 | |
70913449 MK |
161 | if (reg >= 0 && reg < i386_num_register_names) |
162 | return i386_register_names[reg]; | |
163 | ||
c40e1eab | 164 | return NULL; |
fc633446 MK |
165 | } |
166 | ||
85540d8c MK |
167 | /* Convert stabs register number REG to the appropriate register |
168 | number used by GDB. */ | |
169 | ||
8201327c | 170 | static int |
85540d8c MK |
171 | i386_stab_reg_to_regnum (int reg) |
172 | { | |
173 | /* This implements what GCC calls the "default" register map. */ | |
174 | if (reg >= 0 && reg <= 7) | |
175 | { | |
acd5c798 | 176 | /* General-purpose registers. */ |
85540d8c MK |
177 | return reg; |
178 | } | |
179 | else if (reg >= 12 && reg <= 19) | |
180 | { | |
181 | /* Floating-point registers. */ | |
5716833c | 182 | return reg - 12 + I387_ST0_REGNUM; |
85540d8c MK |
183 | } |
184 | else if (reg >= 21 && reg <= 28) | |
185 | { | |
186 | /* SSE registers. */ | |
5716833c | 187 | return reg - 21 + I387_XMM0_REGNUM; |
85540d8c MK |
188 | } |
189 | else if (reg >= 29 && reg <= 36) | |
190 | { | |
191 | /* MMX registers. */ | |
5716833c | 192 | return reg - 29 + I387_MM0_REGNUM; |
85540d8c MK |
193 | } |
194 | ||
195 | /* This will hopefully provoke a warning. */ | |
196 | return NUM_REGS + NUM_PSEUDO_REGS; | |
197 | } | |
198 | ||
8201327c | 199 | /* Convert DWARF register number REG to the appropriate register |
85540d8c MK |
200 | number used by GDB. */ |
201 | ||
8201327c | 202 | static int |
85540d8c MK |
203 | i386_dwarf_reg_to_regnum (int reg) |
204 | { | |
205 | /* The DWARF register numbering includes %eip and %eflags, and | |
206 | numbers the floating point registers differently. */ | |
207 | if (reg >= 0 && reg <= 9) | |
208 | { | |
acd5c798 | 209 | /* General-purpose registers. */ |
85540d8c MK |
210 | return reg; |
211 | } | |
212 | else if (reg >= 11 && reg <= 18) | |
213 | { | |
214 | /* Floating-point registers. */ | |
5716833c | 215 | return reg - 11 + I387_ST0_REGNUM; |
85540d8c MK |
216 | } |
217 | else if (reg >= 21) | |
218 | { | |
219 | /* The SSE and MMX registers have identical numbers as in stabs. */ | |
220 | return i386_stab_reg_to_regnum (reg); | |
221 | } | |
222 | ||
223 | /* This will hopefully provoke a warning. */ | |
224 | return NUM_REGS + NUM_PSEUDO_REGS; | |
225 | } | |
5716833c MK |
226 | |
227 | #undef I387_ST0_REGNUM | |
228 | #undef I387_MM0_REGNUM | |
229 | #undef I387_NUM_XMM_REGS | |
fc338970 | 230 | \f |
917317f4 | 231 | |
fc338970 MK |
232 | /* This is the variable that is set with "set disassembly-flavor", and |
233 | its legitimate values. */ | |
53904c9e AC |
234 | static const char att_flavor[] = "att"; |
235 | static const char intel_flavor[] = "intel"; | |
236 | static const char *valid_flavors[] = | |
c5aa993b | 237 | { |
c906108c SS |
238 | att_flavor, |
239 | intel_flavor, | |
240 | NULL | |
241 | }; | |
53904c9e | 242 | static const char *disassembly_flavor = att_flavor; |
acd5c798 | 243 | \f |
c906108c | 244 | |
acd5c798 MK |
245 | /* Use the program counter to determine the contents and size of a |
246 | breakpoint instruction. Return a pointer to a string of bytes that | |
247 | encode a breakpoint instruction, store the length of the string in | |
248 | *LEN and optionally adjust *PC to point to the correct memory | |
249 | location for inserting the breakpoint. | |
c906108c | 250 | |
acd5c798 MK |
251 | On the i386 we have a single breakpoint that fits in a single byte |
252 | and can be inserted anywhere. | |
c906108c | 253 | |
acd5c798 MK |
254 | This function is 64-bit safe. */ |
255 | ||
256 | static const unsigned char * | |
257 | i386_breakpoint_from_pc (CORE_ADDR *pc, int *len) | |
c906108c | 258 | { |
acd5c798 MK |
259 | static unsigned char break_insn[] = { 0xcc }; /* int 3 */ |
260 | ||
261 | *len = sizeof (break_insn); | |
262 | return break_insn; | |
c906108c | 263 | } |
fc338970 | 264 | \f |
acd5c798 MK |
265 | #ifdef I386_REGNO_TO_SYMMETRY |
266 | #error "The Sequent Symmetry is no longer supported." | |
267 | #endif | |
c906108c | 268 | |
acd5c798 MK |
269 | /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi |
270 | and %esp "belong" to the calling function. Therefore these | |
271 | registers should be saved if they're going to be modified. */ | |
c906108c | 272 | |
acd5c798 MK |
273 | /* The maximum number of saved registers. This should include all |
274 | registers mentioned above, and %eip. */ | |
a3386186 | 275 | #define I386_NUM_SAVED_REGS I386_NUM_GREGS |
acd5c798 MK |
276 | |
277 | struct i386_frame_cache | |
c906108c | 278 | { |
acd5c798 MK |
279 | /* Base address. */ |
280 | CORE_ADDR base; | |
281 | CORE_ADDR sp_offset; | |
282 | CORE_ADDR pc; | |
283 | ||
fd13a04a AC |
284 | /* Saved registers. */ |
285 | CORE_ADDR saved_regs[I386_NUM_SAVED_REGS]; | |
acd5c798 MK |
286 | CORE_ADDR saved_sp; |
287 | int pc_in_eax; | |
288 | ||
289 | /* Stack space reserved for local variables. */ | |
290 | long locals; | |
291 | }; | |
292 | ||
293 | /* Allocate and initialize a frame cache. */ | |
294 | ||
295 | static struct i386_frame_cache * | |
fd13a04a | 296 | i386_alloc_frame_cache (void) |
acd5c798 MK |
297 | { |
298 | struct i386_frame_cache *cache; | |
299 | int i; | |
300 | ||
301 | cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache); | |
302 | ||
303 | /* Base address. */ | |
304 | cache->base = 0; | |
305 | cache->sp_offset = -4; | |
306 | cache->pc = 0; | |
307 | ||
fd13a04a AC |
308 | /* Saved registers. We initialize these to -1 since zero is a valid |
309 | offset (that's where %ebp is supposed to be stored). */ | |
310 | for (i = 0; i < I386_NUM_SAVED_REGS; i++) | |
311 | cache->saved_regs[i] = -1; | |
acd5c798 MK |
312 | cache->saved_sp = 0; |
313 | cache->pc_in_eax = 0; | |
314 | ||
315 | /* Frameless until proven otherwise. */ | |
316 | cache->locals = -1; | |
317 | ||
318 | return cache; | |
319 | } | |
c906108c | 320 | |
acd5c798 MK |
321 | /* If the instruction at PC is a jump, return the address of its |
322 | target. Otherwise, return PC. */ | |
c906108c | 323 | |
acd5c798 MK |
324 | static CORE_ADDR |
325 | i386_follow_jump (CORE_ADDR pc) | |
326 | { | |
327 | unsigned char op; | |
328 | long delta = 0; | |
329 | int data16 = 0; | |
c906108c | 330 | |
acd5c798 MK |
331 | op = read_memory_unsigned_integer (pc, 1); |
332 | if (op == 0x66) | |
c906108c | 333 | { |
c906108c | 334 | data16 = 1; |
acd5c798 | 335 | op = read_memory_unsigned_integer (pc + 1, 1); |
c906108c SS |
336 | } |
337 | ||
acd5c798 | 338 | switch (op) |
c906108c SS |
339 | { |
340 | case 0xe9: | |
fc338970 | 341 | /* Relative jump: if data16 == 0, disp32, else disp16. */ |
c906108c SS |
342 | if (data16) |
343 | { | |
acd5c798 | 344 | delta = read_memory_integer (pc + 2, 2); |
c906108c | 345 | |
fc338970 MK |
346 | /* Include the size of the jmp instruction (including the |
347 | 0x66 prefix). */ | |
acd5c798 | 348 | delta += 4; |
c906108c SS |
349 | } |
350 | else | |
351 | { | |
acd5c798 | 352 | delta = read_memory_integer (pc + 1, 4); |
c906108c | 353 | |
acd5c798 MK |
354 | /* Include the size of the jmp instruction. */ |
355 | delta += 5; | |
c906108c SS |
356 | } |
357 | break; | |
358 | case 0xeb: | |
fc338970 | 359 | /* Relative jump, disp8 (ignore data16). */ |
acd5c798 | 360 | delta = read_memory_integer (pc + data16 + 1, 1); |
c906108c | 361 | |
acd5c798 | 362 | delta += data16 + 2; |
c906108c SS |
363 | break; |
364 | } | |
c906108c | 365 | |
acd5c798 MK |
366 | return pc + delta; |
367 | } | |
fc338970 | 368 | |
acd5c798 MK |
369 | /* Check whether PC points at a prologue for a function returning a |
370 | structure or union. If so, it updates CACHE and returns the | |
371 | address of the first instruction after the code sequence that | |
372 | removes the "hidden" argument from the stack or CURRENT_PC, | |
373 | whichever is smaller. Otherwise, return PC. */ | |
c906108c | 374 | |
acd5c798 MK |
375 | static CORE_ADDR |
376 | i386_analyze_struct_return (CORE_ADDR pc, CORE_ADDR current_pc, | |
377 | struct i386_frame_cache *cache) | |
c906108c | 378 | { |
acd5c798 MK |
379 | /* Functions that return a structure or union start with: |
380 | ||
381 | popl %eax 0x58 | |
382 | xchgl %eax, (%esp) 0x87 0x04 0x24 | |
383 | or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00 | |
384 | ||
385 | (the System V compiler puts out the second `xchg' instruction, | |
386 | and the assembler doesn't try to optimize it, so the 'sib' form | |
387 | gets generated). This sequence is used to get the address of the | |
388 | return buffer for a function that returns a structure. */ | |
389 | static unsigned char proto1[3] = { 0x87, 0x04, 0x24 }; | |
390 | static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 }; | |
391 | unsigned char buf[4]; | |
c906108c SS |
392 | unsigned char op; |
393 | ||
acd5c798 MK |
394 | if (current_pc <= pc) |
395 | return pc; | |
396 | ||
397 | op = read_memory_unsigned_integer (pc, 1); | |
c906108c | 398 | |
acd5c798 MK |
399 | if (op != 0x58) /* popl %eax */ |
400 | return pc; | |
c906108c | 401 | |
acd5c798 MK |
402 | read_memory (pc + 1, buf, 4); |
403 | if (memcmp (buf, proto1, 3) != 0 && memcmp (buf, proto2, 4) != 0) | |
404 | return pc; | |
c906108c | 405 | |
acd5c798 | 406 | if (current_pc == pc) |
c906108c | 407 | { |
acd5c798 MK |
408 | cache->sp_offset += 4; |
409 | return current_pc; | |
c906108c SS |
410 | } |
411 | ||
acd5c798 | 412 | if (current_pc == pc + 1) |
c906108c | 413 | { |
acd5c798 MK |
414 | cache->pc_in_eax = 1; |
415 | return current_pc; | |
416 | } | |
417 | ||
418 | if (buf[1] == proto1[1]) | |
419 | return pc + 4; | |
420 | else | |
421 | return pc + 5; | |
422 | } | |
423 | ||
424 | static CORE_ADDR | |
425 | i386_skip_probe (CORE_ADDR pc) | |
426 | { | |
427 | /* A function may start with | |
fc338970 | 428 | |
acd5c798 MK |
429 | pushl constant |
430 | call _probe | |
431 | addl $4, %esp | |
fc338970 | 432 | |
acd5c798 MK |
433 | followed by |
434 | ||
435 | pushl %ebp | |
fc338970 | 436 | |
acd5c798 MK |
437 | etc. */ |
438 | unsigned char buf[8]; | |
439 | unsigned char op; | |
fc338970 | 440 | |
acd5c798 MK |
441 | op = read_memory_unsigned_integer (pc, 1); |
442 | ||
443 | if (op == 0x68 || op == 0x6a) | |
444 | { | |
445 | int delta; | |
c906108c | 446 | |
acd5c798 MK |
447 | /* Skip past the `pushl' instruction; it has either a one-byte or a |
448 | four-byte operand, depending on the opcode. */ | |
c906108c | 449 | if (op == 0x68) |
acd5c798 | 450 | delta = 5; |
c906108c | 451 | else |
acd5c798 | 452 | delta = 2; |
c906108c | 453 | |
acd5c798 MK |
454 | /* Read the following 8 bytes, which should be `call _probe' (6 |
455 | bytes) followed by `addl $4,%esp' (2 bytes). */ | |
456 | read_memory (pc + delta, buf, sizeof (buf)); | |
c906108c | 457 | if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4) |
acd5c798 | 458 | pc += delta + sizeof (buf); |
c906108c SS |
459 | } |
460 | ||
acd5c798 MK |
461 | return pc; |
462 | } | |
463 | ||
464 | /* Check whether PC points at a code that sets up a new stack frame. | |
465 | If so, it updates CACHE and returns the address of the first | |
466 | instruction after the sequence that sets removes the "hidden" | |
467 | argument from the stack or CURRENT_PC, whichever is smaller. | |
468 | Otherwise, return PC. */ | |
469 | ||
470 | static CORE_ADDR | |
471 | i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR current_pc, | |
472 | struct i386_frame_cache *cache) | |
473 | { | |
474 | unsigned char op; | |
26604a34 | 475 | int skip = 0; |
acd5c798 MK |
476 | |
477 | if (current_pc <= pc) | |
478 | return current_pc; | |
479 | ||
480 | op = read_memory_unsigned_integer (pc, 1); | |
481 | ||
c906108c | 482 | if (op == 0x55) /* pushl %ebp */ |
c5aa993b | 483 | { |
acd5c798 MK |
484 | /* Take into account that we've executed the `pushl %ebp' that |
485 | starts this instruction sequence. */ | |
fd13a04a | 486 | cache->saved_regs[I386_EBP_REGNUM] = 0; |
acd5c798 MK |
487 | cache->sp_offset += 4; |
488 | ||
489 | /* If that's all, return now. */ | |
490 | if (current_pc <= pc + 1) | |
491 | return current_pc; | |
492 | ||
acd5c798 | 493 | op = read_memory_unsigned_integer (pc + 1, 1); |
26604a34 MK |
494 | |
495 | /* Check for some special instructions that might be migrated | |
496 | by GCC into the prologue. We check for | |
497 | ||
498 | xorl %ebx, %ebx | |
499 | xorl %ecx, %ecx | |
500 | xorl %edx, %edx | |
501 | ||
502 | and the equivalent | |
503 | ||
504 | subl %ebx, %ebx | |
505 | subl %ecx, %ecx | |
506 | subl %edx, %edx | |
507 | ||
508 | Make sure we only skip these instructions if we later see the | |
509 | `movl %esp, %ebp' that actually sets up the frame. */ | |
510 | while (op == 0x29 || op == 0x31) | |
511 | { | |
512 | op = read_memory_unsigned_integer (pc + skip + 2, 1); | |
513 | switch (op) | |
514 | { | |
515 | case 0xdb: /* %ebx */ | |
516 | case 0xc9: /* %ecx */ | |
517 | case 0xd2: /* %edx */ | |
518 | skip += 2; | |
519 | break; | |
520 | default: | |
521 | return pc + 1; | |
522 | } | |
523 | ||
524 | op = read_memory_unsigned_integer (pc + skip + 1, 1); | |
525 | } | |
526 | ||
527 | /* Check for `movl %esp, %ebp' -- can be written in two ways. */ | |
acd5c798 | 528 | switch (op) |
c906108c SS |
529 | { |
530 | case 0x8b: | |
26604a34 | 531 | if (read_memory_unsigned_integer (pc + skip + 2, 1) != 0xec) |
acd5c798 | 532 | return pc + 1; |
c906108c SS |
533 | break; |
534 | case 0x89: | |
26604a34 | 535 | if (read_memory_unsigned_integer (pc + skip + 2, 1) != 0xe5) |
acd5c798 | 536 | return pc + 1; |
c906108c SS |
537 | break; |
538 | default: | |
acd5c798 | 539 | return pc + 1; |
c906108c | 540 | } |
acd5c798 | 541 | |
26604a34 MK |
542 | /* OK, we actually have a frame. We just don't know how large |
543 | it is yet. Set its size to zero. We'll adjust it if | |
544 | necessary. We also now commit to skipping the special | |
545 | instructions mentioned before. */ | |
acd5c798 | 546 | cache->locals = 0; |
26604a34 | 547 | pc += skip; |
acd5c798 MK |
548 | |
549 | /* If that's all, return now. */ | |
550 | if (current_pc <= pc + 3) | |
551 | return current_pc; | |
552 | ||
fc338970 MK |
553 | /* Check for stack adjustment |
554 | ||
acd5c798 | 555 | subl $XXX, %esp |
fc338970 MK |
556 | |
557 | NOTE: You can't subtract a 16 bit immediate from a 32 bit | |
558 | reg, so we don't have to worry about a data16 prefix. */ | |
acd5c798 | 559 | op = read_memory_unsigned_integer (pc + 3, 1); |
c906108c SS |
560 | if (op == 0x83) |
561 | { | |
fc338970 | 562 | /* `subl' with 8 bit immediate. */ |
acd5c798 | 563 | if (read_memory_unsigned_integer (pc + 4, 1) != 0xec) |
fc338970 | 564 | /* Some instruction starting with 0x83 other than `subl'. */ |
acd5c798 MK |
565 | return pc + 3; |
566 | ||
567 | /* `subl' with signed byte immediate (though it wouldn't make | |
568 | sense to be negative). */ | |
569 | cache->locals = read_memory_integer (pc + 5, 1); | |
570 | return pc + 6; | |
c906108c SS |
571 | } |
572 | else if (op == 0x81) | |
573 | { | |
fc338970 | 574 | /* Maybe it is `subl' with a 32 bit immedediate. */ |
acd5c798 | 575 | if (read_memory_unsigned_integer (pc + 4, 1) != 0xec) |
fc338970 | 576 | /* Some instruction starting with 0x81 other than `subl'. */ |
acd5c798 MK |
577 | return pc + 3; |
578 | ||
fc338970 | 579 | /* It is `subl' with a 32 bit immediate. */ |
acd5c798 MK |
580 | cache->locals = read_memory_integer (pc + 5, 4); |
581 | return pc + 9; | |
c906108c SS |
582 | } |
583 | else | |
584 | { | |
acd5c798 MK |
585 | /* Some instruction other than `subl'. */ |
586 | return pc + 3; | |
c906108c SS |
587 | } |
588 | } | |
acd5c798 | 589 | else if (op == 0xc8) /* enter $XXX */ |
c906108c | 590 | { |
acd5c798 MK |
591 | cache->locals = read_memory_unsigned_integer (pc + 1, 2); |
592 | return pc + 4; | |
c906108c | 593 | } |
21d0e8a4 | 594 | |
acd5c798 | 595 | return pc; |
21d0e8a4 MK |
596 | } |
597 | ||
acd5c798 MK |
598 | /* Check whether PC points at code that saves registers on the stack. |
599 | If so, it updates CACHE and returns the address of the first | |
600 | instruction after the register saves or CURRENT_PC, whichever is | |
601 | smaller. Otherwise, return PC. */ | |
6bff26de MK |
602 | |
603 | static CORE_ADDR | |
acd5c798 MK |
604 | i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc, |
605 | struct i386_frame_cache *cache) | |
6bff26de | 606 | { |
99ab4326 MK |
607 | CORE_ADDR offset = 0; |
608 | unsigned char op; | |
609 | int i; | |
c0d1d883 | 610 | |
99ab4326 MK |
611 | if (cache->locals > 0) |
612 | offset -= cache->locals; | |
613 | for (i = 0; i < 8 && pc < current_pc; i++) | |
614 | { | |
615 | op = read_memory_unsigned_integer (pc, 1); | |
616 | if (op < 0x50 || op > 0x57) | |
617 | break; | |
0d17c81d | 618 | |
99ab4326 MK |
619 | offset -= 4; |
620 | cache->saved_regs[op - 0x50] = offset; | |
621 | cache->sp_offset += 4; | |
622 | pc++; | |
6bff26de MK |
623 | } |
624 | ||
acd5c798 | 625 | return pc; |
22797942 AC |
626 | } |
627 | ||
acd5c798 MK |
628 | /* Do a full analysis of the prologue at PC and update CACHE |
629 | accordingly. Bail out early if CURRENT_PC is reached. Return the | |
630 | address where the analysis stopped. | |
ed84f6c1 | 631 | |
fc338970 MK |
632 | We handle these cases: |
633 | ||
634 | The startup sequence can be at the start of the function, or the | |
635 | function can start with a branch to startup code at the end. | |
636 | ||
637 | %ebp can be set up with either the 'enter' instruction, or "pushl | |
638 | %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was | |
639 | once used in the System V compiler). | |
640 | ||
641 | Local space is allocated just below the saved %ebp by either the | |
642 | 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16 | |
643 | bit unsigned argument for space to allocate, and the 'addl' | |
644 | instruction could have either a signed byte, or 32 bit immediate. | |
645 | ||
646 | Next, the registers used by this function are pushed. With the | |
647 | System V compiler they will always be in the order: %edi, %esi, | |
648 | %ebx (and sometimes a harmless bug causes it to also save but not | |
649 | restore %eax); however, the code below is willing to see the pushes | |
650 | in any order, and will handle up to 8 of them. | |
651 | ||
652 | If the setup sequence is at the end of the function, then the next | |
653 | instruction will be a branch back to the start. */ | |
c906108c | 654 | |
acd5c798 MK |
655 | static CORE_ADDR |
656 | i386_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc, | |
657 | struct i386_frame_cache *cache) | |
c906108c | 658 | { |
acd5c798 MK |
659 | pc = i386_follow_jump (pc); |
660 | pc = i386_analyze_struct_return (pc, current_pc, cache); | |
661 | pc = i386_skip_probe (pc); | |
662 | pc = i386_analyze_frame_setup (pc, current_pc, cache); | |
663 | return i386_analyze_register_saves (pc, current_pc, cache); | |
c906108c SS |
664 | } |
665 | ||
fc338970 | 666 | /* Return PC of first real instruction. */ |
c906108c | 667 | |
3a1e71e3 | 668 | static CORE_ADDR |
acd5c798 | 669 | i386_skip_prologue (CORE_ADDR start_pc) |
c906108c | 670 | { |
c5aa993b | 671 | static unsigned char pic_pat[6] = |
acd5c798 MK |
672 | { |
673 | 0xe8, 0, 0, 0, 0, /* call 0x0 */ | |
674 | 0x5b, /* popl %ebx */ | |
c5aa993b | 675 | }; |
acd5c798 MK |
676 | struct i386_frame_cache cache; |
677 | CORE_ADDR pc; | |
678 | unsigned char op; | |
679 | int i; | |
c5aa993b | 680 | |
acd5c798 MK |
681 | cache.locals = -1; |
682 | pc = i386_analyze_prologue (start_pc, 0xffffffff, &cache); | |
683 | if (cache.locals < 0) | |
684 | return start_pc; | |
c5aa993b | 685 | |
acd5c798 | 686 | /* Found valid frame setup. */ |
c906108c | 687 | |
fc338970 MK |
688 | /* The native cc on SVR4 in -K PIC mode inserts the following code |
689 | to get the address of the global offset table (GOT) into register | |
acd5c798 MK |
690 | %ebx: |
691 | ||
fc338970 MK |
692 | call 0x0 |
693 | popl %ebx | |
694 | movl %ebx,x(%ebp) (optional) | |
695 | addl y,%ebx | |
696 | ||
c906108c SS |
697 | This code is with the rest of the prologue (at the end of the |
698 | function), so we have to skip it to get to the first real | |
699 | instruction at the start of the function. */ | |
c5aa993b | 700 | |
c906108c SS |
701 | for (i = 0; i < 6; i++) |
702 | { | |
acd5c798 | 703 | op = read_memory_unsigned_integer (pc + i, 1); |
c5aa993b | 704 | if (pic_pat[i] != op) |
c906108c SS |
705 | break; |
706 | } | |
707 | if (i == 6) | |
708 | { | |
acd5c798 MK |
709 | int delta = 6; |
710 | ||
711 | op = read_memory_unsigned_integer (pc + delta, 1); | |
c906108c | 712 | |
c5aa993b | 713 | if (op == 0x89) /* movl %ebx, x(%ebp) */ |
c906108c | 714 | { |
acd5c798 MK |
715 | op = read_memory_unsigned_integer (pc + delta + 1, 1); |
716 | ||
fc338970 | 717 | if (op == 0x5d) /* One byte offset from %ebp. */ |
acd5c798 | 718 | delta += 3; |
fc338970 | 719 | else if (op == 0x9d) /* Four byte offset from %ebp. */ |
acd5c798 | 720 | delta += 6; |
fc338970 | 721 | else /* Unexpected instruction. */ |
acd5c798 MK |
722 | delta = 0; |
723 | ||
724 | op = read_memory_unsigned_integer (pc + delta, 1); | |
c906108c | 725 | } |
acd5c798 | 726 | |
c5aa993b | 727 | /* addl y,%ebx */ |
acd5c798 MK |
728 | if (delta > 0 && op == 0x81 |
729 | && read_memory_unsigned_integer (pc + delta + 1, 1) == 0xc3); | |
c906108c | 730 | { |
acd5c798 | 731 | pc += delta + 6; |
c906108c SS |
732 | } |
733 | } | |
c5aa993b | 734 | |
acd5c798 | 735 | return i386_follow_jump (pc); |
c906108c SS |
736 | } |
737 | ||
acd5c798 | 738 | /* This function is 64-bit safe. */ |
93924b6b | 739 | |
acd5c798 MK |
740 | static CORE_ADDR |
741 | i386_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
93924b6b | 742 | { |
acd5c798 MK |
743 | char buf[8]; |
744 | ||
745 | frame_unwind_register (next_frame, PC_REGNUM, buf); | |
746 | return extract_typed_address (buf, builtin_type_void_func_ptr); | |
93924b6b | 747 | } |
acd5c798 | 748 | \f |
93924b6b | 749 | |
acd5c798 | 750 | /* Normal frames. */ |
c5aa993b | 751 | |
acd5c798 MK |
752 | static struct i386_frame_cache * |
753 | i386_frame_cache (struct frame_info *next_frame, void **this_cache) | |
a7769679 | 754 | { |
acd5c798 | 755 | struct i386_frame_cache *cache; |
c0d1d883 | 756 | char buf[4]; |
acd5c798 MK |
757 | int i; |
758 | ||
759 | if (*this_cache) | |
760 | return *this_cache; | |
761 | ||
fd13a04a | 762 | cache = i386_alloc_frame_cache (); |
acd5c798 MK |
763 | *this_cache = cache; |
764 | ||
765 | /* In principle, for normal frames, %ebp holds the frame pointer, | |
766 | which holds the base address for the current stack frame. | |
767 | However, for functions that don't need it, the frame pointer is | |
768 | optional. For these "frameless" functions the frame pointer is | |
769 | actually the frame pointer of the calling frame. Signal | |
770 | trampolines are just a special case of a "frameless" function. | |
771 | They (usually) share their frame pointer with the frame that was | |
772 | in progress when the signal occurred. */ | |
773 | ||
774 | frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); | |
775 | cache->base = extract_unsigned_integer (buf, 4); | |
776 | if (cache->base == 0) | |
777 | return cache; | |
778 | ||
779 | /* For normal frames, %eip is stored at 4(%ebp). */ | |
fd13a04a | 780 | cache->saved_regs[I386_EIP_REGNUM] = 4; |
acd5c798 MK |
781 | |
782 | cache->pc = frame_func_unwind (next_frame); | |
783 | if (cache->pc != 0) | |
784 | i386_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache); | |
785 | ||
786 | if (cache->locals < 0) | |
787 | { | |
788 | /* We didn't find a valid frame, which means that CACHE->base | |
789 | currently holds the frame pointer for our calling frame. If | |
790 | we're at the start of a function, or somewhere half-way its | |
791 | prologue, the function's frame probably hasn't been fully | |
792 | setup yet. Try to reconstruct the base address for the stack | |
793 | frame by looking at the stack pointer. For truly "frameless" | |
794 | functions this might work too. */ | |
795 | ||
796 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); | |
797 | cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset; | |
798 | } | |
799 | ||
800 | /* Now that we have the base address for the stack frame we can | |
801 | calculate the value of %esp in the calling frame. */ | |
802 | cache->saved_sp = cache->base + 8; | |
a7769679 | 803 | |
acd5c798 MK |
804 | /* Adjust all the saved registers such that they contain addresses |
805 | instead of offsets. */ | |
806 | for (i = 0; i < I386_NUM_SAVED_REGS; i++) | |
fd13a04a AC |
807 | if (cache->saved_regs[i] != -1) |
808 | cache->saved_regs[i] += cache->base; | |
acd5c798 MK |
809 | |
810 | return cache; | |
a7769679 MK |
811 | } |
812 | ||
3a1e71e3 | 813 | static void |
acd5c798 MK |
814 | i386_frame_this_id (struct frame_info *next_frame, void **this_cache, |
815 | struct frame_id *this_id) | |
c906108c | 816 | { |
acd5c798 MK |
817 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); |
818 | ||
819 | /* This marks the outermost frame. */ | |
820 | if (cache->base == 0) | |
821 | return; | |
822 | ||
3e210248 | 823 | /* See the end of i386_push_dummy_call. */ |
acd5c798 MK |
824 | (*this_id) = frame_id_build (cache->base + 8, cache->pc); |
825 | } | |
826 | ||
827 | static void | |
828 | i386_frame_prev_register (struct frame_info *next_frame, void **this_cache, | |
829 | int regnum, int *optimizedp, | |
830 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
831 | int *realnump, void *valuep) | |
832 | { | |
833 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); | |
834 | ||
835 | gdb_assert (regnum >= 0); | |
836 | ||
837 | /* The System V ABI says that: | |
838 | ||
839 | "The flags register contains the system flags, such as the | |
840 | direction flag and the carry flag. The direction flag must be | |
841 | set to the forward (that is, zero) direction before entry and | |
842 | upon exit from a function. Other user flags have no specified | |
843 | role in the standard calling sequence and are not preserved." | |
844 | ||
845 | To guarantee the "upon exit" part of that statement we fake a | |
846 | saved flags register that has its direction flag cleared. | |
847 | ||
848 | Note that GCC doesn't seem to rely on the fact that the direction | |
849 | flag is cleared after a function return; it always explicitly | |
850 | clears the flag before operations where it matters. | |
851 | ||
852 | FIXME: kettenis/20030316: I'm not quite sure whether this is the | |
853 | right thing to do. The way we fake the flags register here makes | |
854 | it impossible to change it. */ | |
855 | ||
856 | if (regnum == I386_EFLAGS_REGNUM) | |
857 | { | |
858 | *optimizedp = 0; | |
859 | *lvalp = not_lval; | |
860 | *addrp = 0; | |
861 | *realnump = -1; | |
862 | if (valuep) | |
863 | { | |
864 | ULONGEST val; | |
c5aa993b | 865 | |
acd5c798 | 866 | /* Clear the direction flag. */ |
f837910f MK |
867 | val = frame_unwind_register_unsigned (next_frame, |
868 | I386_EFLAGS_REGNUM); | |
acd5c798 MK |
869 | val &= ~(1 << 10); |
870 | store_unsigned_integer (valuep, 4, val); | |
871 | } | |
872 | ||
873 | return; | |
874 | } | |
1211c4e4 | 875 | |
acd5c798 | 876 | if (regnum == I386_EIP_REGNUM && cache->pc_in_eax) |
c906108c | 877 | { |
acd5c798 MK |
878 | frame_register_unwind (next_frame, I386_EAX_REGNUM, |
879 | optimizedp, lvalp, addrp, realnump, valuep); | |
880 | return; | |
881 | } | |
882 | ||
883 | if (regnum == I386_ESP_REGNUM && cache->saved_sp) | |
884 | { | |
885 | *optimizedp = 0; | |
886 | *lvalp = not_lval; | |
887 | *addrp = 0; | |
888 | *realnump = -1; | |
889 | if (valuep) | |
c906108c | 890 | { |
acd5c798 MK |
891 | /* Store the value. */ |
892 | store_unsigned_integer (valuep, 4, cache->saved_sp); | |
c906108c | 893 | } |
acd5c798 | 894 | return; |
c906108c | 895 | } |
acd5c798 | 896 | |
fd13a04a AC |
897 | if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1) |
898 | { | |
899 | *optimizedp = 0; | |
900 | *lvalp = lval_memory; | |
901 | *addrp = cache->saved_regs[regnum]; | |
902 | *realnump = -1; | |
903 | if (valuep) | |
904 | { | |
905 | /* Read the value in from memory. */ | |
906 | read_memory (*addrp, valuep, | |
907 | register_size (current_gdbarch, regnum)); | |
908 | } | |
909 | return; | |
910 | } | |
911 | ||
912 | frame_register_unwind (next_frame, regnum, | |
913 | optimizedp, lvalp, addrp, realnump, valuep); | |
acd5c798 MK |
914 | } |
915 | ||
916 | static const struct frame_unwind i386_frame_unwind = | |
917 | { | |
918 | NORMAL_FRAME, | |
919 | i386_frame_this_id, | |
920 | i386_frame_prev_register | |
921 | }; | |
922 | ||
923 | static const struct frame_unwind * | |
336d1bba | 924 | i386_frame_sniffer (struct frame_info *next_frame) |
acd5c798 MK |
925 | { |
926 | return &i386_frame_unwind; | |
927 | } | |
928 | \f | |
929 | ||
930 | /* Signal trampolines. */ | |
931 | ||
932 | static struct i386_frame_cache * | |
933 | i386_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache) | |
934 | { | |
935 | struct i386_frame_cache *cache; | |
936 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
937 | CORE_ADDR addr; | |
938 | char buf[4]; | |
939 | ||
940 | if (*this_cache) | |
941 | return *this_cache; | |
942 | ||
fd13a04a | 943 | cache = i386_alloc_frame_cache (); |
acd5c798 MK |
944 | |
945 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); | |
946 | cache->base = extract_unsigned_integer (buf, 4) - 4; | |
947 | ||
948 | addr = tdep->sigcontext_addr (next_frame); | |
a3386186 MK |
949 | if (tdep->sc_reg_offset) |
950 | { | |
951 | int i; | |
952 | ||
953 | gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS); | |
954 | ||
955 | for (i = 0; i < tdep->sc_num_regs; i++) | |
956 | if (tdep->sc_reg_offset[i] != -1) | |
fd13a04a | 957 | cache->saved_regs[i] = addr + tdep->sc_reg_offset[i]; |
a3386186 MK |
958 | } |
959 | else | |
960 | { | |
fd13a04a AC |
961 | cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset; |
962 | cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset; | |
a3386186 | 963 | } |
acd5c798 MK |
964 | |
965 | *this_cache = cache; | |
966 | return cache; | |
967 | } | |
968 | ||
969 | static void | |
970 | i386_sigtramp_frame_this_id (struct frame_info *next_frame, void **this_cache, | |
971 | struct frame_id *this_id) | |
972 | { | |
973 | struct i386_frame_cache *cache = | |
974 | i386_sigtramp_frame_cache (next_frame, this_cache); | |
975 | ||
3e210248 | 976 | /* See the end of i386_push_dummy_call. */ |
acd5c798 MK |
977 | (*this_id) = frame_id_build (cache->base + 8, frame_pc_unwind (next_frame)); |
978 | } | |
979 | ||
980 | static void | |
981 | i386_sigtramp_frame_prev_register (struct frame_info *next_frame, | |
982 | void **this_cache, | |
983 | int regnum, int *optimizedp, | |
984 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
985 | int *realnump, void *valuep) | |
986 | { | |
987 | /* Make sure we've initialized the cache. */ | |
988 | i386_sigtramp_frame_cache (next_frame, this_cache); | |
989 | ||
990 | i386_frame_prev_register (next_frame, this_cache, regnum, | |
991 | optimizedp, lvalp, addrp, realnump, valuep); | |
c906108c | 992 | } |
c0d1d883 | 993 | |
acd5c798 MK |
994 | static const struct frame_unwind i386_sigtramp_frame_unwind = |
995 | { | |
996 | SIGTRAMP_FRAME, | |
997 | i386_sigtramp_frame_this_id, | |
998 | i386_sigtramp_frame_prev_register | |
999 | }; | |
1000 | ||
1001 | static const struct frame_unwind * | |
336d1bba | 1002 | i386_sigtramp_frame_sniffer (struct frame_info *next_frame) |
acd5c798 | 1003 | { |
336d1bba | 1004 | CORE_ADDR pc = frame_pc_unwind (next_frame); |
acd5c798 MK |
1005 | char *name; |
1006 | ||
1c3545ae MK |
1007 | /* We shouldn't even bother to try if the OSABI didn't register |
1008 | a sigcontext_addr handler. */ | |
1009 | if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr) | |
1010 | return NULL; | |
1011 | ||
acd5c798 MK |
1012 | find_pc_partial_function (pc, &name, NULL, NULL); |
1013 | if (PC_IN_SIGTRAMP (pc, name)) | |
1014 | return &i386_sigtramp_frame_unwind; | |
1015 | ||
1016 | return NULL; | |
1017 | } | |
1018 | \f | |
1019 | ||
1020 | static CORE_ADDR | |
1021 | i386_frame_base_address (struct frame_info *next_frame, void **this_cache) | |
1022 | { | |
1023 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); | |
1024 | ||
1025 | return cache->base; | |
1026 | } | |
1027 | ||
1028 | static const struct frame_base i386_frame_base = | |
1029 | { | |
1030 | &i386_frame_unwind, | |
1031 | i386_frame_base_address, | |
1032 | i386_frame_base_address, | |
1033 | i386_frame_base_address | |
1034 | }; | |
1035 | ||
acd5c798 MK |
1036 | static struct frame_id |
1037 | i386_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
1038 | { | |
1039 | char buf[4]; | |
1040 | CORE_ADDR fp; | |
1041 | ||
1042 | frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); | |
1043 | fp = extract_unsigned_integer (buf, 4); | |
1044 | ||
3e210248 | 1045 | /* See the end of i386_push_dummy_call. */ |
acd5c798 | 1046 | return frame_id_build (fp + 8, frame_pc_unwind (next_frame)); |
c0d1d883 | 1047 | } |
fc338970 | 1048 | \f |
c906108c | 1049 | |
fc338970 MK |
1050 | /* Figure out where the longjmp will land. Slurp the args out of the |
1051 | stack. We expect the first arg to be a pointer to the jmp_buf | |
8201327c | 1052 | structure from which we extract the address that we will land at. |
28bcfd30 | 1053 | This address is copied into PC. This routine returns non-zero on |
acd5c798 MK |
1054 | success. |
1055 | ||
1056 | This function is 64-bit safe. */ | |
c906108c | 1057 | |
8201327c MK |
1058 | static int |
1059 | i386_get_longjmp_target (CORE_ADDR *pc) | |
c906108c | 1060 | { |
28bcfd30 | 1061 | char buf[8]; |
c906108c | 1062 | CORE_ADDR sp, jb_addr; |
8201327c | 1063 | int jb_pc_offset = gdbarch_tdep (current_gdbarch)->jb_pc_offset; |
f9d3c2a8 | 1064 | int len = TYPE_LENGTH (builtin_type_void_func_ptr); |
c906108c | 1065 | |
8201327c MK |
1066 | /* If JB_PC_OFFSET is -1, we have no way to find out where the |
1067 | longjmp will land. */ | |
1068 | if (jb_pc_offset == -1) | |
c906108c SS |
1069 | return 0; |
1070 | ||
f837910f MK |
1071 | /* Don't use I386_ESP_REGNUM here, since this function is also used |
1072 | for AMD64. */ | |
1073 | regcache_cooked_read (current_regcache, SP_REGNUM, buf); | |
1074 | sp = extract_typed_address (buf, builtin_type_void_data_ptr); | |
28bcfd30 | 1075 | if (target_read_memory (sp + len, buf, len)) |
c906108c SS |
1076 | return 0; |
1077 | ||
f837910f | 1078 | jb_addr = extract_typed_address (buf, builtin_type_void_data_ptr); |
28bcfd30 | 1079 | if (target_read_memory (jb_addr + jb_pc_offset, buf, len)) |
8201327c | 1080 | return 0; |
c906108c | 1081 | |
f9d3c2a8 | 1082 | *pc = extract_typed_address (buf, builtin_type_void_func_ptr); |
c906108c SS |
1083 | return 1; |
1084 | } | |
fc338970 | 1085 | \f |
c906108c | 1086 | |
3a1e71e3 | 1087 | static CORE_ADDR |
6a65450a AC |
1088 | i386_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, |
1089 | struct regcache *regcache, CORE_ADDR bp_addr, int nargs, | |
1090 | struct value **args, CORE_ADDR sp, int struct_return, | |
1091 | CORE_ADDR struct_addr) | |
22f8ba57 | 1092 | { |
acd5c798 MK |
1093 | char buf[4]; |
1094 | int i; | |
1095 | ||
1096 | /* Push arguments in reverse order. */ | |
1097 | for (i = nargs - 1; i >= 0; i--) | |
22f8ba57 | 1098 | { |
acd5c798 MK |
1099 | int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args[i])); |
1100 | ||
1101 | /* The System V ABI says that: | |
1102 | ||
1103 | "An argument's size is increased, if necessary, to make it a | |
1104 | multiple of [32-bit] words. This may require tail padding, | |
1105 | depending on the size of the argument." | |
1106 | ||
1107 | This makes sure the stack says word-aligned. */ | |
1108 | sp -= (len + 3) & ~3; | |
1109 | write_memory (sp, VALUE_CONTENTS_ALL (args[i]), len); | |
1110 | } | |
22f8ba57 | 1111 | |
acd5c798 MK |
1112 | /* Push value address. */ |
1113 | if (struct_return) | |
1114 | { | |
22f8ba57 | 1115 | sp -= 4; |
fbd9dcd3 | 1116 | store_unsigned_integer (buf, 4, struct_addr); |
22f8ba57 MK |
1117 | write_memory (sp, buf, 4); |
1118 | } | |
1119 | ||
acd5c798 MK |
1120 | /* Store return address. */ |
1121 | sp -= 4; | |
6a65450a | 1122 | store_unsigned_integer (buf, 4, bp_addr); |
acd5c798 MK |
1123 | write_memory (sp, buf, 4); |
1124 | ||
1125 | /* Finally, update the stack pointer... */ | |
1126 | store_unsigned_integer (buf, 4, sp); | |
1127 | regcache_cooked_write (regcache, I386_ESP_REGNUM, buf); | |
1128 | ||
1129 | /* ...and fake a frame pointer. */ | |
1130 | regcache_cooked_write (regcache, I386_EBP_REGNUM, buf); | |
1131 | ||
3e210248 AC |
1132 | /* MarkK wrote: This "+ 8" is all over the place: |
1133 | (i386_frame_this_id, i386_sigtramp_frame_this_id, | |
1134 | i386_unwind_dummy_id). It's there, since all frame unwinders for | |
1135 | a given target have to agree (within a certain margin) on the | |
1136 | defenition of the stack address of a frame. Otherwise | |
1137 | frame_id_inner() won't work correctly. Since DWARF2/GCC uses the | |
1138 | stack address *before* the function call as a frame's CFA. On | |
1139 | the i386, when %ebp is used as a frame pointer, the offset | |
1140 | between the contents %ebp and the CFA as defined by GCC. */ | |
1141 | return sp + 8; | |
22f8ba57 MK |
1142 | } |
1143 | ||
1a309862 MK |
1144 | /* These registers are used for returning integers (and on some |
1145 | targets also for returning `struct' and `union' values when their | |
ef9dff19 | 1146 | size and alignment match an integer type). */ |
acd5c798 MK |
1147 | #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */ |
1148 | #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */ | |
1a309862 MK |
1149 | |
1150 | /* Extract from an array REGBUF containing the (raw) register state, a | |
1151 | function return value of TYPE, and copy that, in virtual format, | |
1152 | into VALBUF. */ | |
1153 | ||
3a1e71e3 | 1154 | static void |
00f8375e | 1155 | i386_extract_return_value (struct type *type, struct regcache *regcache, |
ebba8386 | 1156 | void *dst) |
c906108c | 1157 | { |
5716833c | 1158 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); |
ebba8386 | 1159 | bfd_byte *valbuf = dst; |
1a309862 | 1160 | int len = TYPE_LENGTH (type); |
00f8375e | 1161 | char buf[I386_MAX_REGISTER_SIZE]; |
1a309862 | 1162 | |
1e8d0a7b MK |
1163 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1164 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 | 1165 | { |
00f8375e | 1166 | i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); |
3df1b9b4 MK |
1167 | return; |
1168 | } | |
1e8d0a7b MK |
1169 | |
1170 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
c906108c | 1171 | { |
5716833c | 1172 | if (tdep->st0_regnum < 0) |
1a309862 MK |
1173 | { |
1174 | warning ("Cannot find floating-point return value."); | |
1175 | memset (valbuf, 0, len); | |
ef9dff19 | 1176 | return; |
1a309862 MK |
1177 | } |
1178 | ||
c6ba6f0d MK |
1179 | /* Floating-point return values can be found in %st(0). Convert |
1180 | its contents to the desired type. This is probably not | |
1181 | exactly how it would happen on the target itself, but it is | |
1182 | the best we can do. */ | |
acd5c798 | 1183 | regcache_raw_read (regcache, I386_ST0_REGNUM, buf); |
00f8375e | 1184 | convert_typed_floating (buf, builtin_type_i387_ext, valbuf, type); |
c906108c SS |
1185 | } |
1186 | else | |
c5aa993b | 1187 | { |
f837910f MK |
1188 | int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM); |
1189 | int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM); | |
d4f3574e SS |
1190 | |
1191 | if (len <= low_size) | |
00f8375e | 1192 | { |
0818c12a | 1193 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e MK |
1194 | memcpy (valbuf, buf, len); |
1195 | } | |
d4f3574e SS |
1196 | else if (len <= (low_size + high_size)) |
1197 | { | |
0818c12a | 1198 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e | 1199 | memcpy (valbuf, buf, low_size); |
0818c12a | 1200 | regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf); |
00f8375e | 1201 | memcpy (valbuf + low_size, buf, len - low_size); |
d4f3574e SS |
1202 | } |
1203 | else | |
8e65ff28 AC |
1204 | internal_error (__FILE__, __LINE__, |
1205 | "Cannot extract return value of %d bytes long.", len); | |
c906108c SS |
1206 | } |
1207 | } | |
1208 | ||
ef9dff19 MK |
1209 | /* Write into the appropriate registers a function return value stored |
1210 | in VALBUF of type TYPE, given in virtual format. */ | |
1211 | ||
3a1e71e3 | 1212 | static void |
3d7f4f49 MK |
1213 | i386_store_return_value (struct type *type, struct regcache *regcache, |
1214 | const void *valbuf) | |
ef9dff19 | 1215 | { |
5716833c | 1216 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); |
ef9dff19 MK |
1217 | int len = TYPE_LENGTH (type); |
1218 | ||
5716833c MK |
1219 | /* Define I387_ST0_REGNUM such that we use the proper definitions |
1220 | for the architecture. */ | |
1221 | #define I387_ST0_REGNUM I386_ST0_REGNUM | |
1222 | ||
1e8d0a7b MK |
1223 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1224 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 | 1225 | { |
3d7f4f49 | 1226 | i386_store_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); |
3df1b9b4 MK |
1227 | return; |
1228 | } | |
1e8d0a7b MK |
1229 | |
1230 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
ef9dff19 | 1231 | { |
3d7f4f49 | 1232 | ULONGEST fstat; |
5716833c | 1233 | char buf[I386_MAX_REGISTER_SIZE]; |
ccb945b8 | 1234 | |
5716833c | 1235 | if (tdep->st0_regnum < 0) |
ef9dff19 MK |
1236 | { |
1237 | warning ("Cannot set floating-point return value."); | |
1238 | return; | |
1239 | } | |
1240 | ||
635b0cc1 MK |
1241 | /* Returning floating-point values is a bit tricky. Apart from |
1242 | storing the return value in %st(0), we have to simulate the | |
1243 | state of the FPU at function return point. */ | |
1244 | ||
c6ba6f0d MK |
1245 | /* Convert the value found in VALBUF to the extended |
1246 | floating-point format used by the FPU. This is probably | |
1247 | not exactly how it would happen on the target itself, but | |
1248 | it is the best we can do. */ | |
1249 | convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext); | |
acd5c798 | 1250 | regcache_raw_write (regcache, I386_ST0_REGNUM, buf); |
ccb945b8 | 1251 | |
635b0cc1 MK |
1252 | /* Set the top of the floating-point register stack to 7. The |
1253 | actual value doesn't really matter, but 7 is what a normal | |
1254 | function return would end up with if the program started out | |
1255 | with a freshly initialized FPU. */ | |
5716833c | 1256 | regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat); |
ccb945b8 | 1257 | fstat |= (7 << 11); |
5716833c | 1258 | regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM, fstat); |
ccb945b8 | 1259 | |
635b0cc1 MK |
1260 | /* Mark %st(1) through %st(7) as empty. Since we set the top of |
1261 | the floating-point register stack to 7, the appropriate value | |
1262 | for the tag word is 0x3fff. */ | |
5716833c | 1263 | regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM, 0x3fff); |
ef9dff19 MK |
1264 | } |
1265 | else | |
1266 | { | |
f837910f MK |
1267 | int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM); |
1268 | int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM); | |
ef9dff19 MK |
1269 | |
1270 | if (len <= low_size) | |
3d7f4f49 | 1271 | regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf); |
ef9dff19 MK |
1272 | else if (len <= (low_size + high_size)) |
1273 | { | |
3d7f4f49 MK |
1274 | regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf); |
1275 | regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0, | |
1276 | len - low_size, (char *) valbuf + low_size); | |
ef9dff19 MK |
1277 | } |
1278 | else | |
8e65ff28 AC |
1279 | internal_error (__FILE__, __LINE__, |
1280 | "Cannot store return value of %d bytes long.", len); | |
ef9dff19 | 1281 | } |
5716833c MK |
1282 | |
1283 | #undef I387_ST0_REGNUM | |
ef9dff19 | 1284 | } |
f7af9647 | 1285 | |
751f1375 MK |
1286 | /* Extract from REGCACHE, which contains the (raw) register state, the |
1287 | address in which a function should return its structure value, as a | |
1288 | CORE_ADDR. */ | |
f7af9647 | 1289 | |
3a1e71e3 | 1290 | static CORE_ADDR |
00f8375e | 1291 | i386_extract_struct_value_address (struct regcache *regcache) |
f7af9647 | 1292 | { |
acd5c798 | 1293 | char buf[4]; |
751f1375 | 1294 | |
acd5c798 MK |
1295 | regcache_cooked_read (regcache, I386_EAX_REGNUM, buf); |
1296 | return extract_unsigned_integer (buf, 4); | |
f7af9647 | 1297 | } |
fc338970 | 1298 | \f |
ef9dff19 | 1299 | |
8201327c MK |
1300 | /* This is the variable that is set with "set struct-convention", and |
1301 | its legitimate values. */ | |
1302 | static const char default_struct_convention[] = "default"; | |
1303 | static const char pcc_struct_convention[] = "pcc"; | |
1304 | static const char reg_struct_convention[] = "reg"; | |
1305 | static const char *valid_conventions[] = | |
1306 | { | |
1307 | default_struct_convention, | |
1308 | pcc_struct_convention, | |
1309 | reg_struct_convention, | |
1310 | NULL | |
1311 | }; | |
1312 | static const char *struct_convention = default_struct_convention; | |
1313 | ||
1314 | static int | |
1315 | i386_use_struct_convention (int gcc_p, struct type *type) | |
1316 | { | |
1317 | enum struct_return struct_return; | |
1318 | ||
1319 | if (struct_convention == default_struct_convention) | |
1320 | struct_return = gdbarch_tdep (current_gdbarch)->struct_return; | |
1321 | else if (struct_convention == pcc_struct_convention) | |
1322 | struct_return = pcc_struct_return; | |
1323 | else | |
1324 | struct_return = reg_struct_return; | |
1325 | ||
1326 | return generic_use_struct_convention (struct_return == reg_struct_return, | |
1327 | type); | |
1328 | } | |
1329 | \f | |
1330 | ||
d7a0d72c MK |
1331 | /* Return the GDB type object for the "standard" data type of data in |
1332 | register REGNUM. Perhaps %esi and %edi should go here, but | |
1333 | potentially they could be used for things other than address. */ | |
1334 | ||
3a1e71e3 | 1335 | static struct type * |
4e259f09 | 1336 | i386_register_type (struct gdbarch *gdbarch, int regnum) |
d7a0d72c | 1337 | { |
acd5c798 MK |
1338 | if (regnum == I386_EIP_REGNUM |
1339 | || regnum == I386_EBP_REGNUM || regnum == I386_ESP_REGNUM) | |
d7a0d72c MK |
1340 | return lookup_pointer_type (builtin_type_void); |
1341 | ||
23a34459 | 1342 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1343 | return builtin_type_i387_ext; |
d7a0d72c | 1344 | |
5716833c | 1345 | if (i386_sse_regnum_p (gdbarch, regnum)) |
3139facc | 1346 | return builtin_type_vec128i; |
d7a0d72c | 1347 | |
5716833c | 1348 | if (i386_mmx_regnum_p (gdbarch, regnum)) |
28fc6740 AC |
1349 | return builtin_type_vec64i; |
1350 | ||
d7a0d72c MK |
1351 | return builtin_type_int; |
1352 | } | |
1353 | ||
28fc6740 | 1354 | /* Map a cooked register onto a raw register or memory. For the i386, |
acd5c798 | 1355 | the MMX registers need to be mapped onto floating point registers. */ |
28fc6740 AC |
1356 | |
1357 | static int | |
c86c27af | 1358 | i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum) |
28fc6740 | 1359 | { |
5716833c MK |
1360 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); |
1361 | int mmxreg, fpreg; | |
28fc6740 AC |
1362 | ULONGEST fstat; |
1363 | int tos; | |
c86c27af | 1364 | |
5716833c MK |
1365 | /* Define I387_ST0_REGNUM such that we use the proper definitions |
1366 | for REGCACHE's architecture. */ | |
1367 | #define I387_ST0_REGNUM tdep->st0_regnum | |
1368 | ||
1369 | mmxreg = regnum - tdep->mm0_regnum; | |
1370 | regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat); | |
28fc6740 | 1371 | tos = (fstat >> 11) & 0x7; |
5716833c MK |
1372 | fpreg = (mmxreg + tos) % 8; |
1373 | ||
1374 | return (I387_ST0_REGNUM + fpreg); | |
c86c27af | 1375 | |
5716833c | 1376 | #undef I387_ST0_REGNUM |
28fc6740 AC |
1377 | } |
1378 | ||
1379 | static void | |
1380 | i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, | |
1381 | int regnum, void *buf) | |
1382 | { | |
5716833c | 1383 | if (i386_mmx_regnum_p (gdbarch, regnum)) |
28fc6740 | 1384 | { |
d9d9c31f | 1385 | char mmx_buf[MAX_REGISTER_SIZE]; |
c86c27af MK |
1386 | int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); |
1387 | ||
28fc6740 | 1388 | /* Extract (always little endian). */ |
c86c27af | 1389 | regcache_raw_read (regcache, fpnum, mmx_buf); |
f837910f | 1390 | memcpy (buf, mmx_buf, register_size (gdbarch, regnum)); |
28fc6740 AC |
1391 | } |
1392 | else | |
1393 | regcache_raw_read (regcache, regnum, buf); | |
1394 | } | |
1395 | ||
1396 | static void | |
1397 | i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
1398 | int regnum, const void *buf) | |
1399 | { | |
5716833c | 1400 | if (i386_mmx_regnum_p (gdbarch, regnum)) |
28fc6740 | 1401 | { |
d9d9c31f | 1402 | char mmx_buf[MAX_REGISTER_SIZE]; |
c86c27af MK |
1403 | int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); |
1404 | ||
28fc6740 AC |
1405 | /* Read ... */ |
1406 | regcache_raw_read (regcache, fpnum, mmx_buf); | |
1407 | /* ... Modify ... (always little endian). */ | |
f837910f | 1408 | memcpy (mmx_buf, buf, register_size (gdbarch, regnum)); |
28fc6740 AC |
1409 | /* ... Write. */ |
1410 | regcache_raw_write (regcache, fpnum, mmx_buf); | |
1411 | } | |
1412 | else | |
1413 | regcache_raw_write (regcache, regnum, buf); | |
1414 | } | |
ff2e87ac AC |
1415 | \f |
1416 | ||
1417 | /* These registers don't have pervasive standard uses. Move them to | |
1418 | i386-tdep.h if necessary. */ | |
1419 | ||
1420 | #define I386_EBX_REGNUM 3 /* %ebx */ | |
1421 | #define I386_ECX_REGNUM 1 /* %ecx */ | |
1422 | #define I386_ESI_REGNUM 6 /* %esi */ | |
1423 | #define I386_EDI_REGNUM 7 /* %edi */ | |
1424 | ||
1425 | /* Return the register number of the register allocated by GCC after | |
1426 | REGNUM, or -1 if there is no such register. */ | |
1427 | ||
1428 | static int | |
1429 | i386_next_regnum (int regnum) | |
1430 | { | |
1431 | /* GCC allocates the registers in the order: | |
1432 | ||
1433 | %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ... | |
1434 | ||
1435 | Since storing a variable in %esp doesn't make any sense we return | |
1436 | -1 for %ebp and for %esp itself. */ | |
1437 | static int next_regnum[] = | |
1438 | { | |
1439 | I386_EDX_REGNUM, /* Slot for %eax. */ | |
1440 | I386_EBX_REGNUM, /* Slot for %ecx. */ | |
1441 | I386_ECX_REGNUM, /* Slot for %edx. */ | |
1442 | I386_ESI_REGNUM, /* Slot for %ebx. */ | |
1443 | -1, -1, /* Slots for %esp and %ebp. */ | |
1444 | I386_EDI_REGNUM, /* Slot for %esi. */ | |
1445 | I386_EBP_REGNUM /* Slot for %edi. */ | |
1446 | }; | |
1447 | ||
de5b9bb9 | 1448 | if (regnum >= 0 && regnum < sizeof (next_regnum) / sizeof (next_regnum[0])) |
ff2e87ac | 1449 | return next_regnum[regnum]; |
28fc6740 | 1450 | |
ff2e87ac AC |
1451 | return -1; |
1452 | } | |
1453 | ||
1454 | /* Return nonzero if a value of type TYPE stored in register REGNUM | |
1455 | needs any special handling. */ | |
d7a0d72c | 1456 | |
3a1e71e3 | 1457 | static int |
ff2e87ac | 1458 | i386_convert_register_p (int regnum, struct type *type) |
d7a0d72c | 1459 | { |
de5b9bb9 MK |
1460 | int len = TYPE_LENGTH (type); |
1461 | ||
ff2e87ac AC |
1462 | /* Values may be spread across multiple registers. Most debugging |
1463 | formats aren't expressive enough to specify the locations, so | |
1464 | some heuristics is involved. Right now we only handle types that | |
de5b9bb9 MK |
1465 | have a length that is a multiple of the word size, since GCC |
1466 | doesn't seem to put any other types into registers. */ | |
1467 | if (len > 4 && len % 4 == 0) | |
1468 | { | |
1469 | int last_regnum = regnum; | |
1470 | ||
1471 | while (len > 4) | |
1472 | { | |
1473 | last_regnum = i386_next_regnum (last_regnum); | |
1474 | len -= 4; | |
1475 | } | |
1476 | ||
1477 | if (last_regnum != -1) | |
1478 | return 1; | |
1479 | } | |
ff2e87ac | 1480 | |
23a34459 | 1481 | return i386_fp_regnum_p (regnum); |
d7a0d72c MK |
1482 | } |
1483 | ||
ff2e87ac AC |
1484 | /* Read a value of type TYPE from register REGNUM in frame FRAME, and |
1485 | return its contents in TO. */ | |
ac27f131 | 1486 | |
3a1e71e3 | 1487 | static void |
ff2e87ac AC |
1488 | i386_register_to_value (struct frame_info *frame, int regnum, |
1489 | struct type *type, void *to) | |
ac27f131 | 1490 | { |
de5b9bb9 MK |
1491 | int len = TYPE_LENGTH (type); |
1492 | char *buf = to; | |
1493 | ||
ff2e87ac AC |
1494 | /* FIXME: kettenis/20030609: What should we do if REGNUM isn't |
1495 | available in FRAME (i.e. if it wasn't saved)? */ | |
3d261580 | 1496 | |
ff2e87ac | 1497 | if (i386_fp_regnum_p (regnum)) |
8d7f6b4a | 1498 | { |
d532c08f MK |
1499 | i387_register_to_value (frame, regnum, type, to); |
1500 | return; | |
8d7f6b4a | 1501 | } |
ff2e87ac | 1502 | |
de5b9bb9 MK |
1503 | /* Read a value spread accross multiple registers. */ |
1504 | ||
1505 | gdb_assert (len > 4 && len % 4 == 0); | |
3d261580 | 1506 | |
de5b9bb9 MK |
1507 | while (len > 0) |
1508 | { | |
1509 | gdb_assert (regnum != -1); | |
1510 | gdb_assert (register_size (current_gdbarch, regnum) == 4); | |
d532c08f | 1511 | |
f837910f | 1512 | get_frame_register (frame, regnum, buf); |
de5b9bb9 MK |
1513 | regnum = i386_next_regnum (regnum); |
1514 | len -= 4; | |
1515 | buf += 4; | |
1516 | } | |
ac27f131 MK |
1517 | } |
1518 | ||
ff2e87ac AC |
1519 | /* Write the contents FROM of a value of type TYPE into register |
1520 | REGNUM in frame FRAME. */ | |
ac27f131 | 1521 | |
3a1e71e3 | 1522 | static void |
ff2e87ac AC |
1523 | i386_value_to_register (struct frame_info *frame, int regnum, |
1524 | struct type *type, const void *from) | |
ac27f131 | 1525 | { |
de5b9bb9 MK |
1526 | int len = TYPE_LENGTH (type); |
1527 | const char *buf = from; | |
1528 | ||
ff2e87ac | 1529 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1530 | { |
d532c08f MK |
1531 | i387_value_to_register (frame, regnum, type, from); |
1532 | return; | |
1533 | } | |
3d261580 | 1534 | |
de5b9bb9 MK |
1535 | /* Write a value spread accross multiple registers. */ |
1536 | ||
1537 | gdb_assert (len > 4 && len % 4 == 0); | |
ff2e87ac | 1538 | |
de5b9bb9 MK |
1539 | while (len > 0) |
1540 | { | |
1541 | gdb_assert (regnum != -1); | |
1542 | gdb_assert (register_size (current_gdbarch, regnum) == 4); | |
d532c08f | 1543 | |
de5b9bb9 MK |
1544 | put_frame_register (frame, regnum, buf); |
1545 | regnum = i386_next_regnum (regnum); | |
1546 | len -= 4; | |
1547 | buf += 4; | |
1548 | } | |
ac27f131 | 1549 | } |
ff2e87ac AC |
1550 | \f |
1551 | ||
fc338970 | 1552 | |
c906108c | 1553 | #ifdef STATIC_TRANSFORM_NAME |
fc338970 MK |
1554 | /* SunPRO encodes the static variables. This is not related to C++ |
1555 | mangling, it is done for C too. */ | |
c906108c SS |
1556 | |
1557 | char * | |
fba45db2 | 1558 | sunpro_static_transform_name (char *name) |
c906108c SS |
1559 | { |
1560 | char *p; | |
1561 | if (IS_STATIC_TRANSFORM_NAME (name)) | |
1562 | { | |
fc338970 MK |
1563 | /* For file-local statics there will be a period, a bunch of |
1564 | junk (the contents of which match a string given in the | |
c5aa993b JM |
1565 | N_OPT), a period and the name. For function-local statics |
1566 | there will be a bunch of junk (which seems to change the | |
1567 | second character from 'A' to 'B'), a period, the name of the | |
1568 | function, and the name. So just skip everything before the | |
1569 | last period. */ | |
c906108c SS |
1570 | p = strrchr (name, '.'); |
1571 | if (p != NULL) | |
1572 | name = p + 1; | |
1573 | } | |
1574 | return name; | |
1575 | } | |
1576 | #endif /* STATIC_TRANSFORM_NAME */ | |
fc338970 | 1577 | \f |
c906108c | 1578 | |
fc338970 | 1579 | /* Stuff for WIN32 PE style DLL's but is pretty generic really. */ |
c906108c SS |
1580 | |
1581 | CORE_ADDR | |
1cce71eb | 1582 | i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name) |
c906108c | 1583 | { |
fc338970 | 1584 | if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */ |
c906108c | 1585 | { |
c5aa993b | 1586 | unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4); |
c906108c | 1587 | struct minimal_symbol *indsym = |
fc338970 | 1588 | indirect ? lookup_minimal_symbol_by_pc (indirect) : 0; |
645dd519 | 1589 | char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0; |
c906108c | 1590 | |
c5aa993b | 1591 | if (symname) |
c906108c | 1592 | { |
c5aa993b JM |
1593 | if (strncmp (symname, "__imp_", 6) == 0 |
1594 | || strncmp (symname, "_imp_", 5) == 0) | |
c906108c SS |
1595 | return name ? 1 : read_memory_unsigned_integer (indirect, 4); |
1596 | } | |
1597 | } | |
fc338970 | 1598 | return 0; /* Not a trampoline. */ |
c906108c | 1599 | } |
fc338970 MK |
1600 | \f |
1601 | ||
8201327c MK |
1602 | /* Return non-zero if PC and NAME show that we are in a signal |
1603 | trampoline. */ | |
1604 | ||
1605 | static int | |
1606 | i386_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1607 | { | |
1608 | return (name && strcmp ("_sigtramp", name) == 0); | |
1609 | } | |
1610 | \f | |
1611 | ||
fc338970 MK |
1612 | /* We have two flavours of disassembly. The machinery on this page |
1613 | deals with switching between those. */ | |
c906108c SS |
1614 | |
1615 | static int | |
a89aa300 | 1616 | i386_print_insn (bfd_vma pc, struct disassemble_info *info) |
c906108c | 1617 | { |
5e3397bb MK |
1618 | gdb_assert (disassembly_flavor == att_flavor |
1619 | || disassembly_flavor == intel_flavor); | |
1620 | ||
1621 | /* FIXME: kettenis/20020915: Until disassembler_options is properly | |
1622 | constified, cast to prevent a compiler warning. */ | |
1623 | info->disassembler_options = (char *) disassembly_flavor; | |
1624 | info->mach = gdbarch_bfd_arch_info (current_gdbarch)->mach; | |
1625 | ||
1626 | return print_insn_i386 (pc, info); | |
7a292a7a | 1627 | } |
fc338970 | 1628 | \f |
3ce1502b | 1629 | |
8201327c MK |
1630 | /* There are a few i386 architecture variants that differ only |
1631 | slightly from the generic i386 target. For now, we don't give them | |
1632 | their own source file, but include them here. As a consequence, | |
1633 | they'll always be included. */ | |
3ce1502b | 1634 | |
8201327c | 1635 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1636 | |
8201327c MK |
1637 | static int |
1638 | i386_svr4_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
d2a7c97a | 1639 | { |
acd5c798 MK |
1640 | /* UnixWare uses _sigacthandler. The origin of the other symbols is |
1641 | currently unknown. */ | |
8201327c MK |
1642 | return (name && (strcmp ("_sigreturn", name) == 0 |
1643 | || strcmp ("_sigacthandler", name) == 0 | |
1644 | || strcmp ("sigvechandler", name) == 0)); | |
1645 | } | |
d2a7c97a | 1646 | |
acd5c798 MK |
1647 | /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp |
1648 | routine, return the address of the associated sigcontext (ucontext) | |
1649 | structure. */ | |
3ce1502b | 1650 | |
3a1e71e3 | 1651 | static CORE_ADDR |
acd5c798 | 1652 | i386_svr4_sigcontext_addr (struct frame_info *next_frame) |
8201327c | 1653 | { |
acd5c798 MK |
1654 | char buf[4]; |
1655 | CORE_ADDR sp; | |
3ce1502b | 1656 | |
acd5c798 MK |
1657 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); |
1658 | sp = extract_unsigned_integer (buf, 4); | |
21d0e8a4 | 1659 | |
acd5c798 | 1660 | return read_memory_unsigned_integer (sp + 8, 4); |
8201327c MK |
1661 | } |
1662 | \f | |
3ce1502b | 1663 | |
8201327c | 1664 | /* DJGPP. */ |
d2a7c97a | 1665 | |
8201327c MK |
1666 | static int |
1667 | i386_go32_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1668 | { | |
1669 | /* DJGPP doesn't have any special frames for signal handlers. */ | |
1670 | return 0; | |
1671 | } | |
1672 | \f | |
d2a7c97a | 1673 | |
8201327c | 1674 | /* Generic ELF. */ |
d2a7c97a | 1675 | |
8201327c MK |
1676 | void |
1677 | i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1678 | { | |
1679 | /* We typically use stabs-in-ELF with the DWARF register numbering. */ | |
1680 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1681 | } | |
3ce1502b | 1682 | |
8201327c | 1683 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1684 | |
8201327c MK |
1685 | void |
1686 | i386_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1687 | { | |
1688 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
3ce1502b | 1689 | |
8201327c MK |
1690 | /* System V Release 4 uses ELF. */ |
1691 | i386_elf_init_abi (info, gdbarch); | |
3ce1502b | 1692 | |
dfe01d39 MK |
1693 | /* System V Release 4 has shared libraries. */ |
1694 | set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section); | |
1695 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); | |
1696 | ||
8201327c | 1697 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_svr4_pc_in_sigtramp); |
21d0e8a4 | 1698 | tdep->sigcontext_addr = i386_svr4_sigcontext_addr; |
acd5c798 MK |
1699 | tdep->sc_pc_offset = 36 + 14 * 4; |
1700 | tdep->sc_sp_offset = 36 + 17 * 4; | |
3ce1502b | 1701 | |
8201327c | 1702 | tdep->jb_pc_offset = 20; |
3ce1502b MK |
1703 | } |
1704 | ||
8201327c | 1705 | /* DJGPP. */ |
3ce1502b | 1706 | |
3a1e71e3 | 1707 | static void |
8201327c | 1708 | i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1709 | { |
8201327c | 1710 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1711 | |
8201327c | 1712 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_go32_pc_in_sigtramp); |
3ce1502b | 1713 | |
8201327c | 1714 | tdep->jb_pc_offset = 36; |
3ce1502b MK |
1715 | } |
1716 | ||
8201327c | 1717 | /* NetWare. */ |
3ce1502b | 1718 | |
3a1e71e3 | 1719 | static void |
8201327c | 1720 | i386_nw_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1721 | { |
8201327c | 1722 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1723 | |
8201327c | 1724 | tdep->jb_pc_offset = 24; |
d2a7c97a | 1725 | } |
8201327c | 1726 | \f |
2acceee2 | 1727 | |
38c968cf AC |
1728 | /* i386 register groups. In addition to the normal groups, add "mmx" |
1729 | and "sse". */ | |
1730 | ||
1731 | static struct reggroup *i386_sse_reggroup; | |
1732 | static struct reggroup *i386_mmx_reggroup; | |
1733 | ||
1734 | static void | |
1735 | i386_init_reggroups (void) | |
1736 | { | |
1737 | i386_sse_reggroup = reggroup_new ("sse", USER_REGGROUP); | |
1738 | i386_mmx_reggroup = reggroup_new ("mmx", USER_REGGROUP); | |
1739 | } | |
1740 | ||
1741 | static void | |
1742 | i386_add_reggroups (struct gdbarch *gdbarch) | |
1743 | { | |
1744 | reggroup_add (gdbarch, i386_sse_reggroup); | |
1745 | reggroup_add (gdbarch, i386_mmx_reggroup); | |
1746 | reggroup_add (gdbarch, general_reggroup); | |
1747 | reggroup_add (gdbarch, float_reggroup); | |
1748 | reggroup_add (gdbarch, all_reggroup); | |
1749 | reggroup_add (gdbarch, save_reggroup); | |
1750 | reggroup_add (gdbarch, restore_reggroup); | |
1751 | reggroup_add (gdbarch, vector_reggroup); | |
1752 | reggroup_add (gdbarch, system_reggroup); | |
1753 | } | |
1754 | ||
1755 | int | |
1756 | i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
1757 | struct reggroup *group) | |
1758 | { | |
5716833c MK |
1759 | int sse_regnum_p = (i386_sse_regnum_p (gdbarch, regnum) |
1760 | || i386_mxcsr_regnum_p (gdbarch, regnum)); | |
38c968cf AC |
1761 | int fp_regnum_p = (i386_fp_regnum_p (regnum) |
1762 | || i386_fpc_regnum_p (regnum)); | |
5716833c | 1763 | int mmx_regnum_p = (i386_mmx_regnum_p (gdbarch, regnum)); |
acd5c798 | 1764 | |
38c968cf AC |
1765 | if (group == i386_mmx_reggroup) |
1766 | return mmx_regnum_p; | |
1767 | if (group == i386_sse_reggroup) | |
1768 | return sse_regnum_p; | |
1769 | if (group == vector_reggroup) | |
1770 | return (mmx_regnum_p || sse_regnum_p); | |
1771 | if (group == float_reggroup) | |
1772 | return fp_regnum_p; | |
1773 | if (group == general_reggroup) | |
1774 | return (!fp_regnum_p && !mmx_regnum_p && !sse_regnum_p); | |
acd5c798 | 1775 | |
38c968cf AC |
1776 | return default_register_reggroup_p (gdbarch, regnum, group); |
1777 | } | |
38c968cf | 1778 | \f |
acd5c798 | 1779 | |
f837910f MK |
1780 | /* Get the ARGIth function argument for the current function. */ |
1781 | ||
42c466d7 | 1782 | static CORE_ADDR |
143985b7 AF |
1783 | i386_fetch_pointer_argument (struct frame_info *frame, int argi, |
1784 | struct type *type) | |
1785 | { | |
f837910f MK |
1786 | CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM); |
1787 | return read_memory_unsigned_integer (sp + (4 * (argi + 1)), 4); | |
143985b7 AF |
1788 | } |
1789 | ||
1790 | \f | |
3a1e71e3 | 1791 | static struct gdbarch * |
a62cc96e AC |
1792 | i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1793 | { | |
cd3c07fc | 1794 | struct gdbarch_tdep *tdep; |
a62cc96e AC |
1795 | struct gdbarch *gdbarch; |
1796 | ||
4be87837 DJ |
1797 | /* If there is already a candidate, use it. */ |
1798 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1799 | if (arches != NULL) | |
1800 | return arches->gdbarch; | |
a62cc96e AC |
1801 | |
1802 | /* Allocate space for the new architecture. */ | |
1803 | tdep = XMALLOC (struct gdbarch_tdep); | |
1804 | gdbarch = gdbarch_alloc (&info, tdep); | |
1805 | ||
5716833c MK |
1806 | /* The default settings include the FPU registers, the MMX registers |
1807 | and the SSE registers. This can be overidden for a specific ABI | |
1808 | by adjusting the members `st0_regnum', `mm0_regnum' and | |
1809 | `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers | |
1810 | will show up in the output of "info all-registers". Ideally we | |
1811 | should try to autodetect whether they are available, such that we | |
1812 | can prevent "info all-registers" from displaying registers that | |
1813 | aren't available. | |
1814 | ||
1815 | NOTE: kevinb/2003-07-13: ... if it's a choice between printing | |
1816 | [the SSE registers] always (even when they don't exist) or never | |
1817 | showing them to the user (even when they do exist), I prefer the | |
1818 | former over the latter. */ | |
1819 | ||
1820 | tdep->st0_regnum = I386_ST0_REGNUM; | |
1821 | ||
1822 | /* The MMX registers are implemented as pseudo-registers. Put off | |
1823 | caclulating the register number for %mm0 until we know the number | |
1824 | of raw registers. */ | |
1825 | tdep->mm0_regnum = 0; | |
1826 | ||
1827 | /* I386_NUM_XREGS includes %mxcsr, so substract one. */ | |
49ed40de | 1828 | tdep->num_xmm_regs = I386_NUM_XREGS - 1; |
d2a7c97a | 1829 | |
8201327c MK |
1830 | tdep->jb_pc_offset = -1; |
1831 | tdep->struct_return = pcc_struct_return; | |
8201327c MK |
1832 | tdep->sigtramp_start = 0; |
1833 | tdep->sigtramp_end = 0; | |
21d0e8a4 | 1834 | tdep->sigcontext_addr = NULL; |
a3386186 | 1835 | tdep->sc_reg_offset = NULL; |
8201327c | 1836 | tdep->sc_pc_offset = -1; |
21d0e8a4 | 1837 | tdep->sc_sp_offset = -1; |
8201327c | 1838 | |
896fb97d MK |
1839 | /* The format used for `long double' on almost all i386 targets is |
1840 | the i387 extended floating-point format. In fact, of all targets | |
1841 | in the GCC 2.95 tree, only OSF/1 does it different, and insists | |
1842 | on having a `long double' that's not `long' at all. */ | |
1843 | set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext); | |
21d0e8a4 | 1844 | |
66da5fd8 | 1845 | /* Although the i387 extended floating-point has only 80 significant |
896fb97d MK |
1846 | bits, a `long double' actually takes up 96, probably to enforce |
1847 | alignment. */ | |
1848 | set_gdbarch_long_double_bit (gdbarch, 96); | |
1849 | ||
49ed40de KB |
1850 | /* The default ABI includes general-purpose registers, |
1851 | floating-point registers, and the SSE registers. */ | |
1852 | set_gdbarch_num_regs (gdbarch, I386_SSE_NUM_REGS); | |
acd5c798 MK |
1853 | set_gdbarch_register_name (gdbarch, i386_register_name); |
1854 | set_gdbarch_register_type (gdbarch, i386_register_type); | |
21d0e8a4 | 1855 | |
acd5c798 MK |
1856 | /* Register numbers of various important registers. */ |
1857 | set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */ | |
1858 | set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */ | |
1859 | set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */ | |
1860 | set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */ | |
356a6b3e MK |
1861 | |
1862 | /* Use the "default" register numbering scheme for stabs and COFF. */ | |
1863 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1864 | set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1865 | ||
1866 | /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */ | |
1867 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1868 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1869 | ||
1870 | /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to | |
1871 | be in use on any of the supported i386 targets. */ | |
1872 | ||
61113f8b MK |
1873 | set_gdbarch_print_float_info (gdbarch, i387_print_float_info); |
1874 | ||
8201327c | 1875 | set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target); |
96297dab | 1876 | |
a62cc96e | 1877 | /* Call dummy code. */ |
acd5c798 | 1878 | set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call); |
a62cc96e | 1879 | |
ff2e87ac AC |
1880 | set_gdbarch_convert_register_p (gdbarch, i386_convert_register_p); |
1881 | set_gdbarch_register_to_value (gdbarch, i386_register_to_value); | |
1882 | set_gdbarch_value_to_register (gdbarch, i386_value_to_register); | |
b6197528 | 1883 | |
00f8375e | 1884 | set_gdbarch_extract_return_value (gdbarch, i386_extract_return_value); |
3d7f4f49 | 1885 | set_gdbarch_store_return_value (gdbarch, i386_store_return_value); |
00f8375e | 1886 | set_gdbarch_extract_struct_value_address (gdbarch, |
fc08ec52 | 1887 | i386_extract_struct_value_address); |
8201327c MK |
1888 | set_gdbarch_use_struct_convention (gdbarch, i386_use_struct_convention); |
1889 | ||
93924b6b MK |
1890 | set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue); |
1891 | ||
1892 | /* Stack grows downward. */ | |
1893 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1894 | ||
1895 | set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc); | |
1896 | set_gdbarch_decr_pc_after_break (gdbarch, 1); | |
1897 | set_gdbarch_function_start_offset (gdbarch, 0); | |
42fdc8df | 1898 | |
42fdc8df | 1899 | set_gdbarch_frame_args_skip (gdbarch, 8); |
8201327c MK |
1900 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_pc_in_sigtramp); |
1901 | ||
28fc6740 | 1902 | /* Wire in the MMX registers. */ |
0f751ff2 | 1903 | set_gdbarch_num_pseudo_regs (gdbarch, i386_num_mmx_regs); |
28fc6740 AC |
1904 | set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read); |
1905 | set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write); | |
1906 | ||
5e3397bb MK |
1907 | set_gdbarch_print_insn (gdbarch, i386_print_insn); |
1908 | ||
acd5c798 | 1909 | set_gdbarch_unwind_dummy_id (gdbarch, i386_unwind_dummy_id); |
acd5c798 MK |
1910 | |
1911 | set_gdbarch_unwind_pc (gdbarch, i386_unwind_pc); | |
1912 | ||
38c968cf AC |
1913 | /* Add the i386 register groups. */ |
1914 | i386_add_reggroups (gdbarch); | |
1915 | set_gdbarch_register_reggroup_p (gdbarch, i386_register_reggroup_p); | |
1916 | ||
143985b7 AF |
1917 | /* Helper for function argument information. */ |
1918 | set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument); | |
1919 | ||
6405b0a6 | 1920 | /* Hook in the DWARF CFI frame unwinder. */ |
336d1bba | 1921 | frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); |
6405b0a6 | 1922 | |
acd5c798 | 1923 | frame_base_set_default (gdbarch, &i386_frame_base); |
6c0e89ed | 1924 | |
3ce1502b | 1925 | /* Hook in ABI-specific overrides, if they have been registered. */ |
4be87837 | 1926 | gdbarch_init_osabi (info, gdbarch); |
3ce1502b | 1927 | |
336d1bba AC |
1928 | frame_unwind_append_sniffer (gdbarch, i386_sigtramp_frame_sniffer); |
1929 | frame_unwind_append_sniffer (gdbarch, i386_frame_sniffer); | |
acd5c798 | 1930 | |
5716833c MK |
1931 | /* Unless support for MMX has been disabled, make %mm0 the first |
1932 | pseudo-register. */ | |
1933 | if (tdep->mm0_regnum == 0) | |
1934 | tdep->mm0_regnum = gdbarch_num_regs (gdbarch); | |
1935 | ||
a62cc96e AC |
1936 | return gdbarch; |
1937 | } | |
1938 | ||
8201327c MK |
1939 | static enum gdb_osabi |
1940 | i386_coff_osabi_sniffer (bfd *abfd) | |
1941 | { | |
762c5349 MK |
1942 | if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0 |
1943 | || strcmp (bfd_get_target (abfd), "coff-go32") == 0) | |
8201327c MK |
1944 | return GDB_OSABI_GO32; |
1945 | ||
1946 | return GDB_OSABI_UNKNOWN; | |
1947 | } | |
1948 | ||
1949 | static enum gdb_osabi | |
1950 | i386_nlm_osabi_sniffer (bfd *abfd) | |
1951 | { | |
1952 | return GDB_OSABI_NETWARE; | |
1953 | } | |
1954 | \f | |
1955 | ||
28e9e0f0 MK |
1956 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1957 | void _initialize_i386_tdep (void); | |
1958 | ||
c906108c | 1959 | void |
fba45db2 | 1960 | _initialize_i386_tdep (void) |
c906108c | 1961 | { |
a62cc96e AC |
1962 | register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init); |
1963 | ||
fc338970 | 1964 | /* Add the variable that controls the disassembly flavor. */ |
917317f4 JM |
1965 | { |
1966 | struct cmd_list_element *new_cmd; | |
7a292a7a | 1967 | |
917317f4 JM |
1968 | new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class, |
1969 | valid_flavors, | |
1ed2a135 | 1970 | &disassembly_flavor, |
fc338970 MK |
1971 | "\ |
1972 | Set the disassembly flavor, the valid values are \"att\" and \"intel\", \ | |
c906108c | 1973 | and the default value is \"att\".", |
917317f4 | 1974 | &setlist); |
917317f4 JM |
1975 | add_show_from_set (new_cmd, &showlist); |
1976 | } | |
8201327c MK |
1977 | |
1978 | /* Add the variable that controls the convention for returning | |
1979 | structs. */ | |
1980 | { | |
1981 | struct cmd_list_element *new_cmd; | |
1982 | ||
1983 | new_cmd = add_set_enum_cmd ("struct-convention", no_class, | |
5e3397bb | 1984 | valid_conventions, |
8201327c MK |
1985 | &struct_convention, "\ |
1986 | Set the convention for returning small structs, valid values \ | |
1987 | are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".", | |
1988 | &setlist); | |
1989 | add_show_from_set (new_cmd, &showlist); | |
1990 | } | |
1991 | ||
1992 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour, | |
1993 | i386_coff_osabi_sniffer); | |
1994 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_nlm_flavour, | |
1995 | i386_nlm_osabi_sniffer); | |
1996 | ||
05816f70 | 1997 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4, |
8201327c | 1998 | i386_svr4_init_abi); |
05816f70 | 1999 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_GO32, |
8201327c | 2000 | i386_go32_init_abi); |
05816f70 | 2001 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_NETWARE, |
8201327c | 2002 | i386_nw_init_abi); |
38c968cf AC |
2003 | |
2004 | /* Initialize the i386 specific register groups. */ | |
2005 | i386_init_reggroups (); | |
c906108c | 2006 | } |