Commit | Line | Data |
---|---|---|
c906108c | 1 | /* Intel 386 target-dependent stuff. |
349c5d5f AC |
2 | |
3 | Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, | |
4be87837 | 4 | 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
c906108c | 5 | |
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | #include "defs.h" | |
acd5c798 MK |
24 | #include "arch-utils.h" |
25 | #include "command.h" | |
26 | #include "dummy-frame.h" | |
6405b0a6 | 27 | #include "dwarf2-frame.h" |
acd5c798 MK |
28 | #include "doublest.h" |
29 | #include "floatformat.h" | |
c906108c | 30 | #include "frame.h" |
acd5c798 MK |
31 | #include "frame-base.h" |
32 | #include "frame-unwind.h" | |
c906108c | 33 | #include "inferior.h" |
acd5c798 | 34 | #include "gdbcmd.h" |
c906108c | 35 | #include "gdbcore.h" |
dfe01d39 | 36 | #include "objfiles.h" |
acd5c798 MK |
37 | #include "osabi.h" |
38 | #include "regcache.h" | |
39 | #include "reggroups.h" | |
c0d1d883 | 40 | #include "symfile.h" |
c906108c | 41 | #include "symtab.h" |
acd5c798 | 42 | #include "target.h" |
fd0407d6 | 43 | #include "value.h" |
a89aa300 | 44 | #include "dis-asm.h" |
acd5c798 | 45 | |
3d261580 | 46 | #include "gdb_assert.h" |
acd5c798 | 47 | #include "gdb_string.h" |
3d261580 | 48 | |
d2a7c97a | 49 | #include "i386-tdep.h" |
61113f8b | 50 | #include "i387-tdep.h" |
d2a7c97a | 51 | |
fc633446 MK |
52 | /* Names of the registers. The first 10 registers match the register |
53 | numbering scheme used by GCC for stabs and DWARF. */ | |
c40e1eab | 54 | |
fc633446 MK |
55 | static char *i386_register_names[] = |
56 | { | |
57 | "eax", "ecx", "edx", "ebx", | |
58 | "esp", "ebp", "esi", "edi", | |
59 | "eip", "eflags", "cs", "ss", | |
60 | "ds", "es", "fs", "gs", | |
61 | "st0", "st1", "st2", "st3", | |
62 | "st4", "st5", "st6", "st7", | |
63 | "fctrl", "fstat", "ftag", "fiseg", | |
64 | "fioff", "foseg", "fooff", "fop", | |
65 | "xmm0", "xmm1", "xmm2", "xmm3", | |
66 | "xmm4", "xmm5", "xmm6", "xmm7", | |
67 | "mxcsr" | |
68 | }; | |
69 | ||
c40e1eab MK |
70 | static const int i386_num_register_names = |
71 | (sizeof (i386_register_names) / sizeof (*i386_register_names)); | |
72 | ||
28fc6740 AC |
73 | /* MMX registers. */ |
74 | ||
75 | static char *i386_mmx_names[] = | |
76 | { | |
77 | "mm0", "mm1", "mm2", "mm3", | |
78 | "mm4", "mm5", "mm6", "mm7" | |
79 | }; | |
c40e1eab MK |
80 | |
81 | static const int i386_num_mmx_regs = | |
82 | (sizeof (i386_mmx_names) / sizeof (i386_mmx_names[0])); | |
83 | ||
84 | #define MM0_REGNUM NUM_REGS | |
28fc6740 AC |
85 | |
86 | static int | |
c40e1eab | 87 | i386_mmx_regnum_p (int regnum) |
28fc6740 | 88 | { |
c40e1eab MK |
89 | return (regnum >= MM0_REGNUM |
90 | && regnum < MM0_REGNUM + i386_num_mmx_regs); | |
28fc6740 AC |
91 | } |
92 | ||
23a34459 AC |
93 | /* FP register? */ |
94 | ||
95 | int | |
96 | i386_fp_regnum_p (int regnum) | |
97 | { | |
98 | return (regnum < NUM_REGS | |
c40e1eab | 99 | && (FP0_REGNUM && FP0_REGNUM <= regnum && regnum < FPC_REGNUM)); |
23a34459 AC |
100 | } |
101 | ||
102 | int | |
103 | i386_fpc_regnum_p (int regnum) | |
104 | { | |
105 | return (regnum < NUM_REGS | |
c40e1eab | 106 | && (FPC_REGNUM <= regnum && regnum < XMM0_REGNUM)); |
23a34459 AC |
107 | } |
108 | ||
109 | /* SSE register? */ | |
110 | ||
111 | int | |
112 | i386_sse_regnum_p (int regnum) | |
113 | { | |
114 | return (regnum < NUM_REGS | |
c40e1eab | 115 | && (XMM0_REGNUM <= regnum && regnum < MXCSR_REGNUM)); |
23a34459 AC |
116 | } |
117 | ||
118 | int | |
119 | i386_mxcsr_regnum_p (int regnum) | |
120 | { | |
121 | return (regnum < NUM_REGS | |
c40e1eab | 122 | && regnum == MXCSR_REGNUM); |
23a34459 AC |
123 | } |
124 | ||
fc633446 MK |
125 | /* Return the name of register REG. */ |
126 | ||
fa88f677 | 127 | const char * |
fc633446 MK |
128 | i386_register_name (int reg) |
129 | { | |
23a34459 | 130 | if (i386_mmx_regnum_p (reg)) |
28fc6740 | 131 | return i386_mmx_names[reg - MM0_REGNUM]; |
fc633446 | 132 | |
70913449 MK |
133 | if (reg >= 0 && reg < i386_num_register_names) |
134 | return i386_register_names[reg]; | |
135 | ||
c40e1eab | 136 | return NULL; |
fc633446 MK |
137 | } |
138 | ||
85540d8c MK |
139 | /* Convert stabs register number REG to the appropriate register |
140 | number used by GDB. */ | |
141 | ||
8201327c | 142 | static int |
85540d8c MK |
143 | i386_stab_reg_to_regnum (int reg) |
144 | { | |
145 | /* This implements what GCC calls the "default" register map. */ | |
146 | if (reg >= 0 && reg <= 7) | |
147 | { | |
acd5c798 | 148 | /* General-purpose registers. */ |
85540d8c MK |
149 | return reg; |
150 | } | |
151 | else if (reg >= 12 && reg <= 19) | |
152 | { | |
153 | /* Floating-point registers. */ | |
154 | return reg - 12 + FP0_REGNUM; | |
155 | } | |
156 | else if (reg >= 21 && reg <= 28) | |
157 | { | |
158 | /* SSE registers. */ | |
159 | return reg - 21 + XMM0_REGNUM; | |
160 | } | |
161 | else if (reg >= 29 && reg <= 36) | |
162 | { | |
163 | /* MMX registers. */ | |
7d12f766 | 164 | return reg - 29 + MM0_REGNUM; |
85540d8c MK |
165 | } |
166 | ||
167 | /* This will hopefully provoke a warning. */ | |
168 | return NUM_REGS + NUM_PSEUDO_REGS; | |
169 | } | |
170 | ||
8201327c | 171 | /* Convert DWARF register number REG to the appropriate register |
85540d8c MK |
172 | number used by GDB. */ |
173 | ||
8201327c | 174 | static int |
85540d8c MK |
175 | i386_dwarf_reg_to_regnum (int reg) |
176 | { | |
177 | /* The DWARF register numbering includes %eip and %eflags, and | |
178 | numbers the floating point registers differently. */ | |
179 | if (reg >= 0 && reg <= 9) | |
180 | { | |
acd5c798 | 181 | /* General-purpose registers. */ |
85540d8c MK |
182 | return reg; |
183 | } | |
184 | else if (reg >= 11 && reg <= 18) | |
185 | { | |
186 | /* Floating-point registers. */ | |
187 | return reg - 11 + FP0_REGNUM; | |
188 | } | |
189 | else if (reg >= 21) | |
190 | { | |
191 | /* The SSE and MMX registers have identical numbers as in stabs. */ | |
192 | return i386_stab_reg_to_regnum (reg); | |
193 | } | |
194 | ||
195 | /* This will hopefully provoke a warning. */ | |
196 | return NUM_REGS + NUM_PSEUDO_REGS; | |
197 | } | |
fc338970 | 198 | \f |
917317f4 | 199 | |
fc338970 MK |
200 | /* This is the variable that is set with "set disassembly-flavor", and |
201 | its legitimate values. */ | |
53904c9e AC |
202 | static const char att_flavor[] = "att"; |
203 | static const char intel_flavor[] = "intel"; | |
204 | static const char *valid_flavors[] = | |
c5aa993b | 205 | { |
c906108c SS |
206 | att_flavor, |
207 | intel_flavor, | |
208 | NULL | |
209 | }; | |
53904c9e | 210 | static const char *disassembly_flavor = att_flavor; |
acd5c798 | 211 | \f |
c906108c | 212 | |
acd5c798 MK |
213 | /* Use the program counter to determine the contents and size of a |
214 | breakpoint instruction. Return a pointer to a string of bytes that | |
215 | encode a breakpoint instruction, store the length of the string in | |
216 | *LEN and optionally adjust *PC to point to the correct memory | |
217 | location for inserting the breakpoint. | |
c906108c | 218 | |
acd5c798 MK |
219 | On the i386 we have a single breakpoint that fits in a single byte |
220 | and can be inserted anywhere. | |
c906108c | 221 | |
acd5c798 MK |
222 | This function is 64-bit safe. */ |
223 | ||
224 | static const unsigned char * | |
225 | i386_breakpoint_from_pc (CORE_ADDR *pc, int *len) | |
c906108c | 226 | { |
acd5c798 MK |
227 | static unsigned char break_insn[] = { 0xcc }; /* int 3 */ |
228 | ||
229 | *len = sizeof (break_insn); | |
230 | return break_insn; | |
c906108c | 231 | } |
fc338970 | 232 | \f |
acd5c798 MK |
233 | #ifdef I386_REGNO_TO_SYMMETRY |
234 | #error "The Sequent Symmetry is no longer supported." | |
235 | #endif | |
c906108c | 236 | |
acd5c798 MK |
237 | /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi |
238 | and %esp "belong" to the calling function. Therefore these | |
239 | registers should be saved if they're going to be modified. */ | |
c906108c | 240 | |
acd5c798 MK |
241 | /* The maximum number of saved registers. This should include all |
242 | registers mentioned above, and %eip. */ | |
a3386186 | 243 | #define I386_NUM_SAVED_REGS I386_NUM_GREGS |
acd5c798 MK |
244 | |
245 | struct i386_frame_cache | |
c906108c | 246 | { |
acd5c798 MK |
247 | /* Base address. */ |
248 | CORE_ADDR base; | |
249 | CORE_ADDR sp_offset; | |
250 | CORE_ADDR pc; | |
251 | ||
fd13a04a AC |
252 | /* Saved registers. */ |
253 | CORE_ADDR saved_regs[I386_NUM_SAVED_REGS]; | |
acd5c798 MK |
254 | CORE_ADDR saved_sp; |
255 | int pc_in_eax; | |
256 | ||
257 | /* Stack space reserved for local variables. */ | |
258 | long locals; | |
259 | }; | |
260 | ||
261 | /* Allocate and initialize a frame cache. */ | |
262 | ||
263 | static struct i386_frame_cache * | |
fd13a04a | 264 | i386_alloc_frame_cache (void) |
acd5c798 MK |
265 | { |
266 | struct i386_frame_cache *cache; | |
267 | int i; | |
268 | ||
269 | cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache); | |
270 | ||
271 | /* Base address. */ | |
272 | cache->base = 0; | |
273 | cache->sp_offset = -4; | |
274 | cache->pc = 0; | |
275 | ||
fd13a04a AC |
276 | /* Saved registers. We initialize these to -1 since zero is a valid |
277 | offset (that's where %ebp is supposed to be stored). */ | |
278 | for (i = 0; i < I386_NUM_SAVED_REGS; i++) | |
279 | cache->saved_regs[i] = -1; | |
acd5c798 MK |
280 | cache->saved_sp = 0; |
281 | cache->pc_in_eax = 0; | |
282 | ||
283 | /* Frameless until proven otherwise. */ | |
284 | cache->locals = -1; | |
285 | ||
286 | return cache; | |
287 | } | |
c906108c | 288 | |
acd5c798 MK |
289 | /* If the instruction at PC is a jump, return the address of its |
290 | target. Otherwise, return PC. */ | |
c906108c | 291 | |
acd5c798 MK |
292 | static CORE_ADDR |
293 | i386_follow_jump (CORE_ADDR pc) | |
294 | { | |
295 | unsigned char op; | |
296 | long delta = 0; | |
297 | int data16 = 0; | |
c906108c | 298 | |
acd5c798 MK |
299 | op = read_memory_unsigned_integer (pc, 1); |
300 | if (op == 0x66) | |
c906108c | 301 | { |
c906108c | 302 | data16 = 1; |
acd5c798 | 303 | op = read_memory_unsigned_integer (pc + 1, 1); |
c906108c SS |
304 | } |
305 | ||
acd5c798 | 306 | switch (op) |
c906108c SS |
307 | { |
308 | case 0xe9: | |
fc338970 | 309 | /* Relative jump: if data16 == 0, disp32, else disp16. */ |
c906108c SS |
310 | if (data16) |
311 | { | |
acd5c798 | 312 | delta = read_memory_integer (pc + 2, 2); |
c906108c | 313 | |
fc338970 MK |
314 | /* Include the size of the jmp instruction (including the |
315 | 0x66 prefix). */ | |
acd5c798 | 316 | delta += 4; |
c906108c SS |
317 | } |
318 | else | |
319 | { | |
acd5c798 | 320 | delta = read_memory_integer (pc + 1, 4); |
c906108c | 321 | |
acd5c798 MK |
322 | /* Include the size of the jmp instruction. */ |
323 | delta += 5; | |
c906108c SS |
324 | } |
325 | break; | |
326 | case 0xeb: | |
fc338970 | 327 | /* Relative jump, disp8 (ignore data16). */ |
acd5c798 | 328 | delta = read_memory_integer (pc + data16 + 1, 1); |
c906108c | 329 | |
acd5c798 | 330 | delta += data16 + 2; |
c906108c SS |
331 | break; |
332 | } | |
c906108c | 333 | |
acd5c798 MK |
334 | return pc + delta; |
335 | } | |
fc338970 | 336 | |
acd5c798 MK |
337 | /* Check whether PC points at a prologue for a function returning a |
338 | structure or union. If so, it updates CACHE and returns the | |
339 | address of the first instruction after the code sequence that | |
340 | removes the "hidden" argument from the stack or CURRENT_PC, | |
341 | whichever is smaller. Otherwise, return PC. */ | |
c906108c | 342 | |
acd5c798 MK |
343 | static CORE_ADDR |
344 | i386_analyze_struct_return (CORE_ADDR pc, CORE_ADDR current_pc, | |
345 | struct i386_frame_cache *cache) | |
c906108c | 346 | { |
acd5c798 MK |
347 | /* Functions that return a structure or union start with: |
348 | ||
349 | popl %eax 0x58 | |
350 | xchgl %eax, (%esp) 0x87 0x04 0x24 | |
351 | or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00 | |
352 | ||
353 | (the System V compiler puts out the second `xchg' instruction, | |
354 | and the assembler doesn't try to optimize it, so the 'sib' form | |
355 | gets generated). This sequence is used to get the address of the | |
356 | return buffer for a function that returns a structure. */ | |
357 | static unsigned char proto1[3] = { 0x87, 0x04, 0x24 }; | |
358 | static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 }; | |
359 | unsigned char buf[4]; | |
c906108c SS |
360 | unsigned char op; |
361 | ||
acd5c798 MK |
362 | if (current_pc <= pc) |
363 | return pc; | |
364 | ||
365 | op = read_memory_unsigned_integer (pc, 1); | |
c906108c | 366 | |
acd5c798 MK |
367 | if (op != 0x58) /* popl %eax */ |
368 | return pc; | |
c906108c | 369 | |
acd5c798 MK |
370 | read_memory (pc + 1, buf, 4); |
371 | if (memcmp (buf, proto1, 3) != 0 && memcmp (buf, proto2, 4) != 0) | |
372 | return pc; | |
c906108c | 373 | |
acd5c798 | 374 | if (current_pc == pc) |
c906108c | 375 | { |
acd5c798 MK |
376 | cache->sp_offset += 4; |
377 | return current_pc; | |
c906108c SS |
378 | } |
379 | ||
acd5c798 | 380 | if (current_pc == pc + 1) |
c906108c | 381 | { |
acd5c798 MK |
382 | cache->pc_in_eax = 1; |
383 | return current_pc; | |
384 | } | |
385 | ||
386 | if (buf[1] == proto1[1]) | |
387 | return pc + 4; | |
388 | else | |
389 | return pc + 5; | |
390 | } | |
391 | ||
392 | static CORE_ADDR | |
393 | i386_skip_probe (CORE_ADDR pc) | |
394 | { | |
395 | /* A function may start with | |
fc338970 | 396 | |
acd5c798 MK |
397 | pushl constant |
398 | call _probe | |
399 | addl $4, %esp | |
fc338970 | 400 | |
acd5c798 MK |
401 | followed by |
402 | ||
403 | pushl %ebp | |
fc338970 | 404 | |
acd5c798 MK |
405 | etc. */ |
406 | unsigned char buf[8]; | |
407 | unsigned char op; | |
fc338970 | 408 | |
acd5c798 MK |
409 | op = read_memory_unsigned_integer (pc, 1); |
410 | ||
411 | if (op == 0x68 || op == 0x6a) | |
412 | { | |
413 | int delta; | |
c906108c | 414 | |
acd5c798 MK |
415 | /* Skip past the `pushl' instruction; it has either a one-byte or a |
416 | four-byte operand, depending on the opcode. */ | |
c906108c | 417 | if (op == 0x68) |
acd5c798 | 418 | delta = 5; |
c906108c | 419 | else |
acd5c798 | 420 | delta = 2; |
c906108c | 421 | |
acd5c798 MK |
422 | /* Read the following 8 bytes, which should be `call _probe' (6 |
423 | bytes) followed by `addl $4,%esp' (2 bytes). */ | |
424 | read_memory (pc + delta, buf, sizeof (buf)); | |
c906108c | 425 | if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4) |
acd5c798 | 426 | pc += delta + sizeof (buf); |
c906108c SS |
427 | } |
428 | ||
acd5c798 MK |
429 | return pc; |
430 | } | |
431 | ||
432 | /* Check whether PC points at a code that sets up a new stack frame. | |
433 | If so, it updates CACHE and returns the address of the first | |
434 | instruction after the sequence that sets removes the "hidden" | |
435 | argument from the stack or CURRENT_PC, whichever is smaller. | |
436 | Otherwise, return PC. */ | |
437 | ||
438 | static CORE_ADDR | |
439 | i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR current_pc, | |
440 | struct i386_frame_cache *cache) | |
441 | { | |
442 | unsigned char op; | |
26604a34 | 443 | int skip = 0; |
acd5c798 MK |
444 | |
445 | if (current_pc <= pc) | |
446 | return current_pc; | |
447 | ||
448 | op = read_memory_unsigned_integer (pc, 1); | |
449 | ||
c906108c | 450 | if (op == 0x55) /* pushl %ebp */ |
c5aa993b | 451 | { |
acd5c798 MK |
452 | /* Take into account that we've executed the `pushl %ebp' that |
453 | starts this instruction sequence. */ | |
fd13a04a | 454 | cache->saved_regs[I386_EBP_REGNUM] = 0; |
acd5c798 MK |
455 | cache->sp_offset += 4; |
456 | ||
457 | /* If that's all, return now. */ | |
458 | if (current_pc <= pc + 1) | |
459 | return current_pc; | |
460 | ||
acd5c798 | 461 | op = read_memory_unsigned_integer (pc + 1, 1); |
26604a34 MK |
462 | |
463 | /* Check for some special instructions that might be migrated | |
464 | by GCC into the prologue. We check for | |
465 | ||
466 | xorl %ebx, %ebx | |
467 | xorl %ecx, %ecx | |
468 | xorl %edx, %edx | |
469 | ||
470 | and the equivalent | |
471 | ||
472 | subl %ebx, %ebx | |
473 | subl %ecx, %ecx | |
474 | subl %edx, %edx | |
475 | ||
476 | Make sure we only skip these instructions if we later see the | |
477 | `movl %esp, %ebp' that actually sets up the frame. */ | |
478 | while (op == 0x29 || op == 0x31) | |
479 | { | |
480 | op = read_memory_unsigned_integer (pc + skip + 2, 1); | |
481 | switch (op) | |
482 | { | |
483 | case 0xdb: /* %ebx */ | |
484 | case 0xc9: /* %ecx */ | |
485 | case 0xd2: /* %edx */ | |
486 | skip += 2; | |
487 | break; | |
488 | default: | |
489 | return pc + 1; | |
490 | } | |
491 | ||
492 | op = read_memory_unsigned_integer (pc + skip + 1, 1); | |
493 | } | |
494 | ||
495 | /* Check for `movl %esp, %ebp' -- can be written in two ways. */ | |
acd5c798 | 496 | switch (op) |
c906108c SS |
497 | { |
498 | case 0x8b: | |
26604a34 | 499 | if (read_memory_unsigned_integer (pc + skip + 2, 1) != 0xec) |
acd5c798 | 500 | return pc + 1; |
c906108c SS |
501 | break; |
502 | case 0x89: | |
26604a34 | 503 | if (read_memory_unsigned_integer (pc + skip + 2, 1) != 0xe5) |
acd5c798 | 504 | return pc + 1; |
c906108c SS |
505 | break; |
506 | default: | |
acd5c798 | 507 | return pc + 1; |
c906108c | 508 | } |
acd5c798 | 509 | |
26604a34 MK |
510 | /* OK, we actually have a frame. We just don't know how large |
511 | it is yet. Set its size to zero. We'll adjust it if | |
512 | necessary. We also now commit to skipping the special | |
513 | instructions mentioned before. */ | |
acd5c798 | 514 | cache->locals = 0; |
26604a34 | 515 | pc += skip; |
acd5c798 MK |
516 | |
517 | /* If that's all, return now. */ | |
518 | if (current_pc <= pc + 3) | |
519 | return current_pc; | |
520 | ||
fc338970 MK |
521 | /* Check for stack adjustment |
522 | ||
acd5c798 | 523 | subl $XXX, %esp |
fc338970 MK |
524 | |
525 | NOTE: You can't subtract a 16 bit immediate from a 32 bit | |
526 | reg, so we don't have to worry about a data16 prefix. */ | |
acd5c798 | 527 | op = read_memory_unsigned_integer (pc + 3, 1); |
c906108c SS |
528 | if (op == 0x83) |
529 | { | |
fc338970 | 530 | /* `subl' with 8 bit immediate. */ |
acd5c798 | 531 | if (read_memory_unsigned_integer (pc + 4, 1) != 0xec) |
fc338970 | 532 | /* Some instruction starting with 0x83 other than `subl'. */ |
acd5c798 MK |
533 | return pc + 3; |
534 | ||
535 | /* `subl' with signed byte immediate (though it wouldn't make | |
536 | sense to be negative). */ | |
537 | cache->locals = read_memory_integer (pc + 5, 1); | |
538 | return pc + 6; | |
c906108c SS |
539 | } |
540 | else if (op == 0x81) | |
541 | { | |
fc338970 | 542 | /* Maybe it is `subl' with a 32 bit immedediate. */ |
acd5c798 | 543 | if (read_memory_unsigned_integer (pc + 4, 1) != 0xec) |
fc338970 | 544 | /* Some instruction starting with 0x81 other than `subl'. */ |
acd5c798 MK |
545 | return pc + 3; |
546 | ||
fc338970 | 547 | /* It is `subl' with a 32 bit immediate. */ |
acd5c798 MK |
548 | cache->locals = read_memory_integer (pc + 5, 4); |
549 | return pc + 9; | |
c906108c SS |
550 | } |
551 | else | |
552 | { | |
acd5c798 MK |
553 | /* Some instruction other than `subl'. */ |
554 | return pc + 3; | |
c906108c SS |
555 | } |
556 | } | |
acd5c798 | 557 | else if (op == 0xc8) /* enter $XXX */ |
c906108c | 558 | { |
acd5c798 MK |
559 | cache->locals = read_memory_unsigned_integer (pc + 1, 2); |
560 | return pc + 4; | |
c906108c | 561 | } |
21d0e8a4 | 562 | |
acd5c798 | 563 | return pc; |
21d0e8a4 MK |
564 | } |
565 | ||
acd5c798 MK |
566 | /* Check whether PC points at code that saves registers on the stack. |
567 | If so, it updates CACHE and returns the address of the first | |
568 | instruction after the register saves or CURRENT_PC, whichever is | |
569 | smaller. Otherwise, return PC. */ | |
6bff26de MK |
570 | |
571 | static CORE_ADDR | |
acd5c798 MK |
572 | i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc, |
573 | struct i386_frame_cache *cache) | |
6bff26de | 574 | { |
99ab4326 MK |
575 | CORE_ADDR offset = 0; |
576 | unsigned char op; | |
577 | int i; | |
c0d1d883 | 578 | |
99ab4326 MK |
579 | if (cache->locals > 0) |
580 | offset -= cache->locals; | |
581 | for (i = 0; i < 8 && pc < current_pc; i++) | |
582 | { | |
583 | op = read_memory_unsigned_integer (pc, 1); | |
584 | if (op < 0x50 || op > 0x57) | |
585 | break; | |
0d17c81d | 586 | |
99ab4326 MK |
587 | offset -= 4; |
588 | cache->saved_regs[op - 0x50] = offset; | |
589 | cache->sp_offset += 4; | |
590 | pc++; | |
6bff26de MK |
591 | } |
592 | ||
acd5c798 | 593 | return pc; |
22797942 AC |
594 | } |
595 | ||
acd5c798 MK |
596 | /* Do a full analysis of the prologue at PC and update CACHE |
597 | accordingly. Bail out early if CURRENT_PC is reached. Return the | |
598 | address where the analysis stopped. | |
ed84f6c1 | 599 | |
fc338970 MK |
600 | We handle these cases: |
601 | ||
602 | The startup sequence can be at the start of the function, or the | |
603 | function can start with a branch to startup code at the end. | |
604 | ||
605 | %ebp can be set up with either the 'enter' instruction, or "pushl | |
606 | %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was | |
607 | once used in the System V compiler). | |
608 | ||
609 | Local space is allocated just below the saved %ebp by either the | |
610 | 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16 | |
611 | bit unsigned argument for space to allocate, and the 'addl' | |
612 | instruction could have either a signed byte, or 32 bit immediate. | |
613 | ||
614 | Next, the registers used by this function are pushed. With the | |
615 | System V compiler they will always be in the order: %edi, %esi, | |
616 | %ebx (and sometimes a harmless bug causes it to also save but not | |
617 | restore %eax); however, the code below is willing to see the pushes | |
618 | in any order, and will handle up to 8 of them. | |
619 | ||
620 | If the setup sequence is at the end of the function, then the next | |
621 | instruction will be a branch back to the start. */ | |
c906108c | 622 | |
acd5c798 MK |
623 | static CORE_ADDR |
624 | i386_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc, | |
625 | struct i386_frame_cache *cache) | |
c906108c | 626 | { |
acd5c798 MK |
627 | pc = i386_follow_jump (pc); |
628 | pc = i386_analyze_struct_return (pc, current_pc, cache); | |
629 | pc = i386_skip_probe (pc); | |
630 | pc = i386_analyze_frame_setup (pc, current_pc, cache); | |
631 | return i386_analyze_register_saves (pc, current_pc, cache); | |
c906108c SS |
632 | } |
633 | ||
fc338970 | 634 | /* Return PC of first real instruction. */ |
c906108c | 635 | |
3a1e71e3 | 636 | static CORE_ADDR |
acd5c798 | 637 | i386_skip_prologue (CORE_ADDR start_pc) |
c906108c | 638 | { |
c5aa993b | 639 | static unsigned char pic_pat[6] = |
acd5c798 MK |
640 | { |
641 | 0xe8, 0, 0, 0, 0, /* call 0x0 */ | |
642 | 0x5b, /* popl %ebx */ | |
c5aa993b | 643 | }; |
acd5c798 MK |
644 | struct i386_frame_cache cache; |
645 | CORE_ADDR pc; | |
646 | unsigned char op; | |
647 | int i; | |
c5aa993b | 648 | |
acd5c798 MK |
649 | cache.locals = -1; |
650 | pc = i386_analyze_prologue (start_pc, 0xffffffff, &cache); | |
651 | if (cache.locals < 0) | |
652 | return start_pc; | |
c5aa993b | 653 | |
acd5c798 | 654 | /* Found valid frame setup. */ |
c906108c | 655 | |
fc338970 MK |
656 | /* The native cc on SVR4 in -K PIC mode inserts the following code |
657 | to get the address of the global offset table (GOT) into register | |
acd5c798 MK |
658 | %ebx: |
659 | ||
fc338970 MK |
660 | call 0x0 |
661 | popl %ebx | |
662 | movl %ebx,x(%ebp) (optional) | |
663 | addl y,%ebx | |
664 | ||
c906108c SS |
665 | This code is with the rest of the prologue (at the end of the |
666 | function), so we have to skip it to get to the first real | |
667 | instruction at the start of the function. */ | |
c5aa993b | 668 | |
c906108c SS |
669 | for (i = 0; i < 6; i++) |
670 | { | |
acd5c798 | 671 | op = read_memory_unsigned_integer (pc + i, 1); |
c5aa993b | 672 | if (pic_pat[i] != op) |
c906108c SS |
673 | break; |
674 | } | |
675 | if (i == 6) | |
676 | { | |
acd5c798 MK |
677 | int delta = 6; |
678 | ||
679 | op = read_memory_unsigned_integer (pc + delta, 1); | |
c906108c | 680 | |
c5aa993b | 681 | if (op == 0x89) /* movl %ebx, x(%ebp) */ |
c906108c | 682 | { |
acd5c798 MK |
683 | op = read_memory_unsigned_integer (pc + delta + 1, 1); |
684 | ||
fc338970 | 685 | if (op == 0x5d) /* One byte offset from %ebp. */ |
acd5c798 | 686 | delta += 3; |
fc338970 | 687 | else if (op == 0x9d) /* Four byte offset from %ebp. */ |
acd5c798 | 688 | delta += 6; |
fc338970 | 689 | else /* Unexpected instruction. */ |
acd5c798 MK |
690 | delta = 0; |
691 | ||
692 | op = read_memory_unsigned_integer (pc + delta, 1); | |
c906108c | 693 | } |
acd5c798 | 694 | |
c5aa993b | 695 | /* addl y,%ebx */ |
acd5c798 MK |
696 | if (delta > 0 && op == 0x81 |
697 | && read_memory_unsigned_integer (pc + delta + 1, 1) == 0xc3); | |
c906108c | 698 | { |
acd5c798 | 699 | pc += delta + 6; |
c906108c SS |
700 | } |
701 | } | |
c5aa993b | 702 | |
acd5c798 | 703 | return i386_follow_jump (pc); |
c906108c SS |
704 | } |
705 | ||
acd5c798 | 706 | /* This function is 64-bit safe. */ |
93924b6b | 707 | |
acd5c798 MK |
708 | static CORE_ADDR |
709 | i386_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
93924b6b | 710 | { |
acd5c798 MK |
711 | char buf[8]; |
712 | ||
713 | frame_unwind_register (next_frame, PC_REGNUM, buf); | |
714 | return extract_typed_address (buf, builtin_type_void_func_ptr); | |
93924b6b | 715 | } |
acd5c798 | 716 | \f |
93924b6b | 717 | |
acd5c798 | 718 | /* Normal frames. */ |
c5aa993b | 719 | |
acd5c798 MK |
720 | static struct i386_frame_cache * |
721 | i386_frame_cache (struct frame_info *next_frame, void **this_cache) | |
a7769679 | 722 | { |
acd5c798 | 723 | struct i386_frame_cache *cache; |
c0d1d883 | 724 | char buf[4]; |
acd5c798 MK |
725 | int i; |
726 | ||
727 | if (*this_cache) | |
728 | return *this_cache; | |
729 | ||
fd13a04a | 730 | cache = i386_alloc_frame_cache (); |
acd5c798 MK |
731 | *this_cache = cache; |
732 | ||
733 | /* In principle, for normal frames, %ebp holds the frame pointer, | |
734 | which holds the base address for the current stack frame. | |
735 | However, for functions that don't need it, the frame pointer is | |
736 | optional. For these "frameless" functions the frame pointer is | |
737 | actually the frame pointer of the calling frame. Signal | |
738 | trampolines are just a special case of a "frameless" function. | |
739 | They (usually) share their frame pointer with the frame that was | |
740 | in progress when the signal occurred. */ | |
741 | ||
742 | frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); | |
743 | cache->base = extract_unsigned_integer (buf, 4); | |
744 | if (cache->base == 0) | |
745 | return cache; | |
746 | ||
747 | /* For normal frames, %eip is stored at 4(%ebp). */ | |
fd13a04a | 748 | cache->saved_regs[I386_EIP_REGNUM] = 4; |
acd5c798 MK |
749 | |
750 | cache->pc = frame_func_unwind (next_frame); | |
751 | if (cache->pc != 0) | |
752 | i386_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache); | |
753 | ||
754 | if (cache->locals < 0) | |
755 | { | |
756 | /* We didn't find a valid frame, which means that CACHE->base | |
757 | currently holds the frame pointer for our calling frame. If | |
758 | we're at the start of a function, or somewhere half-way its | |
759 | prologue, the function's frame probably hasn't been fully | |
760 | setup yet. Try to reconstruct the base address for the stack | |
761 | frame by looking at the stack pointer. For truly "frameless" | |
762 | functions this might work too. */ | |
763 | ||
764 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); | |
765 | cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset; | |
766 | } | |
767 | ||
768 | /* Now that we have the base address for the stack frame we can | |
769 | calculate the value of %esp in the calling frame. */ | |
770 | cache->saved_sp = cache->base + 8; | |
a7769679 | 771 | |
acd5c798 MK |
772 | /* Adjust all the saved registers such that they contain addresses |
773 | instead of offsets. */ | |
774 | for (i = 0; i < I386_NUM_SAVED_REGS; i++) | |
fd13a04a AC |
775 | if (cache->saved_regs[i] != -1) |
776 | cache->saved_regs[i] += cache->base; | |
acd5c798 MK |
777 | |
778 | return cache; | |
a7769679 MK |
779 | } |
780 | ||
3a1e71e3 | 781 | static void |
acd5c798 MK |
782 | i386_frame_this_id (struct frame_info *next_frame, void **this_cache, |
783 | struct frame_id *this_id) | |
c906108c | 784 | { |
acd5c798 MK |
785 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); |
786 | ||
787 | /* This marks the outermost frame. */ | |
788 | if (cache->base == 0) | |
789 | return; | |
790 | ||
3e210248 | 791 | /* See the end of i386_push_dummy_call. */ |
acd5c798 MK |
792 | (*this_id) = frame_id_build (cache->base + 8, cache->pc); |
793 | } | |
794 | ||
795 | static void | |
796 | i386_frame_prev_register (struct frame_info *next_frame, void **this_cache, | |
797 | int regnum, int *optimizedp, | |
798 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
799 | int *realnump, void *valuep) | |
800 | { | |
801 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); | |
802 | ||
803 | gdb_assert (regnum >= 0); | |
804 | ||
805 | /* The System V ABI says that: | |
806 | ||
807 | "The flags register contains the system flags, such as the | |
808 | direction flag and the carry flag. The direction flag must be | |
809 | set to the forward (that is, zero) direction before entry and | |
810 | upon exit from a function. Other user flags have no specified | |
811 | role in the standard calling sequence and are not preserved." | |
812 | ||
813 | To guarantee the "upon exit" part of that statement we fake a | |
814 | saved flags register that has its direction flag cleared. | |
815 | ||
816 | Note that GCC doesn't seem to rely on the fact that the direction | |
817 | flag is cleared after a function return; it always explicitly | |
818 | clears the flag before operations where it matters. | |
819 | ||
820 | FIXME: kettenis/20030316: I'm not quite sure whether this is the | |
821 | right thing to do. The way we fake the flags register here makes | |
822 | it impossible to change it. */ | |
823 | ||
824 | if (regnum == I386_EFLAGS_REGNUM) | |
825 | { | |
826 | *optimizedp = 0; | |
827 | *lvalp = not_lval; | |
828 | *addrp = 0; | |
829 | *realnump = -1; | |
830 | if (valuep) | |
831 | { | |
832 | ULONGEST val; | |
c5aa993b | 833 | |
acd5c798 | 834 | /* Clear the direction flag. */ |
f837910f MK |
835 | val = frame_unwind_register_unsigned (next_frame, |
836 | I386_EFLAGS_REGNUM); | |
acd5c798 MK |
837 | val &= ~(1 << 10); |
838 | store_unsigned_integer (valuep, 4, val); | |
839 | } | |
840 | ||
841 | return; | |
842 | } | |
1211c4e4 | 843 | |
acd5c798 | 844 | if (regnum == I386_EIP_REGNUM && cache->pc_in_eax) |
c906108c | 845 | { |
acd5c798 MK |
846 | frame_register_unwind (next_frame, I386_EAX_REGNUM, |
847 | optimizedp, lvalp, addrp, realnump, valuep); | |
848 | return; | |
849 | } | |
850 | ||
851 | if (regnum == I386_ESP_REGNUM && cache->saved_sp) | |
852 | { | |
853 | *optimizedp = 0; | |
854 | *lvalp = not_lval; | |
855 | *addrp = 0; | |
856 | *realnump = -1; | |
857 | if (valuep) | |
c906108c | 858 | { |
acd5c798 MK |
859 | /* Store the value. */ |
860 | store_unsigned_integer (valuep, 4, cache->saved_sp); | |
c906108c | 861 | } |
acd5c798 | 862 | return; |
c906108c | 863 | } |
acd5c798 | 864 | |
fd13a04a AC |
865 | if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1) |
866 | { | |
867 | *optimizedp = 0; | |
868 | *lvalp = lval_memory; | |
869 | *addrp = cache->saved_regs[regnum]; | |
870 | *realnump = -1; | |
871 | if (valuep) | |
872 | { | |
873 | /* Read the value in from memory. */ | |
874 | read_memory (*addrp, valuep, | |
875 | register_size (current_gdbarch, regnum)); | |
876 | } | |
877 | return; | |
878 | } | |
879 | ||
880 | frame_register_unwind (next_frame, regnum, | |
881 | optimizedp, lvalp, addrp, realnump, valuep); | |
acd5c798 MK |
882 | } |
883 | ||
884 | static const struct frame_unwind i386_frame_unwind = | |
885 | { | |
886 | NORMAL_FRAME, | |
887 | i386_frame_this_id, | |
888 | i386_frame_prev_register | |
889 | }; | |
890 | ||
891 | static const struct frame_unwind * | |
336d1bba | 892 | i386_frame_sniffer (struct frame_info *next_frame) |
acd5c798 MK |
893 | { |
894 | return &i386_frame_unwind; | |
895 | } | |
896 | \f | |
897 | ||
898 | /* Signal trampolines. */ | |
899 | ||
900 | static struct i386_frame_cache * | |
901 | i386_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache) | |
902 | { | |
903 | struct i386_frame_cache *cache; | |
904 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
905 | CORE_ADDR addr; | |
906 | char buf[4]; | |
907 | ||
908 | if (*this_cache) | |
909 | return *this_cache; | |
910 | ||
fd13a04a | 911 | cache = i386_alloc_frame_cache (); |
acd5c798 MK |
912 | |
913 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); | |
914 | cache->base = extract_unsigned_integer (buf, 4) - 4; | |
915 | ||
916 | addr = tdep->sigcontext_addr (next_frame); | |
a3386186 MK |
917 | if (tdep->sc_reg_offset) |
918 | { | |
919 | int i; | |
920 | ||
921 | gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS); | |
922 | ||
923 | for (i = 0; i < tdep->sc_num_regs; i++) | |
924 | if (tdep->sc_reg_offset[i] != -1) | |
fd13a04a | 925 | cache->saved_regs[i] = addr + tdep->sc_reg_offset[i]; |
a3386186 MK |
926 | } |
927 | else | |
928 | { | |
fd13a04a AC |
929 | cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset; |
930 | cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset; | |
a3386186 | 931 | } |
acd5c798 MK |
932 | |
933 | *this_cache = cache; | |
934 | return cache; | |
935 | } | |
936 | ||
937 | static void | |
938 | i386_sigtramp_frame_this_id (struct frame_info *next_frame, void **this_cache, | |
939 | struct frame_id *this_id) | |
940 | { | |
941 | struct i386_frame_cache *cache = | |
942 | i386_sigtramp_frame_cache (next_frame, this_cache); | |
943 | ||
3e210248 | 944 | /* See the end of i386_push_dummy_call. */ |
acd5c798 MK |
945 | (*this_id) = frame_id_build (cache->base + 8, frame_pc_unwind (next_frame)); |
946 | } | |
947 | ||
948 | static void | |
949 | i386_sigtramp_frame_prev_register (struct frame_info *next_frame, | |
950 | void **this_cache, | |
951 | int regnum, int *optimizedp, | |
952 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
953 | int *realnump, void *valuep) | |
954 | { | |
955 | /* Make sure we've initialized the cache. */ | |
956 | i386_sigtramp_frame_cache (next_frame, this_cache); | |
957 | ||
958 | i386_frame_prev_register (next_frame, this_cache, regnum, | |
959 | optimizedp, lvalp, addrp, realnump, valuep); | |
c906108c | 960 | } |
c0d1d883 | 961 | |
acd5c798 MK |
962 | static const struct frame_unwind i386_sigtramp_frame_unwind = |
963 | { | |
964 | SIGTRAMP_FRAME, | |
965 | i386_sigtramp_frame_this_id, | |
966 | i386_sigtramp_frame_prev_register | |
967 | }; | |
968 | ||
969 | static const struct frame_unwind * | |
336d1bba | 970 | i386_sigtramp_frame_sniffer (struct frame_info *next_frame) |
acd5c798 | 971 | { |
336d1bba | 972 | CORE_ADDR pc = frame_pc_unwind (next_frame); |
acd5c798 MK |
973 | char *name; |
974 | ||
1c3545ae MK |
975 | /* We shouldn't even bother to try if the OSABI didn't register |
976 | a sigcontext_addr handler. */ | |
977 | if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr) | |
978 | return NULL; | |
979 | ||
acd5c798 MK |
980 | find_pc_partial_function (pc, &name, NULL, NULL); |
981 | if (PC_IN_SIGTRAMP (pc, name)) | |
982 | return &i386_sigtramp_frame_unwind; | |
983 | ||
984 | return NULL; | |
985 | } | |
986 | \f | |
987 | ||
988 | static CORE_ADDR | |
989 | i386_frame_base_address (struct frame_info *next_frame, void **this_cache) | |
990 | { | |
991 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); | |
992 | ||
993 | return cache->base; | |
994 | } | |
995 | ||
996 | static const struct frame_base i386_frame_base = | |
997 | { | |
998 | &i386_frame_unwind, | |
999 | i386_frame_base_address, | |
1000 | i386_frame_base_address, | |
1001 | i386_frame_base_address | |
1002 | }; | |
1003 | ||
acd5c798 MK |
1004 | static struct frame_id |
1005 | i386_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
1006 | { | |
1007 | char buf[4]; | |
1008 | CORE_ADDR fp; | |
1009 | ||
1010 | frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); | |
1011 | fp = extract_unsigned_integer (buf, 4); | |
1012 | ||
3e210248 | 1013 | /* See the end of i386_push_dummy_call. */ |
acd5c798 | 1014 | return frame_id_build (fp + 8, frame_pc_unwind (next_frame)); |
c0d1d883 | 1015 | } |
fc338970 | 1016 | \f |
c906108c | 1017 | |
fc338970 MK |
1018 | /* Figure out where the longjmp will land. Slurp the args out of the |
1019 | stack. We expect the first arg to be a pointer to the jmp_buf | |
8201327c | 1020 | structure from which we extract the address that we will land at. |
28bcfd30 | 1021 | This address is copied into PC. This routine returns non-zero on |
acd5c798 MK |
1022 | success. |
1023 | ||
1024 | This function is 64-bit safe. */ | |
c906108c | 1025 | |
8201327c MK |
1026 | static int |
1027 | i386_get_longjmp_target (CORE_ADDR *pc) | |
c906108c | 1028 | { |
28bcfd30 | 1029 | char buf[8]; |
c906108c | 1030 | CORE_ADDR sp, jb_addr; |
8201327c | 1031 | int jb_pc_offset = gdbarch_tdep (current_gdbarch)->jb_pc_offset; |
f9d3c2a8 | 1032 | int len = TYPE_LENGTH (builtin_type_void_func_ptr); |
c906108c | 1033 | |
8201327c MK |
1034 | /* If JB_PC_OFFSET is -1, we have no way to find out where the |
1035 | longjmp will land. */ | |
1036 | if (jb_pc_offset == -1) | |
c906108c SS |
1037 | return 0; |
1038 | ||
f837910f MK |
1039 | /* Don't use I386_ESP_REGNUM here, since this function is also used |
1040 | for AMD64. */ | |
1041 | regcache_cooked_read (current_regcache, SP_REGNUM, buf); | |
1042 | sp = extract_typed_address (buf, builtin_type_void_data_ptr); | |
28bcfd30 | 1043 | if (target_read_memory (sp + len, buf, len)) |
c906108c SS |
1044 | return 0; |
1045 | ||
f837910f | 1046 | jb_addr = extract_typed_address (buf, builtin_type_void_data_ptr); |
28bcfd30 | 1047 | if (target_read_memory (jb_addr + jb_pc_offset, buf, len)) |
8201327c | 1048 | return 0; |
c906108c | 1049 | |
f9d3c2a8 | 1050 | *pc = extract_typed_address (buf, builtin_type_void_func_ptr); |
c906108c SS |
1051 | return 1; |
1052 | } | |
fc338970 | 1053 | \f |
c906108c | 1054 | |
3a1e71e3 | 1055 | static CORE_ADDR |
6a65450a AC |
1056 | i386_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, |
1057 | struct regcache *regcache, CORE_ADDR bp_addr, int nargs, | |
1058 | struct value **args, CORE_ADDR sp, int struct_return, | |
1059 | CORE_ADDR struct_addr) | |
22f8ba57 | 1060 | { |
acd5c798 MK |
1061 | char buf[4]; |
1062 | int i; | |
1063 | ||
1064 | /* Push arguments in reverse order. */ | |
1065 | for (i = nargs - 1; i >= 0; i--) | |
22f8ba57 | 1066 | { |
acd5c798 MK |
1067 | int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args[i])); |
1068 | ||
1069 | /* The System V ABI says that: | |
1070 | ||
1071 | "An argument's size is increased, if necessary, to make it a | |
1072 | multiple of [32-bit] words. This may require tail padding, | |
1073 | depending on the size of the argument." | |
1074 | ||
1075 | This makes sure the stack says word-aligned. */ | |
1076 | sp -= (len + 3) & ~3; | |
1077 | write_memory (sp, VALUE_CONTENTS_ALL (args[i]), len); | |
1078 | } | |
22f8ba57 | 1079 | |
acd5c798 MK |
1080 | /* Push value address. */ |
1081 | if (struct_return) | |
1082 | { | |
22f8ba57 | 1083 | sp -= 4; |
fbd9dcd3 | 1084 | store_unsigned_integer (buf, 4, struct_addr); |
22f8ba57 MK |
1085 | write_memory (sp, buf, 4); |
1086 | } | |
1087 | ||
acd5c798 MK |
1088 | /* Store return address. */ |
1089 | sp -= 4; | |
6a65450a | 1090 | store_unsigned_integer (buf, 4, bp_addr); |
acd5c798 MK |
1091 | write_memory (sp, buf, 4); |
1092 | ||
1093 | /* Finally, update the stack pointer... */ | |
1094 | store_unsigned_integer (buf, 4, sp); | |
1095 | regcache_cooked_write (regcache, I386_ESP_REGNUM, buf); | |
1096 | ||
1097 | /* ...and fake a frame pointer. */ | |
1098 | regcache_cooked_write (regcache, I386_EBP_REGNUM, buf); | |
1099 | ||
3e210248 AC |
1100 | /* MarkK wrote: This "+ 8" is all over the place: |
1101 | (i386_frame_this_id, i386_sigtramp_frame_this_id, | |
1102 | i386_unwind_dummy_id). It's there, since all frame unwinders for | |
1103 | a given target have to agree (within a certain margin) on the | |
1104 | defenition of the stack address of a frame. Otherwise | |
1105 | frame_id_inner() won't work correctly. Since DWARF2/GCC uses the | |
1106 | stack address *before* the function call as a frame's CFA. On | |
1107 | the i386, when %ebp is used as a frame pointer, the offset | |
1108 | between the contents %ebp and the CFA as defined by GCC. */ | |
1109 | return sp + 8; | |
22f8ba57 MK |
1110 | } |
1111 | ||
1a309862 MK |
1112 | /* These registers are used for returning integers (and on some |
1113 | targets also for returning `struct' and `union' values when their | |
ef9dff19 | 1114 | size and alignment match an integer type). */ |
acd5c798 MK |
1115 | #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */ |
1116 | #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */ | |
1a309862 MK |
1117 | |
1118 | /* Extract from an array REGBUF containing the (raw) register state, a | |
1119 | function return value of TYPE, and copy that, in virtual format, | |
1120 | into VALBUF. */ | |
1121 | ||
3a1e71e3 | 1122 | static void |
00f8375e | 1123 | i386_extract_return_value (struct type *type, struct regcache *regcache, |
ebba8386 | 1124 | void *dst) |
c906108c | 1125 | { |
ebba8386 | 1126 | bfd_byte *valbuf = dst; |
1a309862 | 1127 | int len = TYPE_LENGTH (type); |
00f8375e | 1128 | char buf[I386_MAX_REGISTER_SIZE]; |
1a309862 | 1129 | |
1e8d0a7b MK |
1130 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1131 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 | 1132 | { |
00f8375e | 1133 | i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); |
3df1b9b4 MK |
1134 | return; |
1135 | } | |
1e8d0a7b MK |
1136 | |
1137 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
c906108c | 1138 | { |
94ea66b3 | 1139 | if (FP0_REGNUM < 0) |
1a309862 MK |
1140 | { |
1141 | warning ("Cannot find floating-point return value."); | |
1142 | memset (valbuf, 0, len); | |
ef9dff19 | 1143 | return; |
1a309862 MK |
1144 | } |
1145 | ||
c6ba6f0d MK |
1146 | /* Floating-point return values can be found in %st(0). Convert |
1147 | its contents to the desired type. This is probably not | |
1148 | exactly how it would happen on the target itself, but it is | |
1149 | the best we can do. */ | |
acd5c798 | 1150 | regcache_raw_read (regcache, I386_ST0_REGNUM, buf); |
00f8375e | 1151 | convert_typed_floating (buf, builtin_type_i387_ext, valbuf, type); |
c906108c SS |
1152 | } |
1153 | else | |
c5aa993b | 1154 | { |
f837910f MK |
1155 | int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM); |
1156 | int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM); | |
d4f3574e SS |
1157 | |
1158 | if (len <= low_size) | |
00f8375e | 1159 | { |
0818c12a | 1160 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e MK |
1161 | memcpy (valbuf, buf, len); |
1162 | } | |
d4f3574e SS |
1163 | else if (len <= (low_size + high_size)) |
1164 | { | |
0818c12a | 1165 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e | 1166 | memcpy (valbuf, buf, low_size); |
0818c12a | 1167 | regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf); |
00f8375e | 1168 | memcpy (valbuf + low_size, buf, len - low_size); |
d4f3574e SS |
1169 | } |
1170 | else | |
8e65ff28 AC |
1171 | internal_error (__FILE__, __LINE__, |
1172 | "Cannot extract return value of %d bytes long.", len); | |
c906108c SS |
1173 | } |
1174 | } | |
1175 | ||
ef9dff19 MK |
1176 | /* Write into the appropriate registers a function return value stored |
1177 | in VALBUF of type TYPE, given in virtual format. */ | |
1178 | ||
3a1e71e3 | 1179 | static void |
3d7f4f49 MK |
1180 | i386_store_return_value (struct type *type, struct regcache *regcache, |
1181 | const void *valbuf) | |
ef9dff19 MK |
1182 | { |
1183 | int len = TYPE_LENGTH (type); | |
1184 | ||
1e8d0a7b MK |
1185 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1186 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 | 1187 | { |
3d7f4f49 | 1188 | i386_store_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); |
3df1b9b4 MK |
1189 | return; |
1190 | } | |
1e8d0a7b MK |
1191 | |
1192 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
ef9dff19 | 1193 | { |
3d7f4f49 | 1194 | ULONGEST fstat; |
c6ba6f0d | 1195 | char buf[FPU_REG_RAW_SIZE]; |
ccb945b8 | 1196 | |
94ea66b3 | 1197 | if (FP0_REGNUM < 0) |
ef9dff19 MK |
1198 | { |
1199 | warning ("Cannot set floating-point return value."); | |
1200 | return; | |
1201 | } | |
1202 | ||
635b0cc1 MK |
1203 | /* Returning floating-point values is a bit tricky. Apart from |
1204 | storing the return value in %st(0), we have to simulate the | |
1205 | state of the FPU at function return point. */ | |
1206 | ||
c6ba6f0d MK |
1207 | /* Convert the value found in VALBUF to the extended |
1208 | floating-point format used by the FPU. This is probably | |
1209 | not exactly how it would happen on the target itself, but | |
1210 | it is the best we can do. */ | |
1211 | convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext); | |
acd5c798 | 1212 | regcache_raw_write (regcache, I386_ST0_REGNUM, buf); |
ccb945b8 | 1213 | |
635b0cc1 MK |
1214 | /* Set the top of the floating-point register stack to 7. The |
1215 | actual value doesn't really matter, but 7 is what a normal | |
1216 | function return would end up with if the program started out | |
1217 | with a freshly initialized FPU. */ | |
3d7f4f49 | 1218 | regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat); |
ccb945b8 | 1219 | fstat |= (7 << 11); |
3d7f4f49 | 1220 | regcache_raw_write_unsigned (regcache, FSTAT_REGNUM, fstat); |
ccb945b8 | 1221 | |
635b0cc1 MK |
1222 | /* Mark %st(1) through %st(7) as empty. Since we set the top of |
1223 | the floating-point register stack to 7, the appropriate value | |
1224 | for the tag word is 0x3fff. */ | |
3d7f4f49 | 1225 | regcache_raw_write_unsigned (regcache, FTAG_REGNUM, 0x3fff); |
ef9dff19 MK |
1226 | } |
1227 | else | |
1228 | { | |
f837910f MK |
1229 | int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM); |
1230 | int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM); | |
ef9dff19 MK |
1231 | |
1232 | if (len <= low_size) | |
3d7f4f49 | 1233 | regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf); |
ef9dff19 MK |
1234 | else if (len <= (low_size + high_size)) |
1235 | { | |
3d7f4f49 MK |
1236 | regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf); |
1237 | regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0, | |
1238 | len - low_size, (char *) valbuf + low_size); | |
ef9dff19 MK |
1239 | } |
1240 | else | |
8e65ff28 AC |
1241 | internal_error (__FILE__, __LINE__, |
1242 | "Cannot store return value of %d bytes long.", len); | |
ef9dff19 MK |
1243 | } |
1244 | } | |
f7af9647 | 1245 | |
751f1375 MK |
1246 | /* Extract from REGCACHE, which contains the (raw) register state, the |
1247 | address in which a function should return its structure value, as a | |
1248 | CORE_ADDR. */ | |
f7af9647 | 1249 | |
3a1e71e3 | 1250 | static CORE_ADDR |
00f8375e | 1251 | i386_extract_struct_value_address (struct regcache *regcache) |
f7af9647 | 1252 | { |
acd5c798 | 1253 | char buf[4]; |
751f1375 | 1254 | |
acd5c798 MK |
1255 | regcache_cooked_read (regcache, I386_EAX_REGNUM, buf); |
1256 | return extract_unsigned_integer (buf, 4); | |
f7af9647 | 1257 | } |
fc338970 | 1258 | \f |
ef9dff19 | 1259 | |
8201327c MK |
1260 | /* This is the variable that is set with "set struct-convention", and |
1261 | its legitimate values. */ | |
1262 | static const char default_struct_convention[] = "default"; | |
1263 | static const char pcc_struct_convention[] = "pcc"; | |
1264 | static const char reg_struct_convention[] = "reg"; | |
1265 | static const char *valid_conventions[] = | |
1266 | { | |
1267 | default_struct_convention, | |
1268 | pcc_struct_convention, | |
1269 | reg_struct_convention, | |
1270 | NULL | |
1271 | }; | |
1272 | static const char *struct_convention = default_struct_convention; | |
1273 | ||
1274 | static int | |
1275 | i386_use_struct_convention (int gcc_p, struct type *type) | |
1276 | { | |
1277 | enum struct_return struct_return; | |
1278 | ||
1279 | if (struct_convention == default_struct_convention) | |
1280 | struct_return = gdbarch_tdep (current_gdbarch)->struct_return; | |
1281 | else if (struct_convention == pcc_struct_convention) | |
1282 | struct_return = pcc_struct_return; | |
1283 | else | |
1284 | struct_return = reg_struct_return; | |
1285 | ||
1286 | return generic_use_struct_convention (struct_return == reg_struct_return, | |
1287 | type); | |
1288 | } | |
1289 | \f | |
1290 | ||
d7a0d72c MK |
1291 | /* Return the GDB type object for the "standard" data type of data in |
1292 | register REGNUM. Perhaps %esi and %edi should go here, but | |
1293 | potentially they could be used for things other than address. */ | |
1294 | ||
3a1e71e3 | 1295 | static struct type * |
4e259f09 | 1296 | i386_register_type (struct gdbarch *gdbarch, int regnum) |
d7a0d72c | 1297 | { |
acd5c798 MK |
1298 | if (regnum == I386_EIP_REGNUM |
1299 | || regnum == I386_EBP_REGNUM || regnum == I386_ESP_REGNUM) | |
d7a0d72c MK |
1300 | return lookup_pointer_type (builtin_type_void); |
1301 | ||
23a34459 | 1302 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1303 | return builtin_type_i387_ext; |
d7a0d72c | 1304 | |
23a34459 | 1305 | if (i386_sse_regnum_p (regnum)) |
3139facc | 1306 | return builtin_type_vec128i; |
d7a0d72c | 1307 | |
23a34459 | 1308 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 AC |
1309 | return builtin_type_vec64i; |
1310 | ||
d7a0d72c MK |
1311 | return builtin_type_int; |
1312 | } | |
1313 | ||
28fc6740 | 1314 | /* Map a cooked register onto a raw register or memory. For the i386, |
acd5c798 | 1315 | the MMX registers need to be mapped onto floating point registers. */ |
28fc6740 AC |
1316 | |
1317 | static int | |
c86c27af | 1318 | i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum) |
28fc6740 AC |
1319 | { |
1320 | int mmxi; | |
1321 | ULONGEST fstat; | |
1322 | int tos; | |
1323 | int fpi; | |
c86c27af | 1324 | |
28fc6740 AC |
1325 | mmxi = regnum - MM0_REGNUM; |
1326 | regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat); | |
1327 | tos = (fstat >> 11) & 0x7; | |
1328 | fpi = (mmxi + tos) % 8; | |
c86c27af | 1329 | |
28fc6740 AC |
1330 | return (FP0_REGNUM + fpi); |
1331 | } | |
1332 | ||
1333 | static void | |
1334 | i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, | |
1335 | int regnum, void *buf) | |
1336 | { | |
23a34459 | 1337 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 | 1338 | { |
d9d9c31f | 1339 | char mmx_buf[MAX_REGISTER_SIZE]; |
c86c27af MK |
1340 | int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); |
1341 | ||
28fc6740 | 1342 | /* Extract (always little endian). */ |
c86c27af | 1343 | regcache_raw_read (regcache, fpnum, mmx_buf); |
f837910f | 1344 | memcpy (buf, mmx_buf, register_size (gdbarch, regnum)); |
28fc6740 AC |
1345 | } |
1346 | else | |
1347 | regcache_raw_read (regcache, regnum, buf); | |
1348 | } | |
1349 | ||
1350 | static void | |
1351 | i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
1352 | int regnum, const void *buf) | |
1353 | { | |
23a34459 | 1354 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 | 1355 | { |
d9d9c31f | 1356 | char mmx_buf[MAX_REGISTER_SIZE]; |
c86c27af MK |
1357 | int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); |
1358 | ||
28fc6740 AC |
1359 | /* Read ... */ |
1360 | regcache_raw_read (regcache, fpnum, mmx_buf); | |
1361 | /* ... Modify ... (always little endian). */ | |
f837910f | 1362 | memcpy (mmx_buf, buf, register_size (gdbarch, regnum)); |
28fc6740 AC |
1363 | /* ... Write. */ |
1364 | regcache_raw_write (regcache, fpnum, mmx_buf); | |
1365 | } | |
1366 | else | |
1367 | regcache_raw_write (regcache, regnum, buf); | |
1368 | } | |
ff2e87ac AC |
1369 | \f |
1370 | ||
1371 | /* These registers don't have pervasive standard uses. Move them to | |
1372 | i386-tdep.h if necessary. */ | |
1373 | ||
1374 | #define I386_EBX_REGNUM 3 /* %ebx */ | |
1375 | #define I386_ECX_REGNUM 1 /* %ecx */ | |
1376 | #define I386_ESI_REGNUM 6 /* %esi */ | |
1377 | #define I386_EDI_REGNUM 7 /* %edi */ | |
1378 | ||
1379 | /* Return the register number of the register allocated by GCC after | |
1380 | REGNUM, or -1 if there is no such register. */ | |
1381 | ||
1382 | static int | |
1383 | i386_next_regnum (int regnum) | |
1384 | { | |
1385 | /* GCC allocates the registers in the order: | |
1386 | ||
1387 | %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ... | |
1388 | ||
1389 | Since storing a variable in %esp doesn't make any sense we return | |
1390 | -1 for %ebp and for %esp itself. */ | |
1391 | static int next_regnum[] = | |
1392 | { | |
1393 | I386_EDX_REGNUM, /* Slot for %eax. */ | |
1394 | I386_EBX_REGNUM, /* Slot for %ecx. */ | |
1395 | I386_ECX_REGNUM, /* Slot for %edx. */ | |
1396 | I386_ESI_REGNUM, /* Slot for %ebx. */ | |
1397 | -1, -1, /* Slots for %esp and %ebp. */ | |
1398 | I386_EDI_REGNUM, /* Slot for %esi. */ | |
1399 | I386_EBP_REGNUM /* Slot for %edi. */ | |
1400 | }; | |
1401 | ||
de5b9bb9 | 1402 | if (regnum >= 0 && regnum < sizeof (next_regnum) / sizeof (next_regnum[0])) |
ff2e87ac | 1403 | return next_regnum[regnum]; |
28fc6740 | 1404 | |
ff2e87ac AC |
1405 | return -1; |
1406 | } | |
1407 | ||
1408 | /* Return nonzero if a value of type TYPE stored in register REGNUM | |
1409 | needs any special handling. */ | |
d7a0d72c | 1410 | |
3a1e71e3 | 1411 | static int |
ff2e87ac | 1412 | i386_convert_register_p (int regnum, struct type *type) |
d7a0d72c | 1413 | { |
de5b9bb9 MK |
1414 | int len = TYPE_LENGTH (type); |
1415 | ||
ff2e87ac AC |
1416 | /* Values may be spread across multiple registers. Most debugging |
1417 | formats aren't expressive enough to specify the locations, so | |
1418 | some heuristics is involved. Right now we only handle types that | |
de5b9bb9 MK |
1419 | have a length that is a multiple of the word size, since GCC |
1420 | doesn't seem to put any other types into registers. */ | |
1421 | if (len > 4 && len % 4 == 0) | |
1422 | { | |
1423 | int last_regnum = regnum; | |
1424 | ||
1425 | while (len > 4) | |
1426 | { | |
1427 | last_regnum = i386_next_regnum (last_regnum); | |
1428 | len -= 4; | |
1429 | } | |
1430 | ||
1431 | if (last_regnum != -1) | |
1432 | return 1; | |
1433 | } | |
ff2e87ac | 1434 | |
23a34459 | 1435 | return i386_fp_regnum_p (regnum); |
d7a0d72c MK |
1436 | } |
1437 | ||
ff2e87ac AC |
1438 | /* Read a value of type TYPE from register REGNUM in frame FRAME, and |
1439 | return its contents in TO. */ | |
ac27f131 | 1440 | |
3a1e71e3 | 1441 | static void |
ff2e87ac AC |
1442 | i386_register_to_value (struct frame_info *frame, int regnum, |
1443 | struct type *type, void *to) | |
ac27f131 | 1444 | { |
de5b9bb9 MK |
1445 | int len = TYPE_LENGTH (type); |
1446 | char *buf = to; | |
1447 | ||
ff2e87ac AC |
1448 | /* FIXME: kettenis/20030609: What should we do if REGNUM isn't |
1449 | available in FRAME (i.e. if it wasn't saved)? */ | |
3d261580 | 1450 | |
ff2e87ac | 1451 | if (i386_fp_regnum_p (regnum)) |
8d7f6b4a | 1452 | { |
d532c08f MK |
1453 | i387_register_to_value (frame, regnum, type, to); |
1454 | return; | |
8d7f6b4a | 1455 | } |
ff2e87ac | 1456 | |
de5b9bb9 MK |
1457 | /* Read a value spread accross multiple registers. */ |
1458 | ||
1459 | gdb_assert (len > 4 && len % 4 == 0); | |
3d261580 | 1460 | |
de5b9bb9 MK |
1461 | while (len > 0) |
1462 | { | |
1463 | gdb_assert (regnum != -1); | |
1464 | gdb_assert (register_size (current_gdbarch, regnum) == 4); | |
d532c08f | 1465 | |
f837910f | 1466 | get_frame_register (frame, regnum, buf); |
de5b9bb9 MK |
1467 | regnum = i386_next_regnum (regnum); |
1468 | len -= 4; | |
1469 | buf += 4; | |
1470 | } | |
ac27f131 MK |
1471 | } |
1472 | ||
ff2e87ac AC |
1473 | /* Write the contents FROM of a value of type TYPE into register |
1474 | REGNUM in frame FRAME. */ | |
ac27f131 | 1475 | |
3a1e71e3 | 1476 | static void |
ff2e87ac AC |
1477 | i386_value_to_register (struct frame_info *frame, int regnum, |
1478 | struct type *type, const void *from) | |
ac27f131 | 1479 | { |
de5b9bb9 MK |
1480 | int len = TYPE_LENGTH (type); |
1481 | const char *buf = from; | |
1482 | ||
ff2e87ac | 1483 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1484 | { |
d532c08f MK |
1485 | i387_value_to_register (frame, regnum, type, from); |
1486 | return; | |
1487 | } | |
3d261580 | 1488 | |
de5b9bb9 MK |
1489 | /* Write a value spread accross multiple registers. */ |
1490 | ||
1491 | gdb_assert (len > 4 && len % 4 == 0); | |
ff2e87ac | 1492 | |
de5b9bb9 MK |
1493 | while (len > 0) |
1494 | { | |
1495 | gdb_assert (regnum != -1); | |
1496 | gdb_assert (register_size (current_gdbarch, regnum) == 4); | |
d532c08f | 1497 | |
de5b9bb9 MK |
1498 | put_frame_register (frame, regnum, buf); |
1499 | regnum = i386_next_regnum (regnum); | |
1500 | len -= 4; | |
1501 | buf += 4; | |
1502 | } | |
ac27f131 | 1503 | } |
ff2e87ac AC |
1504 | \f |
1505 | ||
fc338970 | 1506 | |
c906108c | 1507 | #ifdef STATIC_TRANSFORM_NAME |
fc338970 MK |
1508 | /* SunPRO encodes the static variables. This is not related to C++ |
1509 | mangling, it is done for C too. */ | |
c906108c SS |
1510 | |
1511 | char * | |
fba45db2 | 1512 | sunpro_static_transform_name (char *name) |
c906108c SS |
1513 | { |
1514 | char *p; | |
1515 | if (IS_STATIC_TRANSFORM_NAME (name)) | |
1516 | { | |
fc338970 MK |
1517 | /* For file-local statics there will be a period, a bunch of |
1518 | junk (the contents of which match a string given in the | |
c5aa993b JM |
1519 | N_OPT), a period and the name. For function-local statics |
1520 | there will be a bunch of junk (which seems to change the | |
1521 | second character from 'A' to 'B'), a period, the name of the | |
1522 | function, and the name. So just skip everything before the | |
1523 | last period. */ | |
c906108c SS |
1524 | p = strrchr (name, '.'); |
1525 | if (p != NULL) | |
1526 | name = p + 1; | |
1527 | } | |
1528 | return name; | |
1529 | } | |
1530 | #endif /* STATIC_TRANSFORM_NAME */ | |
fc338970 | 1531 | \f |
c906108c | 1532 | |
fc338970 | 1533 | /* Stuff for WIN32 PE style DLL's but is pretty generic really. */ |
c906108c SS |
1534 | |
1535 | CORE_ADDR | |
1cce71eb | 1536 | i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name) |
c906108c | 1537 | { |
fc338970 | 1538 | if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */ |
c906108c | 1539 | { |
c5aa993b | 1540 | unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4); |
c906108c | 1541 | struct minimal_symbol *indsym = |
fc338970 | 1542 | indirect ? lookup_minimal_symbol_by_pc (indirect) : 0; |
645dd519 | 1543 | char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0; |
c906108c | 1544 | |
c5aa993b | 1545 | if (symname) |
c906108c | 1546 | { |
c5aa993b JM |
1547 | if (strncmp (symname, "__imp_", 6) == 0 |
1548 | || strncmp (symname, "_imp_", 5) == 0) | |
c906108c SS |
1549 | return name ? 1 : read_memory_unsigned_integer (indirect, 4); |
1550 | } | |
1551 | } | |
fc338970 | 1552 | return 0; /* Not a trampoline. */ |
c906108c | 1553 | } |
fc338970 MK |
1554 | \f |
1555 | ||
8201327c MK |
1556 | /* Return non-zero if PC and NAME show that we are in a signal |
1557 | trampoline. */ | |
1558 | ||
1559 | static int | |
1560 | i386_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1561 | { | |
1562 | return (name && strcmp ("_sigtramp", name) == 0); | |
1563 | } | |
1564 | \f | |
1565 | ||
fc338970 MK |
1566 | /* We have two flavours of disassembly. The machinery on this page |
1567 | deals with switching between those. */ | |
c906108c SS |
1568 | |
1569 | static int | |
a89aa300 | 1570 | i386_print_insn (bfd_vma pc, struct disassemble_info *info) |
c906108c | 1571 | { |
5e3397bb MK |
1572 | gdb_assert (disassembly_flavor == att_flavor |
1573 | || disassembly_flavor == intel_flavor); | |
1574 | ||
1575 | /* FIXME: kettenis/20020915: Until disassembler_options is properly | |
1576 | constified, cast to prevent a compiler warning. */ | |
1577 | info->disassembler_options = (char *) disassembly_flavor; | |
1578 | info->mach = gdbarch_bfd_arch_info (current_gdbarch)->mach; | |
1579 | ||
1580 | return print_insn_i386 (pc, info); | |
7a292a7a | 1581 | } |
fc338970 | 1582 | \f |
3ce1502b | 1583 | |
8201327c MK |
1584 | /* There are a few i386 architecture variants that differ only |
1585 | slightly from the generic i386 target. For now, we don't give them | |
1586 | their own source file, but include them here. As a consequence, | |
1587 | they'll always be included. */ | |
3ce1502b | 1588 | |
8201327c | 1589 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1590 | |
8201327c MK |
1591 | static int |
1592 | i386_svr4_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
d2a7c97a | 1593 | { |
acd5c798 MK |
1594 | /* UnixWare uses _sigacthandler. The origin of the other symbols is |
1595 | currently unknown. */ | |
8201327c MK |
1596 | return (name && (strcmp ("_sigreturn", name) == 0 |
1597 | || strcmp ("_sigacthandler", name) == 0 | |
1598 | || strcmp ("sigvechandler", name) == 0)); | |
1599 | } | |
d2a7c97a | 1600 | |
acd5c798 MK |
1601 | /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp |
1602 | routine, return the address of the associated sigcontext (ucontext) | |
1603 | structure. */ | |
3ce1502b | 1604 | |
3a1e71e3 | 1605 | static CORE_ADDR |
acd5c798 | 1606 | i386_svr4_sigcontext_addr (struct frame_info *next_frame) |
8201327c | 1607 | { |
acd5c798 MK |
1608 | char buf[4]; |
1609 | CORE_ADDR sp; | |
3ce1502b | 1610 | |
acd5c798 MK |
1611 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); |
1612 | sp = extract_unsigned_integer (buf, 4); | |
21d0e8a4 | 1613 | |
acd5c798 | 1614 | return read_memory_unsigned_integer (sp + 8, 4); |
8201327c MK |
1615 | } |
1616 | \f | |
3ce1502b | 1617 | |
8201327c | 1618 | /* DJGPP. */ |
d2a7c97a | 1619 | |
8201327c MK |
1620 | static int |
1621 | i386_go32_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1622 | { | |
1623 | /* DJGPP doesn't have any special frames for signal handlers. */ | |
1624 | return 0; | |
1625 | } | |
1626 | \f | |
d2a7c97a | 1627 | |
8201327c | 1628 | /* Generic ELF. */ |
d2a7c97a | 1629 | |
8201327c MK |
1630 | void |
1631 | i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1632 | { | |
1633 | /* We typically use stabs-in-ELF with the DWARF register numbering. */ | |
1634 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1635 | } | |
3ce1502b | 1636 | |
8201327c | 1637 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1638 | |
8201327c MK |
1639 | void |
1640 | i386_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1641 | { | |
1642 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
3ce1502b | 1643 | |
8201327c MK |
1644 | /* System V Release 4 uses ELF. */ |
1645 | i386_elf_init_abi (info, gdbarch); | |
3ce1502b | 1646 | |
dfe01d39 MK |
1647 | /* System V Release 4 has shared libraries. */ |
1648 | set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section); | |
1649 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); | |
1650 | ||
8201327c | 1651 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_svr4_pc_in_sigtramp); |
21d0e8a4 | 1652 | tdep->sigcontext_addr = i386_svr4_sigcontext_addr; |
acd5c798 MK |
1653 | tdep->sc_pc_offset = 36 + 14 * 4; |
1654 | tdep->sc_sp_offset = 36 + 17 * 4; | |
3ce1502b | 1655 | |
8201327c | 1656 | tdep->jb_pc_offset = 20; |
3ce1502b MK |
1657 | } |
1658 | ||
8201327c | 1659 | /* DJGPP. */ |
3ce1502b | 1660 | |
3a1e71e3 | 1661 | static void |
8201327c | 1662 | i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1663 | { |
8201327c | 1664 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1665 | |
8201327c | 1666 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_go32_pc_in_sigtramp); |
3ce1502b | 1667 | |
8201327c | 1668 | tdep->jb_pc_offset = 36; |
3ce1502b MK |
1669 | } |
1670 | ||
8201327c | 1671 | /* NetWare. */ |
3ce1502b | 1672 | |
3a1e71e3 | 1673 | static void |
8201327c | 1674 | i386_nw_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1675 | { |
8201327c | 1676 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1677 | |
8201327c | 1678 | tdep->jb_pc_offset = 24; |
d2a7c97a | 1679 | } |
8201327c | 1680 | \f |
2acceee2 | 1681 | |
38c968cf AC |
1682 | /* i386 register groups. In addition to the normal groups, add "mmx" |
1683 | and "sse". */ | |
1684 | ||
1685 | static struct reggroup *i386_sse_reggroup; | |
1686 | static struct reggroup *i386_mmx_reggroup; | |
1687 | ||
1688 | static void | |
1689 | i386_init_reggroups (void) | |
1690 | { | |
1691 | i386_sse_reggroup = reggroup_new ("sse", USER_REGGROUP); | |
1692 | i386_mmx_reggroup = reggroup_new ("mmx", USER_REGGROUP); | |
1693 | } | |
1694 | ||
1695 | static void | |
1696 | i386_add_reggroups (struct gdbarch *gdbarch) | |
1697 | { | |
1698 | reggroup_add (gdbarch, i386_sse_reggroup); | |
1699 | reggroup_add (gdbarch, i386_mmx_reggroup); | |
1700 | reggroup_add (gdbarch, general_reggroup); | |
1701 | reggroup_add (gdbarch, float_reggroup); | |
1702 | reggroup_add (gdbarch, all_reggroup); | |
1703 | reggroup_add (gdbarch, save_reggroup); | |
1704 | reggroup_add (gdbarch, restore_reggroup); | |
1705 | reggroup_add (gdbarch, vector_reggroup); | |
1706 | reggroup_add (gdbarch, system_reggroup); | |
1707 | } | |
1708 | ||
1709 | int | |
1710 | i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
1711 | struct reggroup *group) | |
1712 | { | |
1713 | int sse_regnum_p = (i386_sse_regnum_p (regnum) | |
1714 | || i386_mxcsr_regnum_p (regnum)); | |
1715 | int fp_regnum_p = (i386_fp_regnum_p (regnum) | |
1716 | || i386_fpc_regnum_p (regnum)); | |
1717 | int mmx_regnum_p = (i386_mmx_regnum_p (regnum)); | |
acd5c798 | 1718 | |
38c968cf AC |
1719 | if (group == i386_mmx_reggroup) |
1720 | return mmx_regnum_p; | |
1721 | if (group == i386_sse_reggroup) | |
1722 | return sse_regnum_p; | |
1723 | if (group == vector_reggroup) | |
1724 | return (mmx_regnum_p || sse_regnum_p); | |
1725 | if (group == float_reggroup) | |
1726 | return fp_regnum_p; | |
1727 | if (group == general_reggroup) | |
1728 | return (!fp_regnum_p && !mmx_regnum_p && !sse_regnum_p); | |
acd5c798 | 1729 | |
38c968cf AC |
1730 | return default_register_reggroup_p (gdbarch, regnum, group); |
1731 | } | |
38c968cf | 1732 | \f |
acd5c798 | 1733 | |
f837910f MK |
1734 | /* Get the ARGIth function argument for the current function. */ |
1735 | ||
42c466d7 | 1736 | static CORE_ADDR |
143985b7 AF |
1737 | i386_fetch_pointer_argument (struct frame_info *frame, int argi, |
1738 | struct type *type) | |
1739 | { | |
f837910f MK |
1740 | CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM); |
1741 | return read_memory_unsigned_integer (sp + (4 * (argi + 1)), 4); | |
143985b7 AF |
1742 | } |
1743 | ||
1744 | \f | |
3a1e71e3 | 1745 | static struct gdbarch * |
a62cc96e AC |
1746 | i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1747 | { | |
cd3c07fc | 1748 | struct gdbarch_tdep *tdep; |
a62cc96e AC |
1749 | struct gdbarch *gdbarch; |
1750 | ||
4be87837 DJ |
1751 | /* If there is already a candidate, use it. */ |
1752 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1753 | if (arches != NULL) | |
1754 | return arches->gdbarch; | |
a62cc96e AC |
1755 | |
1756 | /* Allocate space for the new architecture. */ | |
1757 | tdep = XMALLOC (struct gdbarch_tdep); | |
1758 | gdbarch = gdbarch_alloc (&info, tdep); | |
1759 | ||
49ed40de KB |
1760 | /* The i386 default settings now include the SSE registers. |
1761 | I386_NUM_XREGS includes mxcsr, and we don't want to count | |
1762 | this as one of the xmm regs -- which is why we subtract one. | |
1763 | ||
1764 | Note: kevinb/2003-07-14: Whatever Mark's concerns are about the | |
1765 | FPU registers in the FIXME below apply to the SSE registers as well. | |
1766 | The only problem that I see is that these registers will show up | |
1767 | in "info all-registers" even on CPUs where they don't exist. IMO, | |
1768 | however, if it's a choice between printing them always (even when | |
1769 | they don't exist) or never showing them to the user (even when they | |
1770 | do exist), I prefer the former over the latter. Ideally, of course, | |
1771 | we'd somehow autodetect that we have them (or not) and display them | |
1772 | when we have them and suppress them when we don't. | |
1773 | ||
356a6b3e MK |
1774 | FIXME: kettenis/20020614: They do include the FPU registers for |
1775 | now, which probably is not quite right. */ | |
49ed40de | 1776 | tdep->num_xmm_regs = I386_NUM_XREGS - 1; |
d2a7c97a | 1777 | |
8201327c MK |
1778 | tdep->jb_pc_offset = -1; |
1779 | tdep->struct_return = pcc_struct_return; | |
8201327c MK |
1780 | tdep->sigtramp_start = 0; |
1781 | tdep->sigtramp_end = 0; | |
21d0e8a4 | 1782 | tdep->sigcontext_addr = NULL; |
a3386186 | 1783 | tdep->sc_reg_offset = NULL; |
8201327c | 1784 | tdep->sc_pc_offset = -1; |
21d0e8a4 | 1785 | tdep->sc_sp_offset = -1; |
8201327c | 1786 | |
896fb97d MK |
1787 | /* The format used for `long double' on almost all i386 targets is |
1788 | the i387 extended floating-point format. In fact, of all targets | |
1789 | in the GCC 2.95 tree, only OSF/1 does it different, and insists | |
1790 | on having a `long double' that's not `long' at all. */ | |
1791 | set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext); | |
21d0e8a4 | 1792 | |
66da5fd8 | 1793 | /* Although the i387 extended floating-point has only 80 significant |
896fb97d MK |
1794 | bits, a `long double' actually takes up 96, probably to enforce |
1795 | alignment. */ | |
1796 | set_gdbarch_long_double_bit (gdbarch, 96); | |
1797 | ||
49ed40de KB |
1798 | /* The default ABI includes general-purpose registers, |
1799 | floating-point registers, and the SSE registers. */ | |
1800 | set_gdbarch_num_regs (gdbarch, I386_SSE_NUM_REGS); | |
acd5c798 MK |
1801 | set_gdbarch_register_name (gdbarch, i386_register_name); |
1802 | set_gdbarch_register_type (gdbarch, i386_register_type); | |
21d0e8a4 | 1803 | |
acd5c798 MK |
1804 | /* Register numbers of various important registers. */ |
1805 | set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */ | |
1806 | set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */ | |
1807 | set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */ | |
1808 | set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */ | |
356a6b3e MK |
1809 | |
1810 | /* Use the "default" register numbering scheme for stabs and COFF. */ | |
1811 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1812 | set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1813 | ||
1814 | /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */ | |
1815 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1816 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1817 | ||
1818 | /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to | |
1819 | be in use on any of the supported i386 targets. */ | |
1820 | ||
61113f8b MK |
1821 | set_gdbarch_print_float_info (gdbarch, i387_print_float_info); |
1822 | ||
8201327c | 1823 | set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target); |
96297dab | 1824 | |
a62cc96e | 1825 | /* Call dummy code. */ |
acd5c798 | 1826 | set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call); |
a62cc96e | 1827 | |
ff2e87ac AC |
1828 | set_gdbarch_convert_register_p (gdbarch, i386_convert_register_p); |
1829 | set_gdbarch_register_to_value (gdbarch, i386_register_to_value); | |
1830 | set_gdbarch_value_to_register (gdbarch, i386_value_to_register); | |
b6197528 | 1831 | |
00f8375e | 1832 | set_gdbarch_extract_return_value (gdbarch, i386_extract_return_value); |
3d7f4f49 | 1833 | set_gdbarch_store_return_value (gdbarch, i386_store_return_value); |
00f8375e | 1834 | set_gdbarch_extract_struct_value_address (gdbarch, |
fc08ec52 | 1835 | i386_extract_struct_value_address); |
8201327c MK |
1836 | set_gdbarch_use_struct_convention (gdbarch, i386_use_struct_convention); |
1837 | ||
93924b6b MK |
1838 | set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue); |
1839 | ||
1840 | /* Stack grows downward. */ | |
1841 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1842 | ||
1843 | set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc); | |
1844 | set_gdbarch_decr_pc_after_break (gdbarch, 1); | |
1845 | set_gdbarch_function_start_offset (gdbarch, 0); | |
42fdc8df | 1846 | |
42fdc8df | 1847 | set_gdbarch_frame_args_skip (gdbarch, 8); |
8201327c MK |
1848 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_pc_in_sigtramp); |
1849 | ||
28fc6740 | 1850 | /* Wire in the MMX registers. */ |
0f751ff2 | 1851 | set_gdbarch_num_pseudo_regs (gdbarch, i386_num_mmx_regs); |
28fc6740 AC |
1852 | set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read); |
1853 | set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write); | |
1854 | ||
5e3397bb MK |
1855 | set_gdbarch_print_insn (gdbarch, i386_print_insn); |
1856 | ||
acd5c798 | 1857 | set_gdbarch_unwind_dummy_id (gdbarch, i386_unwind_dummy_id); |
acd5c798 MK |
1858 | |
1859 | set_gdbarch_unwind_pc (gdbarch, i386_unwind_pc); | |
1860 | ||
38c968cf AC |
1861 | /* Add the i386 register groups. */ |
1862 | i386_add_reggroups (gdbarch); | |
1863 | set_gdbarch_register_reggroup_p (gdbarch, i386_register_reggroup_p); | |
1864 | ||
143985b7 AF |
1865 | /* Helper for function argument information. */ |
1866 | set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument); | |
1867 | ||
6405b0a6 | 1868 | /* Hook in the DWARF CFI frame unwinder. */ |
336d1bba | 1869 | frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); |
6405b0a6 | 1870 | |
acd5c798 | 1871 | frame_base_set_default (gdbarch, &i386_frame_base); |
6c0e89ed | 1872 | |
3ce1502b | 1873 | /* Hook in ABI-specific overrides, if they have been registered. */ |
4be87837 | 1874 | gdbarch_init_osabi (info, gdbarch); |
3ce1502b | 1875 | |
336d1bba AC |
1876 | frame_unwind_append_sniffer (gdbarch, i386_sigtramp_frame_sniffer); |
1877 | frame_unwind_append_sniffer (gdbarch, i386_frame_sniffer); | |
acd5c798 | 1878 | |
a62cc96e AC |
1879 | return gdbarch; |
1880 | } | |
1881 | ||
8201327c MK |
1882 | static enum gdb_osabi |
1883 | i386_coff_osabi_sniffer (bfd *abfd) | |
1884 | { | |
762c5349 MK |
1885 | if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0 |
1886 | || strcmp (bfd_get_target (abfd), "coff-go32") == 0) | |
8201327c MK |
1887 | return GDB_OSABI_GO32; |
1888 | ||
1889 | return GDB_OSABI_UNKNOWN; | |
1890 | } | |
1891 | ||
1892 | static enum gdb_osabi | |
1893 | i386_nlm_osabi_sniffer (bfd *abfd) | |
1894 | { | |
1895 | return GDB_OSABI_NETWARE; | |
1896 | } | |
1897 | \f | |
1898 | ||
28e9e0f0 MK |
1899 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1900 | void _initialize_i386_tdep (void); | |
1901 | ||
c906108c | 1902 | void |
fba45db2 | 1903 | _initialize_i386_tdep (void) |
c906108c | 1904 | { |
a62cc96e AC |
1905 | register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init); |
1906 | ||
fc338970 | 1907 | /* Add the variable that controls the disassembly flavor. */ |
917317f4 JM |
1908 | { |
1909 | struct cmd_list_element *new_cmd; | |
7a292a7a | 1910 | |
917317f4 JM |
1911 | new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class, |
1912 | valid_flavors, | |
1ed2a135 | 1913 | &disassembly_flavor, |
fc338970 MK |
1914 | "\ |
1915 | Set the disassembly flavor, the valid values are \"att\" and \"intel\", \ | |
c906108c | 1916 | and the default value is \"att\".", |
917317f4 | 1917 | &setlist); |
917317f4 JM |
1918 | add_show_from_set (new_cmd, &showlist); |
1919 | } | |
8201327c MK |
1920 | |
1921 | /* Add the variable that controls the convention for returning | |
1922 | structs. */ | |
1923 | { | |
1924 | struct cmd_list_element *new_cmd; | |
1925 | ||
1926 | new_cmd = add_set_enum_cmd ("struct-convention", no_class, | |
5e3397bb | 1927 | valid_conventions, |
8201327c MK |
1928 | &struct_convention, "\ |
1929 | Set the convention for returning small structs, valid values \ | |
1930 | are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".", | |
1931 | &setlist); | |
1932 | add_show_from_set (new_cmd, &showlist); | |
1933 | } | |
1934 | ||
1935 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour, | |
1936 | i386_coff_osabi_sniffer); | |
1937 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_nlm_flavour, | |
1938 | i386_nlm_osabi_sniffer); | |
1939 | ||
05816f70 | 1940 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4, |
8201327c | 1941 | i386_svr4_init_abi); |
05816f70 | 1942 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_GO32, |
8201327c | 1943 | i386_go32_init_abi); |
05816f70 | 1944 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_NETWARE, |
8201327c | 1945 | i386_nw_init_abi); |
38c968cf AC |
1946 | |
1947 | /* Initialize the i386 specific register groups. */ | |
1948 | i386_init_reggroups (); | |
c906108c | 1949 | } |