2000-03-08 Mark Kettenis <kettenis@gnu.org>
[deliverable/binutils-gdb.git] / gdb / i386-tdep.c
CommitLineData
c906108c
SS
1/* Intel 386 target-dependent stuff.
2 Copyright (C) 1988, 1989, 1991, 1994, 1995, 1996, 1998
3 Free Software Foundation, Inc.
4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
23#include "gdb_string.h"
24#include "frame.h"
25#include "inferior.h"
26#include "gdbcore.h"
27#include "target.h"
28#include "floatformat.h"
29#include "symtab.h"
30#include "gdbcmd.h"
31#include "command.h"
32
33static long i386_get_frame_setup PARAMS ((CORE_ADDR));
34
35static void i386_follow_jump PARAMS ((void));
36
37static void codestream_read PARAMS ((unsigned char *, int));
38
39static void codestream_seek PARAMS ((CORE_ADDR));
40
41static unsigned char codestream_fill PARAMS ((int));
42
43CORE_ADDR skip_trampoline_code PARAMS ((CORE_ADDR, char *));
44
45static int gdb_print_insn_i386 (bfd_vma, disassemble_info *);
46
47void _initialize_i386_tdep PARAMS ((void));
48
917317f4
JM
49/* i386_register_byte[i] is the offset into the register file of the
50 start of register number i. We initialize this from
51 i386_register_raw_size. */
52int i386_register_byte[MAX_NUM_REGS];
53
ceb4951f
JB
54/* i386_register_raw_size[i] is the number of bytes of storage in
55 GDB's register array occupied by register i. */
917317f4
JM
56int i386_register_raw_size[MAX_NUM_REGS] = {
57 4, 4, 4, 4,
58 4, 4, 4, 4,
59 4, 4, 4, 4,
60 4, 4, 4, 4,
61 10, 10, 10, 10,
62 10, 10, 10, 10,
63 4, 4, 4, 4,
64 4, 4, 4, 4,
65 16, 16, 16, 16,
66 16, 16, 16, 16,
67 4
68};
69
70/* i386_register_virtual_size[i] is the size in bytes of the virtual
71 type of register i. */
72int i386_register_virtual_size[MAX_NUM_REGS];
73
74
c906108c 75/* This is the variable the is set with "set disassembly-flavor",
c5aa993b 76 and its legitimate values. */
c906108c
SS
77static char att_flavor[] = "att";
78static char intel_flavor[] = "intel";
c5aa993b
JM
79static char *valid_flavors[] =
80{
c906108c
SS
81 att_flavor,
82 intel_flavor,
83 NULL
84};
85static char *disassembly_flavor = att_flavor;
86
d4f3574e
SS
87static void i386_print_register PARAMS ((char *, int, int));
88
7a292a7a
SS
89/* This is used to keep the bfd arch_info in sync with the disassembly flavor. */
90static void set_disassembly_flavor_sfunc PARAMS ((char *, int, struct cmd_list_element *));
d4f3574e 91static void set_disassembly_flavor PARAMS ((void));
7a292a7a 92
c906108c
SS
93/* Stdio style buffering was used to minimize calls to ptrace, but this
94 buffering did not take into account that the code section being accessed
95 may not be an even number of buffers long (even if the buffer is only
96 sizeof(int) long). In cases where the code section size happened to
97 be a non-integral number of buffers long, attempting to read the last
98 buffer would fail. Simply using target_read_memory and ignoring errors,
99 rather than read_memory, is not the correct solution, since legitimate
100 access errors would then be totally ignored. To properly handle this
101 situation and continue to use buffering would require that this code
102 be able to determine the minimum code section size granularity (not the
103 alignment of the section itself, since the actual failing case that
104 pointed out this problem had a section alignment of 4 but was not a
105 multiple of 4 bytes long), on a target by target basis, and then
106 adjust it's buffer size accordingly. This is messy, but potentially
107 feasible. It probably needs the bfd library's help and support. For
108 now, the buffer size is set to 1. (FIXME -fnf) */
109
110#define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */
111static CORE_ADDR codestream_next_addr;
112static CORE_ADDR codestream_addr;
113static unsigned char codestream_buf[CODESTREAM_BUFSIZ];
114static int codestream_off;
115static int codestream_cnt;
116
117#define codestream_tell() (codestream_addr + codestream_off)
118#define codestream_peek() (codestream_cnt == 0 ? \
119 codestream_fill(1): codestream_buf[codestream_off])
120#define codestream_get() (codestream_cnt-- == 0 ? \
121 codestream_fill(0) : codestream_buf[codestream_off++])
122
c5aa993b 123static unsigned char
c906108c 124codestream_fill (peek_flag)
c5aa993b 125 int peek_flag;
c906108c
SS
126{
127 codestream_addr = codestream_next_addr;
128 codestream_next_addr += CODESTREAM_BUFSIZ;
129 codestream_off = 0;
130 codestream_cnt = CODESTREAM_BUFSIZ;
131 read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ);
c5aa993b 132
c906108c 133 if (peek_flag)
c5aa993b 134 return (codestream_peek ());
c906108c 135 else
c5aa993b 136 return (codestream_get ());
c906108c
SS
137}
138
139static void
140codestream_seek (place)
c5aa993b 141 CORE_ADDR place;
c906108c
SS
142{
143 codestream_next_addr = place / CODESTREAM_BUFSIZ;
144 codestream_next_addr *= CODESTREAM_BUFSIZ;
145 codestream_cnt = 0;
146 codestream_fill (1);
c5aa993b 147 while (codestream_tell () != place)
c906108c
SS
148 codestream_get ();
149}
150
151static void
152codestream_read (buf, count)
153 unsigned char *buf;
154 int count;
155{
156 unsigned char *p;
157 int i;
158 p = buf;
159 for (i = 0; i < count; i++)
160 *p++ = codestream_get ();
161}
162
163/* next instruction is a jump, move to target */
164
165static void
166i386_follow_jump ()
167{
168 unsigned char buf[4];
169 long delta;
170
171 int data16;
172 CORE_ADDR pos;
173
174 pos = codestream_tell ();
175
176 data16 = 0;
177 if (codestream_peek () == 0x66)
178 {
179 codestream_get ();
180 data16 = 1;
181 }
182
183 switch (codestream_get ())
184 {
185 case 0xe9:
186 /* relative jump: if data16 == 0, disp32, else disp16 */
187 if (data16)
188 {
189 codestream_read (buf, 2);
190 delta = extract_signed_integer (buf, 2);
191
192 /* include size of jmp inst (including the 0x66 prefix). */
c5aa993b 193 pos += delta + 4;
c906108c
SS
194 }
195 else
196 {
197 codestream_read (buf, 4);
198 delta = extract_signed_integer (buf, 4);
199
200 pos += delta + 5;
201 }
202 break;
203 case 0xeb:
204 /* relative jump, disp8 (ignore data16) */
205 codestream_read (buf, 1);
206 /* Sign-extend it. */
207 delta = extract_signed_integer (buf, 1);
208
209 pos += delta + 2;
210 break;
211 }
212 codestream_seek (pos);
213}
214
215/*
216 * find & return amound a local space allocated, and advance codestream to
217 * first register push (if any)
218 *
219 * if entry sequence doesn't make sense, return -1, and leave
220 * codestream pointer random
221 */
222
223static long
224i386_get_frame_setup (pc)
225 CORE_ADDR pc;
226{
227 unsigned char op;
228
229 codestream_seek (pc);
230
231 i386_follow_jump ();
232
233 op = codestream_get ();
234
235 if (op == 0x58) /* popl %eax */
236 {
237 /*
238 * this function must start with
239 *
c5aa993b 240 * popl %eax 0x58
c906108c
SS
241 * xchgl %eax, (%esp) 0x87 0x04 0x24
242 * or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
243 *
244 * (the system 5 compiler puts out the second xchg
245 * inst, and the assembler doesn't try to optimize it,
246 * so the 'sib' form gets generated)
247 *
248 * this sequence is used to get the address of the return
249 * buffer for a function that returns a structure
250 */
251 int pos;
252 unsigned char buf[4];
c5aa993b
JM
253 static unsigned char proto1[3] =
254 {0x87, 0x04, 0x24};
255 static unsigned char proto2[4] =
256 {0x87, 0x44, 0x24, 0x00};
c906108c
SS
257 pos = codestream_tell ();
258 codestream_read (buf, 4);
259 if (memcmp (buf, proto1, 3) == 0)
260 pos += 3;
261 else if (memcmp (buf, proto2, 4) == 0)
262 pos += 4;
263
264 codestream_seek (pos);
c5aa993b 265 op = codestream_get (); /* update next opcode */
c906108c
SS
266 }
267
268 if (op == 0x68 || op == 0x6a)
269 {
270 /*
271 * this function may start with
272 *
273 * pushl constant
274 * call _probe
275 * addl $4, %esp
276 * followed by
277 * pushl %ebp
278 * etc.
279 */
280 int pos;
281 unsigned char buf[8];
282
283 /* Skip past the pushl instruction; it has either a one-byte
284 or a four-byte operand, depending on the opcode. */
285 pos = codestream_tell ();
286 if (op == 0x68)
287 pos += 4;
288 else
289 pos += 1;
290 codestream_seek (pos);
291
292 /* Read the following 8 bytes, which should be "call _probe" (6 bytes)
293 followed by "addl $4,%esp" (2 bytes). */
294 codestream_read (buf, sizeof (buf));
295 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
296 pos += sizeof (buf);
297 codestream_seek (pos);
c5aa993b 298 op = codestream_get (); /* update next opcode */
c906108c
SS
299 }
300
301 if (op == 0x55) /* pushl %ebp */
c5aa993b 302 {
c906108c
SS
303 /* check for movl %esp, %ebp - can be written two ways */
304 switch (codestream_get ())
305 {
306 case 0x8b:
307 if (codestream_get () != 0xec)
308 return (-1);
309 break;
310 case 0x89:
311 if (codestream_get () != 0xe5)
312 return (-1);
313 break;
314 default:
315 return (-1);
316 }
317 /* check for stack adjustment
c5aa993b 318
c906108c
SS
319 * subl $XXX, %esp
320 *
321 * note: you can't subtract a 16 bit immediate
322 * from a 32 bit reg, so we don't have to worry
323 * about a data16 prefix
324 */
325 op = codestream_peek ();
326 if (op == 0x83)
327 {
328 /* subl with 8 bit immed */
329 codestream_get ();
330 if (codestream_get () != 0xec)
331 /* Some instruction starting with 0x83 other than subl. */
332 {
333 codestream_seek (codestream_tell () - 2);
334 return 0;
335 }
336 /* subl with signed byte immediate
337 * (though it wouldn't make sense to be negative)
338 */
c5aa993b 339 return (codestream_get ());
c906108c
SS
340 }
341 else if (op == 0x81)
342 {
343 char buf[4];
344 /* Maybe it is subl with 32 bit immedediate. */
c5aa993b 345 codestream_get ();
c906108c
SS
346 if (codestream_get () != 0xec)
347 /* Some instruction starting with 0x81 other than subl. */
348 {
349 codestream_seek (codestream_tell () - 2);
350 return 0;
351 }
352 /* It is subl with 32 bit immediate. */
c5aa993b 353 codestream_read ((unsigned char *) buf, 4);
c906108c
SS
354 return extract_signed_integer (buf, 4);
355 }
356 else
357 {
358 return (0);
359 }
360 }
361 else if (op == 0xc8)
362 {
363 char buf[2];
364 /* enter instruction: arg is 16 bit unsigned immed */
c5aa993b
JM
365 codestream_read ((unsigned char *) buf, 2);
366 codestream_get (); /* flush final byte of enter instruction */
c906108c
SS
367 return extract_unsigned_integer (buf, 2);
368 }
369 return (-1);
370}
371
372/* Return number of args passed to a frame.
373 Can return -1, meaning no way to tell. */
374
375int
376i386_frame_num_args (fi)
377 struct frame_info *fi;
378{
379#if 1
380 return -1;
381#else
382 /* This loses because not only might the compiler not be popping the
383 args right after the function call, it might be popping args from both
384 this call and a previous one, and we would say there are more args
385 than there really are. */
386
c5aa993b
JM
387 int retpc;
388 unsigned char op;
c906108c
SS
389 struct frame_info *pfi;
390
391 /* on the 386, the instruction following the call could be:
392 popl %ecx - one arg
393 addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits
394 anything else - zero args */
395
396 int frameless;
397
392a587b 398 frameless = FRAMELESS_FUNCTION_INVOCATION (fi);
c906108c
SS
399 if (frameless)
400 /* In the absence of a frame pointer, GDB doesn't get correct values
401 for nameless arguments. Return -1, so it doesn't print any
402 nameless arguments. */
403 return -1;
404
c5aa993b 405 pfi = get_prev_frame (fi);
c906108c
SS
406 if (pfi == 0)
407 {
408 /* Note: this can happen if we are looking at the frame for
c5aa993b
JM
409 main, because FRAME_CHAIN_VALID won't let us go into
410 start. If we have debugging symbols, that's not really
411 a big deal; it just means it will only show as many arguments
412 to main as are declared. */
c906108c
SS
413 return -1;
414 }
415 else
416 {
c5aa993b
JM
417 retpc = pfi->pc;
418 op = read_memory_integer (retpc, 1);
419 if (op == 0x59)
420 /* pop %ecx */
421 return 1;
c906108c
SS
422 else if (op == 0x83)
423 {
c5aa993b
JM
424 op = read_memory_integer (retpc + 1, 1);
425 if (op == 0xc4)
426 /* addl $<signed imm 8 bits>, %esp */
427 return (read_memory_integer (retpc + 2, 1) & 0xff) / 4;
c906108c
SS
428 else
429 return 0;
430 }
431 else if (op == 0x81)
c5aa993b
JM
432 { /* add with 32 bit immediate */
433 op = read_memory_integer (retpc + 1, 1);
434 if (op == 0xc4)
435 /* addl $<imm 32>, %esp */
436 return read_memory_integer (retpc + 2, 4) / 4;
c906108c
SS
437 else
438 return 0;
439 }
440 else
441 {
442 return 0;
443 }
444 }
445#endif
446}
447
448/*
449 * parse the first few instructions of the function to see
450 * what registers were stored.
451 *
452 * We handle these cases:
453 *
454 * The startup sequence can be at the start of the function,
455 * or the function can start with a branch to startup code at the end.
456 *
457 * %ebp can be set up with either the 'enter' instruction, or
458 * 'pushl %ebp, movl %esp, %ebp' (enter is too slow to be useful,
459 * but was once used in the sys5 compiler)
460 *
461 * Local space is allocated just below the saved %ebp by either the
462 * 'enter' instruction, or by 'subl $<size>, %esp'. 'enter' has
463 * a 16 bit unsigned argument for space to allocate, and the
464 * 'addl' instruction could have either a signed byte, or
465 * 32 bit immediate.
466 *
467 * Next, the registers used by this function are pushed. In
468 * the sys5 compiler they will always be in the order: %edi, %esi, %ebx
469 * (and sometimes a harmless bug causes it to also save but not restore %eax);
470 * however, the code below is willing to see the pushes in any order,
471 * and will handle up to 8 of them.
472 *
473 * If the setup sequence is at the end of the function, then the
474 * next instruction will be a branch back to the start.
475 */
476
477void
1211c4e4 478i386_frame_init_saved_regs (fip)
c906108c 479 struct frame_info *fip;
c906108c
SS
480{
481 long locals = -1;
482 unsigned char op;
483 CORE_ADDR dummy_bottom;
484 CORE_ADDR adr;
485 CORE_ADDR pc;
486 int i;
c5aa993b 487
1211c4e4
AC
488 if (fip->saved_regs)
489 return;
490
491 frame_saved_regs_zalloc (fip);
c5aa993b 492
c906108c
SS
493 /* if frame is the end of a dummy, compute where the
494 * beginning would be
495 */
496 dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH;
c5aa993b 497
c906108c 498 /* check if the PC is in the stack, in a dummy frame */
c5aa993b 499 if (dummy_bottom <= fip->pc && fip->pc <= fip->frame)
c906108c
SS
500 {
501 /* all regs were saved by push_call_dummy () */
502 adr = fip->frame;
c5aa993b 503 for (i = 0; i < NUM_REGS; i++)
c906108c
SS
504 {
505 adr -= REGISTER_RAW_SIZE (i);
1211c4e4 506 fip->saved_regs[i] = adr;
c906108c
SS
507 }
508 return;
509 }
c5aa993b 510
c906108c
SS
511 pc = get_pc_function_start (fip->pc);
512 if (pc != 0)
513 locals = i386_get_frame_setup (pc);
c5aa993b
JM
514
515 if (locals >= 0)
c906108c
SS
516 {
517 adr = fip->frame - 4 - locals;
c5aa993b 518 for (i = 0; i < 8; i++)
c906108c
SS
519 {
520 op = codestream_get ();
521 if (op < 0x50 || op > 0x57)
522 break;
523#ifdef I386_REGNO_TO_SYMMETRY
524 /* Dynix uses different internal numbering. Ick. */
1211c4e4 525 fip->saved_regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = adr;
c906108c 526#else
1211c4e4 527 fip->saved_regs[op - 0x50] = adr;
c906108c
SS
528#endif
529 adr -= 4;
530 }
531 }
c5aa993b 532
1211c4e4
AC
533 fip->saved_regs[PC_REGNUM] = fip->frame + 4;
534 fip->saved_regs[FP_REGNUM] = fip->frame;
c906108c
SS
535}
536
537/* return pc of first real instruction */
538
539int
540i386_skip_prologue (pc)
541 int pc;
542{
543 unsigned char op;
544 int i;
c5aa993b
JM
545 static unsigned char pic_pat[6] =
546 {0xe8, 0, 0, 0, 0, /* call 0x0 */
547 0x5b, /* popl %ebx */
548 };
c906108c 549 CORE_ADDR pos;
c5aa993b 550
c906108c
SS
551 if (i386_get_frame_setup (pc) < 0)
552 return (pc);
c5aa993b 553
c906108c
SS
554 /* found valid frame setup - codestream now points to
555 * start of push instructions for saving registers
556 */
c5aa993b 557
c906108c
SS
558 /* skip over register saves */
559 for (i = 0; i < 8; i++)
560 {
561 op = codestream_peek ();
562 /* break if not pushl inst */
c5aa993b 563 if (op < 0x50 || op > 0x57)
c906108c
SS
564 break;
565 codestream_get ();
566 }
567
568 /* The native cc on SVR4 in -K PIC mode inserts the following code to get
569 the address of the global offset table (GOT) into register %ebx.
c5aa993b
JM
570 call 0x0
571 popl %ebx
572 movl %ebx,x(%ebp) (optional)
573 addl y,%ebx
c906108c
SS
574 This code is with the rest of the prologue (at the end of the
575 function), so we have to skip it to get to the first real
576 instruction at the start of the function. */
c5aa993b 577
c906108c
SS
578 pos = codestream_tell ();
579 for (i = 0; i < 6; i++)
580 {
581 op = codestream_get ();
c5aa993b 582 if (pic_pat[i] != op)
c906108c
SS
583 break;
584 }
585 if (i == 6)
586 {
587 unsigned char buf[4];
588 long delta = 6;
589
590 op = codestream_get ();
c5aa993b 591 if (op == 0x89) /* movl %ebx, x(%ebp) */
c906108c
SS
592 {
593 op = codestream_get ();
c5aa993b 594 if (op == 0x5d) /* one byte offset from %ebp */
c906108c
SS
595 {
596 delta += 3;
597 codestream_read (buf, 1);
598 }
c5aa993b 599 else if (op == 0x9d) /* four byte offset from %ebp */
c906108c
SS
600 {
601 delta += 6;
602 codestream_read (buf, 4);
603 }
c5aa993b
JM
604 else /* unexpected instruction */
605 delta = -1;
606 op = codestream_get ();
c906108c 607 }
c5aa993b
JM
608 /* addl y,%ebx */
609 if (delta > 0 && op == 0x81 && codestream_get () == 0xc3)
c906108c 610 {
c5aa993b 611 pos += delta + 6;
c906108c
SS
612 }
613 }
614 codestream_seek (pos);
c5aa993b 615
c906108c 616 i386_follow_jump ();
c5aa993b 617
c906108c
SS
618 return (codestream_tell ());
619}
620
621void
622i386_push_dummy_frame ()
623{
624 CORE_ADDR sp = read_register (SP_REGNUM);
625 int regnum;
626 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 627
c906108c
SS
628 sp = push_word (sp, read_register (PC_REGNUM));
629 sp = push_word (sp, read_register (FP_REGNUM));
630 write_register (FP_REGNUM, sp);
631 for (regnum = 0; regnum < NUM_REGS; regnum++)
632 {
633 read_register_gen (regnum, regbuf);
634 sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum));
635 }
636 write_register (SP_REGNUM, sp);
637}
638
639void
640i386_pop_frame ()
641{
642 struct frame_info *frame = get_current_frame ();
643 CORE_ADDR fp;
644 int regnum;
c906108c 645 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 646
c906108c 647 fp = FRAME_FP (frame);
1211c4e4
AC
648 i386_frame_init_saved_regs (frame);
649
c5aa993b 650 for (regnum = 0; regnum < NUM_REGS; regnum++)
c906108c
SS
651 {
652 CORE_ADDR adr;
1211c4e4 653 adr = frame->saved_regs[regnum];
c906108c
SS
654 if (adr)
655 {
656 read_memory (adr, regbuf, REGISTER_RAW_SIZE (regnum));
657 write_register_bytes (REGISTER_BYTE (regnum), regbuf,
658 REGISTER_RAW_SIZE (regnum));
659 }
660 }
661 write_register (FP_REGNUM, read_memory_integer (fp, 4));
662 write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
663 write_register (SP_REGNUM, fp + 8);
664 flush_cached_frames ();
665}
666
667#ifdef GET_LONGJMP_TARGET
668
669/* Figure out where the longjmp will land. Slurp the args out of the stack.
670 We expect the first arg to be a pointer to the jmp_buf structure from which
671 we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
672 This routine returns true on success. */
673
674int
c5aa993b 675get_longjmp_target (pc)
c906108c
SS
676 CORE_ADDR *pc;
677{
678 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
679 CORE_ADDR sp, jb_addr;
680
681 sp = read_register (SP_REGNUM);
682
c5aa993b 683 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack */
c906108c
SS
684 buf,
685 TARGET_PTR_BIT / TARGET_CHAR_BIT))
686 return 0;
687
688 jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
689
690 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
691 TARGET_PTR_BIT / TARGET_CHAR_BIT))
692 return 0;
693
694 *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
695
696 return 1;
697}
698
699#endif /* GET_LONGJMP_TARGET */
700
701void
c5aa993b 702i386_extract_return_value (type, regbuf, valbuf)
c906108c
SS
703 struct type *type;
704 char regbuf[REGISTER_BYTES];
705 char *valbuf;
706{
02409499
AC
707 /* On AIX, i386 GNU/Linux and DJGPP, floating point values are
708 returned in floating point registers. */
709 /* FIXME: cagney/2000-02-29: This function needs to be rewritten
710 using multi-arch. Please don't keep adding to this #ifdef
711 spaghetti. */
712#if defined(I386_AIX_TARGET) || defined(I386_GNULINUX_TARGET) || defined(I386_DJGPP_TARGET)
c5aa993b 713 if (TYPE_CODE_FLT == TYPE_CODE (type))
c906108c
SS
714 {
715 double d;
716 /* 387 %st(0), gcc uses this */
717 floatformat_to_double (&floatformat_i387_ext,
c2c6d25f
JM
718#if defined(FPDATA_REGNUM)
719 &regbuf[REGISTER_BYTE (FPDATA_REGNUM)],
720#else /* !FPDATA_REGNUM */
721 &regbuf[REGISTER_BYTE (FP0_REGNUM)],
722#endif /* FPDATA_REGNUM */
723
c906108c
SS
724 &d);
725 store_floating (valbuf, TYPE_LENGTH (type), d);
726 }
727 else
02409499 728#endif /* I386_AIX_TARGET || I386_GNULINUX_TARGET || I386_DJGPP_TARGET */
c5aa993b 729 {
c2c6d25f 730#if defined(LOW_RETURN_REGNUM)
d4f3574e
SS
731 int len = TYPE_LENGTH (type);
732 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
733 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
734
735 if (len <= low_size)
736 memcpy (valbuf, regbuf + REGISTER_BYTE (LOW_RETURN_REGNUM), len);
737 else if (len <= (low_size + high_size))
738 {
739 memcpy (valbuf,
740 regbuf + REGISTER_BYTE (LOW_RETURN_REGNUM),
741 low_size);
742 memcpy (valbuf + low_size,
743 regbuf + REGISTER_BYTE (HIGH_RETURN_REGNUM),
744 len - low_size);
745 }
746 else
747 error ("GDB bug: i386-tdep.c (i386_extract_return_value): Don't know how to find a return value %d bytes long", len);
c2c6d25f
JM
748#else /* !LOW_RETURN_REGNUM */
749 memcpy (valbuf, regbuf, TYPE_LENGTH (type));
750#endif /* LOW_RETURN_REGNUM */
c906108c
SS
751 }
752}
753
754#ifdef I386V4_SIGTRAMP_SAVED_PC
755/* Get saved user PC for sigtramp from the pushed ucontext on the stack
756 for all three variants of SVR4 sigtramps. */
757
758CORE_ADDR
759i386v4_sigtramp_saved_pc (frame)
760 struct frame_info *frame;
761{
762 CORE_ADDR saved_pc_offset = 4;
763 char *name = NULL;
764
765 find_pc_partial_function (frame->pc, &name, NULL, NULL);
766 if (name)
767 {
768 if (STREQ (name, "_sigreturn"))
769 saved_pc_offset = 132 + 14 * 4;
770 else if (STREQ (name, "_sigacthandler"))
771 saved_pc_offset = 80 + 14 * 4;
772 else if (STREQ (name, "sigvechandler"))
773 saved_pc_offset = 120 + 14 * 4;
774 }
775
776 if (frame->next)
777 return read_memory_integer (frame->next->frame + saved_pc_offset, 4);
778 return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4);
779}
780#endif /* I386V4_SIGTRAMP_SAVED_PC */
781
a0b3c4fd
JM
782#ifdef I386_LINUX_SIGTRAMP
783
45a816d9
MK
784/* Linux has two flavors of signals. Normal signal handlers, and
785 "realtime" (RT) signals. The RT signals can provide additional
786 information to the signal handler if the SA_SIGINFO flag is set
787 when establishing a signal handler using `sigaction'. It is not
788 unlikely that future versions of Linux will support SA_SIGINFO for
789 normal signals too. */
790
791/* When the i386 Linux kernel calls a signal handler and the
792 SA_RESTORER flag isn't set, the return address points to a bit of
793 code on the stack. This function returns whether the PC appears to
794 be within this bit of code.
795
796 The instruction sequence for normal signals is
a0b3c4fd
JM
797 pop %eax
798 mov $0x77,%eax
799 int $0x80
800 or 0x58 0xb8 0x77 0x00 0x00 0x00 0xcd 0x80.
801
802 Checking for the code sequence should be somewhat reliable, because
803 the effect is to call the system call sigreturn. This is unlikely
804 to occur anywhere other than a signal trampoline.
805
806 It kind of sucks that we have to read memory from the process in
807 order to identify a signal trampoline, but there doesn't seem to be
808 any other way. The IN_SIGTRAMP macro in tm-linux.h arranges to
809 only call us if no function name could be identified, which should
45a816d9
MK
810 be the case since the code is on the stack.
811
812 Detection of signal trampolines for handlers that set the
813 SA_RESTORER flag is in general not possible. Unfortunately this is
814 what the GNU C Library has been doing for quite some time now.
815 However, as of version 2.1.2, the GNU C Library uses signal
816 trampolines (named __restore and __restore_rt) that are identical
817 to the ones used by the kernel. Therefore, these trampolines are
818 supported too. */
a0b3c4fd
JM
819
820#define LINUX_SIGTRAMP_INSN0 (0x58) /* pop %eax */
821#define LINUX_SIGTRAMP_OFFSET0 (0)
822#define LINUX_SIGTRAMP_INSN1 (0xb8) /* mov $NNNN,%eax */
823#define LINUX_SIGTRAMP_OFFSET1 (1)
824#define LINUX_SIGTRAMP_INSN2 (0xcd) /* int */
825#define LINUX_SIGTRAMP_OFFSET2 (6)
826
827static const unsigned char linux_sigtramp_code[] =
828{
829 LINUX_SIGTRAMP_INSN0, /* pop %eax */
830 LINUX_SIGTRAMP_INSN1, 0x77, 0x00, 0x00, 0x00, /* mov $0x77,%eax */
831 LINUX_SIGTRAMP_INSN2, 0x80 /* int $0x80 */
832};
833
834#define LINUX_SIGTRAMP_LEN (sizeof linux_sigtramp_code)
835
836/* If PC is in a sigtramp routine, return the address of the start of
837 the routine. Otherwise, return 0. */
838
839static CORE_ADDR
45a816d9 840i386_linux_sigtramp_start (CORE_ADDR pc)
a0b3c4fd
JM
841{
842 unsigned char buf[LINUX_SIGTRAMP_LEN];
843
844 /* We only recognize a signal trampoline if PC is at the start of
845 one of the three instructions. We optimize for finding the PC at
846 the start, as will be the case when the trampoline is not the
847 first frame on the stack. We assume that in the case where the
848 PC is not at the start of the instruction sequence, there will be
849 a few trailing readable bytes on the stack. */
850
851 if (read_memory_nobpt (pc, (char *) buf, LINUX_SIGTRAMP_LEN) != 0)
852 return 0;
853
854 if (buf[0] != LINUX_SIGTRAMP_INSN0)
855 {
856 int adjust;
857
858 switch (buf[0])
859 {
860 case LINUX_SIGTRAMP_INSN1:
861 adjust = LINUX_SIGTRAMP_OFFSET1;
862 break;
863 case LINUX_SIGTRAMP_INSN2:
864 adjust = LINUX_SIGTRAMP_OFFSET2;
865 break;
866 default:
867 return 0;
868 }
869
870 pc -= adjust;
871
872 if (read_memory_nobpt (pc, (char *) buf, LINUX_SIGTRAMP_LEN) != 0)
873 return 0;
874 }
875
876 if (memcmp (buf, linux_sigtramp_code, LINUX_SIGTRAMP_LEN) != 0)
877 return 0;
878
879 return pc;
880}
881
45a816d9
MK
882/* This function does the same for RT signals. Here the instruction
883 sequence is
884 mov $0xad,%eax
885 int $0x80
886 or 0xb8 0xad 0x00 0x00 0x00 0xcd 0x80.
887
888 The effect is to call the system call rt_sigreturn. */
889
890#define LINUX_RT_SIGTRAMP_INSN0 (0xb8) /* mov $NNNN,%eax */
891#define LINUX_RT_SIGTRAMP_OFFSET0 (0)
892#define LINUX_RT_SIGTRAMP_INSN1 (0xcd) /* int */
893#define LINUX_RT_SIGTRAMP_OFFSET1 (5)
894
895static const unsigned char linux_rt_sigtramp_code[] =
896{
897 LINUX_RT_SIGTRAMP_INSN0, 0xad, 0x00, 0x00, 0x00, /* mov $0xad,%eax */
898 LINUX_RT_SIGTRAMP_INSN1, 0x80 /* int $0x80 */
899};
900
901#define LINUX_RT_SIGTRAMP_LEN (sizeof linux_rt_sigtramp_code)
902
903/* If PC is in a RT sigtramp routine, return the address of the start
904 of the routine. Otherwise, return 0. */
905
906static CORE_ADDR
907i386_linux_rt_sigtramp_start (CORE_ADDR pc)
908{
909 unsigned char buf[LINUX_RT_SIGTRAMP_LEN];
910
911 /* We only recognize a signal trampoline if PC is at the start of
912 one of the two instructions. We optimize for finding the PC at
913 the start, as will be the case when the trampoline is not the
914 first frame on the stack. We assume that in the case where the
915 PC is not at the start of the instruction sequence, there will be
916 a few trailing readable bytes on the stack. */
917
918 if (read_memory_nobpt (pc, (char *) buf, LINUX_RT_SIGTRAMP_LEN) != 0)
919 return 0;
920
921 if (buf[0] != LINUX_RT_SIGTRAMP_INSN0)
922 {
923 if (buf[0] != LINUX_RT_SIGTRAMP_INSN1)
924 return 0;
925
926 pc -= LINUX_RT_SIGTRAMP_OFFSET1;
927
928 if (read_memory_nobpt (pc, (char *) buf, LINUX_RT_SIGTRAMP_LEN) != 0)
929 return 0;
930 }
931
932 if (memcmp (buf, linux_rt_sigtramp_code, LINUX_RT_SIGTRAMP_LEN) != 0)
933 return 0;
934
935 return pc;
936}
937
a0b3c4fd
JM
938/* Return whether PC is in a Linux sigtramp routine. */
939
940int
45a816d9 941i386_linux_in_sigtramp (CORE_ADDR pc, char *name)
a0b3c4fd 942{
45a816d9
MK
943 if (name)
944 return STREQ ("__restore", name) || STREQ ("__restore_rt", name);
945
946 return (i386_linux_sigtramp_start (pc) != 0
947 || i386_linux_rt_sigtramp_start (pc) != 0);
a0b3c4fd
JM
948}
949
45a816d9
MK
950/* Assuming FRAME is for a Linux sigtramp routine, return the address
951 of the associated sigcontext structure. */
a0b3c4fd
JM
952
953CORE_ADDR
45a816d9 954i386_linux_sigcontext_addr (struct frame_info *frame)
a0b3c4fd
JM
955{
956 CORE_ADDR pc;
957
958 pc = i386_linux_sigtramp_start (frame->pc);
45a816d9
MK
959 if (pc)
960 {
961 CORE_ADDR sp;
962
963 if (frame->next)
964 /* If this isn't the top frame, the next frame must be for the
965 signal handler itself. The sigcontext structure lives on
966 the stack, right after the signum argument. */
967 return frame->next->frame + 12;
968
969 /* This is the top frame. We'll have to find the address of the
970 sigcontext structure by looking at the stack pointer. Keep
971 in mind that the first instruction of the sigtramp code is
972 "pop %eax". If the PC is at this instruction, adjust the
973 returned value accordingly. */
974 sp = read_register (SP_REGNUM);
975 if (pc == frame->pc)
976 return sp + 4;
977 return sp;
978 }
979
980 pc = i386_linux_rt_sigtramp_start (frame->pc);
981 if (pc)
982 {
983 if (frame->next)
984 /* If this isn't the top frame, the next frame must be for the
985 signal handler itself. The sigcontext structure is part of
986 the user context. A pointer to the user context is passed
987 as the third argument to the signal handler. */
988 return read_memory_integer (frame->next->frame + 16, 4) + 20;
989
990 /* This is the top frame. Again, use the stack pointer to find
991 the address of the sigcontext structure. */
992 return read_memory_integer (read_register (SP_REGNUM) + 8, 4) + 20;
993 }
994
995 error ("Couldn't recognize signal trampoline.");
996 return 0;
a0b3c4fd
JM
997}
998
45a816d9
MK
999/* Offset to saved PC in sigcontext, from <asm/sigcontext.h>. */
1000#define LINUX_SIGCONTEXT_PC_OFFSET (56)
1001
a0b3c4fd 1002/* Assuming FRAME is for a Linux sigtramp routine, return the saved
45a816d9 1003 program counter. */
a0b3c4fd
JM
1004
1005CORE_ADDR
45a816d9 1006i386_linux_sigtramp_saved_pc (struct frame_info *frame)
a0b3c4fd 1007{
45a816d9
MK
1008 CORE_ADDR addr;
1009 addr = i386_linux_sigcontext_addr (frame);
1010 return read_memory_integer (addr + LINUX_SIGCONTEXT_PC_OFFSET, 4);
1011}
a0b3c4fd 1012
45a816d9
MK
1013/* Offset to saved SP in sigcontext, from <asm/sigcontext.h>. */
1014#define LINUX_SIGCONTEXT_SP_OFFSET (28)
1015
1016/* Assuming FRAME is for a Linux sigtramp routine, return the saved
1017 stack pointer. */
1018
1019CORE_ADDR
1020i386_linux_sigtramp_saved_sp (struct frame_info *frame)
1021{
1022 CORE_ADDR addr;
1023 addr = i386_linux_sigcontext_addr (frame);
1024 return read_memory_integer (addr + LINUX_SIGCONTEXT_SP_OFFSET, 4);
a0b3c4fd
JM
1025}
1026
4cc24188
MK
1027/* Immediately after a function call, return the saved pc. */
1028
1029CORE_ADDR
1030i386_linux_saved_pc_after_call (struct frame_info *frame)
1031{
1032 if (frame->signal_handler_caller)
1033 return i386_linux_sigtramp_saved_pc (frame);
1034
1035 return read_memory_integer (read_register (SP_REGNUM), 4);
1036}
1037
a0b3c4fd
JM
1038#endif /* I386_LINUX_SIGTRAMP */
1039
c906108c
SS
1040#ifdef STATIC_TRANSFORM_NAME
1041/* SunPRO encodes the static variables. This is not related to C++ mangling,
1042 it is done for C too. */
1043
1044char *
1045sunpro_static_transform_name (name)
1046 char *name;
1047{
1048 char *p;
1049 if (IS_STATIC_TRANSFORM_NAME (name))
1050 {
1051 /* For file-local statics there will be a period, a bunch
c5aa993b
JM
1052 of junk (the contents of which match a string given in the
1053 N_OPT), a period and the name. For function-local statics
1054 there will be a bunch of junk (which seems to change the
1055 second character from 'A' to 'B'), a period, the name of the
1056 function, and the name. So just skip everything before the
1057 last period. */
c906108c
SS
1058 p = strrchr (name, '.');
1059 if (p != NULL)
1060 name = p + 1;
1061 }
1062 return name;
1063}
1064#endif /* STATIC_TRANSFORM_NAME */
1065
1066
1067
1068/* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1069
1070CORE_ADDR
1071skip_trampoline_code (pc, name)
1072 CORE_ADDR pc;
1073 char *name;
1074{
c5aa993b 1075 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
c906108c 1076 {
c5aa993b 1077 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
c906108c 1078 struct minimal_symbol *indsym =
c5aa993b
JM
1079 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
1080 char *symname = indsym ? SYMBOL_NAME (indsym) : 0;
c906108c 1081
c5aa993b 1082 if (symname)
c906108c 1083 {
c5aa993b
JM
1084 if (strncmp (symname, "__imp_", 6) == 0
1085 || strncmp (symname, "_imp_", 5) == 0)
c906108c
SS
1086 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
1087 }
1088 }
1089 return 0; /* not a trampoline */
1090}
1091
1092static int
1093gdb_print_insn_i386 (memaddr, info)
1094 bfd_vma memaddr;
c5aa993b 1095 disassemble_info *info;
c906108c
SS
1096{
1097 if (disassembly_flavor == att_flavor)
1098 return print_insn_i386_att (memaddr, info);
1099 else if (disassembly_flavor == intel_flavor)
1100 return print_insn_i386_intel (memaddr, info);
7a292a7a
SS
1101 /* Never reached - disassembly_flavour is always either att_flavor
1102 or intel_flavor */
1103 abort ();
1104}
1105
1106/* If the disassembly mode is intel, we have to also switch the
1107 bfd mach_type. This function is run in the set disassembly_flavor
1108 command, and does that. */
1109
1110static void
1111set_disassembly_flavor_sfunc (args, from_tty, c)
1112 char *args;
1113 int from_tty;
1114 struct cmd_list_element *c;
1115{
1116 set_disassembly_flavor ();
7a292a7a
SS
1117}
1118
1119static void
1120set_disassembly_flavor ()
1121{
1122 if (disassembly_flavor == att_flavor)
1123 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386);
1124 else if (disassembly_flavor == intel_flavor)
1125 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386_intel_syntax);
c906108c
SS
1126}
1127
2acceee2 1128
c906108c
SS
1129void
1130_initialize_i386_tdep ()
1131{
917317f4
JM
1132 /* Initialize the table saying where each register starts in the
1133 register file. */
1134 {
1135 int i, offset;
1136
1137 offset = 0;
1138 for (i = 0; i < MAX_NUM_REGS; i++)
1139 {
1140 i386_register_byte[i] = offset;
1141 offset += i386_register_raw_size[i];
1142 }
1143 }
1144
1145 /* Initialize the table of virtual register sizes. */
1146 {
1147 int i;
1148
1149 for (i = 0; i < MAX_NUM_REGS; i++)
1150 i386_register_virtual_size[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i));
1151 }
c5aa993b 1152
c906108c
SS
1153 tm_print_insn = gdb_print_insn_i386;
1154 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach;
1155
1156 /* Add the variable that controls the disassembly flavor */
917317f4
JM
1157 {
1158 struct cmd_list_element *new_cmd;
7a292a7a 1159
917317f4
JM
1160 new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class,
1161 valid_flavors,
1162 (char *) &disassembly_flavor,
1163 "Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
c906108c 1164and the default value is \"att\".",
917317f4
JM
1165 &setlist);
1166 new_cmd->function.sfunc = set_disassembly_flavor_sfunc;
1167 add_show_from_set (new_cmd, &showlist);
1168 }
c5aa993b 1169
7a292a7a
SS
1170 /* Finally, initialize the disassembly flavor to the default given
1171 in the disassembly_flavor variable */
c906108c 1172
7a292a7a 1173 set_disassembly_flavor ();
c906108c 1174}
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