import gdb-1999-10-18 snapshot
[deliverable/binutils-gdb.git] / gdb / i386-tdep.c
CommitLineData
c906108c
SS
1/* Intel 386 target-dependent stuff.
2 Copyright (C) 1988, 1989, 1991, 1994, 1995, 1996, 1998
3 Free Software Foundation, Inc.
4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
23#include "gdb_string.h"
24#include "frame.h"
25#include "inferior.h"
26#include "gdbcore.h"
27#include "target.h"
28#include "floatformat.h"
29#include "symtab.h"
30#include "gdbcmd.h"
31#include "command.h"
32
33static long i386_get_frame_setup PARAMS ((CORE_ADDR));
34
35static void i386_follow_jump PARAMS ((void));
36
37static void codestream_read PARAMS ((unsigned char *, int));
38
39static void codestream_seek PARAMS ((CORE_ADDR));
40
41static unsigned char codestream_fill PARAMS ((int));
42
43CORE_ADDR skip_trampoline_code PARAMS ((CORE_ADDR, char *));
44
45static int gdb_print_insn_i386 (bfd_vma, disassemble_info *);
46
47void _initialize_i386_tdep PARAMS ((void));
48
917317f4
JM
49/* i386_register_byte[i] is the offset into the register file of the
50 start of register number i. We initialize this from
51 i386_register_raw_size. */
52int i386_register_byte[MAX_NUM_REGS];
53
54/* i386_register_raw_size[i] is the number of bytes of storage in the
55 actual machine representation for register i. */
56int i386_register_raw_size[MAX_NUM_REGS] = {
57 4, 4, 4, 4,
58 4, 4, 4, 4,
59 4, 4, 4, 4,
60 4, 4, 4, 4,
61 10, 10, 10, 10,
62 10, 10, 10, 10,
63 4, 4, 4, 4,
64 4, 4, 4, 4,
65 16, 16, 16, 16,
66 16, 16, 16, 16,
67 4
68};
69
70/* i386_register_virtual_size[i] is the size in bytes of the virtual
71 type of register i. */
72int i386_register_virtual_size[MAX_NUM_REGS];
73
74
c906108c 75/* This is the variable the is set with "set disassembly-flavor",
c5aa993b 76 and its legitimate values. */
c906108c
SS
77static char att_flavor[] = "att";
78static char intel_flavor[] = "intel";
c5aa993b
JM
79static char *valid_flavors[] =
80{
c906108c
SS
81 att_flavor,
82 intel_flavor,
83 NULL
84};
85static char *disassembly_flavor = att_flavor;
86
d4f3574e
SS
87static void i386_print_register PARAMS ((char *, int, int));
88
7a292a7a
SS
89/* This is used to keep the bfd arch_info in sync with the disassembly flavor. */
90static void set_disassembly_flavor_sfunc PARAMS ((char *, int, struct cmd_list_element *));
d4f3574e 91static void set_disassembly_flavor PARAMS ((void));
7a292a7a 92
c906108c
SS
93/* Stdio style buffering was used to minimize calls to ptrace, but this
94 buffering did not take into account that the code section being accessed
95 may not be an even number of buffers long (even if the buffer is only
96 sizeof(int) long). In cases where the code section size happened to
97 be a non-integral number of buffers long, attempting to read the last
98 buffer would fail. Simply using target_read_memory and ignoring errors,
99 rather than read_memory, is not the correct solution, since legitimate
100 access errors would then be totally ignored. To properly handle this
101 situation and continue to use buffering would require that this code
102 be able to determine the minimum code section size granularity (not the
103 alignment of the section itself, since the actual failing case that
104 pointed out this problem had a section alignment of 4 but was not a
105 multiple of 4 bytes long), on a target by target basis, and then
106 adjust it's buffer size accordingly. This is messy, but potentially
107 feasible. It probably needs the bfd library's help and support. For
108 now, the buffer size is set to 1. (FIXME -fnf) */
109
110#define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */
111static CORE_ADDR codestream_next_addr;
112static CORE_ADDR codestream_addr;
113static unsigned char codestream_buf[CODESTREAM_BUFSIZ];
114static int codestream_off;
115static int codestream_cnt;
116
117#define codestream_tell() (codestream_addr + codestream_off)
118#define codestream_peek() (codestream_cnt == 0 ? \
119 codestream_fill(1): codestream_buf[codestream_off])
120#define codestream_get() (codestream_cnt-- == 0 ? \
121 codestream_fill(0) : codestream_buf[codestream_off++])
122
c5aa993b 123static unsigned char
c906108c 124codestream_fill (peek_flag)
c5aa993b 125 int peek_flag;
c906108c
SS
126{
127 codestream_addr = codestream_next_addr;
128 codestream_next_addr += CODESTREAM_BUFSIZ;
129 codestream_off = 0;
130 codestream_cnt = CODESTREAM_BUFSIZ;
131 read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ);
c5aa993b 132
c906108c 133 if (peek_flag)
c5aa993b 134 return (codestream_peek ());
c906108c 135 else
c5aa993b 136 return (codestream_get ());
c906108c
SS
137}
138
139static void
140codestream_seek (place)
c5aa993b 141 CORE_ADDR place;
c906108c
SS
142{
143 codestream_next_addr = place / CODESTREAM_BUFSIZ;
144 codestream_next_addr *= CODESTREAM_BUFSIZ;
145 codestream_cnt = 0;
146 codestream_fill (1);
c5aa993b 147 while (codestream_tell () != place)
c906108c
SS
148 codestream_get ();
149}
150
151static void
152codestream_read (buf, count)
153 unsigned char *buf;
154 int count;
155{
156 unsigned char *p;
157 int i;
158 p = buf;
159 for (i = 0; i < count; i++)
160 *p++ = codestream_get ();
161}
162
163/* next instruction is a jump, move to target */
164
165static void
166i386_follow_jump ()
167{
168 unsigned char buf[4];
169 long delta;
170
171 int data16;
172 CORE_ADDR pos;
173
174 pos = codestream_tell ();
175
176 data16 = 0;
177 if (codestream_peek () == 0x66)
178 {
179 codestream_get ();
180 data16 = 1;
181 }
182
183 switch (codestream_get ())
184 {
185 case 0xe9:
186 /* relative jump: if data16 == 0, disp32, else disp16 */
187 if (data16)
188 {
189 codestream_read (buf, 2);
190 delta = extract_signed_integer (buf, 2);
191
192 /* include size of jmp inst (including the 0x66 prefix). */
c5aa993b 193 pos += delta + 4;
c906108c
SS
194 }
195 else
196 {
197 codestream_read (buf, 4);
198 delta = extract_signed_integer (buf, 4);
199
200 pos += delta + 5;
201 }
202 break;
203 case 0xeb:
204 /* relative jump, disp8 (ignore data16) */
205 codestream_read (buf, 1);
206 /* Sign-extend it. */
207 delta = extract_signed_integer (buf, 1);
208
209 pos += delta + 2;
210 break;
211 }
212 codestream_seek (pos);
213}
214
215/*
216 * find & return amound a local space allocated, and advance codestream to
217 * first register push (if any)
218 *
219 * if entry sequence doesn't make sense, return -1, and leave
220 * codestream pointer random
221 */
222
223static long
224i386_get_frame_setup (pc)
225 CORE_ADDR pc;
226{
227 unsigned char op;
228
229 codestream_seek (pc);
230
231 i386_follow_jump ();
232
233 op = codestream_get ();
234
235 if (op == 0x58) /* popl %eax */
236 {
237 /*
238 * this function must start with
239 *
c5aa993b 240 * popl %eax 0x58
c906108c
SS
241 * xchgl %eax, (%esp) 0x87 0x04 0x24
242 * or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
243 *
244 * (the system 5 compiler puts out the second xchg
245 * inst, and the assembler doesn't try to optimize it,
246 * so the 'sib' form gets generated)
247 *
248 * this sequence is used to get the address of the return
249 * buffer for a function that returns a structure
250 */
251 int pos;
252 unsigned char buf[4];
c5aa993b
JM
253 static unsigned char proto1[3] =
254 {0x87, 0x04, 0x24};
255 static unsigned char proto2[4] =
256 {0x87, 0x44, 0x24, 0x00};
c906108c
SS
257 pos = codestream_tell ();
258 codestream_read (buf, 4);
259 if (memcmp (buf, proto1, 3) == 0)
260 pos += 3;
261 else if (memcmp (buf, proto2, 4) == 0)
262 pos += 4;
263
264 codestream_seek (pos);
c5aa993b 265 op = codestream_get (); /* update next opcode */
c906108c
SS
266 }
267
268 if (op == 0x68 || op == 0x6a)
269 {
270 /*
271 * this function may start with
272 *
273 * pushl constant
274 * call _probe
275 * addl $4, %esp
276 * followed by
277 * pushl %ebp
278 * etc.
279 */
280 int pos;
281 unsigned char buf[8];
282
283 /* Skip past the pushl instruction; it has either a one-byte
284 or a four-byte operand, depending on the opcode. */
285 pos = codestream_tell ();
286 if (op == 0x68)
287 pos += 4;
288 else
289 pos += 1;
290 codestream_seek (pos);
291
292 /* Read the following 8 bytes, which should be "call _probe" (6 bytes)
293 followed by "addl $4,%esp" (2 bytes). */
294 codestream_read (buf, sizeof (buf));
295 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
296 pos += sizeof (buf);
297 codestream_seek (pos);
c5aa993b 298 op = codestream_get (); /* update next opcode */
c906108c
SS
299 }
300
301 if (op == 0x55) /* pushl %ebp */
c5aa993b 302 {
c906108c
SS
303 /* check for movl %esp, %ebp - can be written two ways */
304 switch (codestream_get ())
305 {
306 case 0x8b:
307 if (codestream_get () != 0xec)
308 return (-1);
309 break;
310 case 0x89:
311 if (codestream_get () != 0xe5)
312 return (-1);
313 break;
314 default:
315 return (-1);
316 }
317 /* check for stack adjustment
c5aa993b 318
c906108c
SS
319 * subl $XXX, %esp
320 *
321 * note: you can't subtract a 16 bit immediate
322 * from a 32 bit reg, so we don't have to worry
323 * about a data16 prefix
324 */
325 op = codestream_peek ();
326 if (op == 0x83)
327 {
328 /* subl with 8 bit immed */
329 codestream_get ();
330 if (codestream_get () != 0xec)
331 /* Some instruction starting with 0x83 other than subl. */
332 {
333 codestream_seek (codestream_tell () - 2);
334 return 0;
335 }
336 /* subl with signed byte immediate
337 * (though it wouldn't make sense to be negative)
338 */
c5aa993b 339 return (codestream_get ());
c906108c
SS
340 }
341 else if (op == 0x81)
342 {
343 char buf[4];
344 /* Maybe it is subl with 32 bit immedediate. */
c5aa993b 345 codestream_get ();
c906108c
SS
346 if (codestream_get () != 0xec)
347 /* Some instruction starting with 0x81 other than subl. */
348 {
349 codestream_seek (codestream_tell () - 2);
350 return 0;
351 }
352 /* It is subl with 32 bit immediate. */
c5aa993b 353 codestream_read ((unsigned char *) buf, 4);
c906108c
SS
354 return extract_signed_integer (buf, 4);
355 }
356 else
357 {
358 return (0);
359 }
360 }
361 else if (op == 0xc8)
362 {
363 char buf[2];
364 /* enter instruction: arg is 16 bit unsigned immed */
c5aa993b
JM
365 codestream_read ((unsigned char *) buf, 2);
366 codestream_get (); /* flush final byte of enter instruction */
c906108c
SS
367 return extract_unsigned_integer (buf, 2);
368 }
369 return (-1);
370}
371
372/* Return number of args passed to a frame.
373 Can return -1, meaning no way to tell. */
374
375int
376i386_frame_num_args (fi)
377 struct frame_info *fi;
378{
379#if 1
380 return -1;
381#else
382 /* This loses because not only might the compiler not be popping the
383 args right after the function call, it might be popping args from both
384 this call and a previous one, and we would say there are more args
385 than there really are. */
386
c5aa993b
JM
387 int retpc;
388 unsigned char op;
c906108c
SS
389 struct frame_info *pfi;
390
391 /* on the 386, the instruction following the call could be:
392 popl %ecx - one arg
393 addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits
394 anything else - zero args */
395
396 int frameless;
397
392a587b 398 frameless = FRAMELESS_FUNCTION_INVOCATION (fi);
c906108c
SS
399 if (frameless)
400 /* In the absence of a frame pointer, GDB doesn't get correct values
401 for nameless arguments. Return -1, so it doesn't print any
402 nameless arguments. */
403 return -1;
404
c5aa993b 405 pfi = get_prev_frame (fi);
c906108c
SS
406 if (pfi == 0)
407 {
408 /* Note: this can happen if we are looking at the frame for
c5aa993b
JM
409 main, because FRAME_CHAIN_VALID won't let us go into
410 start. If we have debugging symbols, that's not really
411 a big deal; it just means it will only show as many arguments
412 to main as are declared. */
c906108c
SS
413 return -1;
414 }
415 else
416 {
c5aa993b
JM
417 retpc = pfi->pc;
418 op = read_memory_integer (retpc, 1);
419 if (op == 0x59)
420 /* pop %ecx */
421 return 1;
c906108c
SS
422 else if (op == 0x83)
423 {
c5aa993b
JM
424 op = read_memory_integer (retpc + 1, 1);
425 if (op == 0xc4)
426 /* addl $<signed imm 8 bits>, %esp */
427 return (read_memory_integer (retpc + 2, 1) & 0xff) / 4;
c906108c
SS
428 else
429 return 0;
430 }
431 else if (op == 0x81)
c5aa993b
JM
432 { /* add with 32 bit immediate */
433 op = read_memory_integer (retpc + 1, 1);
434 if (op == 0xc4)
435 /* addl $<imm 32>, %esp */
436 return read_memory_integer (retpc + 2, 4) / 4;
c906108c
SS
437 else
438 return 0;
439 }
440 else
441 {
442 return 0;
443 }
444 }
445#endif
446}
447
448/*
449 * parse the first few instructions of the function to see
450 * what registers were stored.
451 *
452 * We handle these cases:
453 *
454 * The startup sequence can be at the start of the function,
455 * or the function can start with a branch to startup code at the end.
456 *
457 * %ebp can be set up with either the 'enter' instruction, or
458 * 'pushl %ebp, movl %esp, %ebp' (enter is too slow to be useful,
459 * but was once used in the sys5 compiler)
460 *
461 * Local space is allocated just below the saved %ebp by either the
462 * 'enter' instruction, or by 'subl $<size>, %esp'. 'enter' has
463 * a 16 bit unsigned argument for space to allocate, and the
464 * 'addl' instruction could have either a signed byte, or
465 * 32 bit immediate.
466 *
467 * Next, the registers used by this function are pushed. In
468 * the sys5 compiler they will always be in the order: %edi, %esi, %ebx
469 * (and sometimes a harmless bug causes it to also save but not restore %eax);
470 * however, the code below is willing to see the pushes in any order,
471 * and will handle up to 8 of them.
472 *
473 * If the setup sequence is at the end of the function, then the
474 * next instruction will be a branch back to the start.
475 */
476
477void
478i386_frame_find_saved_regs (fip, fsrp)
479 struct frame_info *fip;
480 struct frame_saved_regs *fsrp;
481{
482 long locals = -1;
483 unsigned char op;
484 CORE_ADDR dummy_bottom;
485 CORE_ADDR adr;
486 CORE_ADDR pc;
487 int i;
c5aa993b 488
c906108c 489 memset (fsrp, 0, sizeof *fsrp);
c5aa993b 490
c906108c
SS
491 /* if frame is the end of a dummy, compute where the
492 * beginning would be
493 */
494 dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH;
c5aa993b 495
c906108c 496 /* check if the PC is in the stack, in a dummy frame */
c5aa993b 497 if (dummy_bottom <= fip->pc && fip->pc <= fip->frame)
c906108c
SS
498 {
499 /* all regs were saved by push_call_dummy () */
500 adr = fip->frame;
c5aa993b 501 for (i = 0; i < NUM_REGS; i++)
c906108c
SS
502 {
503 adr -= REGISTER_RAW_SIZE (i);
504 fsrp->regs[i] = adr;
505 }
506 return;
507 }
c5aa993b 508
c906108c
SS
509 pc = get_pc_function_start (fip->pc);
510 if (pc != 0)
511 locals = i386_get_frame_setup (pc);
c5aa993b
JM
512
513 if (locals >= 0)
c906108c
SS
514 {
515 adr = fip->frame - 4 - locals;
c5aa993b 516 for (i = 0; i < 8; i++)
c906108c
SS
517 {
518 op = codestream_get ();
519 if (op < 0x50 || op > 0x57)
520 break;
521#ifdef I386_REGNO_TO_SYMMETRY
522 /* Dynix uses different internal numbering. Ick. */
c5aa993b 523 fsrp->regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = adr;
c906108c
SS
524#else
525 fsrp->regs[op - 0x50] = adr;
526#endif
527 adr -= 4;
528 }
529 }
c5aa993b 530
c906108c
SS
531 fsrp->regs[PC_REGNUM] = fip->frame + 4;
532 fsrp->regs[FP_REGNUM] = fip->frame;
533}
534
535/* return pc of first real instruction */
536
537int
538i386_skip_prologue (pc)
539 int pc;
540{
541 unsigned char op;
542 int i;
c5aa993b
JM
543 static unsigned char pic_pat[6] =
544 {0xe8, 0, 0, 0, 0, /* call 0x0 */
545 0x5b, /* popl %ebx */
546 };
c906108c 547 CORE_ADDR pos;
c5aa993b 548
c906108c
SS
549 if (i386_get_frame_setup (pc) < 0)
550 return (pc);
c5aa993b 551
c906108c
SS
552 /* found valid frame setup - codestream now points to
553 * start of push instructions for saving registers
554 */
c5aa993b 555
c906108c
SS
556 /* skip over register saves */
557 for (i = 0; i < 8; i++)
558 {
559 op = codestream_peek ();
560 /* break if not pushl inst */
c5aa993b 561 if (op < 0x50 || op > 0x57)
c906108c
SS
562 break;
563 codestream_get ();
564 }
565
566 /* The native cc on SVR4 in -K PIC mode inserts the following code to get
567 the address of the global offset table (GOT) into register %ebx.
c5aa993b
JM
568 call 0x0
569 popl %ebx
570 movl %ebx,x(%ebp) (optional)
571 addl y,%ebx
c906108c
SS
572 This code is with the rest of the prologue (at the end of the
573 function), so we have to skip it to get to the first real
574 instruction at the start of the function. */
c5aa993b 575
c906108c
SS
576 pos = codestream_tell ();
577 for (i = 0; i < 6; i++)
578 {
579 op = codestream_get ();
c5aa993b 580 if (pic_pat[i] != op)
c906108c
SS
581 break;
582 }
583 if (i == 6)
584 {
585 unsigned char buf[4];
586 long delta = 6;
587
588 op = codestream_get ();
c5aa993b 589 if (op == 0x89) /* movl %ebx, x(%ebp) */
c906108c
SS
590 {
591 op = codestream_get ();
c5aa993b 592 if (op == 0x5d) /* one byte offset from %ebp */
c906108c
SS
593 {
594 delta += 3;
595 codestream_read (buf, 1);
596 }
c5aa993b 597 else if (op == 0x9d) /* four byte offset from %ebp */
c906108c
SS
598 {
599 delta += 6;
600 codestream_read (buf, 4);
601 }
c5aa993b
JM
602 else /* unexpected instruction */
603 delta = -1;
604 op = codestream_get ();
c906108c 605 }
c5aa993b
JM
606 /* addl y,%ebx */
607 if (delta > 0 && op == 0x81 && codestream_get () == 0xc3)
c906108c 608 {
c5aa993b 609 pos += delta + 6;
c906108c
SS
610 }
611 }
612 codestream_seek (pos);
c5aa993b 613
c906108c 614 i386_follow_jump ();
c5aa993b 615
c906108c
SS
616 return (codestream_tell ());
617}
618
619void
620i386_push_dummy_frame ()
621{
622 CORE_ADDR sp = read_register (SP_REGNUM);
623 int regnum;
624 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 625
c906108c
SS
626 sp = push_word (sp, read_register (PC_REGNUM));
627 sp = push_word (sp, read_register (FP_REGNUM));
628 write_register (FP_REGNUM, sp);
629 for (regnum = 0; regnum < NUM_REGS; regnum++)
630 {
631 read_register_gen (regnum, regbuf);
632 sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum));
633 }
634 write_register (SP_REGNUM, sp);
635}
636
637void
638i386_pop_frame ()
639{
640 struct frame_info *frame = get_current_frame ();
641 CORE_ADDR fp;
642 int regnum;
643 struct frame_saved_regs fsr;
644 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 645
c906108c
SS
646 fp = FRAME_FP (frame);
647 get_frame_saved_regs (frame, &fsr);
c5aa993b 648 for (regnum = 0; regnum < NUM_REGS; regnum++)
c906108c
SS
649 {
650 CORE_ADDR adr;
651 adr = fsr.regs[regnum];
652 if (adr)
653 {
654 read_memory (adr, regbuf, REGISTER_RAW_SIZE (regnum));
655 write_register_bytes (REGISTER_BYTE (regnum), regbuf,
656 REGISTER_RAW_SIZE (regnum));
657 }
658 }
659 write_register (FP_REGNUM, read_memory_integer (fp, 4));
660 write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
661 write_register (SP_REGNUM, fp + 8);
662 flush_cached_frames ();
663}
664
665#ifdef GET_LONGJMP_TARGET
666
667/* Figure out where the longjmp will land. Slurp the args out of the stack.
668 We expect the first arg to be a pointer to the jmp_buf structure from which
669 we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
670 This routine returns true on success. */
671
672int
c5aa993b 673get_longjmp_target (pc)
c906108c
SS
674 CORE_ADDR *pc;
675{
676 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
677 CORE_ADDR sp, jb_addr;
678
679 sp = read_register (SP_REGNUM);
680
c5aa993b 681 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack */
c906108c
SS
682 buf,
683 TARGET_PTR_BIT / TARGET_CHAR_BIT))
684 return 0;
685
686 jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
687
688 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
689 TARGET_PTR_BIT / TARGET_CHAR_BIT))
690 return 0;
691
692 *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
693
694 return 1;
695}
696
697#endif /* GET_LONGJMP_TARGET */
698
699void
c5aa993b 700i386_extract_return_value (type, regbuf, valbuf)
c906108c
SS
701 struct type *type;
702 char regbuf[REGISTER_BYTES];
703 char *valbuf;
704{
d4f3574e
SS
705 /* On AIX and i386 GNU/Linux, floating point values are returned in
706 floating point registers. */
707#if defined(I386_AIX_TARGET) || defined(I386_GNULINUX_TARGET)
c5aa993b 708 if (TYPE_CODE_FLT == TYPE_CODE (type))
c906108c
SS
709 {
710 double d;
711 /* 387 %st(0), gcc uses this */
712 floatformat_to_double (&floatformat_i387_ext,
c2c6d25f
JM
713#if defined(FPDATA_REGNUM)
714 &regbuf[REGISTER_BYTE (FPDATA_REGNUM)],
715#else /* !FPDATA_REGNUM */
716 &regbuf[REGISTER_BYTE (FP0_REGNUM)],
717#endif /* FPDATA_REGNUM */
718
c906108c
SS
719 &d);
720 store_floating (valbuf, TYPE_LENGTH (type), d);
721 }
722 else
d4f3574e 723#endif /* I386_AIX_TARGET || I386_GNULINUX_TARGET*/
c5aa993b 724 {
c2c6d25f 725#if defined(LOW_RETURN_REGNUM)
d4f3574e
SS
726 int len = TYPE_LENGTH (type);
727 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
728 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
729
730 if (len <= low_size)
731 memcpy (valbuf, regbuf + REGISTER_BYTE (LOW_RETURN_REGNUM), len);
732 else if (len <= (low_size + high_size))
733 {
734 memcpy (valbuf,
735 regbuf + REGISTER_BYTE (LOW_RETURN_REGNUM),
736 low_size);
737 memcpy (valbuf + low_size,
738 regbuf + REGISTER_BYTE (HIGH_RETURN_REGNUM),
739 len - low_size);
740 }
741 else
742 error ("GDB bug: i386-tdep.c (i386_extract_return_value): Don't know how to find a return value %d bytes long", len);
c2c6d25f
JM
743#else /* !LOW_RETURN_REGNUM */
744 memcpy (valbuf, regbuf, TYPE_LENGTH (type));
745#endif /* LOW_RETURN_REGNUM */
c906108c
SS
746 }
747}
748
749#ifdef I386V4_SIGTRAMP_SAVED_PC
750/* Get saved user PC for sigtramp from the pushed ucontext on the stack
751 for all three variants of SVR4 sigtramps. */
752
753CORE_ADDR
754i386v4_sigtramp_saved_pc (frame)
755 struct frame_info *frame;
756{
757 CORE_ADDR saved_pc_offset = 4;
758 char *name = NULL;
759
760 find_pc_partial_function (frame->pc, &name, NULL, NULL);
761 if (name)
762 {
763 if (STREQ (name, "_sigreturn"))
764 saved_pc_offset = 132 + 14 * 4;
765 else if (STREQ (name, "_sigacthandler"))
766 saved_pc_offset = 80 + 14 * 4;
767 else if (STREQ (name, "sigvechandler"))
768 saved_pc_offset = 120 + 14 * 4;
769 }
770
771 if (frame->next)
772 return read_memory_integer (frame->next->frame + saved_pc_offset, 4);
773 return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4);
774}
775#endif /* I386V4_SIGTRAMP_SAVED_PC */
776
a0b3c4fd
JM
777#ifdef I386_LINUX_SIGTRAMP
778
779/* When the i386 Linux kernel calls a signal handler, the return
780 address points to a bit of code on the stack. This function
781 returns whether the PC appears to be within this bit of code.
782
783 The instruction sequence is
784 pop %eax
785 mov $0x77,%eax
786 int $0x80
787 or 0x58 0xb8 0x77 0x00 0x00 0x00 0xcd 0x80.
788
789 Checking for the code sequence should be somewhat reliable, because
790 the effect is to call the system call sigreturn. This is unlikely
791 to occur anywhere other than a signal trampoline.
792
793 It kind of sucks that we have to read memory from the process in
794 order to identify a signal trampoline, but there doesn't seem to be
795 any other way. The IN_SIGTRAMP macro in tm-linux.h arranges to
796 only call us if no function name could be identified, which should
797 be the case since the code is on the stack. */
798
799#define LINUX_SIGTRAMP_INSN0 (0x58) /* pop %eax */
800#define LINUX_SIGTRAMP_OFFSET0 (0)
801#define LINUX_SIGTRAMP_INSN1 (0xb8) /* mov $NNNN,%eax */
802#define LINUX_SIGTRAMP_OFFSET1 (1)
803#define LINUX_SIGTRAMP_INSN2 (0xcd) /* int */
804#define LINUX_SIGTRAMP_OFFSET2 (6)
805
806static const unsigned char linux_sigtramp_code[] =
807{
808 LINUX_SIGTRAMP_INSN0, /* pop %eax */
809 LINUX_SIGTRAMP_INSN1, 0x77, 0x00, 0x00, 0x00, /* mov $0x77,%eax */
810 LINUX_SIGTRAMP_INSN2, 0x80 /* int $0x80 */
811};
812
813#define LINUX_SIGTRAMP_LEN (sizeof linux_sigtramp_code)
814
815/* If PC is in a sigtramp routine, return the address of the start of
816 the routine. Otherwise, return 0. */
817
818static CORE_ADDR
819i386_linux_sigtramp_start (pc)
820 CORE_ADDR pc;
821{
822 unsigned char buf[LINUX_SIGTRAMP_LEN];
823
824 /* We only recognize a signal trampoline if PC is at the start of
825 one of the three instructions. We optimize for finding the PC at
826 the start, as will be the case when the trampoline is not the
827 first frame on the stack. We assume that in the case where the
828 PC is not at the start of the instruction sequence, there will be
829 a few trailing readable bytes on the stack. */
830
831 if (read_memory_nobpt (pc, (char *) buf, LINUX_SIGTRAMP_LEN) != 0)
832 return 0;
833
834 if (buf[0] != LINUX_SIGTRAMP_INSN0)
835 {
836 int adjust;
837
838 switch (buf[0])
839 {
840 case LINUX_SIGTRAMP_INSN1:
841 adjust = LINUX_SIGTRAMP_OFFSET1;
842 break;
843 case LINUX_SIGTRAMP_INSN2:
844 adjust = LINUX_SIGTRAMP_OFFSET2;
845 break;
846 default:
847 return 0;
848 }
849
850 pc -= adjust;
851
852 if (read_memory_nobpt (pc, (char *) buf, LINUX_SIGTRAMP_LEN) != 0)
853 return 0;
854 }
855
856 if (memcmp (buf, linux_sigtramp_code, LINUX_SIGTRAMP_LEN) != 0)
857 return 0;
858
859 return pc;
860}
861
862/* Return whether PC is in a Linux sigtramp routine. */
863
864int
865i386_linux_sigtramp (pc)
866 CORE_ADDR pc;
867{
868 return i386_linux_sigtramp_start (pc) != 0;
869}
870
871/* Assuming FRAME is for a Linux sigtramp routine, return the saved
872 program counter. The Linux kernel will set up a sigcontext
873 structure immediately before the sigtramp routine on the stack. */
874
875CORE_ADDR
876i386_linux_sigtramp_saved_pc (frame)
877 struct frame_info *frame;
878{
879 CORE_ADDR pc;
880
881 pc = i386_linux_sigtramp_start (frame->pc);
882 if (pc == 0)
883 error ("i386_linux_sigtramp_saved_pc called when no sigtramp");
884 return read_memory_integer ((pc
885 - LINUX_SIGCONTEXT_SIZE
886 + LINUX_SIGCONTEXT_PC_OFFSET),
887 4);
888}
889
890/* Assuming FRAME is for a Linux sigtramp routine, return the saved
891 stack pointer. The Linux kernel will set up a sigcontext structure
892 immediately before the sigtramp routine on the stack. */
893
894CORE_ADDR
895i386_linux_sigtramp_saved_sp (frame)
896 struct frame_info *frame;
897{
898 CORE_ADDR pc;
899
900 pc = i386_linux_sigtramp_start (frame->pc);
901 if (pc == 0)
902 error ("i386_linux_sigtramp_saved_sp called when no sigtramp");
903 return read_memory_integer ((pc
904 - LINUX_SIGCONTEXT_SIZE
905 + LINUX_SIGCONTEXT_SP_OFFSET),
906 4);
907}
908
909#endif /* I386_LINUX_SIGTRAMP */
910
c906108c
SS
911#ifdef STATIC_TRANSFORM_NAME
912/* SunPRO encodes the static variables. This is not related to C++ mangling,
913 it is done for C too. */
914
915char *
916sunpro_static_transform_name (name)
917 char *name;
918{
919 char *p;
920 if (IS_STATIC_TRANSFORM_NAME (name))
921 {
922 /* For file-local statics there will be a period, a bunch
c5aa993b
JM
923 of junk (the contents of which match a string given in the
924 N_OPT), a period and the name. For function-local statics
925 there will be a bunch of junk (which seems to change the
926 second character from 'A' to 'B'), a period, the name of the
927 function, and the name. So just skip everything before the
928 last period. */
c906108c
SS
929 p = strrchr (name, '.');
930 if (p != NULL)
931 name = p + 1;
932 }
933 return name;
934}
935#endif /* STATIC_TRANSFORM_NAME */
936
937
938
939/* Stuff for WIN32 PE style DLL's but is pretty generic really. */
940
941CORE_ADDR
942skip_trampoline_code (pc, name)
943 CORE_ADDR pc;
944 char *name;
945{
c5aa993b 946 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
c906108c 947 {
c5aa993b 948 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
c906108c 949 struct minimal_symbol *indsym =
c5aa993b
JM
950 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
951 char *symname = indsym ? SYMBOL_NAME (indsym) : 0;
c906108c 952
c5aa993b 953 if (symname)
c906108c 954 {
c5aa993b
JM
955 if (strncmp (symname, "__imp_", 6) == 0
956 || strncmp (symname, "_imp_", 5) == 0)
c906108c
SS
957 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
958 }
959 }
960 return 0; /* not a trampoline */
961}
962
963static int
964gdb_print_insn_i386 (memaddr, info)
965 bfd_vma memaddr;
c5aa993b 966 disassemble_info *info;
c906108c
SS
967{
968 if (disassembly_flavor == att_flavor)
969 return print_insn_i386_att (memaddr, info);
970 else if (disassembly_flavor == intel_flavor)
971 return print_insn_i386_intel (memaddr, info);
7a292a7a
SS
972 /* Never reached - disassembly_flavour is always either att_flavor
973 or intel_flavor */
974 abort ();
975}
976
977/* If the disassembly mode is intel, we have to also switch the
978 bfd mach_type. This function is run in the set disassembly_flavor
979 command, and does that. */
980
981static void
982set_disassembly_flavor_sfunc (args, from_tty, c)
983 char *args;
984 int from_tty;
985 struct cmd_list_element *c;
986{
987 set_disassembly_flavor ();
7a292a7a
SS
988}
989
990static void
991set_disassembly_flavor ()
992{
993 if (disassembly_flavor == att_flavor)
994 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386);
995 else if (disassembly_flavor == intel_flavor)
996 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386_intel_syntax);
c906108c
SS
997}
998
2acceee2 999
c906108c
SS
1000void
1001_initialize_i386_tdep ()
1002{
917317f4
JM
1003 /* Initialize the table saying where each register starts in the
1004 register file. */
1005 {
1006 int i, offset;
1007
1008 offset = 0;
1009 for (i = 0; i < MAX_NUM_REGS; i++)
1010 {
1011 i386_register_byte[i] = offset;
1012 offset += i386_register_raw_size[i];
1013 }
1014 }
1015
1016 /* Initialize the table of virtual register sizes. */
1017 {
1018 int i;
1019
1020 for (i = 0; i < MAX_NUM_REGS; i++)
1021 i386_register_virtual_size[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i));
1022 }
c5aa993b 1023
c906108c
SS
1024 tm_print_insn = gdb_print_insn_i386;
1025 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach;
1026
1027 /* Add the variable that controls the disassembly flavor */
917317f4
JM
1028 {
1029 struct cmd_list_element *new_cmd;
7a292a7a 1030
917317f4
JM
1031 new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class,
1032 valid_flavors,
1033 (char *) &disassembly_flavor,
1034 "Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
c906108c 1035and the default value is \"att\".",
917317f4
JM
1036 &setlist);
1037 new_cmd->function.sfunc = set_disassembly_flavor_sfunc;
1038 add_show_from_set (new_cmd, &showlist);
1039 }
c5aa993b 1040
7a292a7a
SS
1041 /* Finally, initialize the disassembly flavor to the default given
1042 in the disassembly_flavor variable */
c906108c 1043
7a292a7a 1044 set_disassembly_flavor ();
c906108c 1045}
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