Commit | Line | Data |
---|---|---|
c906108c | 1 | /* Intel 387 floating point stuff. |
38edeab8 | 2 | |
0b302171 JB |
3 | Copyright (C) 1988-1989, 1991-1994, 1998-2005, 2007-2012 Free |
4 | Software Foundation, Inc. | |
c906108c | 5 | |
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 10 | the Free Software Foundation; either version 3 of the License, or |
c5aa993b | 11 | (at your option) any later version. |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b | 18 | You should have received a copy of the GNU General Public License |
a9762ec7 | 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
c906108c SS |
20 | |
21 | #include "defs.h" | |
786a90bb MK |
22 | #include "doublest.h" |
23 | #include "floatformat.h" | |
c906108c | 24 | #include "frame.h" |
786a90bb | 25 | #include "gdbcore.h" |
c906108c SS |
26 | #include "inferior.h" |
27 | #include "language.h" | |
4e052eda | 28 | #include "regcache.h" |
786a90bb MK |
29 | #include "value.h" |
30 | ||
d0df8472 | 31 | #include "gdb_assert.h" |
309367d4 | 32 | #include "gdb_string.h" |
c906108c | 33 | |
9a82579f | 34 | #include "i386-tdep.h" |
42c466d7 | 35 | #include "i387-tdep.h" |
31aeac78 | 36 | #include "i386-xstate.h" |
c906108c | 37 | |
de57eccd | 38 | /* Print the floating point number specified by RAW. */ |
786a90bb | 39 | |
de57eccd | 40 | static void |
27067745 UW |
41 | print_i387_value (struct gdbarch *gdbarch, |
42 | const gdb_byte *raw, struct ui_file *file) | |
de57eccd JM |
43 | { |
44 | DOUBLEST value; | |
4583280c MK |
45 | |
46 | /* Using extract_typed_floating here might affect the representation | |
47 | of certain numbers such as NaNs, even if GDB is running natively. | |
48 | This is fine since our caller already detects such special | |
49 | numbers and we print the hexadecimal representation anyway. */ | |
27067745 | 50 | value = extract_typed_floating (raw, i387_ext_type (gdbarch)); |
de57eccd JM |
51 | |
52 | /* We try to print 19 digits. The last digit may or may not contain | |
53 | garbage, but we'd better print one too many. We need enough room | |
54 | to print the value, 1 position for the sign, 1 for the decimal | |
55 | point, 19 for the digits and 6 for the exponent adds up to 27. */ | |
56 | #ifdef PRINTF_HAS_LONG_DOUBLE | |
61113f8b | 57 | fprintf_filtered (file, " %-+27.19Lg", (long double) value); |
de57eccd | 58 | #else |
61113f8b | 59 | fprintf_filtered (file, " %-+27.19g", (double) value); |
de57eccd JM |
60 | #endif |
61 | } | |
62 | ||
63 | /* Print the classification for the register contents RAW. */ | |
786a90bb | 64 | |
de57eccd | 65 | static void |
27067745 UW |
66 | print_i387_ext (struct gdbarch *gdbarch, |
67 | const gdb_byte *raw, struct ui_file *file) | |
de57eccd JM |
68 | { |
69 | int sign; | |
70 | int integer; | |
71 | unsigned int exponent; | |
72 | unsigned long fraction[2]; | |
73 | ||
74 | sign = raw[9] & 0x80; | |
75 | integer = raw[7] & 0x80; | |
76 | exponent = (((raw[9] & 0x7f) << 8) | raw[8]); | |
77 | fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]); | |
78 | fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16) | |
79 | | (raw[5] << 8) | raw[4]); | |
80 | ||
81 | if (exponent == 0x7fff && integer) | |
82 | { | |
83 | if (fraction[0] == 0x00000000 && fraction[1] == 0x00000000) | |
84 | /* Infinity. */ | |
61113f8b | 85 | fprintf_filtered (file, " %cInf", (sign ? '-' : '+')); |
de57eccd JM |
86 | else if (sign && fraction[0] == 0x00000000 && fraction[1] == 0x40000000) |
87 | /* Real Indefinite (QNaN). */ | |
61113f8b | 88 | fputs_unfiltered (" Real Indefinite (QNaN)", file); |
de57eccd JM |
89 | else if (fraction[1] & 0x40000000) |
90 | /* QNaN. */ | |
61113f8b | 91 | fputs_filtered (" QNaN", file); |
de57eccd JM |
92 | else |
93 | /* SNaN. */ | |
61113f8b | 94 | fputs_filtered (" SNaN", file); |
de57eccd JM |
95 | } |
96 | else if (exponent < 0x7fff && exponent > 0x0000 && integer) | |
97 | /* Normal. */ | |
27067745 | 98 | print_i387_value (gdbarch, raw, file); |
de57eccd JM |
99 | else if (exponent == 0x0000) |
100 | { | |
101 | /* Denormal or zero. */ | |
27067745 | 102 | print_i387_value (gdbarch, raw, file); |
de57eccd JM |
103 | |
104 | if (integer) | |
105 | /* Pseudo-denormal. */ | |
61113f8b | 106 | fputs_filtered (" Pseudo-denormal", file); |
de57eccd JM |
107 | else if (fraction[0] || fraction[1]) |
108 | /* Denormal. */ | |
61113f8b | 109 | fputs_filtered (" Denormal", file); |
de57eccd JM |
110 | } |
111 | else | |
112 | /* Unsupported. */ | |
61113f8b | 113 | fputs_filtered (" Unsupported", file); |
de57eccd JM |
114 | } |
115 | ||
116 | /* Print the status word STATUS. */ | |
786a90bb | 117 | |
de57eccd | 118 | static void |
61113f8b | 119 | print_i387_status_word (unsigned int status, struct ui_file *file) |
de57eccd | 120 | { |
61113f8b | 121 | fprintf_filtered (file, "Status Word: %s", |
bb599908 | 122 | hex_string_custom (status, 4)); |
61113f8b MK |
123 | fputs_filtered (" ", file); |
124 | fprintf_filtered (file, " %s", (status & 0x0001) ? "IE" : " "); | |
125 | fprintf_filtered (file, " %s", (status & 0x0002) ? "DE" : " "); | |
126 | fprintf_filtered (file, " %s", (status & 0x0004) ? "ZE" : " "); | |
127 | fprintf_filtered (file, " %s", (status & 0x0008) ? "OE" : " "); | |
128 | fprintf_filtered (file, " %s", (status & 0x0010) ? "UE" : " "); | |
129 | fprintf_filtered (file, " %s", (status & 0x0020) ? "PE" : " "); | |
130 | fputs_filtered (" ", file); | |
131 | fprintf_filtered (file, " %s", (status & 0x0080) ? "ES" : " "); | |
132 | fputs_filtered (" ", file); | |
133 | fprintf_filtered (file, " %s", (status & 0x0040) ? "SF" : " "); | |
134 | fputs_filtered (" ", file); | |
135 | fprintf_filtered (file, " %s", (status & 0x0100) ? "C0" : " "); | |
136 | fprintf_filtered (file, " %s", (status & 0x0200) ? "C1" : " "); | |
137 | fprintf_filtered (file, " %s", (status & 0x0400) ? "C2" : " "); | |
138 | fprintf_filtered (file, " %s", (status & 0x4000) ? "C3" : " "); | |
139 | ||
140 | fputs_filtered ("\n", file); | |
141 | ||
142 | fprintf_filtered (file, | |
143 | " TOP: %d\n", ((status >> 11) & 7)); | |
de57eccd JM |
144 | } |
145 | ||
146 | /* Print the control word CONTROL. */ | |
786a90bb | 147 | |
de57eccd | 148 | static void |
61113f8b | 149 | print_i387_control_word (unsigned int control, struct ui_file *file) |
de57eccd | 150 | { |
61113f8b | 151 | fprintf_filtered (file, "Control Word: %s", |
bb599908 | 152 | hex_string_custom (control, 4)); |
61113f8b MK |
153 | fputs_filtered (" ", file); |
154 | fprintf_filtered (file, " %s", (control & 0x0001) ? "IM" : " "); | |
155 | fprintf_filtered (file, " %s", (control & 0x0002) ? "DM" : " "); | |
156 | fprintf_filtered (file, " %s", (control & 0x0004) ? "ZM" : " "); | |
157 | fprintf_filtered (file, " %s", (control & 0x0008) ? "OM" : " "); | |
158 | fprintf_filtered (file, " %s", (control & 0x0010) ? "UM" : " "); | |
159 | fprintf_filtered (file, " %s", (control & 0x0020) ? "PM" : " "); | |
de57eccd | 160 | |
61113f8b | 161 | fputs_filtered ("\n", file); |
de57eccd | 162 | |
61113f8b | 163 | fputs_filtered (" PC: ", file); |
de57eccd JM |
164 | switch ((control >> 8) & 3) |
165 | { | |
166 | case 0: | |
61113f8b | 167 | fputs_filtered ("Single Precision (24-bits)\n", file); |
de57eccd JM |
168 | break; |
169 | case 1: | |
61113f8b | 170 | fputs_filtered ("Reserved\n", file); |
de57eccd JM |
171 | break; |
172 | case 2: | |
61113f8b | 173 | fputs_filtered ("Double Precision (53-bits)\n", file); |
de57eccd JM |
174 | break; |
175 | case 3: | |
61113f8b | 176 | fputs_filtered ("Extended Precision (64-bits)\n", file); |
de57eccd JM |
177 | break; |
178 | } | |
179 | ||
61113f8b | 180 | fputs_filtered (" RC: ", file); |
de57eccd JM |
181 | switch ((control >> 10) & 3) |
182 | { | |
183 | case 0: | |
61113f8b | 184 | fputs_filtered ("Round to nearest\n", file); |
de57eccd JM |
185 | break; |
186 | case 1: | |
61113f8b | 187 | fputs_filtered ("Round down\n", file); |
de57eccd JM |
188 | break; |
189 | case 2: | |
61113f8b | 190 | fputs_filtered ("Round up\n", file); |
de57eccd JM |
191 | break; |
192 | case 3: | |
61113f8b | 193 | fputs_filtered ("Round toward zero\n", file); |
de57eccd JM |
194 | break; |
195 | } | |
196 | } | |
197 | ||
9b949a49 | 198 | /* Print out the i387 floating point state. Note that we ignore FRAME |
7d8d2918 MK |
199 | in the code below. That's OK since floating-point registers are |
200 | never saved on the stack. */ | |
201 | ||
de57eccd | 202 | void |
61113f8b | 203 | i387_print_float_info (struct gdbarch *gdbarch, struct ui_file *file, |
8e186fd6 | 204 | struct frame_info *frame, const char *args) |
de57eccd | 205 | { |
5716833c | 206 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame)); |
1d70089a MK |
207 | ULONGEST fctrl; |
208 | ULONGEST fstat; | |
209 | ULONGEST ftag; | |
210 | ULONGEST fiseg; | |
211 | ULONGEST fioff; | |
212 | ULONGEST foseg; | |
213 | ULONGEST fooff; | |
214 | ULONGEST fop; | |
de57eccd JM |
215 | int fpreg; |
216 | int top; | |
217 | ||
5716833c MK |
218 | gdb_assert (gdbarch == get_frame_arch (frame)); |
219 | ||
20a6ec49 MD |
220 | fctrl = get_frame_register_unsigned (frame, I387_FCTRL_REGNUM (tdep)); |
221 | fstat = get_frame_register_unsigned (frame, I387_FSTAT_REGNUM (tdep)); | |
222 | ftag = get_frame_register_unsigned (frame, I387_FTAG_REGNUM (tdep)); | |
223 | fiseg = get_frame_register_unsigned (frame, I387_FISEG_REGNUM (tdep)); | |
224 | fioff = get_frame_register_unsigned (frame, I387_FIOFF_REGNUM (tdep)); | |
225 | foseg = get_frame_register_unsigned (frame, I387_FOSEG_REGNUM (tdep)); | |
226 | fooff = get_frame_register_unsigned (frame, I387_FOOFF_REGNUM (tdep)); | |
227 | fop = get_frame_register_unsigned (frame, I387_FOP_REGNUM (tdep)); | |
1d70089a | 228 | |
de57eccd JM |
229 | top = ((fstat >> 11) & 7); |
230 | ||
231 | for (fpreg = 7; fpreg >= 0; fpreg--) | |
232 | { | |
b4ad899f | 233 | gdb_byte raw[I386_MAX_REGISTER_SIZE]; |
de57eccd JM |
234 | int tag = (ftag >> (fpreg * 2)) & 3; |
235 | int i; | |
236 | ||
61113f8b | 237 | fprintf_filtered (file, "%sR%d: ", fpreg == top ? "=>" : " ", fpreg); |
de57eccd JM |
238 | |
239 | switch (tag) | |
240 | { | |
241 | case 0: | |
61113f8b | 242 | fputs_filtered ("Valid ", file); |
de57eccd JM |
243 | break; |
244 | case 1: | |
61113f8b | 245 | fputs_filtered ("Zero ", file); |
de57eccd JM |
246 | break; |
247 | case 2: | |
61113f8b | 248 | fputs_filtered ("Special ", file); |
de57eccd JM |
249 | break; |
250 | case 3: | |
61113f8b | 251 | fputs_filtered ("Empty ", file); |
de57eccd JM |
252 | break; |
253 | } | |
254 | ||
1777feb0 MS |
255 | get_frame_register (frame, |
256 | (fpreg + 8 - top) % 8 + I387_ST0_REGNUM (tdep), | |
20a6ec49 | 257 | raw); |
de57eccd | 258 | |
61113f8b | 259 | fputs_filtered ("0x", file); |
de57eccd | 260 | for (i = 9; i >= 0; i--) |
61113f8b | 261 | fprintf_filtered (file, "%02x", raw[i]); |
de57eccd JM |
262 | |
263 | if (tag != 3) | |
27067745 | 264 | print_i387_ext (gdbarch, raw, file); |
de57eccd | 265 | |
61113f8b | 266 | fputs_filtered ("\n", file); |
de57eccd JM |
267 | } |
268 | ||
f16a25ae | 269 | fputs_filtered ("\n", file); |
de57eccd | 270 | |
61113f8b MK |
271 | print_i387_status_word (fstat, file); |
272 | print_i387_control_word (fctrl, file); | |
273 | fprintf_filtered (file, "Tag Word: %s\n", | |
bb599908 | 274 | hex_string_custom (ftag, 4)); |
61113f8b | 275 | fprintf_filtered (file, "Instruction Pointer: %s:", |
bb599908 PH |
276 | hex_string_custom (fiseg, 2)); |
277 | fprintf_filtered (file, "%s\n", hex_string_custom (fioff, 8)); | |
61113f8b | 278 | fprintf_filtered (file, "Operand Pointer: %s:", |
bb599908 PH |
279 | hex_string_custom (foseg, 2)); |
280 | fprintf_filtered (file, "%s\n", hex_string_custom (fooff, 8)); | |
61113f8b | 281 | fprintf_filtered (file, "Opcode: %s\n", |
bb599908 | 282 | hex_string_custom (fop ? (fop | 0xd800) : 0, 4)); |
de57eccd | 283 | } |
d532c08f MK |
284 | \f |
285 | ||
83acabca DJ |
286 | /* Return nonzero if a value of type TYPE stored in register REGNUM |
287 | needs any special handling. */ | |
288 | ||
289 | int | |
1777feb0 MS |
290 | i387_convert_register_p (struct gdbarch *gdbarch, int regnum, |
291 | struct type *type) | |
83acabca | 292 | { |
20a6ec49 | 293 | if (i386_fp_regnum_p (gdbarch, regnum)) |
83acabca DJ |
294 | { |
295 | /* Floating point registers must be converted unless we are | |
296 | accessing them in their hardware type. */ | |
27067745 | 297 | if (type == i387_ext_type (gdbarch)) |
83acabca DJ |
298 | return 0; |
299 | else | |
300 | return 1; | |
301 | } | |
302 | ||
303 | return 0; | |
304 | } | |
305 | ||
d532c08f MK |
306 | /* Read a value of type TYPE from register REGNUM in frame FRAME, and |
307 | return its contents in TO. */ | |
308 | ||
8dccd430 | 309 | int |
d532c08f | 310 | i387_register_to_value (struct frame_info *frame, int regnum, |
8dccd430 PA |
311 | struct type *type, gdb_byte *to, |
312 | int *optimizedp, int *unavailablep) | |
d532c08f | 313 | { |
27067745 | 314 | struct gdbarch *gdbarch = get_frame_arch (frame); |
b4ad899f | 315 | gdb_byte from[I386_MAX_REGISTER_SIZE]; |
d532c08f | 316 | |
27067745 | 317 | gdb_assert (i386_fp_regnum_p (gdbarch, regnum)); |
d532c08f MK |
318 | |
319 | /* We only support floating-point values. */ | |
320 | if (TYPE_CODE (type) != TYPE_CODE_FLT) | |
321 | { | |
8a3fe4f8 AC |
322 | warning (_("Cannot convert floating-point register value " |
323 | "to non-floating-point type.")); | |
8dccd430 PA |
324 | *optimizedp = *unavailablep = 0; |
325 | return 0; | |
d532c08f MK |
326 | } |
327 | ||
83acabca | 328 | /* Convert to TYPE. */ |
8dccd430 PA |
329 | if (!get_frame_register_bytes (frame, regnum, 0, TYPE_LENGTH (type), |
330 | from, optimizedp, unavailablep)) | |
331 | return 0; | |
332 | ||
27067745 | 333 | convert_typed_floating (from, i387_ext_type (gdbarch), to, type); |
8dccd430 PA |
334 | *optimizedp = *unavailablep = 0; |
335 | return 1; | |
d532c08f MK |
336 | } |
337 | ||
338 | /* Write the contents FROM of a value of type TYPE into register | |
339 | REGNUM in frame FRAME. */ | |
340 | ||
341 | void | |
342 | i387_value_to_register (struct frame_info *frame, int regnum, | |
42835c2b | 343 | struct type *type, const gdb_byte *from) |
d532c08f | 344 | { |
27067745 | 345 | struct gdbarch *gdbarch = get_frame_arch (frame); |
b4ad899f | 346 | gdb_byte to[I386_MAX_REGISTER_SIZE]; |
d532c08f | 347 | |
27067745 | 348 | gdb_assert (i386_fp_regnum_p (gdbarch, regnum)); |
d532c08f MK |
349 | |
350 | /* We only support floating-point values. */ | |
351 | if (TYPE_CODE (type) != TYPE_CODE_FLT) | |
352 | { | |
8a3fe4f8 AC |
353 | warning (_("Cannot convert non-floating-point type " |
354 | "to floating-point register value.")); | |
d532c08f MK |
355 | return; |
356 | } | |
357 | ||
83acabca | 358 | /* Convert from TYPE. */ |
27067745 | 359 | convert_typed_floating (from, type, to, i387_ext_type (gdbarch)); |
d532c08f MK |
360 | put_frame_register (frame, regnum, to); |
361 | } | |
362 | \f | |
e750d25e | 363 | |
786a90bb | 364 | /* Handle FSAVE and FXSAVE formats. */ |
e750d25e JT |
365 | |
366 | /* At fsave_offset[REGNUM] you'll find the offset to the location in | |
367 | the data structure used by the "fsave" instruction where GDB | |
368 | register REGNUM is stored. */ | |
369 | ||
370 | static int fsave_offset[] = | |
371 | { | |
5716833c MK |
372 | 28 + 0 * 10, /* %st(0) ... */ |
373 | 28 + 1 * 10, | |
374 | 28 + 2 * 10, | |
375 | 28 + 3 * 10, | |
376 | 28 + 4 * 10, | |
377 | 28 + 5 * 10, | |
378 | 28 + 6 * 10, | |
379 | 28 + 7 * 10, /* ... %st(7). */ | |
380 | 0, /* `fctrl' (16 bits). */ | |
381 | 4, /* `fstat' (16 bits). */ | |
382 | 8, /* `ftag' (16 bits). */ | |
383 | 16, /* `fiseg' (16 bits). */ | |
384 | 12, /* `fioff'. */ | |
385 | 24, /* `foseg' (16 bits). */ | |
386 | 20, /* `fooff'. */ | |
387 | 18 /* `fop' (bottom 11 bits). */ | |
e750d25e JT |
388 | }; |
389 | ||
20a6ec49 MD |
390 | #define FSAVE_ADDR(tdep, fsave, regnum) \ |
391 | (fsave + fsave_offset[regnum - I387_ST0_REGNUM (tdep)]) | |
e750d25e JT |
392 | \f |
393 | ||
41d041d6 MK |
394 | /* Fill register REGNUM in REGCACHE with the appropriate value from |
395 | *FSAVE. This function masks off any of the reserved bits in | |
396 | *FSAVE. */ | |
e750d25e JT |
397 | |
398 | void | |
41d041d6 | 399 | i387_supply_fsave (struct regcache *regcache, int regnum, const void *fsave) |
e750d25e | 400 | { |
e17a4113 UW |
401 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
402 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
403 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
b4ad899f | 404 | const gdb_byte *regs = fsave; |
e750d25e JT |
405 | int i; |
406 | ||
5716833c MK |
407 | gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM); |
408 | ||
20a6ec49 | 409 | for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++) |
ed504bdf MK |
410 | if (regnum == -1 || regnum == i) |
411 | { | |
412 | if (fsave == NULL) | |
413 | { | |
5716833c MK |
414 | regcache_raw_supply (regcache, i, NULL); |
415 | continue; | |
ed504bdf MK |
416 | } |
417 | ||
418 | /* Most of the FPU control registers occupy only 16 bits in the | |
419 | fsave area. Give those a special treatment. */ | |
20a6ec49 MD |
420 | if (i >= I387_FCTRL_REGNUM (tdep) |
421 | && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep)) | |
ed504bdf | 422 | { |
b4ad899f | 423 | gdb_byte val[4]; |
ed504bdf | 424 | |
20a6ec49 | 425 | memcpy (val, FSAVE_ADDR (tdep, regs, i), 2); |
ed504bdf | 426 | val[2] = val[3] = 0; |
20a6ec49 | 427 | if (i == I387_FOP_REGNUM (tdep)) |
ed504bdf | 428 | val[1] &= ((1 << 3) - 1); |
5716833c | 429 | regcache_raw_supply (regcache, i, val); |
ed504bdf MK |
430 | } |
431 | else | |
20a6ec49 | 432 | regcache_raw_supply (regcache, i, FSAVE_ADDR (tdep, regs, i)); |
ed504bdf | 433 | } |
b87bc0d8 MK |
434 | |
435 | /* Provide dummy values for the SSE registers. */ | |
20a6ec49 | 436 | for (i = I387_XMM0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++) |
b87bc0d8 MK |
437 | if (regnum == -1 || regnum == i) |
438 | regcache_raw_supply (regcache, i, NULL); | |
20a6ec49 | 439 | if (regnum == -1 || regnum == I387_MXCSR_REGNUM (tdep)) |
b87bc0d8 | 440 | { |
b4ad899f | 441 | gdb_byte buf[4]; |
b87bc0d8 | 442 | |
e17a4113 | 443 | store_unsigned_integer (buf, 4, byte_order, 0x1f80); |
20a6ec49 | 444 | regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), buf); |
b87bc0d8 | 445 | } |
e750d25e JT |
446 | } |
447 | ||
448 | /* Fill register REGNUM (if it is a floating-point register) in *FSAVE | |
63b6c53f MK |
449 | with the value from REGCACHE. If REGNUM is -1, do this for all |
450 | registers. This function doesn't touch any of the reserved bits in | |
451 | *FSAVE. */ | |
e750d25e JT |
452 | |
453 | void | |
63b6c53f | 454 | i387_collect_fsave (const struct regcache *regcache, int regnum, void *fsave) |
e750d25e | 455 | { |
e071d1f6 | 456 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); |
b4ad899f | 457 | gdb_byte *regs = fsave; |
e750d25e JT |
458 | int i; |
459 | ||
5716833c MK |
460 | gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM); |
461 | ||
20a6ec49 | 462 | for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++) |
e750d25e JT |
463 | if (regnum == -1 || regnum == i) |
464 | { | |
465 | /* Most of the FPU control registers occupy only 16 bits in | |
466 | the fsave area. Give those a special treatment. */ | |
20a6ec49 MD |
467 | if (i >= I387_FCTRL_REGNUM (tdep) |
468 | && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep)) | |
e750d25e | 469 | { |
b4ad899f | 470 | gdb_byte buf[4]; |
e750d25e | 471 | |
5716833c | 472 | regcache_raw_collect (regcache, i, buf); |
e750d25e | 473 | |
20a6ec49 | 474 | if (i == I387_FOP_REGNUM (tdep)) |
e750d25e JT |
475 | { |
476 | /* The opcode occupies only 11 bits. Make sure we | |
477 | don't touch the other bits. */ | |
478 | buf[1] &= ((1 << 3) - 1); | |
20a6ec49 | 479 | buf[1] |= ((FSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1)); |
e750d25e | 480 | } |
20a6ec49 | 481 | memcpy (FSAVE_ADDR (tdep, regs, i), buf, 2); |
e750d25e JT |
482 | } |
483 | else | |
20a6ec49 | 484 | regcache_raw_collect (regcache, i, FSAVE_ADDR (tdep, regs, i)); |
e750d25e JT |
485 | } |
486 | } | |
487 | \f | |
488 | ||
489 | /* At fxsave_offset[REGNUM] you'll find the offset to the location in | |
490 | the data structure used by the "fxsave" instruction where GDB | |
491 | register REGNUM is stored. */ | |
492 | ||
493 | static int fxsave_offset[] = | |
494 | { | |
5716833c | 495 | 32, /* %st(0) through ... */ |
e750d25e JT |
496 | 48, |
497 | 64, | |
498 | 80, | |
499 | 96, | |
500 | 112, | |
501 | 128, | |
5716833c MK |
502 | 144, /* ... %st(7) (80 bits each). */ |
503 | 0, /* `fctrl' (16 bits). */ | |
504 | 2, /* `fstat' (16 bits). */ | |
505 | 4, /* `ftag' (16 bits). */ | |
506 | 12, /* `fiseg' (16 bits). */ | |
507 | 8, /* `fioff'. */ | |
508 | 20, /* `foseg' (16 bits). */ | |
509 | 16, /* `fooff'. */ | |
510 | 6, /* `fop' (bottom 11 bits). */ | |
511 | 160 + 0 * 16, /* %xmm0 through ... */ | |
04c8243f MK |
512 | 160 + 1 * 16, |
513 | 160 + 2 * 16, | |
514 | 160 + 3 * 16, | |
515 | 160 + 4 * 16, | |
516 | 160 + 5 * 16, | |
517 | 160 + 6 * 16, | |
518 | 160 + 7 * 16, | |
519 | 160 + 8 * 16, | |
520 | 160 + 9 * 16, | |
521 | 160 + 10 * 16, | |
522 | 160 + 11 * 16, | |
523 | 160 + 12 * 16, | |
524 | 160 + 13 * 16, | |
525 | 160 + 14 * 16, | |
5716833c | 526 | 160 + 15 * 16, /* ... %xmm15 (128 bits each). */ |
e750d25e JT |
527 | }; |
528 | ||
20a6ec49 MD |
529 | #define FXSAVE_ADDR(tdep, fxsave, regnum) \ |
530 | (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM (tdep)]) | |
5716833c MK |
531 | |
532 | /* We made an unfortunate choice in putting %mxcsr after the SSE | |
533 | registers %xmm0-%xmm7 instead of before, since it makes supporting | |
534 | the registers %xmm8-%xmm15 on AMD64 a bit involved. Therefore we | |
535 | don't include the offset for %mxcsr here above. */ | |
536 | ||
537 | #define FXSAVE_MXCSR_ADDR(fxsave) (fxsave + 24) | |
e750d25e | 538 | |
b4ad899f | 539 | static int i387_tag (const gdb_byte *raw); |
e750d25e JT |
540 | \f |
541 | ||
41d041d6 | 542 | /* Fill register REGNUM in REGCACHE with the appropriate |
ed504bdf MK |
543 | floating-point or SSE register value from *FXSAVE. This function |
544 | masks off any of the reserved bits in *FXSAVE. */ | |
e750d25e JT |
545 | |
546 | void | |
41d041d6 | 547 | i387_supply_fxsave (struct regcache *regcache, int regnum, const void *fxsave) |
e750d25e | 548 | { |
41d041d6 | 549 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); |
b4ad899f | 550 | const gdb_byte *regs = fxsave; |
5716833c MK |
551 | int i; |
552 | ||
553 | gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM); | |
554 | gdb_assert (tdep->num_xmm_regs > 0); | |
dff95cc7 | 555 | |
20a6ec49 | 556 | for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++) |
ed504bdf MK |
557 | if (regnum == -1 || regnum == i) |
558 | { | |
5716833c | 559 | if (regs == NULL) |
ed504bdf | 560 | { |
5716833c | 561 | regcache_raw_supply (regcache, i, NULL); |
ed504bdf MK |
562 | continue; |
563 | } | |
932bb524 | 564 | |
ed504bdf MK |
565 | /* Most of the FPU control registers occupy only 16 bits in |
566 | the fxsave area. Give those a special treatment. */ | |
20a6ec49 MD |
567 | if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep) |
568 | && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep)) | |
ed504bdf | 569 | { |
b4ad899f | 570 | gdb_byte val[4]; |
ed504bdf | 571 | |
20a6ec49 | 572 | memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2); |
ed504bdf | 573 | val[2] = val[3] = 0; |
20a6ec49 | 574 | if (i == I387_FOP_REGNUM (tdep)) |
ed504bdf | 575 | val[1] &= ((1 << 3) - 1); |
20a6ec49 | 576 | else if (i== I387_FTAG_REGNUM (tdep)) |
ed504bdf MK |
577 | { |
578 | /* The fxsave area contains a simplified version of | |
579 | the tag word. We have to look at the actual 80-bit | |
580 | FP data to recreate the traditional i387 tag word. */ | |
581 | ||
582 | unsigned long ftag = 0; | |
583 | int fpreg; | |
584 | int top; | |
585 | ||
20a6ec49 MD |
586 | top = ((FXSAVE_ADDR (tdep, regs, |
587 | I387_FSTAT_REGNUM (tdep)))[1] >> 3); | |
5716833c | 588 | top &= 0x7; |
ed504bdf MK |
589 | |
590 | for (fpreg = 7; fpreg >= 0; fpreg--) | |
591 | { | |
592 | int tag; | |
593 | ||
594 | if (val[0] & (1 << fpreg)) | |
595 | { | |
6d5e094a MS |
596 | int thisreg = (fpreg + 8 - top) % 8 |
597 | + I387_ST0_REGNUM (tdep); | |
598 | tag = i387_tag (FXSAVE_ADDR (tdep, regs, thisreg)); | |
ed504bdf MK |
599 | } |
600 | else | |
601 | tag = 3; /* Empty */ | |
602 | ||
603 | ftag |= tag << (2 * fpreg); | |
604 | } | |
605 | val[0] = ftag & 0xff; | |
606 | val[1] = (ftag >> 8) & 0xff; | |
607 | } | |
5716833c | 608 | regcache_raw_supply (regcache, i, val); |
ed504bdf MK |
609 | } |
610 | else | |
20a6ec49 | 611 | regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i)); |
ed504bdf | 612 | } |
5716833c | 613 | |
20a6ec49 | 614 | if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1) |
5716833c MK |
615 | { |
616 | if (regs == NULL) | |
20a6ec49 | 617 | regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), NULL); |
5716833c | 618 | else |
20a6ec49 | 619 | regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), |
5716833c MK |
620 | FXSAVE_MXCSR_ADDR (regs)); |
621 | } | |
e750d25e JT |
622 | } |
623 | ||
624 | /* Fill register REGNUM (if it is a floating-point or SSE register) in | |
80571bff MK |
625 | *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for |
626 | all registers. This function doesn't touch any of the reserved | |
627 | bits in *FXSAVE. */ | |
e750d25e JT |
628 | |
629 | void | |
80571bff | 630 | i387_collect_fxsave (const struct regcache *regcache, int regnum, void *fxsave) |
e750d25e | 631 | { |
e071d1f6 | 632 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); |
b4ad899f | 633 | gdb_byte *regs = fxsave; |
5716833c MK |
634 | int i; |
635 | ||
636 | gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM); | |
637 | gdb_assert (tdep->num_xmm_regs > 0); | |
dff95cc7 | 638 | |
20a6ec49 | 639 | for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++) |
e750d25e JT |
640 | if (regnum == -1 || regnum == i) |
641 | { | |
642 | /* Most of the FPU control registers occupy only 16 bits in | |
643 | the fxsave area. Give those a special treatment. */ | |
20a6ec49 MD |
644 | if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep) |
645 | && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep)) | |
e750d25e | 646 | { |
b4ad899f | 647 | gdb_byte buf[4]; |
e750d25e | 648 | |
5716833c | 649 | regcache_raw_collect (regcache, i, buf); |
e750d25e | 650 | |
31aeac78 L |
651 | if (i == I387_FOP_REGNUM (tdep)) |
652 | { | |
653 | /* The opcode occupies only 11 bits. Make sure we | |
654 | don't touch the other bits. */ | |
655 | buf[1] &= ((1 << 3) - 1); | |
656 | buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1)); | |
657 | } | |
658 | else if (i == I387_FTAG_REGNUM (tdep)) | |
659 | { | |
660 | /* Converting back is much easier. */ | |
661 | ||
662 | unsigned short ftag; | |
663 | int fpreg; | |
664 | ||
665 | ftag = (buf[1] << 8) | buf[0]; | |
666 | buf[0] = 0; | |
667 | buf[1] = 0; | |
668 | ||
669 | for (fpreg = 7; fpreg >= 0; fpreg--) | |
670 | { | |
671 | int tag = (ftag >> (fpreg * 2)) & 3; | |
672 | ||
673 | if (tag != 3) | |
674 | buf[0] |= (1 << fpreg); | |
675 | } | |
676 | } | |
677 | memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2); | |
678 | } | |
679 | else | |
680 | regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i)); | |
681 | } | |
682 | ||
683 | if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1) | |
684 | regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep), | |
685 | FXSAVE_MXCSR_ADDR (regs)); | |
686 | } | |
687 | ||
688 | /* `xstate_bv' is at byte offset 512. */ | |
689 | #define XSAVE_XSTATE_BV_ADDR(xsave) (xsave + 512) | |
690 | ||
691 | /* At xsave_avxh_offset[REGNUM] you'll find the offset to the location in | |
692 | the upper 128bit of AVX register data structure used by the "xsave" | |
693 | instruction where GDB register REGNUM is stored. */ | |
694 | ||
695 | static int xsave_avxh_offset[] = | |
696 | { | |
697 | 576 + 0 * 16, /* Upper 128bit of %ymm0 through ... */ | |
698 | 576 + 1 * 16, | |
699 | 576 + 2 * 16, | |
700 | 576 + 3 * 16, | |
701 | 576 + 4 * 16, | |
702 | 576 + 5 * 16, | |
703 | 576 + 6 * 16, | |
704 | 576 + 7 * 16, | |
705 | 576 + 8 * 16, | |
706 | 576 + 9 * 16, | |
707 | 576 + 10 * 16, | |
708 | 576 + 11 * 16, | |
709 | 576 + 12 * 16, | |
710 | 576 + 13 * 16, | |
711 | 576 + 14 * 16, | |
712 | 576 + 15 * 16 /* Upper 128bit of ... %ymm15 (128 bits each). */ | |
713 | }; | |
714 | ||
715 | #define XSAVE_AVXH_ADDR(tdep, xsave, regnum) \ | |
716 | (xsave + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)]) | |
717 | ||
718 | /* Similar to i387_supply_fxsave, but use XSAVE extended state. */ | |
719 | ||
720 | void | |
721 | i387_supply_xsave (struct regcache *regcache, int regnum, | |
722 | const void *xsave) | |
723 | { | |
724 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); | |
725 | const gdb_byte *regs = xsave; | |
726 | int i; | |
727 | unsigned int clear_bv; | |
728 | const gdb_byte *p; | |
729 | enum | |
730 | { | |
731 | none = 0x0, | |
732 | x87 = 0x1, | |
733 | sse = 0x2, | |
734 | avxh = 0x4, | |
735 | all = x87 | sse | avxh | |
736 | } regclass; | |
737 | ||
738 | gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM); | |
739 | gdb_assert (tdep->num_xmm_regs > 0); | |
740 | ||
741 | if (regnum == -1) | |
742 | regclass = all; | |
743 | else if (regnum >= I387_YMM0H_REGNUM (tdep) | |
744 | && regnum < I387_YMMENDH_REGNUM (tdep)) | |
745 | regclass = avxh; | |
746 | else if (regnum >= I387_XMM0_REGNUM(tdep) | |
747 | && regnum < I387_MXCSR_REGNUM (tdep)) | |
748 | regclass = sse; | |
749 | else if (regnum >= I387_ST0_REGNUM (tdep) | |
750 | && regnum < I387_FCTRL_REGNUM (tdep)) | |
751 | regclass = x87; | |
752 | else | |
753 | regclass = none; | |
754 | ||
755 | if (regs != NULL && regclass != none) | |
756 | { | |
757 | /* Get `xstat_bv'. */ | |
758 | const gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs); | |
759 | ||
760 | /* The supported bits in `xstat_bv' are 1 byte. Clear part in | |
761 | vector registers if its bit in xstat_bv is zero. */ | |
762 | clear_bv = (~(*xstate_bv_p)) & tdep->xcr0; | |
763 | } | |
764 | else | |
765 | clear_bv = I386_XSTATE_AVX_MASK; | |
766 | ||
767 | switch (regclass) | |
768 | { | |
769 | case none: | |
770 | break; | |
771 | ||
772 | case avxh: | |
773 | if ((clear_bv & I386_XSTATE_AVX)) | |
774 | p = NULL; | |
775 | else | |
776 | p = XSAVE_AVXH_ADDR (tdep, regs, regnum); | |
777 | regcache_raw_supply (regcache, regnum, p); | |
778 | return; | |
779 | ||
780 | case sse: | |
781 | if ((clear_bv & I386_XSTATE_SSE)) | |
782 | p = NULL; | |
783 | else | |
784 | p = FXSAVE_ADDR (tdep, regs, regnum); | |
785 | regcache_raw_supply (regcache, regnum, p); | |
786 | return; | |
787 | ||
788 | case x87: | |
789 | if ((clear_bv & I386_XSTATE_X87)) | |
790 | p = NULL; | |
791 | else | |
792 | p = FXSAVE_ADDR (tdep, regs, regnum); | |
793 | regcache_raw_supply (regcache, regnum, p); | |
794 | return; | |
795 | ||
796 | case all: | |
86d31898 | 797 | /* Handle the upper YMM registers. */ |
31aeac78 L |
798 | if ((tdep->xcr0 & I386_XSTATE_AVX)) |
799 | { | |
800 | if ((clear_bv & I386_XSTATE_AVX)) | |
801 | p = NULL; | |
802 | else | |
803 | p = regs; | |
804 | ||
805 | for (i = I387_YMM0H_REGNUM (tdep); | |
806 | i < I387_YMMENDH_REGNUM (tdep); i++) | |
807 | { | |
808 | if (p != NULL) | |
809 | p = XSAVE_AVXH_ADDR (tdep, regs, i); | |
810 | regcache_raw_supply (regcache, i, p); | |
811 | } | |
812 | } | |
813 | ||
814 | /* Handle the XMM registers. */ | |
815 | if ((tdep->xcr0 & I386_XSTATE_SSE)) | |
816 | { | |
817 | if ((clear_bv & I386_XSTATE_SSE)) | |
818 | p = NULL; | |
819 | else | |
820 | p = regs; | |
821 | ||
822 | for (i = I387_XMM0_REGNUM (tdep); | |
823 | i < I387_MXCSR_REGNUM (tdep); i++) | |
824 | { | |
825 | if (p != NULL) | |
826 | p = FXSAVE_ADDR (tdep, regs, i); | |
827 | regcache_raw_supply (regcache, i, p); | |
828 | } | |
829 | } | |
830 | ||
831 | /* Handle the x87 registers. */ | |
832 | if ((tdep->xcr0 & I386_XSTATE_X87)) | |
833 | { | |
834 | if ((clear_bv & I386_XSTATE_X87)) | |
835 | p = NULL; | |
836 | else | |
837 | p = regs; | |
838 | ||
839 | for (i = I387_ST0_REGNUM (tdep); | |
840 | i < I387_FCTRL_REGNUM (tdep); i++) | |
841 | { | |
842 | if (p != NULL) | |
843 | p = FXSAVE_ADDR (tdep, regs, i); | |
844 | regcache_raw_supply (regcache, i, p); | |
845 | } | |
846 | } | |
847 | break; | |
848 | } | |
849 | ||
850 | /* Only handle x87 control registers. */ | |
851 | for (i = I387_FCTRL_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++) | |
852 | if (regnum == -1 || regnum == i) | |
853 | { | |
854 | if (regs == NULL) | |
855 | { | |
856 | regcache_raw_supply (regcache, i, NULL); | |
857 | continue; | |
858 | } | |
859 | ||
860 | /* Most of the FPU control registers occupy only 16 bits in | |
861 | the xsave extended state. Give those a special treatment. */ | |
862 | if (i != I387_FIOFF_REGNUM (tdep) | |
863 | && i != I387_FOOFF_REGNUM (tdep)) | |
864 | { | |
865 | gdb_byte val[4]; | |
866 | ||
867 | memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2); | |
868 | val[2] = val[3] = 0; | |
869 | if (i == I387_FOP_REGNUM (tdep)) | |
870 | val[1] &= ((1 << 3) - 1); | |
871 | else if (i== I387_FTAG_REGNUM (tdep)) | |
872 | { | |
873 | /* The fxsave area contains a simplified version of | |
874 | the tag word. We have to look at the actual 80-bit | |
875 | FP data to recreate the traditional i387 tag word. */ | |
876 | ||
877 | unsigned long ftag = 0; | |
878 | int fpreg; | |
879 | int top; | |
880 | ||
881 | top = ((FXSAVE_ADDR (tdep, regs, | |
882 | I387_FSTAT_REGNUM (tdep)))[1] >> 3); | |
883 | top &= 0x7; | |
884 | ||
885 | for (fpreg = 7; fpreg >= 0; fpreg--) | |
886 | { | |
887 | int tag; | |
888 | ||
889 | if (val[0] & (1 << fpreg)) | |
890 | { | |
e5b3d7d6 | 891 | int thisreg = (fpreg + 8 - top) % 8 |
31aeac78 | 892 | + I387_ST0_REGNUM (tdep); |
e5b3d7d6 | 893 | tag = i387_tag (FXSAVE_ADDR (tdep, regs, thisreg)); |
31aeac78 L |
894 | } |
895 | else | |
896 | tag = 3; /* Empty */ | |
897 | ||
898 | ftag |= tag << (2 * fpreg); | |
899 | } | |
900 | val[0] = ftag & 0xff; | |
901 | val[1] = (ftag >> 8) & 0xff; | |
902 | } | |
903 | regcache_raw_supply (regcache, i, val); | |
904 | } | |
905 | else | |
906 | regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i)); | |
907 | } | |
908 | ||
909 | if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1) | |
910 | { | |
911 | p = regs == NULL ? NULL : FXSAVE_MXCSR_ADDR (regs); | |
912 | regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), p); | |
913 | } | |
914 | } | |
915 | ||
916 | /* Similar to i387_collect_fxsave, but use XSAVE extended state. */ | |
917 | ||
918 | void | |
919 | i387_collect_xsave (const struct regcache *regcache, int regnum, | |
920 | void *xsave, int gcore) | |
921 | { | |
922 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); | |
923 | gdb_byte *regs = xsave; | |
924 | int i; | |
925 | enum | |
926 | { | |
927 | none = 0x0, | |
928 | check = 0x1, | |
929 | x87 = 0x2 | check, | |
930 | sse = 0x4 | check, | |
931 | avxh = 0x8 | check, | |
932 | all = x87 | sse | avxh | |
933 | } regclass; | |
934 | ||
935 | gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM); | |
936 | gdb_assert (tdep->num_xmm_regs > 0); | |
937 | ||
938 | if (regnum == -1) | |
939 | regclass = all; | |
940 | else if (regnum >= I387_YMM0H_REGNUM (tdep) | |
941 | && regnum < I387_YMMENDH_REGNUM (tdep)) | |
942 | regclass = avxh; | |
943 | else if (regnum >= I387_XMM0_REGNUM(tdep) | |
944 | && regnum < I387_MXCSR_REGNUM (tdep)) | |
945 | regclass = sse; | |
946 | else if (regnum >= I387_ST0_REGNUM (tdep) | |
947 | && regnum < I387_FCTRL_REGNUM (tdep)) | |
948 | regclass = x87; | |
949 | else | |
950 | regclass = none; | |
951 | ||
952 | if (gcore) | |
953 | { | |
954 | /* Clear XSAVE extended state. */ | |
955 | memset (regs, 0, I386_XSTATE_SIZE (tdep->xcr0)); | |
956 | ||
957 | /* Update XCR0 and `xstate_bv' with XCR0 for gcore. */ | |
958 | if (tdep->xsave_xcr0_offset != -1) | |
959 | memcpy (regs + tdep->xsave_xcr0_offset, &tdep->xcr0, 8); | |
960 | memcpy (XSAVE_XSTATE_BV_ADDR (regs), &tdep->xcr0, 8); | |
961 | } | |
962 | ||
963 | if ((regclass & check)) | |
964 | { | |
965 | gdb_byte raw[I386_MAX_REGISTER_SIZE]; | |
966 | gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs); | |
967 | unsigned int xstate_bv = 0; | |
1777feb0 | 968 | /* The supported bits in `xstat_bv' are 1 byte. */ |
31aeac78 L |
969 | unsigned int clear_bv = (~(*xstate_bv_p)) & tdep->xcr0; |
970 | gdb_byte *p; | |
971 | ||
972 | /* Clear register set if its bit in xstat_bv is zero. */ | |
973 | if (clear_bv) | |
974 | { | |
975 | if ((clear_bv & I386_XSTATE_AVX)) | |
976 | for (i = I387_YMM0H_REGNUM (tdep); | |
977 | i < I387_YMMENDH_REGNUM (tdep); i++) | |
978 | memset (XSAVE_AVXH_ADDR (tdep, regs, i), 0, 16); | |
979 | ||
980 | if ((clear_bv & I386_XSTATE_SSE)) | |
981 | for (i = I387_XMM0_REGNUM (tdep); | |
982 | i < I387_MXCSR_REGNUM (tdep); i++) | |
983 | memset (FXSAVE_ADDR (tdep, regs, i), 0, 16); | |
984 | ||
985 | if ((clear_bv & I386_XSTATE_X87)) | |
986 | for (i = I387_ST0_REGNUM (tdep); | |
987 | i < I387_FCTRL_REGNUM (tdep); i++) | |
988 | memset (FXSAVE_ADDR (tdep, regs, i), 0, 10); | |
989 | } | |
990 | ||
991 | if (regclass == all) | |
992 | { | |
993 | /* Check if any upper YMM registers are changed. */ | |
994 | if ((tdep->xcr0 & I386_XSTATE_AVX)) | |
995 | for (i = I387_YMM0H_REGNUM (tdep); | |
996 | i < I387_YMMENDH_REGNUM (tdep); i++) | |
997 | { | |
998 | regcache_raw_collect (regcache, i, raw); | |
999 | p = XSAVE_AVXH_ADDR (tdep, regs, i); | |
1000 | if (memcmp (raw, p, 16)) | |
1001 | { | |
1002 | xstate_bv |= I386_XSTATE_AVX; | |
1003 | memcpy (p, raw, 16); | |
1004 | } | |
1005 | } | |
1006 | ||
1007 | /* Check if any SSE registers are changed. */ | |
1008 | if ((tdep->xcr0 & I386_XSTATE_SSE)) | |
1009 | for (i = I387_XMM0_REGNUM (tdep); | |
1010 | i < I387_MXCSR_REGNUM (tdep); i++) | |
1011 | { | |
1012 | regcache_raw_collect (regcache, i, raw); | |
1013 | p = FXSAVE_ADDR (tdep, regs, i); | |
1014 | if (memcmp (raw, p, 16)) | |
1015 | { | |
1016 | xstate_bv |= I386_XSTATE_SSE; | |
1017 | memcpy (p, raw, 16); | |
1018 | } | |
1019 | } | |
1020 | ||
1021 | /* Check if any X87 registers are changed. */ | |
1022 | if ((tdep->xcr0 & I386_XSTATE_X87)) | |
1023 | for (i = I387_ST0_REGNUM (tdep); | |
1024 | i < I387_FCTRL_REGNUM (tdep); i++) | |
1025 | { | |
1026 | regcache_raw_collect (regcache, i, raw); | |
1027 | p = FXSAVE_ADDR (tdep, regs, i); | |
1028 | if (memcmp (raw, p, 10)) | |
1029 | { | |
1030 | xstate_bv |= I386_XSTATE_X87; | |
1031 | memcpy (p, raw, 10); | |
1032 | } | |
1033 | } | |
1034 | } | |
1035 | else | |
1036 | { | |
1037 | /* Check if REGNUM is changed. */ | |
1038 | regcache_raw_collect (regcache, regnum, raw); | |
1039 | ||
1040 | switch (regclass) | |
1041 | { | |
1042 | default: | |
4e4d8374 L |
1043 | internal_error (__FILE__, __LINE__, |
1044 | _("invalid i387 regclass")); | |
31aeac78 | 1045 | |
40936b0d L |
1046 | case avxh: |
1047 | /* This is an upper YMM register. */ | |
1048 | p = XSAVE_AVXH_ADDR (tdep, regs, regnum); | |
1049 | if (memcmp (raw, p, 16)) | |
31aeac78 | 1050 | { |
40936b0d L |
1051 | xstate_bv |= I386_XSTATE_AVX; |
1052 | memcpy (p, raw, 16); | |
1053 | } | |
1054 | break; | |
31aeac78 | 1055 | |
40936b0d L |
1056 | case sse: |
1057 | /* This is an SSE register. */ | |
1058 | p = FXSAVE_ADDR (tdep, regs, regnum); | |
1059 | if (memcmp (raw, p, 16)) | |
1060 | { | |
1061 | xstate_bv |= I386_XSTATE_SSE; | |
1062 | memcpy (p, raw, 16); | |
1063 | } | |
1064 | break; | |
31aeac78 | 1065 | |
40936b0d L |
1066 | case x87: |
1067 | /* This is an x87 register. */ | |
1068 | p = FXSAVE_ADDR (tdep, regs, regnum); | |
1069 | if (memcmp (raw, p, 10)) | |
1070 | { | |
1071 | xstate_bv |= I386_XSTATE_X87; | |
1072 | memcpy (p, raw, 10); | |
31aeac78 | 1073 | } |
40936b0d | 1074 | break; |
31aeac78 | 1075 | } |
40936b0d L |
1076 | } |
1077 | ||
1078 | /* Update the corresponding bits in `xstate_bv' if any SSE/AVX | |
1079 | registers are changed. */ | |
1080 | if (xstate_bv) | |
1081 | { | |
1082 | /* The supported bits in `xstat_bv' are 1 byte. */ | |
1083 | *xstate_bv_p |= (gdb_byte) xstate_bv; | |
1084 | ||
1085 | switch (regclass) | |
31aeac78 | 1086 | { |
40936b0d | 1087 | default: |
4e4d8374 L |
1088 | internal_error (__FILE__, __LINE__, |
1089 | _("invalid i387 regclass")); | |
40936b0d L |
1090 | |
1091 | case all: | |
1092 | break; | |
1093 | ||
1094 | case x87: | |
1095 | case sse: | |
1096 | case avxh: | |
1097 | /* Register REGNUM has been updated. Return. */ | |
1098 | return; | |
31aeac78 | 1099 | } |
40936b0d L |
1100 | } |
1101 | else | |
1102 | { | |
1103 | /* Return if REGNUM isn't changed. */ | |
1104 | if (regclass != all) | |
1105 | return; | |
1106 | } | |
31aeac78 L |
1107 | } |
1108 | ||
1109 | /* Only handle x87 control registers. */ | |
1110 | for (i = I387_FCTRL_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++) | |
1111 | if (regnum == -1 || regnum == i) | |
1112 | { | |
1113 | /* Most of the FPU control registers occupy only 16 bits in | |
1114 | the xsave extended state. Give those a special treatment. */ | |
1115 | if (i != I387_FIOFF_REGNUM (tdep) | |
1116 | && i != I387_FOOFF_REGNUM (tdep)) | |
1117 | { | |
1118 | gdb_byte buf[4]; | |
1119 | ||
1120 | regcache_raw_collect (regcache, i, buf); | |
1121 | ||
20a6ec49 | 1122 | if (i == I387_FOP_REGNUM (tdep)) |
e750d25e JT |
1123 | { |
1124 | /* The opcode occupies only 11 bits. Make sure we | |
40936b0d | 1125 | don't touch the other bits. */ |
e750d25e | 1126 | buf[1] &= ((1 << 3) - 1); |
20a6ec49 | 1127 | buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1)); |
e750d25e | 1128 | } |
20a6ec49 | 1129 | else if (i == I387_FTAG_REGNUM (tdep)) |
e750d25e JT |
1130 | { |
1131 | /* Converting back is much easier. */ | |
1132 | ||
1133 | unsigned short ftag; | |
1134 | int fpreg; | |
1135 | ||
1136 | ftag = (buf[1] << 8) | buf[0]; | |
1137 | buf[0] = 0; | |
1138 | buf[1] = 0; | |
1139 | ||
1140 | for (fpreg = 7; fpreg >= 0; fpreg--) | |
1141 | { | |
1142 | int tag = (ftag >> (fpreg * 2)) & 3; | |
1143 | ||
1144 | if (tag != 3) | |
1145 | buf[0] |= (1 << fpreg); | |
1146 | } | |
1147 | } | |
20a6ec49 | 1148 | memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2); |
e750d25e JT |
1149 | } |
1150 | else | |
20a6ec49 | 1151 | regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i)); |
e750d25e | 1152 | } |
5716833c | 1153 | |
20a6ec49 MD |
1154 | if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1) |
1155 | regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep), | |
5716833c | 1156 | FXSAVE_MXCSR_ADDR (regs)); |
e750d25e JT |
1157 | } |
1158 | ||
1159 | /* Recreate the FTW (tag word) valid bits from the 80-bit FP data in | |
1160 | *RAW. */ | |
1161 | ||
1162 | static int | |
b4ad899f | 1163 | i387_tag (const gdb_byte *raw) |
e750d25e JT |
1164 | { |
1165 | int integer; | |
1166 | unsigned int exponent; | |
1167 | unsigned long fraction[2]; | |
1168 | ||
1169 | integer = raw[7] & 0x80; | |
1170 | exponent = (((raw[9] & 0x7f) << 8) | raw[8]); | |
1171 | fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]); | |
1172 | fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16) | |
1173 | | (raw[5] << 8) | raw[4]); | |
1174 | ||
1175 | if (exponent == 0x7fff) | |
1176 | { | |
1177 | /* Special. */ | |
1178 | return (2); | |
1179 | } | |
1180 | else if (exponent == 0x0000) | |
1181 | { | |
1182 | if (fraction[0] == 0x0000 && fraction[1] == 0x0000 && !integer) | |
1183 | { | |
1184 | /* Zero. */ | |
1185 | return (1); | |
1186 | } | |
1187 | else | |
1188 | { | |
1189 | /* Special. */ | |
1190 | return (2); | |
1191 | } | |
1192 | } | |
1193 | else | |
1194 | { | |
1195 | if (integer) | |
1196 | { | |
1197 | /* Valid. */ | |
1198 | return (0); | |
1199 | } | |
1200 | else | |
1201 | { | |
1202 | /* Special. */ | |
1203 | return (2); | |
1204 | } | |
1205 | } | |
1206 | } | |
efb1c01c MK |
1207 | |
1208 | /* Prepare the FPU stack in REGCACHE for a function return. */ | |
1209 | ||
1210 | void | |
1211 | i387_return_value (struct gdbarch *gdbarch, struct regcache *regcache) | |
1212 | { | |
1213 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
1214 | ULONGEST fstat; | |
1215 | ||
efb1c01c MK |
1216 | /* Set the top of the floating-point register stack to 7. The |
1217 | actual value doesn't really matter, but 7 is what a normal | |
1218 | function return would end up with if the program started out with | |
1219 | a freshly initialized FPU. */ | |
20a6ec49 | 1220 | regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat); |
efb1c01c | 1221 | fstat |= (7 << 11); |
20a6ec49 | 1222 | regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM (tdep), fstat); |
efb1c01c MK |
1223 | |
1224 | /* Mark %st(1) through %st(7) as empty. Since we set the top of the | |
1225 | floating-point register stack to 7, the appropriate value for the | |
1226 | tag word is 0x3fff. */ | |
20a6ec49 | 1227 | regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM (tdep), 0x3fff); |
efb1c01c | 1228 | |
efb1c01c | 1229 | } |