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dd3b648e RP |
1 | /* Target-machine dependent code for the Intel 960 |
2 | Copyright (C) 1991 Free Software Foundation, Inc. | |
3 | Contributed by Intel Corporation. | |
4 | examine_prologue and other parts contributed by Wind River Systems. | |
5 | ||
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
99a7de40 JG |
10 | the Free Software Foundation; either version 2 of the License, or |
11 | (at your option) any later version. | |
dd3b648e RP |
12 | |
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
99a7de40 JG |
19 | along with this program; if not, write to the Free Software |
20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
dd3b648e RP |
21 | |
22 | /* Miscellaneous i80960-dependent routines. | |
23 | Most are called from macros defined in "tm-i960.h". */ | |
24 | ||
dd3b648e | 25 | #include "defs.h" |
d747e0af | 26 | #include <signal.h> |
dd3b648e RP |
27 | #include "symtab.h" |
28 | #include "value.h" | |
29 | #include "frame.h" | |
30 | #include "signame.h" | |
31 | #include "ieee-float.h" | |
32 | ||
33 | /* Structure of i960 extended floating point format. */ | |
34 | ||
9fa28378 | 35 | const struct ext_format ext_format_i960 = { |
dd3b648e | 36 | /* tot sbyte smask expbyte manbyte */ |
9fa28378 | 37 | 12, 9, 0x80, 9,8, 4,0, /* i960 */ |
dd3b648e RP |
38 | }; |
39 | ||
40 | /* gdb960 is always running on a non-960 host. Check its characteristics. | |
41 | This routine must be called as part of gdb initialization. */ | |
42 | ||
43 | static void | |
44 | check_host() | |
45 | { | |
46 | int i; | |
47 | ||
48 | static struct typestruct { | |
49 | int hostsize; /* Size of type on host */ | |
50 | int i960size; /* Size of type on i960 */ | |
51 | char *typename; /* Name of type, for error msg */ | |
52 | } types[] = { | |
53 | { sizeof(short), 2, "short" }, | |
54 | { sizeof(int), 4, "int" }, | |
55 | { sizeof(long), 4, "long" }, | |
56 | { sizeof(float), 4, "float" }, | |
57 | { sizeof(double), 8, "double" }, | |
58 | { sizeof(char *), 4, "pointer" }, | |
59 | }; | |
60 | #define TYPELEN (sizeof(types) / sizeof(struct typestruct)) | |
61 | ||
62 | /* Make sure that host type sizes are same as i960 | |
63 | */ | |
64 | for ( i = 0; i < TYPELEN; i++ ){ | |
65 | if ( types[i].hostsize != types[i].i960size ){ | |
66 | printf("sizeof(%s) != %d: PROCEED AT YOUR OWN RISK!\n", | |
67 | types[i].typename, types[i].i960size ); | |
68 | } | |
69 | ||
70 | } | |
71 | } | |
72 | \f | |
73 | /* Examine an i960 function prologue, recording the addresses at which | |
74 | registers are saved explicitly by the prologue code, and returning | |
75 | the address of the first instruction after the prologue (but not | |
76 | after the instruction at address LIMIT, as explained below). | |
77 | ||
78 | LIMIT places an upper bound on addresses of the instructions to be | |
79 | examined. If the prologue code scan reaches LIMIT, the scan is | |
80 | aborted and LIMIT is returned. This is used, when examining the | |
81 | prologue for the current frame, to keep examine_prologue () from | |
82 | claiming that a given register has been saved when in fact the | |
83 | instruction that saves it has not yet been executed. LIMIT is used | |
84 | at other times to stop the scan when we hit code after the true | |
85 | function prologue (e.g. for the first source line) which might | |
86 | otherwise be mistaken for function prologue. | |
87 | ||
88 | The format of the function prologue matched by this routine is | |
89 | derived from examination of the source to gcc960 1.21, particularly | |
90 | the routine i960_function_prologue (). A "regular expression" for | |
91 | the function prologue is given below: | |
92 | ||
93 | (lda LRn, g14 | |
94 | mov g14, g[0-7] | |
95 | (mov 0, g14) | (lda 0, g14))? | |
96 | ||
97 | (mov[qtl]? g[0-15], r[4-15])* | |
98 | ((addo [1-31], sp, sp) | (lda n(sp), sp))? | |
99 | (st[qtl]? g[0-15], n(fp))* | |
100 | ||
101 | (cmpobne 0, g14, LFn | |
102 | mov sp, g14 | |
103 | lda 0x30(sp), sp | |
104 | LFn: stq g0, (g14) | |
105 | stq g4, 0x10(g14) | |
106 | stq g8, 0x20(g14))? | |
107 | ||
108 | (st g14, n(fp))? | |
109 | (mov g13,r[4-15])? | |
110 | */ | |
111 | ||
112 | /* Macros for extracting fields from i960 instructions. */ | |
113 | ||
114 | #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos)) | |
115 | #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width)) | |
116 | ||
117 | #define REG_SRC1(insn) EXTRACT_FIELD (insn, 0, 5) | |
118 | #define REG_SRC2(insn) EXTRACT_FIELD (insn, 14, 5) | |
119 | #define REG_SRCDST(insn) EXTRACT_FIELD (insn, 19, 5) | |
120 | #define MEM_SRCDST(insn) EXTRACT_FIELD (insn, 19, 5) | |
121 | #define MEMA_OFFSET(insn) EXTRACT_FIELD (insn, 0, 12) | |
122 | ||
123 | /* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or | |
124 | is not the address of a valid instruction, the address of the next | |
125 | instruction beyond ADDR otherwise. *PWORD1 receives the first word | |
126 | of the instruction, and (for two-word instructions), *PWORD2 receives | |
127 | the second. */ | |
128 | ||
129 | #define NEXT_PROLOGUE_INSN(addr, lim, pword1, pword2) \ | |
130 | (((addr) < (lim)) ? next_insn (addr, pword1, pword2) : 0) | |
131 | ||
132 | static CORE_ADDR | |
133 | examine_prologue (ip, limit, frame_addr, fsr) | |
134 | register CORE_ADDR ip; | |
135 | register CORE_ADDR limit; | |
136 | FRAME_ADDR frame_addr; | |
137 | struct frame_saved_regs *fsr; | |
138 | { | |
139 | register CORE_ADDR next_ip; | |
140 | register int src, dst; | |
141 | register unsigned int *pcode; | |
142 | unsigned int insn1, insn2; | |
143 | int size; | |
144 | int within_leaf_prologue; | |
145 | CORE_ADDR save_addr; | |
146 | static unsigned int varargs_prologue_code [] = | |
147 | { | |
148 | 0x3507a00c, /* cmpobne 0x0, g14, LFn */ | |
149 | 0x5cf01601, /* mov sp, g14 */ | |
150 | 0x8c086030, /* lda 0x30(sp), sp */ | |
151 | 0xb2879000, /* LFn: stq g0, (g14) */ | |
152 | 0xb2a7a010, /* stq g4, 0x10(g14) */ | |
153 | 0xb2c7a020 /* stq g8, 0x20(g14) */ | |
154 | }; | |
155 | ||
156 | /* Accept a leaf procedure prologue code fragment if present. | |
157 | Note that ip might point to either the leaf or non-leaf | |
158 | entry point; we look for the non-leaf entry point first: */ | |
159 | ||
160 | within_leaf_prologue = 0; | |
161 | if ((next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2)) | |
162 | && ((insn1 & 0xfffff000) == 0x8cf00000 /* lda LRx, g14 (MEMA) */ | |
163 | || (insn1 & 0xfffffc60) == 0x8cf03000)) /* lda LRx, g14 (MEMB) */ | |
164 | { | |
165 | within_leaf_prologue = 1; | |
166 | next_ip = NEXT_PROLOGUE_INSN (next_ip, limit, &insn1, &insn2); | |
167 | } | |
168 | ||
169 | /* Now look for the prologue code at a leaf entry point: */ | |
170 | ||
171 | if (next_ip | |
172 | && (insn1 & 0xff87ffff) == 0x5c80161e /* mov g14, gx */ | |
173 | && REG_SRCDST (insn1) <= G0_REGNUM + 7) | |
174 | { | |
175 | within_leaf_prologue = 1; | |
176 | if ((next_ip = NEXT_PROLOGUE_INSN (next_ip, limit, &insn1, &insn2)) | |
177 | && (insn1 == 0x8cf00000 /* lda 0, g14 */ | |
178 | || insn1 == 0x5cf01e00)) /* mov 0, g14 */ | |
179 | { | |
180 | ip = next_ip; | |
181 | next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2); | |
182 | within_leaf_prologue = 0; | |
183 | } | |
184 | } | |
185 | ||
186 | /* If something that looks like the beginning of a leaf prologue | |
187 | has been seen, but the remainder of the prologue is missing, bail. | |
188 | We don't know what we've got. */ | |
189 | ||
190 | if (within_leaf_prologue) | |
191 | return (ip); | |
192 | ||
193 | /* Accept zero or more instances of "mov[qtl]? gx, ry", where y >= 4. | |
194 | This may cause us to mistake the moving of a register | |
195 | parameter to a local register for the saving of a callee-saved | |
196 | register, but that can't be helped, since with the | |
197 | "-fcall-saved" flag, any register can be made callee-saved. */ | |
198 | ||
199 | while (next_ip | |
200 | && (insn1 & 0xfc802fb0) == 0x5c000610 | |
201 | && (dst = REG_SRCDST (insn1)) >= (R0_REGNUM + 4)) | |
202 | { | |
203 | src = REG_SRC1 (insn1); | |
204 | size = EXTRACT_FIELD (insn1, 24, 2) + 1; | |
205 | save_addr = frame_addr + ((dst - R0_REGNUM) * 4); | |
206 | while (size--) | |
207 | { | |
208 | fsr->regs[src++] = save_addr; | |
209 | save_addr += 4; | |
210 | } | |
211 | ip = next_ip; | |
212 | next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2); | |
213 | } | |
214 | ||
215 | /* Accept an optional "addo n, sp, sp" or "lda n(sp), sp". */ | |
216 | ||
217 | if (next_ip && | |
218 | ((insn1 & 0xffffffe0) == 0x59084800 /* addo n, sp, sp */ | |
219 | || (insn1 & 0xfffff000) == 0x8c086000 /* lda n(sp), sp (MEMA) */ | |
220 | || (insn1 & 0xfffffc60) == 0x8c087400)) /* lda n(sp), sp (MEMB) */ | |
221 | { | |
222 | ip = next_ip; | |
223 | next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2); | |
224 | } | |
225 | ||
226 | /* Accept zero or more instances of "st[qtl]? gx, n(fp)". | |
227 | This may cause us to mistake the copying of a register | |
228 | parameter to the frame for the saving of a callee-saved | |
229 | register, but that can't be helped, since with the | |
230 | "-fcall-saved" flag, any register can be made callee-saved. | |
231 | We can, however, refuse to accept a save of register g14, | |
232 | since that is matched explicitly below. */ | |
233 | ||
234 | while (next_ip && | |
235 | ((insn1 & 0xf787f000) == 0x9287e000 /* stl? gx, n(fp) (MEMA) */ | |
236 | || (insn1 & 0xf787fc60) == 0x9287f400 /* stl? gx, n(fp) (MEMB) */ | |
237 | || (insn1 & 0xef87f000) == 0xa287e000 /* st[tq] gx, n(fp) (MEMA) */ | |
238 | || (insn1 & 0xef87fc60) == 0xa287f400) /* st[tq] gx, n(fp) (MEMB) */ | |
239 | && ((src = MEM_SRCDST (insn1)) != G14_REGNUM)) | |
240 | { | |
241 | save_addr = frame_addr + ((insn1 & BITMASK (12, 1)) | |
242 | ? insn2 : MEMA_OFFSET (insn1)); | |
243 | size = (insn1 & BITMASK (29, 1)) ? ((insn1 & BITMASK (28, 1)) ? 4 : 3) | |
244 | : ((insn1 & BITMASK (27, 1)) ? 2 : 1); | |
245 | while (size--) | |
246 | { | |
247 | fsr->regs[src++] = save_addr; | |
248 | save_addr += 4; | |
249 | } | |
250 | ip = next_ip; | |
251 | next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2); | |
252 | } | |
253 | ||
254 | /* Accept the varargs prologue code if present. */ | |
255 | ||
256 | size = sizeof (varargs_prologue_code) / sizeof (int); | |
257 | pcode = varargs_prologue_code; | |
258 | while (size-- && next_ip && *pcode++ == insn1) | |
259 | { | |
260 | ip = next_ip; | |
261 | next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2); | |
262 | } | |
263 | ||
264 | /* Accept an optional "st g14, n(fp)". */ | |
265 | ||
266 | if (next_ip && | |
267 | ((insn1 & 0xfffff000) == 0x92f7e000 /* st g14, n(fp) (MEMA) */ | |
268 | || (insn1 & 0xfffffc60) == 0x92f7f400)) /* st g14, n(fp) (MEMB) */ | |
269 | { | |
270 | fsr->regs[G14_REGNUM] = frame_addr + ((insn1 & BITMASK (12, 1)) | |
271 | ? insn2 : MEMA_OFFSET (insn1)); | |
272 | ip = next_ip; | |
273 | next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2); | |
274 | } | |
275 | ||
276 | /* Accept zero or one instance of "mov g13, ry", where y >= 4. | |
277 | This is saving the address where a struct should be returned. */ | |
278 | ||
279 | if (next_ip | |
280 | && (insn1 & 0xff802fbf) == 0x5c00061d | |
281 | && (dst = REG_SRCDST (insn1)) >= (R0_REGNUM + 4)) | |
282 | { | |
283 | save_addr = frame_addr + ((dst - R0_REGNUM) * 4); | |
284 | fsr->regs[G0_REGNUM+13] = save_addr; | |
285 | ip = next_ip; | |
286 | #if 0 /* We'll need this once there is a subsequent instruction examined. */ | |
287 | next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2); | |
288 | #endif | |
289 | } | |
290 | ||
291 | return (ip); | |
292 | } | |
293 | ||
294 | /* Given an ip value corresponding to the start of a function, | |
295 | return the ip of the first instruction after the function | |
296 | prologue. */ | |
297 | ||
298 | CORE_ADDR | |
299 | skip_prologue (ip) | |
300 | CORE_ADDR (ip); | |
301 | { | |
302 | struct frame_saved_regs saved_regs_dummy; | |
303 | struct symtab_and_line sal; | |
304 | CORE_ADDR limit; | |
305 | ||
306 | sal = find_pc_line (ip, 0); | |
307 | limit = (sal.end) ? sal.end : 0xffffffff; | |
308 | ||
309 | return (examine_prologue (ip, limit, (FRAME_ADDR) 0, &saved_regs_dummy)); | |
310 | } | |
311 | ||
312 | /* Put here the code to store, into a struct frame_saved_regs, | |
313 | the addresses of the saved registers of frame described by FRAME_INFO. | |
314 | This includes special registers such as pc and fp saved in special | |
315 | ways in the stack frame. sp is even more special: | |
316 | the address we return for it IS the sp for the next frame. | |
317 | ||
318 | We cache the result of doing this in the frame_cache_obstack, since | |
319 | it is fairly expensive. */ | |
320 | ||
321 | void | |
322 | frame_find_saved_regs (fi, fsr) | |
323 | struct frame_info *fi; | |
324 | struct frame_saved_regs *fsr; | |
325 | { | |
326 | register CORE_ADDR next_addr; | |
327 | register CORE_ADDR *saved_regs; | |
328 | register int regnum; | |
329 | register struct frame_saved_regs *cache_fsr; | |
330 | extern struct obstack frame_cache_obstack; | |
331 | CORE_ADDR ip; | |
332 | struct symtab_and_line sal; | |
333 | CORE_ADDR limit; | |
334 | ||
335 | if (!fi->fsr) | |
336 | { | |
337 | cache_fsr = (struct frame_saved_regs *) | |
338 | obstack_alloc (&frame_cache_obstack, | |
339 | sizeof (struct frame_saved_regs)); | |
340 | bzero (cache_fsr, sizeof (struct frame_saved_regs)); | |
341 | fi->fsr = cache_fsr; | |
342 | ||
343 | /* Find the start and end of the function prologue. If the PC | |
344 | is in the function prologue, we only consider the part that | |
345 | has executed already. */ | |
346 | ||
347 | ip = get_pc_function_start (fi->pc); | |
348 | sal = find_pc_line (ip, 0); | |
349 | limit = (sal.end && sal.end < fi->pc) ? sal.end: fi->pc; | |
350 | ||
351 | examine_prologue (ip, limit, fi->frame, cache_fsr); | |
352 | ||
353 | /* Record the addresses at which the local registers are saved. | |
354 | Strictly speaking, we should only do this for non-leaf procedures, | |
355 | but no one will ever look at these values if it is a leaf procedure, | |
356 | since local registers are always caller-saved. */ | |
357 | ||
358 | next_addr = (CORE_ADDR) fi->frame; | |
359 | saved_regs = cache_fsr->regs; | |
360 | for (regnum = R0_REGNUM; regnum <= R15_REGNUM; regnum++) | |
361 | { | |
362 | *saved_regs++ = next_addr; | |
363 | next_addr += 4; | |
364 | } | |
365 | ||
366 | cache_fsr->regs[FP_REGNUM] = cache_fsr->regs[PFP_REGNUM]; | |
367 | } | |
368 | ||
369 | *fsr = *fi->fsr; | |
370 | ||
371 | /* Fetch the value of the sp from memory every time, since it | |
372 | is conceivable that it has changed since the cache was flushed. | |
373 | This unfortunately undoes much of the savings from caching the | |
374 | saved register values. I suggest adding an argument to | |
375 | get_frame_saved_regs () specifying the register number we're | |
376 | interested in (or -1 for all registers). This would be passed | |
377 | through to FRAME_FIND_SAVED_REGS (), permitting more efficient | |
378 | computation of saved register addresses (e.g., on the i960, | |
379 | we don't have to examine the prologue to find local registers). | |
380 | -- markf@wrs.com | |
381 | FIXME, we don't need to refetch this, since the cache is cleared | |
382 | every time the child process is restarted. If GDB itself | |
383 | modifies SP, it has to clear the cache by hand (does it?). -gnu */ | |
384 | ||
385 | fsr->regs[SP_REGNUM] = read_memory_integer (fsr->regs[SP_REGNUM], 4); | |
386 | } | |
387 | ||
388 | /* Return the address of the argument block for the frame | |
389 | described by FI. Returns 0 if the address is unknown. */ | |
390 | ||
391 | CORE_ADDR | |
392 | frame_args_address (fi, must_be_correct) | |
393 | struct frame_info *fi; | |
394 | { | |
395 | register FRAME frame; | |
396 | struct frame_saved_regs fsr; | |
397 | CORE_ADDR ap; | |
398 | ||
399 | /* If g14 was saved in the frame by the function prologue code, return | |
400 | the saved value. If the frame is current and we are being sloppy, | |
401 | return the value of g14. Otherwise, return zero. */ | |
402 | ||
403 | frame = FRAME_INFO_ID (fi); | |
404 | get_frame_saved_regs (fi, &fsr); | |
405 | if (fsr.regs[G14_REGNUM]) | |
406 | ap = read_memory_integer (fsr.regs[G14_REGNUM],4); | |
407 | else { | |
408 | if (must_be_correct) | |
409 | return 0; /* Don't cache this result */ | |
410 | if (get_next_frame (frame)) | |
411 | ap = 0; | |
412 | else | |
413 | ap = read_register (G14_REGNUM); | |
414 | } | |
415 | fi->arg_pointer = ap; /* Cache it for next time */ | |
416 | return ap; | |
417 | } | |
418 | ||
419 | /* Return the address of the return struct for the frame | |
420 | described by FI. Returns 0 if the address is unknown. */ | |
421 | ||
422 | CORE_ADDR | |
423 | frame_struct_result_address (fi) | |
424 | struct frame_info *fi; | |
425 | { | |
426 | register FRAME frame; | |
427 | struct frame_saved_regs fsr; | |
428 | CORE_ADDR ap; | |
429 | ||
430 | /* If the frame is non-current, check to see if g14 was saved in the | |
431 | frame by the function prologue code; return the saved value if so, | |
432 | zero otherwise. If the frame is current, return the value of g14. | |
433 | ||
434 | FIXME, shouldn't this use the saved value as long as we are past | |
435 | the function prologue, and only use the current value if we have | |
436 | no saved value and are at TOS? -- gnu@cygnus.com */ | |
437 | ||
438 | frame = FRAME_INFO_ID (fi); | |
439 | if (get_next_frame (frame)) { | |
440 | get_frame_saved_regs (fi, &fsr); | |
441 | if (fsr.regs[G13_REGNUM]) | |
442 | ap = read_memory_integer (fsr.regs[G13_REGNUM],4); | |
443 | else | |
444 | ap = 0; | |
445 | } else { | |
446 | ap = read_register (G13_REGNUM); | |
447 | } | |
448 | return ap; | |
449 | } | |
450 | ||
451 | /* Return address to which the currently executing leafproc will return, | |
452 | or 0 if ip is not in a leafproc (or if we can't tell if it is). | |
453 | ||
454 | Do this by finding the starting address of the routine in which ip lies. | |
455 | If the instruction there is "mov g14, gx" (where x is in [0,7]), this | |
456 | is a leafproc and the return address is in register gx. Well, this is | |
457 | true unless the return address points at a RET instruction in the current | |
458 | procedure, which indicates that we have a 'dual entry' routine that | |
459 | has been entered through the CALL entry point. */ | |
460 | ||
461 | CORE_ADDR | |
462 | leafproc_return (ip) | |
463 | CORE_ADDR ip; /* ip from currently executing function */ | |
464 | { | |
1ab3bf1b | 465 | register struct minimal_symbol *msymbol; |
dd3b648e RP |
466 | char *p; |
467 | int dst; | |
468 | unsigned int insn1, insn2; | |
469 | CORE_ADDR return_addr; | |
470 | char *index (); | |
471 | ||
1ab3bf1b | 472 | if ((msymbol = lookup_minimal_symbol_by_pc (ip)) != NULL) |
dd3b648e | 473 | { |
1ab3bf1b | 474 | if ((p = index (msymbol -> name, '.')) && !strcmp (p, ".lf")) |
dd3b648e | 475 | { |
1ab3bf1b | 476 | if (next_insn (msymbol -> address, &insn1, &insn2) |
dd3b648e RP |
477 | && (insn1 & 0xff87ffff) == 0x5c80161e /* mov g14, gx */ |
478 | && (dst = REG_SRCDST (insn1)) <= G0_REGNUM + 7) | |
479 | { | |
480 | /* Get the return address. If the "mov g14, gx" | |
481 | instruction hasn't been executed yet, read | |
482 | the return address from g14; otherwise, read it | |
483 | from the register into which g14 was moved. */ | |
484 | ||
1ab3bf1b | 485 | return_addr = read_register ((ip == msymbol->address) |
dd3b648e RP |
486 | ? G14_REGNUM : dst); |
487 | ||
488 | /* We know we are in a leaf procedure, but we don't know | |
489 | whether the caller actually did a "bal" to the ".lf" | |
490 | entry point, or a normal "call" to the non-leaf entry | |
491 | point one instruction before. In the latter case, the | |
492 | return address will be the address of a "ret" | |
493 | instruction within the procedure itself. We test for | |
494 | this below. */ | |
495 | ||
496 | if (!next_insn (return_addr, &insn1, &insn2) | |
497 | || (insn1 & 0xff000000) != 0xa000000 /* ret */ | |
1ab3bf1b | 498 | || lookup_minimal_symbol_by_pc (return_addr) != msymbol) |
dd3b648e RP |
499 | return (return_addr); |
500 | } | |
501 | } | |
502 | } | |
503 | ||
504 | return (0); | |
505 | } | |
506 | ||
507 | /* Immediately after a function call, return the saved pc. | |
508 | Can't go through the frames for this because on some machines | |
509 | the new frame is not set up until the new function executes | |
510 | some instructions. | |
511 | On the i960, the frame *is* set up immediately after the call, | |
512 | unless the function is a leaf procedure. */ | |
513 | ||
514 | CORE_ADDR | |
515 | saved_pc_after_call (frame) | |
516 | FRAME frame; | |
517 | { | |
518 | CORE_ADDR saved_pc; | |
519 | CORE_ADDR get_frame_pc (); | |
520 | ||
521 | saved_pc = leafproc_return (get_frame_pc (frame)); | |
522 | if (!saved_pc) | |
523 | saved_pc = FRAME_SAVED_PC (frame); | |
524 | ||
525 | return (saved_pc); | |
526 | } | |
527 | ||
528 | /* Discard from the stack the innermost frame, | |
529 | restoring all saved registers. */ | |
530 | ||
531 | pop_frame () | |
532 | { | |
533 | register struct frame_info *current_fi, *prev_fi; | |
534 | register int i; | |
535 | CORE_ADDR save_addr; | |
536 | CORE_ADDR leaf_return_addr; | |
537 | struct frame_saved_regs fsr; | |
538 | char local_regs_buf[16 * 4]; | |
539 | ||
540 | current_fi = get_frame_info (get_current_frame ()); | |
541 | ||
542 | /* First, undo what the hardware does when we return. | |
543 | If this is a non-leaf procedure, restore local registers from | |
544 | the save area in the calling frame. Otherwise, load the return | |
545 | address obtained from leafproc_return () into the rip. */ | |
546 | ||
547 | leaf_return_addr = leafproc_return (current_fi->pc); | |
548 | if (!leaf_return_addr) | |
549 | { | |
550 | /* Non-leaf procedure. Restore local registers, incl IP. */ | |
551 | prev_fi = get_frame_info (get_prev_frame (FRAME_INFO_ID (current_fi))); | |
552 | read_memory (prev_fi->frame, local_regs_buf, sizeof (local_regs_buf)); | |
553 | write_register_bytes (REGISTER_BYTE (R0_REGNUM), local_regs_buf, | |
554 | sizeof (local_regs_buf)); | |
555 | ||
556 | /* Restore frame pointer. */ | |
557 | write_register (FP_REGNUM, prev_fi->frame); | |
558 | } | |
559 | else | |
560 | { | |
561 | /* Leaf procedure. Just restore the return address into the IP. */ | |
562 | write_register (RIP_REGNUM, leaf_return_addr); | |
563 | } | |
564 | ||
565 | /* Now restore any global regs that the current function had saved. */ | |
566 | get_frame_saved_regs (current_fi, &fsr); | |
567 | for (i = G0_REGNUM; i < G14_REGNUM; i++) | |
568 | { | |
569 | if (save_addr = fsr.regs[i]) | |
570 | write_register (i, read_memory_integer (save_addr, 4)); | |
571 | } | |
572 | ||
573 | /* Flush the frame cache, create a frame for the new innermost frame, | |
574 | and make it the current frame. */ | |
575 | ||
576 | flush_cached_frames (); | |
577 | set_current_frame (create_new_frame (read_register (FP_REGNUM), read_pc ())); | |
578 | } | |
579 | ||
580 | /* Print out text describing a "signal number" with which the i80960 halted. | |
581 | ||
582 | See the file "fault.c" in the nindy monitor source code for a list | |
583 | of stop codes. */ | |
584 | ||
585 | void | |
586 | print_fault( siggnal ) | |
587 | int siggnal; /* Signal number, as returned by target_wait() */ | |
588 | { | |
589 | static char unknown[] = "Unknown fault or trace"; | |
590 | static char *sigmsgs[] = { | |
591 | /* FAULTS */ | |
592 | "parallel fault", /* 0x00 */ | |
593 | unknown, /* 0x01 */ | |
594 | "operation fault", /* 0x02 */ | |
595 | "arithmetic fault", /* 0x03 */ | |
596 | "floating point fault", /* 0x04 */ | |
597 | "constraint fault", /* 0x05 */ | |
598 | "virtual memory fault", /* 0x06 */ | |
599 | "protection fault", /* 0x07 */ | |
600 | "machine fault", /* 0x08 */ | |
601 | "structural fault", /* 0x09 */ | |
602 | "type fault", /* 0x0a */ | |
603 | "reserved (0xb) fault", /* 0x0b */ | |
604 | "process fault", /* 0x0c */ | |
605 | "descriptor fault", /* 0x0d */ | |
606 | "event fault", /* 0x0e */ | |
607 | "reserved (0xf) fault", /* 0x0f */ | |
608 | ||
609 | /* TRACES */ | |
610 | "single-step trace", /* 0x10 */ | |
611 | "branch trace", /* 0x11 */ | |
612 | "call trace", /* 0x12 */ | |
613 | "return trace", /* 0x13 */ | |
614 | "pre-return trace", /* 0x14 */ | |
615 | "supervisor call trace",/* 0x15 */ | |
616 | "breakpoint trace", /* 0x16 */ | |
617 | }; | |
618 | # define NUMMSGS ((int)( sizeof(sigmsgs) / sizeof(sigmsgs[0]) )) | |
619 | ||
620 | if (siggnal < NSIG) { | |
621 | printf ("\nProgram received signal %d, %s\n", | |
622 | siggnal, | |
623 | sys_siglist[siggnal]); | |
624 | } else { | |
625 | /* The various target_wait()s bias the 80960 "signal number" | |
626 | by adding NSIG to it, so it won't get confused with any | |
627 | of the Unix signals elsewhere in GDB. We need to | |
628 | "unbias" it before using it. */ | |
629 | siggnal -= NSIG; | |
630 | ||
631 | printf("Program stopped for reason #%d: %s.\n", siggnal, | |
632 | (siggnal < NUMMSGS && siggnal >= 0)? | |
633 | sigmsgs[siggnal] : unknown ); | |
634 | } | |
635 | } | |
636 | ||
637 | /* Initialization stub */ | |
638 | ||
639 | _initialize_i960_tdep () | |
640 | { | |
641 | check_host (); | |
642 | } |