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16461d7d | 1 | /* Target-dependent code for the IA-64 for GDB, the GNU debugger. |
ca557f44 | 2 | |
51603483 | 3 | Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
16461d7d KB |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include "defs.h" | |
23 | #include "inferior.h" | |
24 | #include "symfile.h" /* for entry_point_address */ | |
25 | #include "gdbcore.h" | |
8064c6ae | 26 | #include "arch-utils.h" |
16461d7d | 27 | #include "floatformat.h" |
4e052eda | 28 | #include "regcache.h" |
004d836a JJ |
29 | #include "reggroups.h" |
30 | #include "frame.h" | |
31 | #include "frame-base.h" | |
32 | #include "frame-unwind.h" | |
d16aafd8 | 33 | #include "doublest.h" |
fd0407d6 | 34 | #include "value.h" |
bd1ce8ba | 35 | #include "gdb_assert.h" |
16461d7d KB |
36 | #include "objfiles.h" |
37 | #include "elf/common.h" /* for DT_PLTGOT value */ | |
244bc108 | 38 | #include "elf-bfd.h" |
968d1cb4 | 39 | #include "elf.h" /* for PT_IA64_UNWIND value */ |
a89aa300 | 40 | #include "dis-asm.h" |
16461d7d | 41 | |
968d1cb4 JJ |
42 | #ifdef HAVE_LIBUNWIND_IA64_H |
43 | #include "libunwind-frame.h" | |
44 | #include "libunwind-ia64.h" | |
45 | #endif | |
46 | ||
698cb3f0 KB |
47 | /* Hook for determining the global pointer when calling functions in |
48 | the inferior under AIX. The initialization code in ia64-aix-nat.c | |
49 | sets this hook to the address of a function which will find the | |
50 | global pointer for a given address. | |
51 | ||
52 | The generic code which uses the dynamic section in the inferior for | |
53 | finding the global pointer is not of much use on AIX since the | |
54 | values obtained from the inferior have not been relocated. */ | |
55 | ||
56 | CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0; | |
57 | ||
58 | /* An enumeration of the different IA-64 instruction types. */ | |
59 | ||
16461d7d KB |
60 | typedef enum instruction_type |
61 | { | |
62 | A, /* Integer ALU ; I-unit or M-unit */ | |
63 | I, /* Non-ALU integer; I-unit */ | |
64 | M, /* Memory ; M-unit */ | |
65 | F, /* Floating-point ; F-unit */ | |
66 | B, /* Branch ; B-unit */ | |
67 | L, /* Extended (L+X) ; I-unit */ | |
68 | X, /* Extended (L+X) ; I-unit */ | |
69 | undefined /* undefined or reserved */ | |
70 | } instruction_type; | |
71 | ||
72 | /* We represent IA-64 PC addresses as the value of the instruction | |
73 | pointer or'd with some bit combination in the low nibble which | |
74 | represents the slot number in the bundle addressed by the | |
75 | instruction pointer. The problem is that the Linux kernel | |
76 | multiplies its slot numbers (for exceptions) by one while the | |
77 | disassembler multiplies its slot numbers by 6. In addition, I've | |
78 | heard it said that the simulator uses 1 as the multiplier. | |
79 | ||
80 | I've fixed the disassembler so that the bytes_per_line field will | |
81 | be the slot multiplier. If bytes_per_line comes in as zero, it | |
82 | is set to six (which is how it was set up initially). -- objdump | |
83 | displays pretty disassembly dumps with this value. For our purposes, | |
84 | we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we | |
85 | never want to also display the raw bytes the way objdump does. */ | |
86 | ||
87 | #define SLOT_MULTIPLIER 1 | |
88 | ||
89 | /* Length in bytes of an instruction bundle */ | |
90 | ||
91 | #define BUNDLE_LEN 16 | |
92 | ||
d7fa2ae2 | 93 | /* FIXME: These extern declarations should go in ia64-tdep.h. */ |
244bc108 | 94 | extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int); |
d7fa2ae2 | 95 | extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int); |
968d1cb4 | 96 | extern unsigned long ia64_linux_getunwind_table (void *, size_t); |
244bc108 | 97 | |
16461d7d KB |
98 | static gdbarch_init_ftype ia64_gdbarch_init; |
99 | ||
100 | static gdbarch_register_name_ftype ia64_register_name; | |
004d836a | 101 | static gdbarch_register_type_ftype ia64_register_type; |
16461d7d | 102 | static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc; |
16461d7d | 103 | static gdbarch_skip_prologue_ftype ia64_skip_prologue; |
004d836a | 104 | static gdbarch_extract_return_value_ftype ia64_extract_return_value; |
16461d7d | 105 | static gdbarch_use_struct_convention_ftype ia64_use_struct_convention; |
64a5b29c | 106 | static struct type *is_float_or_hfa_type (struct type *t); |
16461d7d | 107 | |
004d836a JJ |
108 | static struct type *builtin_type_ia64_ext; |
109 | ||
110 | #define NUM_IA64_RAW_REGS 462 | |
16461d7d | 111 | |
16461d7d KB |
112 | static int sp_regnum = IA64_GR12_REGNUM; |
113 | static int fp_regnum = IA64_VFP_REGNUM; | |
114 | static int lr_regnum = IA64_VRAP_REGNUM; | |
115 | ||
004d836a | 116 | /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because |
4afcc598 | 117 | they may not be accessible via the ptrace register get/set interfaces. */ |
004d836a JJ |
118 | enum pseudo_regs { FIRST_PSEUDO_REGNUM = NUM_IA64_RAW_REGS, VBOF_REGNUM = IA64_NAT127_REGNUM + 1, V32_REGNUM, |
119 | V127_REGNUM = V32_REGNUM + 95, | |
120 | VP0_REGNUM, VP16_REGNUM = VP0_REGNUM + 16, VP63_REGNUM = VP0_REGNUM + 63, LAST_PSEUDO_REGNUM }; | |
16461d7d KB |
121 | |
122 | /* Array of register names; There should be ia64_num_regs strings in | |
123 | the initializer. */ | |
124 | ||
125 | static char *ia64_register_names[] = | |
126 | { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
127 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
128 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", | |
129 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", | |
004d836a JJ |
130 | "", "", "", "", "", "", "", "", |
131 | "", "", "", "", "", "", "", "", | |
132 | "", "", "", "", "", "", "", "", | |
133 | "", "", "", "", "", "", "", "", | |
134 | "", "", "", "", "", "", "", "", | |
135 | "", "", "", "", "", "", "", "", | |
136 | "", "", "", "", "", "", "", "", | |
137 | "", "", "", "", "", "", "", "", | |
138 | "", "", "", "", "", "", "", "", | |
139 | "", "", "", "", "", "", "", "", | |
140 | "", "", "", "", "", "", "", "", | |
141 | "", "", "", "", "", "", "", "", | |
16461d7d KB |
142 | |
143 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", | |
144 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", | |
145 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", | |
146 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", | |
147 | "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39", | |
148 | "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", | |
149 | "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55", | |
150 | "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63", | |
151 | "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71", | |
152 | "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79", | |
153 | "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87", | |
154 | "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95", | |
155 | "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103", | |
156 | "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111", | |
157 | "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119", | |
158 | "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127", | |
159 | ||
004d836a JJ |
160 | "", "", "", "", "", "", "", "", |
161 | "", "", "", "", "", "", "", "", | |
162 | "", "", "", "", "", "", "", "", | |
163 | "", "", "", "", "", "", "", "", | |
164 | "", "", "", "", "", "", "", "", | |
165 | "", "", "", "", "", "", "", "", | |
166 | "", "", "", "", "", "", "", "", | |
167 | "", "", "", "", "", "", "", "", | |
16461d7d KB |
168 | |
169 | "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7", | |
170 | ||
171 | "vfp", "vrap", | |
172 | ||
173 | "pr", "ip", "psr", "cfm", | |
174 | ||
175 | "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7", | |
176 | "", "", "", "", "", "", "", "", | |
177 | "rsc", "bsp", "bspstore", "rnat", | |
178 | "", "fcr", "", "", | |
179 | "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "", | |
180 | "ccv", "", "", "", "unat", "", "", "", | |
181 | "fpsr", "", "", "", "itc", | |
182 | "", "", "", "", "", "", "", "", "", "", | |
183 | "", "", "", "", "", "", "", "", "", | |
184 | "pfs", "lc", "ec", | |
185 | "", "", "", "", "", "", "", "", "", "", | |
186 | "", "", "", "", "", "", "", "", "", "", | |
187 | "", "", "", "", "", "", "", "", "", "", | |
188 | "", "", "", "", "", "", "", "", "", "", | |
189 | "", "", "", "", "", "", "", "", "", "", | |
190 | "", "", "", "", "", "", "", "", "", "", | |
191 | "", | |
192 | "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7", | |
193 | "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15", | |
194 | "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23", | |
195 | "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31", | |
196 | "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39", | |
197 | "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47", | |
198 | "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55", | |
199 | "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63", | |
200 | "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71", | |
201 | "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79", | |
202 | "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87", | |
203 | "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95", | |
204 | "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103", | |
205 | "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111", | |
206 | "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119", | |
207 | "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127", | |
004d836a JJ |
208 | |
209 | "bof", | |
210 | ||
211 | "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", | |
212 | "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", | |
213 | "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", | |
214 | "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63", | |
215 | "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71", | |
216 | "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79", | |
217 | "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87", | |
218 | "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95", | |
219 | "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103", | |
220 | "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111", | |
221 | "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119", | |
222 | "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127", | |
223 | ||
224 | "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", | |
225 | "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", | |
226 | "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23", | |
227 | "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31", | |
228 | "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39", | |
229 | "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47", | |
230 | "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55", | |
231 | "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63", | |
16461d7d KB |
232 | }; |
233 | ||
004d836a JJ |
234 | struct ia64_frame_cache |
235 | { | |
236 | CORE_ADDR base; /* frame pointer base for frame */ | |
237 | CORE_ADDR pc; /* function start pc for frame */ | |
238 | CORE_ADDR saved_sp; /* stack pointer for frame */ | |
239 | CORE_ADDR bsp; /* points at r32 for the current frame */ | |
240 | CORE_ADDR cfm; /* cfm value for current frame */ | |
4afcc598 | 241 | CORE_ADDR prev_cfm; /* cfm value for previous frame */ |
004d836a JJ |
242 | int frameless; |
243 | int sof; /* Size of frame (decoded from cfm value) */ | |
244 | int sol; /* Size of locals (decoded from cfm value) */ | |
245 | int sor; /* Number of rotating registers. (decoded from cfm value) */ | |
246 | CORE_ADDR after_prologue; | |
247 | /* Address of first instruction after the last | |
248 | prologue instruction; Note that there may | |
249 | be instructions from the function's body | |
250 | intermingled with the prologue. */ | |
251 | int mem_stack_frame_size; | |
252 | /* Size of the memory stack frame (may be zero), | |
253 | or -1 if it has not been determined yet. */ | |
254 | int fp_reg; /* Register number (if any) used a frame pointer | |
244bc108 | 255 | for this frame. 0 if no register is being used |
16461d7d | 256 | as the frame pointer. */ |
004d836a JJ |
257 | |
258 | /* Saved registers. */ | |
259 | CORE_ADDR saved_regs[NUM_IA64_RAW_REGS]; | |
260 | ||
261 | }; | |
244bc108 KB |
262 | |
263 | struct gdbarch_tdep | |
264 | { | |
244bc108 KB |
265 | CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int); |
266 | /* OS specific function which, given a frame address | |
267 | and register number, returns the offset to the | |
268 | given register from the start of the frame. */ | |
698cb3f0 | 269 | CORE_ADDR (*find_global_pointer) (CORE_ADDR); |
244bc108 KB |
270 | }; |
271 | ||
698cb3f0 KB |
272 | #define SIGCONTEXT_REGISTER_ADDRESS \ |
273 | (gdbarch_tdep (current_gdbarch)->sigcontext_register_address) | |
274 | #define FIND_GLOBAL_POINTER \ | |
275 | (gdbarch_tdep (current_gdbarch)->find_global_pointer) | |
16461d7d | 276 | |
004d836a JJ |
277 | int |
278 | ia64_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
279 | struct reggroup *group) | |
16461d7d | 280 | { |
004d836a JJ |
281 | int vector_p; |
282 | int float_p; | |
283 | int raw_p; | |
284 | if (group == all_reggroup) | |
285 | return 1; | |
286 | vector_p = TYPE_VECTOR (register_type (gdbarch, regnum)); | |
287 | float_p = TYPE_CODE (register_type (gdbarch, regnum)) == TYPE_CODE_FLT; | |
288 | raw_p = regnum < NUM_IA64_RAW_REGS; | |
289 | if (group == float_reggroup) | |
290 | return float_p; | |
291 | if (group == vector_reggroup) | |
292 | return vector_p; | |
293 | if (group == general_reggroup) | |
294 | return (!vector_p && !float_p); | |
295 | if (group == save_reggroup || group == restore_reggroup) | |
296 | return raw_p; | |
297 | return 0; | |
16461d7d KB |
298 | } |
299 | ||
004d836a JJ |
300 | static const char * |
301 | ia64_register_name (int reg) | |
16461d7d | 302 | { |
004d836a | 303 | return ia64_register_names[reg]; |
16461d7d KB |
304 | } |
305 | ||
004d836a JJ |
306 | struct type * |
307 | ia64_register_type (struct gdbarch *arch, int reg) | |
16461d7d | 308 | { |
004d836a JJ |
309 | if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM) |
310 | return builtin_type_ia64_ext; | |
311 | else | |
312 | return builtin_type_long; | |
16461d7d KB |
313 | } |
314 | ||
a78f21af | 315 | static int |
004d836a | 316 | ia64_dwarf_reg_to_regnum (int reg) |
16461d7d | 317 | { |
004d836a JJ |
318 | if (reg >= IA64_GR32_REGNUM && reg <= IA64_GR127_REGNUM) |
319 | return V32_REGNUM + (reg - IA64_GR32_REGNUM); | |
320 | return reg; | |
16461d7d KB |
321 | } |
322 | ||
4afcc598 | 323 | static int |
7be0c536 | 324 | floatformat_valid (const struct floatformat *fmt, const char *from) |
4afcc598 JJ |
325 | { |
326 | return 1; | |
327 | } | |
328 | ||
16461d7d KB |
329 | const struct floatformat floatformat_ia64_ext = |
330 | { | |
331 | floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64, | |
4afcc598 | 332 | floatformat_intbit_yes, "floatformat_ia64_ext", floatformat_valid |
16461d7d KB |
333 | }; |
334 | ||
16461d7d KB |
335 | |
336 | /* Extract ``len'' bits from an instruction bundle starting at | |
337 | bit ``from''. */ | |
338 | ||
244bc108 | 339 | static long long |
16461d7d KB |
340 | extract_bit_field (char *bundle, int from, int len) |
341 | { | |
342 | long long result = 0LL; | |
343 | int to = from + len; | |
344 | int from_byte = from / 8; | |
345 | int to_byte = to / 8; | |
346 | unsigned char *b = (unsigned char *) bundle; | |
347 | unsigned char c; | |
348 | int lshift; | |
349 | int i; | |
350 | ||
351 | c = b[from_byte]; | |
352 | if (from_byte == to_byte) | |
353 | c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8); | |
354 | result = c >> (from % 8); | |
355 | lshift = 8 - (from % 8); | |
356 | ||
357 | for (i = from_byte+1; i < to_byte; i++) | |
358 | { | |
359 | result |= ((long long) b[i]) << lshift; | |
360 | lshift += 8; | |
361 | } | |
362 | ||
363 | if (from_byte < to_byte && (to % 8 != 0)) | |
364 | { | |
365 | c = b[to_byte]; | |
366 | c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8); | |
367 | result |= ((long long) c) << lshift; | |
368 | } | |
369 | ||
370 | return result; | |
371 | } | |
372 | ||
373 | /* Replace the specified bits in an instruction bundle */ | |
374 | ||
244bc108 | 375 | static void |
16461d7d KB |
376 | replace_bit_field (char *bundle, long long val, int from, int len) |
377 | { | |
378 | int to = from + len; | |
379 | int from_byte = from / 8; | |
380 | int to_byte = to / 8; | |
381 | unsigned char *b = (unsigned char *) bundle; | |
382 | unsigned char c; | |
383 | ||
384 | if (from_byte == to_byte) | |
385 | { | |
386 | unsigned char left, right; | |
387 | c = b[from_byte]; | |
388 | left = (c >> (to % 8)) << (to % 8); | |
389 | right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8); | |
390 | c = (unsigned char) (val & 0xff); | |
391 | c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8); | |
392 | c |= right | left; | |
393 | b[from_byte] = c; | |
394 | } | |
395 | else | |
396 | { | |
397 | int i; | |
398 | c = b[from_byte]; | |
399 | c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8); | |
400 | c = c | (val << (from % 8)); | |
401 | b[from_byte] = c; | |
402 | val >>= 8 - from % 8; | |
403 | ||
404 | for (i = from_byte+1; i < to_byte; i++) | |
405 | { | |
406 | c = val & 0xff; | |
407 | val >>= 8; | |
408 | b[i] = c; | |
409 | } | |
410 | ||
411 | if (to % 8 != 0) | |
412 | { | |
413 | unsigned char cv = (unsigned char) val; | |
414 | c = b[to_byte]; | |
415 | c = c >> (to % 8) << (to % 8); | |
416 | c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8); | |
417 | b[to_byte] = c; | |
418 | } | |
419 | } | |
420 | } | |
421 | ||
422 | /* Return the contents of slot N (for N = 0, 1, or 2) in | |
423 | and instruction bundle */ | |
424 | ||
244bc108 | 425 | static long long |
2fc3ac7e | 426 | slotN_contents (char *bundle, int slotnum) |
16461d7d KB |
427 | { |
428 | return extract_bit_field (bundle, 5+41*slotnum, 41); | |
429 | } | |
430 | ||
431 | /* Store an instruction in an instruction bundle */ | |
432 | ||
244bc108 | 433 | static void |
2fc3ac7e | 434 | replace_slotN_contents (char *bundle, long long instr, int slotnum) |
16461d7d KB |
435 | { |
436 | replace_bit_field (bundle, instr, 5+41*slotnum, 41); | |
437 | } | |
438 | ||
64a5b29c | 439 | static enum instruction_type template_encoding_table[32][3] = |
16461d7d KB |
440 | { |
441 | { M, I, I }, /* 00 */ | |
442 | { M, I, I }, /* 01 */ | |
443 | { M, I, I }, /* 02 */ | |
444 | { M, I, I }, /* 03 */ | |
445 | { M, L, X }, /* 04 */ | |
446 | { M, L, X }, /* 05 */ | |
447 | { undefined, undefined, undefined }, /* 06 */ | |
448 | { undefined, undefined, undefined }, /* 07 */ | |
449 | { M, M, I }, /* 08 */ | |
450 | { M, M, I }, /* 09 */ | |
451 | { M, M, I }, /* 0A */ | |
452 | { M, M, I }, /* 0B */ | |
453 | { M, F, I }, /* 0C */ | |
454 | { M, F, I }, /* 0D */ | |
455 | { M, M, F }, /* 0E */ | |
456 | { M, M, F }, /* 0F */ | |
457 | { M, I, B }, /* 10 */ | |
458 | { M, I, B }, /* 11 */ | |
459 | { M, B, B }, /* 12 */ | |
460 | { M, B, B }, /* 13 */ | |
461 | { undefined, undefined, undefined }, /* 14 */ | |
462 | { undefined, undefined, undefined }, /* 15 */ | |
463 | { B, B, B }, /* 16 */ | |
464 | { B, B, B }, /* 17 */ | |
465 | { M, M, B }, /* 18 */ | |
466 | { M, M, B }, /* 19 */ | |
467 | { undefined, undefined, undefined }, /* 1A */ | |
468 | { undefined, undefined, undefined }, /* 1B */ | |
469 | { M, F, B }, /* 1C */ | |
470 | { M, F, B }, /* 1D */ | |
471 | { undefined, undefined, undefined }, /* 1E */ | |
472 | { undefined, undefined, undefined }, /* 1F */ | |
473 | }; | |
474 | ||
475 | /* Fetch and (partially) decode an instruction at ADDR and return the | |
476 | address of the next instruction to fetch. */ | |
477 | ||
478 | static CORE_ADDR | |
479 | fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr) | |
480 | { | |
481 | char bundle[BUNDLE_LEN]; | |
482 | int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER; | |
483 | long long template; | |
484 | int val; | |
485 | ||
c26e1c2b KB |
486 | /* Warn about slot numbers greater than 2. We used to generate |
487 | an error here on the assumption that the user entered an invalid | |
488 | address. But, sometimes GDB itself requests an invalid address. | |
489 | This can (easily) happen when execution stops in a function for | |
490 | which there are no symbols. The prologue scanner will attempt to | |
491 | find the beginning of the function - if the nearest symbol | |
492 | happens to not be aligned on a bundle boundary (16 bytes), the | |
493 | resulting starting address will cause GDB to think that the slot | |
494 | number is too large. | |
495 | ||
496 | So we warn about it and set the slot number to zero. It is | |
497 | not necessarily a fatal condition, particularly if debugging | |
498 | at the assembly language level. */ | |
16461d7d | 499 | if (slotnum > 2) |
c26e1c2b KB |
500 | { |
501 | warning ("Can't fetch instructions for slot numbers greater than 2.\n" | |
502 | "Using slot 0 instead"); | |
503 | slotnum = 0; | |
504 | } | |
16461d7d KB |
505 | |
506 | addr &= ~0x0f; | |
507 | ||
508 | val = target_read_memory (addr, bundle, BUNDLE_LEN); | |
509 | ||
510 | if (val != 0) | |
511 | return 0; | |
512 | ||
513 | *instr = slotN_contents (bundle, slotnum); | |
514 | template = extract_bit_field (bundle, 0, 5); | |
515 | *it = template_encoding_table[(int)template][slotnum]; | |
516 | ||
64a5b29c | 517 | if (slotnum == 2 || (slotnum == 1 && *it == L)) |
16461d7d KB |
518 | addr += 16; |
519 | else | |
520 | addr += (slotnum + 1) * SLOT_MULTIPLIER; | |
521 | ||
522 | return addr; | |
523 | } | |
524 | ||
525 | /* There are 5 different break instructions (break.i, break.b, | |
526 | break.m, break.f, and break.x), but they all have the same | |
527 | encoding. (The five bit template in the low five bits of the | |
528 | instruction bundle distinguishes one from another.) | |
529 | ||
530 | The runtime architecture manual specifies that break instructions | |
531 | used for debugging purposes must have the upper two bits of the 21 | |
532 | bit immediate set to a 0 and a 1 respectively. A breakpoint | |
533 | instruction encodes the most significant bit of its 21 bit | |
534 | immediate at bit 36 of the 41 bit instruction. The penultimate msb | |
535 | is at bit 25 which leads to the pattern below. | |
536 | ||
537 | Originally, I had this set up to do, e.g, a "break.i 0x80000" But | |
538 | it turns out that 0x80000 was used as the syscall break in the early | |
539 | simulators. So I changed the pattern slightly to do "break.i 0x080001" | |
540 | instead. But that didn't work either (I later found out that this | |
541 | pattern was used by the simulator that I was using.) So I ended up | |
542 | using the pattern seen below. */ | |
543 | ||
544 | #if 0 | |
aaab4dba | 545 | #define IA64_BREAKPOINT 0x00002000040LL |
16461d7d | 546 | #endif |
aaab4dba | 547 | #define IA64_BREAKPOINT 0x00003333300LL |
16461d7d KB |
548 | |
549 | static int | |
550 | ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache) | |
551 | { | |
552 | char bundle[BUNDLE_LEN]; | |
553 | int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER; | |
554 | long long instr; | |
555 | int val; | |
126fa72d | 556 | int template; |
16461d7d KB |
557 | |
558 | if (slotnum > 2) | |
559 | error("Can't insert breakpoint for slot numbers greater than 2."); | |
560 | ||
561 | addr &= ~0x0f; | |
562 | ||
563 | val = target_read_memory (addr, bundle, BUNDLE_LEN); | |
126fa72d PS |
564 | |
565 | /* Check for L type instruction in 2nd slot, if present then | |
566 | bump up the slot number to the 3rd slot */ | |
567 | template = extract_bit_field (bundle, 0, 5); | |
568 | if (slotnum == 1 && template_encoding_table[template][1] == L) | |
569 | { | |
570 | slotnum = 2; | |
571 | } | |
572 | ||
16461d7d KB |
573 | instr = slotN_contents (bundle, slotnum); |
574 | memcpy(contents_cache, &instr, sizeof(instr)); | |
aaab4dba | 575 | replace_slotN_contents (bundle, IA64_BREAKPOINT, slotnum); |
16461d7d KB |
576 | if (val == 0) |
577 | target_write_memory (addr, bundle, BUNDLE_LEN); | |
578 | ||
579 | return val; | |
580 | } | |
581 | ||
582 | static int | |
583 | ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache) | |
584 | { | |
585 | char bundle[BUNDLE_LEN]; | |
586 | int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER; | |
587 | long long instr; | |
588 | int val; | |
126fa72d | 589 | int template; |
16461d7d KB |
590 | |
591 | addr &= ~0x0f; | |
592 | ||
593 | val = target_read_memory (addr, bundle, BUNDLE_LEN); | |
126fa72d PS |
594 | |
595 | /* Check for L type instruction in 2nd slot, if present then | |
596 | bump up the slot number to the 3rd slot */ | |
597 | template = extract_bit_field (bundle, 0, 5); | |
598 | if (slotnum == 1 && template_encoding_table[template][1] == L) | |
599 | { | |
600 | slotnum = 2; | |
601 | } | |
602 | ||
16461d7d KB |
603 | memcpy (&instr, contents_cache, sizeof instr); |
604 | replace_slotN_contents (bundle, instr, slotnum); | |
605 | if (val == 0) | |
606 | target_write_memory (addr, bundle, BUNDLE_LEN); | |
607 | ||
608 | return val; | |
609 | } | |
610 | ||
611 | /* We don't really want to use this, but remote.c needs to call it in order | |
612 | to figure out if Z-packets are supported or not. Oh, well. */ | |
f4f9705a | 613 | const unsigned char * |
fba45db2 | 614 | ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) |
16461d7d KB |
615 | { |
616 | static unsigned char breakpoint[] = | |
617 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; | |
618 | *lenptr = sizeof (breakpoint); | |
619 | #if 0 | |
620 | *pcptr &= ~0x0f; | |
621 | #endif | |
622 | return breakpoint; | |
623 | } | |
624 | ||
a78f21af | 625 | static CORE_ADDR |
39f77062 | 626 | ia64_read_pc (ptid_t ptid) |
16461d7d | 627 | { |
39f77062 KB |
628 | CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid); |
629 | CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid); | |
16461d7d KB |
630 | int slot_num = (psr_value >> 41) & 3; |
631 | ||
632 | return pc_value | (slot_num * SLOT_MULTIPLIER); | |
633 | } | |
634 | ||
a78f21af | 635 | static void |
39f77062 | 636 | ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid) |
16461d7d KB |
637 | { |
638 | int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER; | |
39f77062 | 639 | CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid); |
16461d7d KB |
640 | psr_value &= ~(3LL << 41); |
641 | psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41; | |
642 | ||
643 | new_pc &= ~0xfLL; | |
644 | ||
39f77062 KB |
645 | write_register_pid (IA64_PSR_REGNUM, psr_value, ptid); |
646 | write_register_pid (IA64_IP_REGNUM, new_pc, ptid); | |
16461d7d KB |
647 | } |
648 | ||
649 | #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f) | |
650 | ||
651 | /* Returns the address of the slot that's NSLOTS slots away from | |
652 | the address ADDR. NSLOTS may be positive or negative. */ | |
653 | static CORE_ADDR | |
654 | rse_address_add(CORE_ADDR addr, int nslots) | |
655 | { | |
656 | CORE_ADDR new_addr; | |
657 | int mandatory_nat_slots = nslots / 63; | |
658 | int direction = nslots < 0 ? -1 : 1; | |
659 | ||
660 | new_addr = addr + 8 * (nslots + mandatory_nat_slots); | |
661 | ||
662 | if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9)) | |
663 | new_addr += 8 * direction; | |
664 | ||
665 | if (IS_NaT_COLLECTION_ADDR(new_addr)) | |
666 | new_addr += 8 * direction; | |
667 | ||
668 | return new_addr; | |
669 | } | |
670 | ||
004d836a JJ |
671 | static void |
672 | ia64_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, | |
673 | int regnum, void *buf) | |
16461d7d | 674 | { |
004d836a | 675 | if (regnum >= V32_REGNUM && regnum <= V127_REGNUM) |
244bc108 | 676 | { |
004d836a JJ |
677 | ULONGEST bsp; |
678 | ULONGEST cfm; | |
679 | CORE_ADDR reg; | |
680 | regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); | |
681 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); | |
682 | ||
683 | /* The bsp points at the end of the register frame so we | |
684 | subtract the size of frame from it to get start of register frame. */ | |
685 | bsp = rse_address_add (bsp, -(cfm & 0x7f)); | |
686 | ||
687 | if ((cfm & 0x7f) > regnum - V32_REGNUM) | |
688 | { | |
689 | ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM)); | |
690 | reg = read_memory_integer ((CORE_ADDR)reg_addr, 8); | |
aa2a9a3c | 691 | store_unsigned_integer (buf, register_size (current_gdbarch, regnum), reg); |
004d836a | 692 | } |
244bc108 | 693 | else |
aa2a9a3c | 694 | store_unsigned_integer (buf, register_size (current_gdbarch, regnum), 0); |
004d836a JJ |
695 | } |
696 | else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM) | |
697 | { | |
698 | ULONGEST unatN_val; | |
699 | ULONGEST unat; | |
700 | regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat); | |
701 | unatN_val = (unat & (1LL << (regnum - IA64_NAT0_REGNUM))) != 0; | |
aa2a9a3c | 702 | store_unsigned_integer (buf, register_size (current_gdbarch, regnum), unatN_val); |
004d836a JJ |
703 | } |
704 | else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM) | |
705 | { | |
706 | ULONGEST natN_val = 0; | |
707 | ULONGEST bsp; | |
708 | ULONGEST cfm; | |
709 | CORE_ADDR gr_addr = 0; | |
710 | regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); | |
711 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); | |
712 | ||
713 | /* The bsp points at the end of the register frame so we | |
714 | subtract the size of frame from it to get start of register frame. */ | |
715 | bsp = rse_address_add (bsp, -(cfm & 0x7f)); | |
716 | ||
717 | if ((cfm & 0x7f) > regnum - V32_REGNUM) | |
718 | gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM)); | |
719 | ||
720 | if (gr_addr != 0) | |
721 | { | |
722 | /* Compute address of nat collection bits. */ | |
723 | CORE_ADDR nat_addr = gr_addr | 0x1f8; | |
724 | CORE_ADDR nat_collection; | |
725 | int nat_bit; | |
726 | /* If our nat collection address is bigger than bsp, we have to get | |
727 | the nat collection from rnat. Otherwise, we fetch the nat | |
728 | collection from the computed address. */ | |
729 | if (nat_addr >= bsp) | |
730 | regcache_cooked_read_unsigned (regcache, IA64_RNAT_REGNUM, &nat_collection); | |
731 | else | |
732 | nat_collection = read_memory_integer (nat_addr, 8); | |
733 | nat_bit = (gr_addr >> 3) & 0x3f; | |
734 | natN_val = (nat_collection >> nat_bit) & 1; | |
735 | } | |
736 | ||
aa2a9a3c | 737 | store_unsigned_integer (buf, register_size (current_gdbarch, regnum), natN_val); |
244bc108 | 738 | } |
004d836a JJ |
739 | else if (regnum == VBOF_REGNUM) |
740 | { | |
741 | /* A virtual register frame start is provided for user convenience. | |
742 | It can be calculated as the bsp - sof (sizeof frame). */ | |
743 | ULONGEST bsp, vbsp; | |
744 | ULONGEST cfm; | |
745 | CORE_ADDR reg; | |
746 | regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); | |
747 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); | |
748 | ||
749 | /* The bsp points at the end of the register frame so we | |
750 | subtract the size of frame from it to get beginning of frame. */ | |
751 | vbsp = rse_address_add (bsp, -(cfm & 0x7f)); | |
aa2a9a3c | 752 | store_unsigned_integer (buf, register_size (current_gdbarch, regnum), vbsp); |
004d836a JJ |
753 | } |
754 | else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM) | |
755 | { | |
756 | ULONGEST pr; | |
757 | ULONGEST cfm; | |
758 | ULONGEST prN_val; | |
759 | CORE_ADDR reg; | |
760 | regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr); | |
761 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); | |
762 | ||
763 | if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM) | |
764 | { | |
765 | /* Fetch predicate register rename base from current frame | |
766 | marker for this frame. */ | |
767 | int rrb_pr = (cfm >> 32) & 0x3f; | |
768 | ||
769 | /* Adjust the register number to account for register rotation. */ | |
770 | regnum = VP16_REGNUM | |
771 | + ((regnum - VP16_REGNUM) + rrb_pr) % 48; | |
772 | } | |
773 | prN_val = (pr & (1LL << (regnum - VP0_REGNUM))) != 0; | |
aa2a9a3c | 774 | store_unsigned_integer (buf, register_size (current_gdbarch, regnum), prN_val); |
004d836a JJ |
775 | } |
776 | else | |
aa2a9a3c | 777 | memset (buf, 0, register_size (current_gdbarch, regnum)); |
16461d7d KB |
778 | } |
779 | ||
004d836a JJ |
780 | static void |
781 | ia64_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
782 | int regnum, const void *buf) | |
16461d7d | 783 | { |
004d836a | 784 | if (regnum >= V32_REGNUM && regnum <= V127_REGNUM) |
244bc108 | 785 | { |
004d836a JJ |
786 | ULONGEST bsp; |
787 | ULONGEST cfm; | |
788 | CORE_ADDR reg; | |
789 | regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); | |
790 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); | |
791 | ||
792 | bsp = rse_address_add (bsp, -(cfm & 0x7f)); | |
793 | ||
794 | if ((cfm & 0x7f) > regnum - V32_REGNUM) | |
795 | { | |
796 | ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM)); | |
797 | write_memory (reg_addr, (void *)buf, 8); | |
798 | } | |
799 | } | |
800 | else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM) | |
801 | { | |
802 | ULONGEST unatN_val, unat, unatN_mask; | |
803 | regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat); | |
aa2a9a3c | 804 | unatN_val = extract_unsigned_integer (buf, register_size (current_gdbarch, regnum)); |
004d836a JJ |
805 | unatN_mask = (1LL << (regnum - IA64_NAT0_REGNUM)); |
806 | if (unatN_val == 0) | |
807 | unat &= ~unatN_mask; | |
808 | else if (unatN_val == 1) | |
809 | unat |= unatN_mask; | |
810 | regcache_cooked_write_unsigned (regcache, IA64_UNAT_REGNUM, unat); | |
811 | } | |
812 | else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM) | |
813 | { | |
814 | ULONGEST natN_val; | |
815 | ULONGEST bsp; | |
816 | ULONGEST cfm; | |
817 | CORE_ADDR gr_addr = 0; | |
818 | regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); | |
819 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); | |
820 | ||
821 | /* The bsp points at the end of the register frame so we | |
822 | subtract the size of frame from it to get start of register frame. */ | |
823 | bsp = rse_address_add (bsp, -(cfm & 0x7f)); | |
824 | ||
825 | if ((cfm & 0x7f) > regnum - V32_REGNUM) | |
826 | gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM)); | |
827 | ||
aa2a9a3c | 828 | natN_val = extract_unsigned_integer (buf, register_size (current_gdbarch, regnum)); |
004d836a JJ |
829 | |
830 | if (gr_addr != 0 && (natN_val == 0 || natN_val == 1)) | |
831 | { | |
832 | /* Compute address of nat collection bits. */ | |
833 | CORE_ADDR nat_addr = gr_addr | 0x1f8; | |
834 | CORE_ADDR nat_collection; | |
835 | int natN_bit = (gr_addr >> 3) & 0x3f; | |
836 | ULONGEST natN_mask = (1LL << natN_bit); | |
837 | /* If our nat collection address is bigger than bsp, we have to get | |
838 | the nat collection from rnat. Otherwise, we fetch the nat | |
839 | collection from the computed address. */ | |
840 | if (nat_addr >= bsp) | |
841 | { | |
842 | regcache_cooked_read_unsigned (regcache, IA64_RNAT_REGNUM, &nat_collection); | |
843 | if (natN_val) | |
844 | nat_collection |= natN_mask; | |
845 | else | |
846 | nat_collection &= ~natN_mask; | |
847 | regcache_cooked_write_unsigned (regcache, IA64_RNAT_REGNUM, nat_collection); | |
848 | } | |
849 | else | |
850 | { | |
851 | char nat_buf[8]; | |
852 | nat_collection = read_memory_integer (nat_addr, 8); | |
853 | if (natN_val) | |
854 | nat_collection |= natN_mask; | |
855 | else | |
856 | nat_collection &= ~natN_mask; | |
aa2a9a3c | 857 | store_unsigned_integer (nat_buf, register_size (current_gdbarch, regnum), nat_collection); |
004d836a JJ |
858 | write_memory (nat_addr, nat_buf, 8); |
859 | } | |
860 | } | |
861 | } | |
862 | else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM) | |
863 | { | |
864 | ULONGEST pr; | |
865 | ULONGEST cfm; | |
866 | ULONGEST prN_val; | |
867 | ULONGEST prN_mask; | |
868 | ||
869 | regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr); | |
870 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); | |
871 | ||
872 | if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM) | |
873 | { | |
874 | /* Fetch predicate register rename base from current frame | |
875 | marker for this frame. */ | |
876 | int rrb_pr = (cfm >> 32) & 0x3f; | |
877 | ||
878 | /* Adjust the register number to account for register rotation. */ | |
879 | regnum = VP16_REGNUM | |
880 | + ((regnum - VP16_REGNUM) + rrb_pr) % 48; | |
881 | } | |
aa2a9a3c | 882 | prN_val = extract_unsigned_integer (buf, register_size (current_gdbarch, regnum)); |
004d836a JJ |
883 | prN_mask = (1LL << (regnum - VP0_REGNUM)); |
884 | if (prN_val == 0) | |
885 | pr &= ~prN_mask; | |
886 | else if (prN_val == 1) | |
887 | pr |= prN_mask; | |
888 | regcache_cooked_write_unsigned (regcache, IA64_PR_REGNUM, pr); | |
244bc108 | 889 | } |
16461d7d KB |
890 | } |
891 | ||
004d836a JJ |
892 | /* The ia64 needs to convert between various ieee floating-point formats |
893 | and the special ia64 floating point register format. */ | |
894 | ||
895 | static int | |
896 | ia64_convert_register_p (int regno, struct type *type) | |
897 | { | |
898 | return (regno >= IA64_FR0_REGNUM && regno <= IA64_FR127_REGNUM); | |
899 | } | |
900 | ||
901 | static void | |
902 | ia64_register_to_value (struct frame_info *frame, int regnum, | |
903 | struct type *valtype, void *out) | |
904 | { | |
905 | char in[MAX_REGISTER_SIZE]; | |
906 | frame_register_read (frame, regnum, in); | |
907 | convert_typed_floating (in, builtin_type_ia64_ext, out, valtype); | |
908 | } | |
909 | ||
910 | static void | |
911 | ia64_value_to_register (struct frame_info *frame, int regnum, | |
912 | struct type *valtype, const void *in) | |
913 | { | |
914 | char out[MAX_REGISTER_SIZE]; | |
915 | convert_typed_floating (in, valtype, out, builtin_type_ia64_ext); | |
916 | put_frame_register (frame, regnum, out); | |
917 | } | |
918 | ||
919 | ||
58ab00f9 KB |
920 | /* Limit the number of skipped non-prologue instructions since examining |
921 | of the prologue is expensive. */ | |
5ea2bd7f | 922 | static int max_skip_non_prologue_insns = 40; |
58ab00f9 KB |
923 | |
924 | /* Given PC representing the starting address of a function, and | |
925 | LIM_PC which is the (sloppy) limit to which to scan when looking | |
926 | for a prologue, attempt to further refine this limit by using | |
927 | the line data in the symbol table. If successful, a better guess | |
928 | on where the prologue ends is returned, otherwise the previous | |
929 | value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag | |
930 | which will be set to indicate whether the returned limit may be | |
931 | used with no further scanning in the event that the function is | |
932 | frameless. */ | |
933 | ||
934 | static CORE_ADDR | |
935 | refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit) | |
936 | { | |
937 | struct symtab_and_line prologue_sal; | |
938 | CORE_ADDR start_pc = pc; | |
939 | ||
940 | /* Start off not trusting the limit. */ | |
941 | *trust_limit = 0; | |
942 | ||
943 | prologue_sal = find_pc_line (pc, 0); | |
944 | if (prologue_sal.line != 0) | |
945 | { | |
946 | int i; | |
947 | CORE_ADDR addr = prologue_sal.end; | |
948 | ||
949 | /* Handle the case in which compiler's optimizer/scheduler | |
950 | has moved instructions into the prologue. We scan ahead | |
951 | in the function looking for address ranges whose corresponding | |
952 | line number is less than or equal to the first one that we | |
953 | found for the function. (It can be less than when the | |
954 | scheduler puts a body instruction before the first prologue | |
955 | instruction.) */ | |
956 | for (i = 2 * max_skip_non_prologue_insns; | |
957 | i > 0 && (lim_pc == 0 || addr < lim_pc); | |
958 | i--) | |
959 | { | |
960 | struct symtab_and_line sal; | |
961 | ||
962 | sal = find_pc_line (addr, 0); | |
963 | if (sal.line == 0) | |
964 | break; | |
965 | if (sal.line <= prologue_sal.line | |
966 | && sal.symtab == prologue_sal.symtab) | |
967 | { | |
968 | prologue_sal = sal; | |
969 | } | |
970 | addr = sal.end; | |
971 | } | |
972 | ||
973 | if (lim_pc == 0 || prologue_sal.end < lim_pc) | |
974 | { | |
975 | lim_pc = prologue_sal.end; | |
976 | if (start_pc == get_pc_function_start (lim_pc)) | |
977 | *trust_limit = 1; | |
978 | } | |
979 | } | |
980 | return lim_pc; | |
981 | } | |
982 | ||
16461d7d KB |
983 | #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \ |
984 | || (8 <= (_regnum_) && (_regnum_) <= 11) \ | |
985 | || (14 <= (_regnum_) && (_regnum_) <= 31)) | |
986 | #define imm9(_instr_) \ | |
987 | ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \ | |
988 | | (((_instr_) & 0x00008000000LL) >> 20) \ | |
989 | | (((_instr_) & 0x00000001fc0LL) >> 6)) | |
990 | ||
004d836a JJ |
991 | /* Allocate and initialize a frame cache. */ |
992 | ||
993 | static struct ia64_frame_cache * | |
994 | ia64_alloc_frame_cache (void) | |
995 | { | |
996 | struct ia64_frame_cache *cache; | |
997 | int i; | |
998 | ||
999 | cache = FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache); | |
1000 | ||
1001 | /* Base address. */ | |
1002 | cache->base = 0; | |
1003 | cache->pc = 0; | |
1004 | cache->cfm = 0; | |
4afcc598 | 1005 | cache->prev_cfm = 0; |
004d836a JJ |
1006 | cache->sof = 0; |
1007 | cache->sol = 0; | |
1008 | cache->sor = 0; | |
1009 | cache->bsp = 0; | |
1010 | cache->fp_reg = 0; | |
1011 | cache->frameless = 1; | |
1012 | ||
1013 | for (i = 0; i < NUM_IA64_RAW_REGS; i++) | |
1014 | cache->saved_regs[i] = 0; | |
1015 | ||
1016 | return cache; | |
1017 | } | |
1018 | ||
16461d7d | 1019 | static CORE_ADDR |
004d836a | 1020 | examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *next_frame, struct ia64_frame_cache *cache) |
16461d7d KB |
1021 | { |
1022 | CORE_ADDR next_pc; | |
1023 | CORE_ADDR last_prologue_pc = pc; | |
16461d7d KB |
1024 | instruction_type it; |
1025 | long long instr; | |
16461d7d KB |
1026 | int cfm_reg = 0; |
1027 | int ret_reg = 0; | |
1028 | int fp_reg = 0; | |
1029 | int unat_save_reg = 0; | |
1030 | int pr_save_reg = 0; | |
1031 | int mem_stack_frame_size = 0; | |
1032 | int spill_reg = 0; | |
1033 | CORE_ADDR spill_addr = 0; | |
0927a22b KB |
1034 | char instores[8]; |
1035 | char infpstores[8]; | |
5ea2bd7f | 1036 | char reg_contents[256]; |
58ab00f9 | 1037 | int trust_limit; |
004d836a JJ |
1038 | int frameless = 1; |
1039 | int i; | |
1040 | CORE_ADDR addr; | |
1041 | char buf[8]; | |
1042 | CORE_ADDR bof, sor, sol, sof, cfm, rrb_gr; | |
0927a22b KB |
1043 | |
1044 | memset (instores, 0, sizeof instores); | |
1045 | memset (infpstores, 0, sizeof infpstores); | |
5ea2bd7f | 1046 | memset (reg_contents, 0, sizeof reg_contents); |
16461d7d | 1047 | |
004d836a JJ |
1048 | if (cache->after_prologue != 0 |
1049 | && cache->after_prologue <= lim_pc) | |
1050 | return cache->after_prologue; | |
16461d7d | 1051 | |
58ab00f9 | 1052 | lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit); |
16461d7d | 1053 | next_pc = fetch_instruction (pc, &it, &instr); |
5ea2bd7f JJ |
1054 | |
1055 | /* We want to check if we have a recognizable function start before we | |
1056 | look ahead for a prologue. */ | |
16461d7d KB |
1057 | if (pc < lim_pc && next_pc |
1058 | && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL)) | |
1059 | { | |
5ea2bd7f | 1060 | /* alloc - start of a regular function. */ |
16461d7d KB |
1061 | int sor = (int) ((instr & 0x00078000000LL) >> 27); |
1062 | int sol = (int) ((instr & 0x00007f00000LL) >> 20); | |
1063 | int sof = (int) ((instr & 0x000000fe000LL) >> 13); | |
16461d7d | 1064 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); |
004d836a JJ |
1065 | |
1066 | /* Verify that the current cfm matches what we think is the | |
1067 | function start. If we have somehow jumped within a function, | |
1068 | we do not want to interpret the prologue and calculate the | |
1069 | addresses of various registers such as the return address. | |
1070 | We will instead treat the frame as frameless. */ | |
1071 | if (!next_frame || | |
1072 | (sof == (cache->cfm & 0x7f) && | |
1073 | sol == ((cache->cfm >> 7) & 0x7f))) | |
1074 | frameless = 0; | |
1075 | ||
16461d7d KB |
1076 | cfm_reg = rN; |
1077 | last_prologue_pc = next_pc; | |
1078 | pc = next_pc; | |
1079 | } | |
1080 | else | |
58ab00f9 | 1081 | { |
5ea2bd7f JJ |
1082 | /* Look for a leaf routine. */ |
1083 | if (pc < lim_pc && next_pc | |
1084 | && (it == I || it == M) | |
1085 | && ((instr & 0x1ee00000000LL) == 0x10800000000LL)) | |
1086 | { | |
1087 | /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */ | |
1088 | int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13) | |
1089 | | ((instr & 0x001f8000000LL) >> 20) | |
1090 | | ((instr & 0x000000fe000LL) >> 13)); | |
1091 | int rM = (int) ((instr & 0x00007f00000LL) >> 20); | |
1092 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); | |
1093 | int qp = (int) (instr & 0x0000000003fLL); | |
1094 | if (qp == 0 && rN == 2 && imm == 0 && rM == 12 && fp_reg == 0) | |
1095 | { | |
1096 | /* mov r2, r12 - beginning of leaf routine */ | |
1097 | fp_reg = rN; | |
5ea2bd7f JJ |
1098 | last_prologue_pc = next_pc; |
1099 | } | |
1100 | } | |
1101 | ||
1102 | /* If we don't recognize a regular function or leaf routine, we are | |
1103 | done. */ | |
1104 | if (!fp_reg) | |
1105 | { | |
1106 | pc = lim_pc; | |
1107 | if (trust_limit) | |
1108 | last_prologue_pc = lim_pc; | |
1109 | } | |
58ab00f9 | 1110 | } |
16461d7d KB |
1111 | |
1112 | /* Loop, looking for prologue instructions, keeping track of | |
1113 | where preserved registers were spilled. */ | |
1114 | while (pc < lim_pc) | |
1115 | { | |
1116 | next_pc = fetch_instruction (pc, &it, &instr); | |
1117 | if (next_pc == 0) | |
1118 | break; | |
1119 | ||
102d615a | 1120 | if (it == B && ((instr & 0x1e1f800003f) != 0x04000000000)) |
0927a22b | 1121 | { |
102d615a JJ |
1122 | /* Exit loop upon hitting a non-nop branch instruction. */ |
1123 | if (trust_limit) | |
1124 | lim_pc = pc; | |
1125 | break; | |
1126 | } | |
1127 | else if (((instr & 0x3fLL) != 0LL) && | |
1128 | (frameless || ret_reg != 0)) | |
1129 | { | |
1130 | /* Exit loop upon hitting a predicated instruction if | |
1131 | we already have the return register or if we are frameless. */ | |
5ea2bd7f JJ |
1132 | if (trust_limit) |
1133 | lim_pc = pc; | |
0927a22b KB |
1134 | break; |
1135 | } | |
1136 | else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL)) | |
16461d7d KB |
1137 | { |
1138 | /* Move from BR */ | |
1139 | int b2 = (int) ((instr & 0x0000000e000LL) >> 13); | |
1140 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); | |
1141 | int qp = (int) (instr & 0x0000000003f); | |
1142 | ||
1143 | if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0) | |
1144 | { | |
1145 | ret_reg = rN; | |
1146 | last_prologue_pc = next_pc; | |
1147 | } | |
1148 | } | |
1149 | else if ((it == I || it == M) | |
1150 | && ((instr & 0x1ee00000000LL) == 0x10800000000LL)) | |
1151 | { | |
1152 | /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */ | |
1153 | int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13) | |
1154 | | ((instr & 0x001f8000000LL) >> 20) | |
1155 | | ((instr & 0x000000fe000LL) >> 13)); | |
1156 | int rM = (int) ((instr & 0x00007f00000LL) >> 20); | |
1157 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); | |
1158 | int qp = (int) (instr & 0x0000000003fLL); | |
1159 | ||
1160 | if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0) | |
1161 | { | |
1162 | /* mov rN, r12 */ | |
1163 | fp_reg = rN; | |
1164 | last_prologue_pc = next_pc; | |
1165 | } | |
1166 | else if (qp == 0 && rN == 12 && rM == 12) | |
1167 | { | |
1168 | /* adds r12, -mem_stack_frame_size, r12 */ | |
1169 | mem_stack_frame_size -= imm; | |
1170 | last_prologue_pc = next_pc; | |
1171 | } | |
1172 | else if (qp == 0 && rN == 2 | |
1173 | && ((rM == fp_reg && fp_reg != 0) || rM == 12)) | |
1174 | { | |
004d836a JJ |
1175 | char buf[MAX_REGISTER_SIZE]; |
1176 | CORE_ADDR saved_sp = 0; | |
16461d7d KB |
1177 | /* adds r2, spilloffset, rFramePointer |
1178 | or | |
1179 | adds r2, spilloffset, r12 | |
1180 | ||
1181 | Get ready for stf.spill or st8.spill instructions. | |
1182 | The address to start spilling at is loaded into r2. | |
1183 | FIXME: Why r2? That's what gcc currently uses; it | |
1184 | could well be different for other compilers. */ | |
1185 | ||
1186 | /* Hmm... whether or not this will work will depend on | |
1187 | where the pc is. If it's still early in the prologue | |
1188 | this'll be wrong. FIXME */ | |
004d836a JJ |
1189 | if (next_frame) |
1190 | { | |
1191 | frame_unwind_register (next_frame, sp_regnum, buf); | |
1192 | saved_sp = extract_unsigned_integer (buf, 8); | |
1193 | } | |
1194 | spill_addr = saved_sp | |
16461d7d KB |
1195 | + (rM == 12 ? 0 : mem_stack_frame_size) |
1196 | + imm; | |
1197 | spill_reg = rN; | |
1198 | last_prologue_pc = next_pc; | |
1199 | } | |
5ea2bd7f JJ |
1200 | else if (qp == 0 && rM >= 32 && rM < 40 && !instores[rM] && |
1201 | rN < 256 && imm == 0) | |
1202 | { | |
1203 | /* mov rN, rM where rM is an input register */ | |
1204 | reg_contents[rN] = rM; | |
1205 | last_prologue_pc = next_pc; | |
1206 | } | |
1207 | else if (frameless && qp == 0 && rN == fp_reg && imm == 0 && | |
1208 | rM == 2) | |
1209 | { | |
1210 | /* mov r12, r2 */ | |
1211 | last_prologue_pc = next_pc; | |
1212 | break; | |
1213 | } | |
16461d7d KB |
1214 | } |
1215 | else if (it == M | |
1216 | && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL) | |
1217 | || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) )) | |
1218 | { | |
1219 | /* stf.spill [rN] = fM, imm9 | |
1220 | or | |
1221 | stf.spill [rN] = fM */ | |
1222 | ||
1223 | int imm = imm9(instr); | |
1224 | int rN = (int) ((instr & 0x00007f00000LL) >> 20); | |
1225 | int fM = (int) ((instr & 0x000000fe000LL) >> 13); | |
1226 | int qp = (int) (instr & 0x0000000003fLL); | |
1227 | if (qp == 0 && rN == spill_reg && spill_addr != 0 | |
1228 | && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31))) | |
1229 | { | |
004d836a | 1230 | cache->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr; |
16461d7d KB |
1231 | |
1232 | if ((instr & 0x1efc0000000) == 0x0eec0000000) | |
1233 | spill_addr += imm; | |
1234 | else | |
1235 | spill_addr = 0; /* last one; must be done */ | |
1236 | last_prologue_pc = next_pc; | |
1237 | } | |
1238 | } | |
1239 | else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL)) | |
1240 | || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) ) | |
1241 | { | |
1242 | /* mov.m rN = arM | |
1243 | or | |
1244 | mov.i rN = arM */ | |
1245 | ||
1246 | int arM = (int) ((instr & 0x00007f00000LL) >> 20); | |
1247 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); | |
1248 | int qp = (int) (instr & 0x0000000003fLL); | |
1249 | if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */) | |
1250 | { | |
1251 | /* We have something like "mov.m r3 = ar.unat". Remember the | |
1252 | r3 (or whatever) and watch for a store of this register... */ | |
1253 | unat_save_reg = rN; | |
1254 | last_prologue_pc = next_pc; | |
1255 | } | |
1256 | } | |
1257 | else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL)) | |
1258 | { | |
1259 | /* mov rN = pr */ | |
1260 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); | |
1261 | int qp = (int) (instr & 0x0000000003fLL); | |
1262 | if (qp == 0 && isScratch (rN)) | |
1263 | { | |
1264 | pr_save_reg = rN; | |
1265 | last_prologue_pc = next_pc; | |
1266 | } | |
1267 | } | |
1268 | else if (it == M | |
1269 | && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL) | |
1270 | || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL))) | |
1271 | { | |
1272 | /* st8 [rN] = rM | |
1273 | or | |
1274 | st8 [rN] = rM, imm9 */ | |
1275 | int rN = (int) ((instr & 0x00007f00000LL) >> 20); | |
1276 | int rM = (int) ((instr & 0x000000fe000LL) >> 13); | |
1277 | int qp = (int) (instr & 0x0000000003fLL); | |
5ea2bd7f | 1278 | int indirect = rM < 256 ? reg_contents[rM] : 0; |
16461d7d KB |
1279 | if (qp == 0 && rN == spill_reg && spill_addr != 0 |
1280 | && (rM == unat_save_reg || rM == pr_save_reg)) | |
1281 | { | |
1282 | /* We've found a spill of either the UNAT register or the PR | |
1283 | register. (Well, not exactly; what we've actually found is | |
1284 | a spill of the register that UNAT or PR was moved to). | |
1285 | Record that fact and move on... */ | |
1286 | if (rM == unat_save_reg) | |
1287 | { | |
1288 | /* Track UNAT register */ | |
004d836a | 1289 | cache->saved_regs[IA64_UNAT_REGNUM] = spill_addr; |
16461d7d KB |
1290 | unat_save_reg = 0; |
1291 | } | |
1292 | else | |
1293 | { | |
1294 | /* Track PR register */ | |
004d836a | 1295 | cache->saved_regs[IA64_PR_REGNUM] = spill_addr; |
16461d7d KB |
1296 | pr_save_reg = 0; |
1297 | } | |
1298 | if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL) | |
1299 | /* st8 [rN] = rM, imm9 */ | |
1300 | spill_addr += imm9(instr); | |
1301 | else | |
1302 | spill_addr = 0; /* must be done spilling */ | |
1303 | last_prologue_pc = next_pc; | |
1304 | } | |
0927a22b KB |
1305 | else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32]) |
1306 | { | |
1307 | /* Allow up to one store of each input register. */ | |
1308 | instores[rM-32] = 1; | |
1309 | last_prologue_pc = next_pc; | |
1310 | } | |
5ea2bd7f JJ |
1311 | else if (qp == 0 && 32 <= indirect && indirect < 40 && |
1312 | !instores[indirect-32]) | |
1313 | { | |
1314 | /* Allow an indirect store of an input register. */ | |
1315 | instores[indirect-32] = 1; | |
1316 | last_prologue_pc = next_pc; | |
1317 | } | |
0927a22b KB |
1318 | } |
1319 | else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL)) | |
1320 | { | |
1321 | /* One of | |
1322 | st1 [rN] = rM | |
1323 | st2 [rN] = rM | |
1324 | st4 [rN] = rM | |
1325 | st8 [rN] = rM | |
1326 | Note that the st8 case is handled in the clause above. | |
1327 | ||
1328 | Advance over stores of input registers. One store per input | |
1329 | register is permitted. */ | |
1330 | int rM = (int) ((instr & 0x000000fe000LL) >> 13); | |
1331 | int qp = (int) (instr & 0x0000000003fLL); | |
5ea2bd7f | 1332 | int indirect = rM < 256 ? reg_contents[rM] : 0; |
0927a22b KB |
1333 | if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32]) |
1334 | { | |
1335 | instores[rM-32] = 1; | |
1336 | last_prologue_pc = next_pc; | |
1337 | } | |
5ea2bd7f JJ |
1338 | else if (qp == 0 && 32 <= indirect && indirect < 40 && |
1339 | !instores[indirect-32]) | |
1340 | { | |
1341 | /* Allow an indirect store of an input register. */ | |
1342 | instores[indirect-32] = 1; | |
1343 | last_prologue_pc = next_pc; | |
1344 | } | |
0927a22b KB |
1345 | } |
1346 | else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL)) | |
1347 | { | |
1348 | /* Either | |
1349 | stfs [rN] = fM | |
1350 | or | |
1351 | stfd [rN] = fM | |
1352 | ||
1353 | Advance over stores of floating point input registers. Again | |
1354 | one store per register is permitted */ | |
1355 | int fM = (int) ((instr & 0x000000fe000LL) >> 13); | |
1356 | int qp = (int) (instr & 0x0000000003fLL); | |
1357 | if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8]) | |
1358 | { | |
1359 | infpstores[fM-8] = 1; | |
1360 | last_prologue_pc = next_pc; | |
1361 | } | |
16461d7d KB |
1362 | } |
1363 | else if (it == M | |
1364 | && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL) | |
1365 | || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL))) | |
1366 | { | |
1367 | /* st8.spill [rN] = rM | |
1368 | or | |
1369 | st8.spill [rN] = rM, imm9 */ | |
1370 | int rN = (int) ((instr & 0x00007f00000LL) >> 20); | |
1371 | int rM = (int) ((instr & 0x000000fe000LL) >> 13); | |
1372 | int qp = (int) (instr & 0x0000000003fLL); | |
1373 | if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7) | |
1374 | { | |
1375 | /* We've found a spill of one of the preserved general purpose | |
1376 | regs. Record the spill address and advance the spill | |
1377 | register if appropriate. */ | |
004d836a | 1378 | cache->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr; |
16461d7d KB |
1379 | if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL) |
1380 | /* st8.spill [rN] = rM, imm9 */ | |
1381 | spill_addr += imm9(instr); | |
1382 | else | |
1383 | spill_addr = 0; /* Done spilling */ | |
1384 | last_prologue_pc = next_pc; | |
1385 | } | |
1386 | } | |
16461d7d KB |
1387 | |
1388 | pc = next_pc; | |
1389 | } | |
1390 | ||
004d836a JJ |
1391 | /* If not frameless and we aren't called by skip_prologue, then we need to calculate |
1392 | registers for the previous frame which will be needed later. */ | |
16461d7d | 1393 | |
004d836a | 1394 | if (!frameless && next_frame) |
da50a4b7 | 1395 | { |
004d836a JJ |
1396 | /* Extract the size of the rotating portion of the stack |
1397 | frame and the register rename base from the current | |
1398 | frame marker. */ | |
1399 | cfm = cache->cfm; | |
1400 | sor = cache->sor; | |
1401 | sof = cache->sof; | |
1402 | sol = cache->sol; | |
1403 | rrb_gr = (cfm >> 18) & 0x7f; | |
1404 | ||
1405 | /* Find the bof (beginning of frame). */ | |
1406 | bof = rse_address_add (cache->bsp, -sof); | |
1407 | ||
1408 | for (i = 0, addr = bof; | |
1409 | i < sof; | |
1410 | i++, addr += 8) | |
1411 | { | |
1412 | if (IS_NaT_COLLECTION_ADDR (addr)) | |
1413 | { | |
1414 | addr += 8; | |
1415 | } | |
1416 | if (i+32 == cfm_reg) | |
1417 | cache->saved_regs[IA64_CFM_REGNUM] = addr; | |
1418 | if (i+32 == ret_reg) | |
1419 | cache->saved_regs[IA64_VRAP_REGNUM] = addr; | |
1420 | if (i+32 == fp_reg) | |
1421 | cache->saved_regs[IA64_VFP_REGNUM] = addr; | |
1422 | } | |
16461d7d | 1423 | |
004d836a JJ |
1424 | /* For the previous argument registers we require the previous bof. |
1425 | If we can't find the previous cfm, then we can do nothing. */ | |
4afcc598 | 1426 | cfm = 0; |
004d836a JJ |
1427 | if (cache->saved_regs[IA64_CFM_REGNUM] != 0) |
1428 | { | |
1429 | cfm = read_memory_integer (cache->saved_regs[IA64_CFM_REGNUM], 8); | |
4afcc598 JJ |
1430 | } |
1431 | else if (cfm_reg != 0) | |
1432 | { | |
1433 | frame_unwind_register (next_frame, cfm_reg, buf); | |
1434 | cfm = extract_unsigned_integer (buf, 8); | |
1435 | } | |
1436 | cache->prev_cfm = cfm; | |
1437 | ||
1438 | if (cfm != 0) | |
1439 | { | |
004d836a JJ |
1440 | sor = ((cfm >> 14) & 0xf) * 8; |
1441 | sof = (cfm & 0x7f); | |
1442 | sol = (cfm >> 7) & 0x7f; | |
1443 | rrb_gr = (cfm >> 18) & 0x7f; | |
1444 | ||
1445 | /* The previous bof only requires subtraction of the sol (size of locals) | |
1446 | due to the overlap between output and input of subsequent frames. */ | |
1447 | bof = rse_address_add (bof, -sol); | |
1448 | ||
1449 | for (i = 0, addr = bof; | |
1450 | i < sof; | |
1451 | i++, addr += 8) | |
1452 | { | |
1453 | if (IS_NaT_COLLECTION_ADDR (addr)) | |
1454 | { | |
1455 | addr += 8; | |
1456 | } | |
1457 | if (i < sor) | |
1458 | cache->saved_regs[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)] | |
1459 | = addr; | |
1460 | else | |
1461 | cache->saved_regs[IA64_GR32_REGNUM + i] = addr; | |
1462 | } | |
1463 | ||
1464 | } | |
1465 | } | |
1466 | ||
5ea2bd7f JJ |
1467 | /* Try and trust the lim_pc value whenever possible. */ |
1468 | if (trust_limit && lim_pc >= last_prologue_pc) | |
004d836a JJ |
1469 | last_prologue_pc = lim_pc; |
1470 | ||
1471 | cache->frameless = frameless; | |
1472 | cache->after_prologue = last_prologue_pc; | |
1473 | cache->mem_stack_frame_size = mem_stack_frame_size; | |
1474 | cache->fp_reg = fp_reg; | |
5ea2bd7f | 1475 | |
16461d7d KB |
1476 | return last_prologue_pc; |
1477 | } | |
1478 | ||
1479 | CORE_ADDR | |
1480 | ia64_skip_prologue (CORE_ADDR pc) | |
1481 | { | |
004d836a JJ |
1482 | struct ia64_frame_cache cache; |
1483 | cache.base = 0; | |
1484 | cache.after_prologue = 0; | |
1485 | cache.cfm = 0; | |
1486 | cache.bsp = 0; | |
1487 | ||
1488 | /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */ | |
1489 | return examine_prologue (pc, pc+1024, 0, &cache); | |
16461d7d KB |
1490 | } |
1491 | ||
004d836a JJ |
1492 | |
1493 | /* Normal frames. */ | |
1494 | ||
1495 | static struct ia64_frame_cache * | |
1496 | ia64_frame_cache (struct frame_info *next_frame, void **this_cache) | |
16461d7d | 1497 | { |
004d836a JJ |
1498 | struct ia64_frame_cache *cache; |
1499 | char buf[8]; | |
1500 | CORE_ADDR cfm, sof, sol, bsp, psr; | |
1501 | int i; | |
16461d7d | 1502 | |
004d836a JJ |
1503 | if (*this_cache) |
1504 | return *this_cache; | |
16461d7d | 1505 | |
004d836a JJ |
1506 | cache = ia64_alloc_frame_cache (); |
1507 | *this_cache = cache; | |
16461d7d | 1508 | |
004d836a JJ |
1509 | frame_unwind_register (next_frame, sp_regnum, buf); |
1510 | cache->saved_sp = extract_unsigned_integer (buf, 8); | |
16461d7d | 1511 | |
004d836a JJ |
1512 | /* We always want the bsp to point to the end of frame. |
1513 | This way, we can always get the beginning of frame (bof) | |
1514 | by subtracting frame size. */ | |
1515 | frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf); | |
1516 | cache->bsp = extract_unsigned_integer (buf, 8); | |
1517 | ||
1518 | frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf); | |
1519 | psr = extract_unsigned_integer (buf, 8); | |
1520 | ||
1521 | frame_unwind_register (next_frame, IA64_CFM_REGNUM, buf); | |
1522 | cfm = extract_unsigned_integer (buf, 8); | |
1523 | ||
1524 | cache->sof = (cfm & 0x7f); | |
1525 | cache->sol = (cfm >> 7) & 0x7f; | |
1526 | cache->sor = ((cfm >> 14) & 0xf) * 8; | |
1527 | ||
1528 | cache->cfm = cfm; | |
1529 | ||
1530 | cache->pc = frame_func_unwind (next_frame); | |
1531 | ||
1532 | if (cache->pc != 0) | |
1533 | examine_prologue (cache->pc, frame_pc_unwind (next_frame), next_frame, cache); | |
1534 | ||
1535 | cache->base = cache->saved_sp + cache->mem_stack_frame_size; | |
1536 | ||
1537 | return cache; | |
16461d7d KB |
1538 | } |
1539 | ||
a78f21af | 1540 | static void |
004d836a JJ |
1541 | ia64_frame_this_id (struct frame_info *next_frame, void **this_cache, |
1542 | struct frame_id *this_id) | |
16461d7d | 1543 | { |
004d836a JJ |
1544 | struct ia64_frame_cache *cache = |
1545 | ia64_frame_cache (next_frame, this_cache); | |
16461d7d | 1546 | |
004d836a JJ |
1547 | /* This marks the outermost frame. */ |
1548 | if (cache->base == 0) | |
1549 | return; | |
16461d7d | 1550 | |
4afcc598 JJ |
1551 | (*this_id) = frame_id_build_special (cache->base, cache->pc, cache->bsp); |
1552 | if (gdbarch_debug >= 1) | |
1553 | fprintf_unfiltered (gdb_stdlog, | |
1554 | "regular frame id: code %lx, stack %lx, special %lx, next_frame %p\n", | |
1555 | this_id->code_addr, this_id->stack_addr, cache->bsp, next_frame); | |
004d836a | 1556 | } |
244bc108 | 1557 | |
004d836a JJ |
1558 | static void |
1559 | ia64_frame_prev_register (struct frame_info *next_frame, void **this_cache, | |
1560 | int regnum, int *optimizedp, | |
1561 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
1562 | int *realnump, void *valuep) | |
1563 | { | |
1564 | struct ia64_frame_cache *cache = | |
1565 | ia64_frame_cache (next_frame, this_cache); | |
1566 | char dummy_valp[MAX_REGISTER_SIZE]; | |
1567 | char buf[8]; | |
1568 | ||
1569 | gdb_assert (regnum >= 0); | |
244bc108 | 1570 | |
004d836a JJ |
1571 | if (!target_has_registers) |
1572 | error ("No registers."); | |
244bc108 | 1573 | |
004d836a JJ |
1574 | *optimizedp = 0; |
1575 | *addrp = 0; | |
1576 | *lvalp = not_lval; | |
1577 | *realnump = -1; | |
244bc108 | 1578 | |
004d836a JJ |
1579 | /* Rather than check each time if valuep is non-null, supply a dummy buffer |
1580 | when valuep is not supplied. */ | |
1581 | if (!valuep) | |
1582 | valuep = dummy_valp; | |
1583 | ||
aa2a9a3c | 1584 | memset (valuep, 0, register_size (current_gdbarch, regnum)); |
004d836a JJ |
1585 | |
1586 | if (regnum == SP_REGNUM) | |
16461d7d KB |
1587 | { |
1588 | /* Handle SP values for all frames but the topmost. */ | |
aa2a9a3c | 1589 | store_unsigned_integer (valuep, register_size (current_gdbarch, regnum), |
004d836a | 1590 | cache->base); |
16461d7d KB |
1591 | } |
1592 | else if (regnum == IA64_BSP_REGNUM) | |
1593 | { | |
004d836a JJ |
1594 | char cfm_valuep[MAX_REGISTER_SIZE]; |
1595 | int cfm_optim; | |
1596 | int cfm_realnum; | |
1597 | enum lval_type cfm_lval; | |
1598 | CORE_ADDR cfm_addr; | |
1599 | CORE_ADDR bsp, prev_cfm, prev_bsp; | |
1600 | ||
1601 | /* We want to calculate the previous bsp as the end of the previous register stack frame. | |
1602 | This corresponds to what the hardware bsp register will be if we pop the frame | |
1603 | back which is why we might have been called. We know the beginning of the current | |
aa2a9a3c | 1604 | frame is cache->bsp - cache->sof. This value in the previous frame points to |
004d836a JJ |
1605 | the start of the output registers. We can calculate the end of that frame by adding |
1606 | the size of output (sof (size of frame) - sol (size of locals)). */ | |
1607 | ia64_frame_prev_register (next_frame, this_cache, IA64_CFM_REGNUM, | |
1608 | &cfm_optim, &cfm_lval, &cfm_addr, &cfm_realnum, cfm_valuep); | |
1609 | prev_cfm = extract_unsigned_integer (cfm_valuep, 8); | |
1610 | ||
1611 | bsp = rse_address_add (cache->bsp, -(cache->sof)); | |
1612 | prev_bsp = rse_address_add (bsp, (prev_cfm & 0x7f) - ((prev_cfm >> 7) & 0x7f)); | |
1613 | ||
aa2a9a3c | 1614 | store_unsigned_integer (valuep, register_size (current_gdbarch, regnum), |
004d836a JJ |
1615 | prev_bsp); |
1616 | } | |
1617 | else if (regnum == IA64_CFM_REGNUM) | |
1618 | { | |
4afcc598 JJ |
1619 | CORE_ADDR addr = cache->saved_regs[IA64_CFM_REGNUM]; |
1620 | ||
1621 | if (addr != 0) | |
004d836a | 1622 | { |
4afcc598 JJ |
1623 | *lvalp = lval_memory; |
1624 | *addrp = addr; | |
1625 | read_memory (addr, valuep, register_size (current_gdbarch, regnum)); | |
004d836a | 1626 | } |
4afcc598 JJ |
1627 | else if (cache->prev_cfm) |
1628 | store_unsigned_integer (valuep, register_size (current_gdbarch, regnum), cache->prev_cfm); | |
1629 | else if (cache->frameless) | |
004d836a | 1630 | { |
4afcc598 JJ |
1631 | CORE_ADDR cfm = 0; |
1632 | frame_unwind_register (next_frame, IA64_PFS_REGNUM, valuep); | |
004d836a | 1633 | } |
16461d7d KB |
1634 | } |
1635 | else if (regnum == IA64_VFP_REGNUM) | |
1636 | { | |
1637 | /* If the function in question uses an automatic register (r32-r127) | |
1638 | for the frame pointer, it'll be found by ia64_find_saved_register() | |
1639 | above. If the function lacks one of these frame pointers, we can | |
004d836a JJ |
1640 | still provide a value since we know the size of the frame. */ |
1641 | CORE_ADDR vfp = cache->base; | |
aa2a9a3c | 1642 | store_unsigned_integer (valuep, register_size (current_gdbarch, IA64_VFP_REGNUM), vfp); |
16461d7d | 1643 | } |
004d836a | 1644 | else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM) |
16461d7d | 1645 | { |
004d836a | 1646 | char pr_valuep[MAX_REGISTER_SIZE]; |
16461d7d | 1647 | int pr_optim; |
004d836a | 1648 | int pr_realnum; |
16461d7d KB |
1649 | enum lval_type pr_lval; |
1650 | CORE_ADDR pr_addr; | |
004d836a JJ |
1651 | ULONGEST prN_val; |
1652 | ia64_frame_prev_register (next_frame, this_cache, IA64_PR_REGNUM, | |
1653 | &pr_optim, &pr_lval, &pr_addr, &pr_realnum, pr_valuep); | |
1654 | if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM) | |
3a854e23 KB |
1655 | { |
1656 | /* Fetch predicate register rename base from current frame | |
004d836a JJ |
1657 | marker for this frame. */ |
1658 | int rrb_pr = (cache->cfm >> 32) & 0x3f; | |
3a854e23 | 1659 | |
004d836a JJ |
1660 | /* Adjust the register number to account for register rotation. */ |
1661 | regnum = VP16_REGNUM | |
1662 | + ((regnum - VP16_REGNUM) + rrb_pr) % 48; | |
3a854e23 | 1663 | } |
004d836a JJ |
1664 | prN_val = extract_bit_field ((unsigned char *) pr_valuep, |
1665 | regnum - VP0_REGNUM, 1); | |
aa2a9a3c | 1666 | store_unsigned_integer (valuep, register_size (current_gdbarch, regnum), prN_val); |
16461d7d KB |
1667 | } |
1668 | else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM) | |
1669 | { | |
004d836a | 1670 | char unat_valuep[MAX_REGISTER_SIZE]; |
16461d7d | 1671 | int unat_optim; |
004d836a | 1672 | int unat_realnum; |
16461d7d KB |
1673 | enum lval_type unat_lval; |
1674 | CORE_ADDR unat_addr; | |
004d836a JJ |
1675 | ULONGEST unatN_val; |
1676 | ia64_frame_prev_register (next_frame, this_cache, IA64_UNAT_REGNUM, | |
1677 | &unat_optim, &unat_lval, &unat_addr, &unat_realnum, unat_valuep); | |
1678 | unatN_val = extract_bit_field ((unsigned char *) unat_valuep, | |
16461d7d | 1679 | regnum - IA64_NAT0_REGNUM, 1); |
aa2a9a3c | 1680 | store_unsigned_integer (valuep, register_size (current_gdbarch, regnum), |
16461d7d | 1681 | unatN_val); |
16461d7d KB |
1682 | } |
1683 | else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM) | |
1684 | { | |
1685 | int natval = 0; | |
1686 | /* Find address of general register corresponding to nat bit we're | |
004d836a JJ |
1687 | interested in. */ |
1688 | CORE_ADDR gr_addr; | |
244bc108 | 1689 | |
004d836a JJ |
1690 | gr_addr = cache->saved_regs[regnum - IA64_NAT0_REGNUM |
1691 | + IA64_GR0_REGNUM]; | |
1692 | if (gr_addr != 0) | |
244bc108 | 1693 | { |
004d836a | 1694 | /* Compute address of nat collection bits. */ |
16461d7d | 1695 | CORE_ADDR nat_addr = gr_addr | 0x1f8; |
004d836a | 1696 | CORE_ADDR bsp; |
16461d7d KB |
1697 | CORE_ADDR nat_collection; |
1698 | int nat_bit; | |
1699 | /* If our nat collection address is bigger than bsp, we have to get | |
1700 | the nat collection from rnat. Otherwise, we fetch the nat | |
004d836a JJ |
1701 | collection from the computed address. */ |
1702 | frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf); | |
1703 | bsp = extract_unsigned_integer (buf, 8); | |
16461d7d | 1704 | if (nat_addr >= bsp) |
004d836a JJ |
1705 | { |
1706 | frame_unwind_register (next_frame, IA64_RNAT_REGNUM, buf); | |
1707 | nat_collection = extract_unsigned_integer (buf, 8); | |
1708 | } | |
16461d7d KB |
1709 | else |
1710 | nat_collection = read_memory_integer (nat_addr, 8); | |
1711 | nat_bit = (gr_addr >> 3) & 0x3f; | |
1712 | natval = (nat_collection >> nat_bit) & 1; | |
1713 | } | |
004d836a | 1714 | |
aa2a9a3c | 1715 | store_unsigned_integer (valuep, register_size (current_gdbarch, regnum), natval); |
244bc108 KB |
1716 | } |
1717 | else if (regnum == IA64_IP_REGNUM) | |
1718 | { | |
004d836a | 1719 | CORE_ADDR pc = 0; |
4afcc598 | 1720 | CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM]; |
004d836a | 1721 | |
4afcc598 | 1722 | if (addr != 0) |
004d836a | 1723 | { |
4afcc598 JJ |
1724 | *lvalp = lval_memory; |
1725 | *addrp = addr; | |
1726 | read_memory (addr, buf, register_size (current_gdbarch, IA64_IP_REGNUM)); | |
004d836a JJ |
1727 | pc = extract_unsigned_integer (buf, 8); |
1728 | } | |
4afcc598 | 1729 | else if (cache->frameless) |
004d836a | 1730 | { |
4afcc598 JJ |
1731 | frame_unwind_register (next_frame, IA64_BR0_REGNUM, buf); |
1732 | pc = extract_unsigned_integer (buf, 8); | |
244bc108 | 1733 | } |
004d836a JJ |
1734 | pc &= ~0xf; |
1735 | store_unsigned_integer (valuep, 8, pc); | |
244bc108 | 1736 | } |
004d836a | 1737 | else if (regnum == IA64_PSR_REGNUM) |
244bc108 | 1738 | { |
4afcc598 JJ |
1739 | /* We don't know how to get the complete previous PSR, but we need it for |
1740 | the slot information when we unwind the pc (pc is formed of IP register | |
1741 | plus slot information from PSR). To get the previous slot information, | |
1742 | we mask it off the return address. */ | |
004d836a JJ |
1743 | ULONGEST slot_num = 0; |
1744 | CORE_ADDR pc= 0; | |
1745 | CORE_ADDR psr = 0; | |
4afcc598 | 1746 | CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM]; |
004d836a JJ |
1747 | |
1748 | frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf); | |
1749 | psr = extract_unsigned_integer (buf, 8); | |
1750 | ||
4afcc598 | 1751 | if (addr != 0) |
244bc108 | 1752 | { |
4afcc598 JJ |
1753 | *lvalp = lval_memory; |
1754 | *addrp = addr; | |
1755 | read_memory (addr, buf, register_size (current_gdbarch, IA64_IP_REGNUM)); | |
004d836a | 1756 | pc = extract_unsigned_integer (buf, 8); |
244bc108 | 1757 | } |
4afcc598 | 1758 | else if (cache->frameless) |
004d836a | 1759 | { |
4afcc598 JJ |
1760 | CORE_ADDR pc; |
1761 | frame_unwind_register (next_frame, IA64_BR0_REGNUM, buf); | |
1762 | pc = extract_unsigned_integer (buf, 8); | |
004d836a JJ |
1763 | } |
1764 | psr &= ~(3LL << 41); | |
1765 | slot_num = pc & 0x3LL; | |
1766 | psr |= (CORE_ADDR)slot_num << 41; | |
1767 | store_unsigned_integer (valuep, 8, psr); | |
1768 | } | |
4afcc598 JJ |
1769 | else if (regnum == IA64_BR0_REGNUM) |
1770 | { | |
1771 | CORE_ADDR br0 = 0; | |
1772 | CORE_ADDR addr = cache->saved_regs[IA64_BR0_REGNUM]; | |
1773 | if (addr != 0) | |
1774 | { | |
1775 | *lvalp = lval_memory; | |
1776 | *addrp = addr; | |
1777 | read_memory (addr, buf, register_size (current_gdbarch, IA64_BR0_REGNUM)); | |
1778 | br0 = extract_unsigned_integer (buf, 8); | |
1779 | } | |
1780 | store_unsigned_integer (valuep, 8, br0); | |
1781 | } | |
004d836a JJ |
1782 | else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM) || |
1783 | (regnum >= V32_REGNUM && regnum <= V127_REGNUM)) | |
1784 | { | |
1785 | CORE_ADDR addr = 0; | |
1786 | if (regnum >= V32_REGNUM) | |
1787 | regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM); | |
1788 | addr = cache->saved_regs[regnum]; | |
244bc108 KB |
1789 | if (addr != 0) |
1790 | { | |
004d836a JJ |
1791 | *lvalp = lval_memory; |
1792 | *addrp = addr; | |
aa2a9a3c | 1793 | read_memory (addr, valuep, register_size (current_gdbarch, regnum)); |
244bc108 | 1794 | } |
004d836a | 1795 | else if (cache->frameless) |
244bc108 | 1796 | { |
004d836a JJ |
1797 | char r_valuep[MAX_REGISTER_SIZE]; |
1798 | int r_optim; | |
1799 | int r_realnum; | |
1800 | enum lval_type r_lval; | |
1801 | CORE_ADDR r_addr; | |
1802 | CORE_ADDR prev_cfm, prev_bsp, prev_bof; | |
1803 | CORE_ADDR addr = 0; | |
1804 | if (regnum >= V32_REGNUM) | |
1805 | regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM); | |
1806 | ia64_frame_prev_register (next_frame, this_cache, IA64_CFM_REGNUM, | |
1807 | &r_optim, &r_lval, &r_addr, &r_realnum, r_valuep); | |
1808 | prev_cfm = extract_unsigned_integer (r_valuep, 8); | |
1809 | ia64_frame_prev_register (next_frame, this_cache, IA64_BSP_REGNUM, | |
1810 | &r_optim, &r_lval, &r_addr, &r_realnum, r_valuep); | |
1811 | prev_bsp = extract_unsigned_integer (r_valuep, 8); | |
1812 | prev_bof = rse_address_add (prev_bsp, -(prev_cfm & 0x7f)); | |
1813 | ||
1814 | addr = rse_address_add (prev_bof, (regnum - IA64_GR32_REGNUM)); | |
1815 | *lvalp = lval_memory; | |
1816 | *addrp = addr; | |
aa2a9a3c | 1817 | read_memory (addr, valuep, register_size (current_gdbarch, regnum)); |
244bc108 | 1818 | } |
16461d7d KB |
1819 | } |
1820 | else | |
1821 | { | |
004d836a | 1822 | CORE_ADDR addr = 0; |
3a854e23 KB |
1823 | if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM) |
1824 | { | |
1825 | /* Fetch floating point register rename base from current | |
004d836a JJ |
1826 | frame marker for this frame. */ |
1827 | int rrb_fr = (cache->cfm >> 25) & 0x7f; | |
3a854e23 KB |
1828 | |
1829 | /* Adjust the floating point register number to account for | |
004d836a | 1830 | register rotation. */ |
3a854e23 KB |
1831 | regnum = IA64_FR32_REGNUM |
1832 | + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96; | |
1833 | } | |
1834 | ||
004d836a JJ |
1835 | /* If we have stored a memory address, access the register. */ |
1836 | addr = cache->saved_regs[regnum]; | |
1837 | if (addr != 0) | |
1838 | { | |
1839 | *lvalp = lval_memory; | |
1840 | *addrp = addr; | |
aa2a9a3c | 1841 | read_memory (addr, valuep, register_size (current_gdbarch, regnum)); |
004d836a JJ |
1842 | } |
1843 | /* Otherwise, punt and get the current value of the register. */ | |
1844 | else | |
1845 | frame_unwind_register (next_frame, regnum, valuep); | |
16461d7d | 1846 | } |
4afcc598 JJ |
1847 | |
1848 | if (gdbarch_debug >= 1) | |
1849 | fprintf_unfiltered (gdb_stdlog, | |
1850 | "regular prev register <%d> <%s> is %lx\n", regnum, | |
1851 | (((unsigned) regnum <= IA64_NAT127_REGNUM) | |
1852 | ? ia64_register_names[regnum] : "r??"), extract_unsigned_integer (valuep, 8)); | |
16461d7d | 1853 | } |
004d836a JJ |
1854 | |
1855 | static const struct frame_unwind ia64_frame_unwind = | |
1856 | { | |
1857 | NORMAL_FRAME, | |
1858 | &ia64_frame_this_id, | |
1859 | &ia64_frame_prev_register | |
1860 | }; | |
1861 | ||
1862 | static const struct frame_unwind * | |
1863 | ia64_frame_sniffer (struct frame_info *next_frame) | |
1864 | { | |
1865 | return &ia64_frame_unwind; | |
1866 | } | |
1867 | ||
1868 | /* Signal trampolines. */ | |
1869 | ||
1870 | static void | |
1871 | ia64_sigtramp_frame_init_saved_regs (struct ia64_frame_cache *cache) | |
1872 | { | |
1873 | if (SIGCONTEXT_REGISTER_ADDRESS) | |
1874 | { | |
1875 | int regno; | |
1876 | ||
1877 | cache->saved_regs[IA64_VRAP_REGNUM] = | |
1878 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_IP_REGNUM); | |
1879 | cache->saved_regs[IA64_CFM_REGNUM] = | |
1880 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_CFM_REGNUM); | |
1881 | cache->saved_regs[IA64_PSR_REGNUM] = | |
1882 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_PSR_REGNUM); | |
004d836a | 1883 | cache->saved_regs[IA64_BSP_REGNUM] = |
4afcc598 | 1884 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_BSP_REGNUM); |
004d836a JJ |
1885 | cache->saved_regs[IA64_RNAT_REGNUM] = |
1886 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_RNAT_REGNUM); | |
1887 | cache->saved_regs[IA64_CCV_REGNUM] = | |
1888 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_CCV_REGNUM); | |
1889 | cache->saved_regs[IA64_UNAT_REGNUM] = | |
1890 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_UNAT_REGNUM); | |
1891 | cache->saved_regs[IA64_FPSR_REGNUM] = | |
1892 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_FPSR_REGNUM); | |
1893 | cache->saved_regs[IA64_PFS_REGNUM] = | |
1894 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_PFS_REGNUM); | |
1895 | cache->saved_regs[IA64_LC_REGNUM] = | |
1896 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_LC_REGNUM); | |
1897 | for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++) | |
4afcc598 JJ |
1898 | cache->saved_regs[regno] = |
1899 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, regno); | |
004d836a JJ |
1900 | for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++) |
1901 | cache->saved_regs[regno] = | |
1902 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, regno); | |
932644f0 | 1903 | for (regno = IA64_FR2_REGNUM; regno <= IA64_FR31_REGNUM; regno++) |
004d836a JJ |
1904 | cache->saved_regs[regno] = |
1905 | SIGCONTEXT_REGISTER_ADDRESS (cache->base, regno); | |
1906 | } | |
1907 | } | |
1908 | ||
1909 | static struct ia64_frame_cache * | |
1910 | ia64_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache) | |
1911 | { | |
1912 | struct ia64_frame_cache *cache; | |
1913 | CORE_ADDR addr; | |
1914 | char buf[8]; | |
1915 | int i; | |
1916 | ||
1917 | if (*this_cache) | |
1918 | return *this_cache; | |
1919 | ||
1920 | cache = ia64_alloc_frame_cache (); | |
1921 | ||
1922 | frame_unwind_register (next_frame, sp_regnum, buf); | |
4afcc598 JJ |
1923 | /* Note that frame size is hard-coded below. We cannot calculate it |
1924 | via prologue examination. */ | |
1925 | cache->base = extract_unsigned_integer (buf, 8) + 16; | |
1926 | ||
1927 | frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf); | |
1928 | cache->bsp = extract_unsigned_integer (buf, 8); | |
1929 | ||
1930 | frame_unwind_register (next_frame, IA64_CFM_REGNUM, buf); | |
1931 | cache->cfm = extract_unsigned_integer (buf, 8); | |
1932 | cache->sof = cache->cfm & 0x7f; | |
004d836a JJ |
1933 | |
1934 | ia64_sigtramp_frame_init_saved_regs (cache); | |
1935 | ||
1936 | *this_cache = cache; | |
1937 | return cache; | |
1938 | } | |
1939 | ||
1940 | static void | |
1941 | ia64_sigtramp_frame_this_id (struct frame_info *next_frame, | |
1942 | void **this_cache, struct frame_id *this_id) | |
1943 | { | |
1944 | struct ia64_frame_cache *cache = | |
1945 | ia64_sigtramp_frame_cache (next_frame, this_cache); | |
1946 | ||
4afcc598 JJ |
1947 | (*this_id) = frame_id_build_special (cache->base, frame_pc_unwind (next_frame), cache->bsp); |
1948 | if (gdbarch_debug >= 1) | |
1949 | fprintf_unfiltered (gdb_stdlog, | |
1950 | "sigtramp frame id: code %lx, stack %lx, special %lx, next_frame %p\n", | |
1951 | this_id->code_addr, this_id->stack_addr, cache->bsp, next_frame); | |
004d836a JJ |
1952 | } |
1953 | ||
1954 | static void | |
1955 | ia64_sigtramp_frame_prev_register (struct frame_info *next_frame, | |
1956 | void **this_cache, | |
1957 | int regnum, int *optimizedp, | |
1958 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
1959 | int *realnump, void *valuep) | |
1960 | { | |
4afcc598 JJ |
1961 | char dummy_valp[MAX_REGISTER_SIZE]; |
1962 | char buf[MAX_REGISTER_SIZE]; | |
1963 | ||
1964 | struct ia64_frame_cache *cache = | |
1965 | ia64_sigtramp_frame_cache (next_frame, this_cache); | |
1966 | ||
1967 | gdb_assert (regnum >= 0); | |
1968 | ||
1969 | if (!target_has_registers) | |
1970 | error ("No registers."); | |
1971 | ||
1972 | *optimizedp = 0; | |
1973 | *addrp = 0; | |
1974 | *lvalp = not_lval; | |
1975 | *realnump = -1; | |
1976 | ||
1977 | /* Rather than check each time if valuep is non-null, supply a dummy buffer | |
1978 | when valuep is not supplied. */ | |
1979 | if (!valuep) | |
1980 | valuep = dummy_valp; | |
1981 | ||
1982 | memset (valuep, 0, register_size (current_gdbarch, regnum)); | |
1983 | ||
1984 | if (regnum == IA64_IP_REGNUM) | |
1985 | { | |
1986 | CORE_ADDR pc = 0; | |
1987 | CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM]; | |
1988 | ||
1989 | if (addr != 0) | |
1990 | { | |
1991 | *lvalp = lval_memory; | |
1992 | *addrp = addr; | |
1993 | read_memory (addr, buf, register_size (current_gdbarch, IA64_IP_REGNUM)); | |
1994 | pc = extract_unsigned_integer (buf, 8); | |
1995 | } | |
1996 | pc &= ~0xf; | |
1997 | store_unsigned_integer (valuep, 8, pc); | |
1998 | } | |
1999 | else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM) || | |
2000 | (regnum >= V32_REGNUM && regnum <= V127_REGNUM)) | |
2001 | { | |
2002 | CORE_ADDR addr = 0; | |
2003 | if (regnum >= V32_REGNUM) | |
2004 | regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM); | |
2005 | addr = cache->saved_regs[regnum]; | |
2006 | if (addr != 0) | |
2007 | { | |
2008 | *lvalp = lval_memory; | |
2009 | *addrp = addr; | |
2010 | read_memory (addr, valuep, register_size (current_gdbarch, regnum)); | |
2011 | } | |
2012 | } | |
2013 | else | |
2014 | { | |
2015 | /* All other registers not listed above. */ | |
2016 | CORE_ADDR addr = cache->saved_regs[regnum]; | |
2017 | if (addr != 0) | |
2018 | { | |
2019 | *lvalp = lval_memory; | |
2020 | *addrp = addr; | |
2021 | read_memory (addr, valuep, register_size (current_gdbarch, regnum)); | |
2022 | } | |
2023 | } | |
004d836a | 2024 | |
4afcc598 JJ |
2025 | if (gdbarch_debug >= 1) |
2026 | fprintf_unfiltered (gdb_stdlog, | |
2027 | "sigtramp prev register <%s> is %lx\n", | |
2028 | (((unsigned) regnum <= IA64_NAT127_REGNUM) | |
2029 | ? ia64_register_names[regnum] : "r??"), extract_unsigned_integer (valuep, 8)); | |
004d836a JJ |
2030 | } |
2031 | ||
2032 | static const struct frame_unwind ia64_sigtramp_frame_unwind = | |
2033 | { | |
2034 | SIGTRAMP_FRAME, | |
2035 | ia64_sigtramp_frame_this_id, | |
2036 | ia64_sigtramp_frame_prev_register | |
2037 | }; | |
2038 | ||
2039 | static const struct frame_unwind * | |
2040 | ia64_sigtramp_frame_sniffer (struct frame_info *next_frame) | |
2041 | { | |
2042 | char *name; | |
2043 | CORE_ADDR pc = frame_pc_unwind (next_frame); | |
2044 | ||
2045 | find_pc_partial_function (pc, &name, NULL, NULL); | |
2046 | if (PC_IN_SIGTRAMP (pc, name)) | |
2047 | return &ia64_sigtramp_frame_unwind; | |
2048 | ||
2049 | return NULL; | |
2050 | } | |
2051 | \f | |
2052 | ||
2053 | static CORE_ADDR | |
2054 | ia64_frame_base_address (struct frame_info *next_frame, void **this_cache) | |
2055 | { | |
2056 | struct ia64_frame_cache *cache = | |
2057 | ia64_frame_cache (next_frame, this_cache); | |
2058 | ||
2059 | return cache->base; | |
2060 | } | |
2061 | ||
2062 | static const struct frame_base ia64_frame_base = | |
2063 | { | |
2064 | &ia64_frame_unwind, | |
2065 | ia64_frame_base_address, | |
2066 | ia64_frame_base_address, | |
2067 | ia64_frame_base_address | |
2068 | }; | |
16461d7d | 2069 | |
968d1cb4 JJ |
2070 | #ifdef HAVE_LIBUNWIND_IA64_H |
2071 | ||
2072 | struct ia64_unwind_table_entry | |
2073 | { | |
2074 | unw_word_t start_offset; | |
2075 | unw_word_t end_offset; | |
2076 | unw_word_t info_offset; | |
2077 | }; | |
2078 | ||
2079 | static __inline__ uint64_t | |
2080 | ia64_rse_slot_num (uint64_t addr) | |
2081 | { | |
2082 | return (addr >> 3) & 0x3f; | |
2083 | } | |
2084 | ||
2085 | /* Skip over a designated number of registers in the backing | |
2086 | store, remembering every 64th position is for NAT. */ | |
2087 | static __inline__ uint64_t | |
2088 | ia64_rse_skip_regs (uint64_t addr, long num_regs) | |
2089 | { | |
2090 | long delta = ia64_rse_slot_num(addr) + num_regs; | |
2091 | ||
2092 | if (num_regs < 0) | |
2093 | delta -= 0x3e; | |
2094 | return addr + ((num_regs + delta/0x3f) << 3); | |
2095 | } | |
2096 | ||
2097 | /* Gdb libunwind-frame callback function to convert from an ia64 gdb register | |
2098 | number to a libunwind register number. */ | |
2099 | static int | |
2100 | ia64_gdb2uw_regnum (int regnum) | |
2101 | { | |
2102 | if (regnum == sp_regnum) | |
2103 | return UNW_IA64_SP; | |
2104 | else if (regnum == IA64_BSP_REGNUM) | |
2105 | return UNW_IA64_BSP; | |
2106 | else if ((unsigned) (regnum - IA64_GR0_REGNUM) < 128) | |
2107 | return UNW_IA64_GR + (regnum - IA64_GR0_REGNUM); | |
2108 | else if ((unsigned) (regnum - V32_REGNUM) < 95) | |
2109 | return UNW_IA64_GR + 32 + (regnum - V32_REGNUM); | |
2110 | else if ((unsigned) (regnum - IA64_FR0_REGNUM) < 128) | |
2111 | return UNW_IA64_FR + (regnum - IA64_FR0_REGNUM); | |
2112 | else if ((unsigned) (regnum - IA64_PR0_REGNUM) < 64) | |
2113 | return -1; | |
2114 | else if ((unsigned) (regnum - IA64_BR0_REGNUM) < 8) | |
2115 | return UNW_IA64_BR + (regnum - IA64_BR0_REGNUM); | |
2116 | else if (regnum == IA64_PR_REGNUM) | |
2117 | return UNW_IA64_PR; | |
2118 | else if (regnum == IA64_IP_REGNUM) | |
2119 | return UNW_REG_IP; | |
2120 | else if (regnum == IA64_CFM_REGNUM) | |
2121 | return UNW_IA64_CFM; | |
2122 | else if ((unsigned) (regnum - IA64_AR0_REGNUM) < 128) | |
2123 | return UNW_IA64_AR + (regnum - IA64_AR0_REGNUM); | |
2124 | else if ((unsigned) (regnum - IA64_NAT0_REGNUM) < 128) | |
2125 | return UNW_IA64_NAT + (regnum - IA64_NAT0_REGNUM); | |
2126 | else | |
2127 | return -1; | |
2128 | } | |
2129 | ||
2130 | /* Gdb libunwind-frame callback function to convert from a libunwind register | |
2131 | number to a ia64 gdb register number. */ | |
2132 | static int | |
2133 | ia64_uw2gdb_regnum (int uw_regnum) | |
2134 | { | |
2135 | if (uw_regnum == UNW_IA64_SP) | |
2136 | return sp_regnum; | |
2137 | else if (uw_regnum == UNW_IA64_BSP) | |
2138 | return IA64_BSP_REGNUM; | |
2139 | else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 32) | |
2140 | return IA64_GR0_REGNUM + (uw_regnum - UNW_IA64_GR); | |
2141 | else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 128) | |
2142 | return V32_REGNUM + (uw_regnum - (IA64_GR0_REGNUM + 32)); | |
2143 | else if ((unsigned) (uw_regnum - UNW_IA64_FR) < 128) | |
2144 | return IA64_FR0_REGNUM + (uw_regnum - UNW_IA64_FR); | |
2145 | else if ((unsigned) (uw_regnum - UNW_IA64_BR) < 8) | |
2146 | return IA64_BR0_REGNUM + (uw_regnum - UNW_IA64_BR); | |
2147 | else if (uw_regnum == UNW_IA64_PR) | |
2148 | return IA64_PR_REGNUM; | |
2149 | else if (uw_regnum == UNW_REG_IP) | |
2150 | return IA64_IP_REGNUM; | |
2151 | else if (uw_regnum == UNW_IA64_CFM) | |
2152 | return IA64_CFM_REGNUM; | |
2153 | else if ((unsigned) (uw_regnum - UNW_IA64_AR) < 128) | |
2154 | return IA64_AR0_REGNUM + (uw_regnum - UNW_IA64_AR); | |
2155 | else if ((unsigned) (uw_regnum - UNW_IA64_NAT) < 128) | |
2156 | return IA64_NAT0_REGNUM + (uw_regnum - UNW_IA64_NAT); | |
2157 | else | |
2158 | return -1; | |
2159 | } | |
2160 | ||
2161 | /* Gdb libunwind-frame callback function to reveal if register is a float | |
2162 | register or not. */ | |
2163 | static int | |
2164 | ia64_is_fpreg (int uw_regnum) | |
2165 | { | |
2166 | return unw_is_fpreg (uw_regnum); | |
2167 | } | |
2168 | ||
2169 | /* Libunwind callback accessor function for general registers. */ | |
2170 | static int | |
2171 | ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val, | |
2172 | int write, void *arg) | |
2173 | { | |
2174 | int regnum = ia64_uw2gdb_regnum (uw_regnum); | |
2175 | unw_word_t bsp, sof, sol, cfm, psr, ip; | |
2176 | struct frame_info *next_frame = arg; | |
2177 | long new_sof, old_sof; | |
2178 | char buf[MAX_REGISTER_SIZE]; | |
2179 | ||
2180 | if (write) | |
2181 | { | |
2182 | if (regnum < 0) | |
2183 | /* ignore writes to pseudo-registers such as UNW_IA64_PROC_STARTI. */ | |
2184 | return 0; | |
2185 | ||
2186 | switch (uw_regnum) | |
2187 | { | |
2188 | case UNW_REG_IP: | |
2189 | ia64_write_pc (*val, inferior_ptid); | |
2190 | break; | |
2191 | ||
2192 | case UNW_IA64_AR_BSPSTORE: | |
2193 | write_register (IA64_BSP_REGNUM, *val); | |
2194 | break; | |
2195 | ||
2196 | case UNW_IA64_AR_BSP: | |
2197 | case UNW_IA64_BSP: | |
2198 | /* Account for the fact that ptrace() expects bsp to point | |
2199 | after the current register frame. */ | |
2200 | cfm = read_register (IA64_CFM_REGNUM); | |
2201 | sof = (cfm & 0x7f); | |
2202 | bsp = ia64_rse_skip_regs (*val, sof); | |
2203 | write_register (IA64_BSP_REGNUM, bsp); | |
2204 | break; | |
2205 | ||
2206 | case UNW_IA64_CFM: | |
2207 | /* If we change CFM, we need to adjust ptrace's notion of | |
2208 | bsp accordingly, so that the real bsp remains | |
2209 | unchanged. */ | |
2210 | bsp = read_register (IA64_BSP_REGNUM); | |
2211 | cfm = read_register (IA64_CFM_REGNUM); | |
2212 | old_sof = (cfm & 0x7f); | |
2213 | new_sof = (*val & 0x7f); | |
2214 | if (old_sof != new_sof) | |
2215 | { | |
2216 | bsp = ia64_rse_skip_regs (bsp, -old_sof + new_sof); | |
2217 | write_register (IA64_BSP_REGNUM, bsp); | |
2218 | } | |
2219 | write_register (IA64_CFM_REGNUM, *val); | |
2220 | break; | |
2221 | ||
2222 | default: | |
2223 | write_register (regnum, *val); | |
2224 | break; | |
2225 | } | |
2226 | if (gdbarch_debug >= 1) | |
2227 | fprintf_unfiltered (gdb_stdlog, | |
2228 | " access_reg: to cache: %4s=%016lx\n", | |
2229 | (((unsigned) regnum <= IA64_NAT127_REGNUM) | |
2230 | ? ia64_register_names[regnum] : "r??"), *val); | |
2231 | } | |
2232 | else | |
2233 | { | |
2234 | switch (uw_regnum) | |
2235 | { | |
2236 | case UNW_REG_IP: | |
2237 | /* Libunwind expects to see the pc value which means the slot number | |
2238 | from the psr must be merged with the ip word address. */ | |
2239 | frame_unwind_register (next_frame, IA64_IP_REGNUM, buf); | |
2240 | ip = extract_unsigned_integer (buf, 8); | |
2241 | frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf); | |
2242 | psr = extract_unsigned_integer (buf, 8); | |
2243 | *val = ip | ((psr >> 41) & 0x3); | |
2244 | break; | |
2245 | ||
2246 | case UNW_IA64_AR_BSP: | |
2247 | /* Libunwind expects to see the beginning of the current register | |
2248 | frame so we must account for the fact that ptrace() will return a value | |
2249 | for bsp that points *after* the current register frame. */ | |
2250 | frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf); | |
2251 | bsp = extract_unsigned_integer (buf, 8); | |
2252 | frame_unwind_register (next_frame, IA64_CFM_REGNUM, buf); | |
2253 | cfm = extract_unsigned_integer (buf, 8); | |
2254 | sof = (cfm & 0x7f); | |
2255 | *val = ia64_rse_skip_regs (bsp, -sof); | |
2256 | break; | |
2257 | ||
2258 | case UNW_IA64_AR_BSPSTORE: | |
2259 | /* Libunwind wants bspstore to be after the current register frame. | |
2260 | This is what ptrace() and gdb treats as the regular bsp value. */ | |
2261 | frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf); | |
2262 | *val = extract_unsigned_integer (buf, 8); | |
2263 | break; | |
2264 | ||
2265 | default: | |
2266 | /* For all other registers, just unwind the value directly. */ | |
2267 | frame_unwind_register (next_frame, regnum, buf); | |
2268 | *val = extract_unsigned_integer (buf, 8); | |
2269 | break; | |
2270 | } | |
2271 | ||
2272 | if (gdbarch_debug >= 1) | |
2273 | fprintf_unfiltered (gdb_stdlog, | |
2274 | " access_reg: from cache: %4s=%016lx\n", | |
2275 | (((unsigned) regnum <= IA64_NAT127_REGNUM) | |
2276 | ? ia64_register_names[regnum] : "r??"), *val); | |
2277 | } | |
2278 | return 0; | |
2279 | } | |
2280 | ||
2281 | /* Libunwind callback accessor function for floating-point registers. */ | |
2282 | static int | |
2283 | ia64_access_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_fpreg_t *val, | |
2284 | int write, void *arg) | |
2285 | { | |
2286 | int regnum = ia64_uw2gdb_regnum (uw_regnum); | |
2287 | ||
2288 | if (write) | |
2289 | regcache_cooked_write (current_regcache, regnum, (char *) val); | |
2290 | else | |
2291 | regcache_cooked_read (current_regcache, regnum, (char *) val); | |
2292 | return 0; | |
2293 | } | |
2294 | ||
2295 | /* Libunwind callback accessor function for accessing memory. */ | |
2296 | static int | |
2297 | ia64_access_mem (unw_addr_space_t as, | |
2298 | unw_word_t addr, unw_word_t *val, | |
2299 | int write, void *arg) | |
2300 | { | |
2301 | /* XXX do we need to normalize byte-order here? */ | |
2302 | if (write) | |
2303 | return target_write_memory (addr, (char *) val, sizeof (unw_word_t)); | |
2304 | else | |
2305 | return target_read_memory (addr, (char *) val, sizeof (unw_word_t)); | |
2306 | } | |
2307 | ||
2308 | /* Call low-level function to access the kernel unwind table. */ | |
2309 | static int | |
2310 | getunwind_table (void *buf, size_t len) | |
2311 | { | |
2312 | LONGEST x; | |
2313 | x = target_read_partial (¤t_target, TARGET_OBJECT_UNWIND_TABLE, NULL, | |
2314 | buf, 0, len); | |
2315 | ||
2316 | return (int)x; | |
2317 | } | |
2318 | ||
2319 | /* Get the kernel unwind table. */ | |
2320 | static int | |
2321 | get_kernel_table (unw_word_t ip, unw_dyn_info_t *di) | |
2322 | { | |
2323 | size_t size; | |
2324 | struct ia64_table_entry | |
2325 | { | |
2326 | uint64_t start_offset; | |
2327 | uint64_t end_offset; | |
2328 | uint64_t info_offset; | |
2329 | }; | |
2330 | static struct ia64_table_entry *ktab = NULL, *etab; | |
2331 | ||
2332 | if (!ktab) | |
2333 | { | |
2334 | size = getunwind_table (NULL, 0); | |
2335 | if ((int)size < 0) | |
2336 | return -UNW_ENOINFO; | |
2337 | ktab = xmalloc (size); | |
2338 | getunwind_table (ktab, size); | |
2339 | ||
2340 | /* Determine length of kernel's unwind table and relocate | |
2341 | it's entries. */ | |
2342 | for (etab = ktab; etab->start_offset; ++etab) | |
2343 | etab->info_offset += (uint64_t) ktab; | |
2344 | } | |
2345 | ||
2346 | if (ip < ktab[0].start_offset || ip >= etab[-1].end_offset) | |
2347 | return -UNW_ENOINFO; | |
2348 | ||
2349 | di->format = UNW_INFO_FORMAT_TABLE; | |
2350 | di->gp = 0; | |
2351 | di->start_ip = ktab[0].start_offset; | |
2352 | di->end_ip = etab[-1].end_offset; | |
2353 | di->u.ti.name_ptr = (unw_word_t) "<kernel>"; | |
2354 | di->u.ti.segbase = 0; | |
2355 | di->u.ti.table_len = ((char *) etab - (char *) ktab) / sizeof (unw_word_t); | |
2356 | di->u.ti.table_data = (unw_word_t *) ktab; | |
2357 | ||
2358 | if (gdbarch_debug >= 1) | |
2359 | fprintf_unfiltered (gdb_stdlog, "get_kernel_table: found table `%s': " | |
2360 | "segbase=%lx, length=%lu, gp=%lx\n", | |
2361 | (char *) di->u.ti.name_ptr, di->u.ti.segbase, | |
2362 | di->u.ti.table_len, di->gp); | |
2363 | return 0; | |
2364 | } | |
2365 | ||
2366 | /* Find the unwind table entry for a specified address. */ | |
2367 | static int | |
2368 | ia64_find_unwind_table (struct objfile *objfile, unw_word_t ip, | |
2369 | unw_dyn_info_t *dip, void **buf) | |
2370 | { | |
2371 | Elf_Internal_Phdr *phdr, *p_text = NULL, *p_unwind = NULL; | |
2372 | Elf_Internal_Ehdr *ehdr; | |
2373 | unw_word_t segbase = 0; | |
2374 | CORE_ADDR load_base; | |
2375 | bfd *bfd; | |
2376 | int i; | |
2377 | ||
2378 | bfd = objfile->obfd; | |
2379 | ||
2380 | ehdr = elf_tdata (bfd)->elf_header; | |
2381 | phdr = elf_tdata (bfd)->phdr; | |
2382 | ||
2383 | load_base = ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT (objfile)); | |
2384 | ||
2385 | for (i = 0; i < ehdr->e_phnum; ++i) | |
2386 | { | |
2387 | switch (phdr[i].p_type) | |
2388 | { | |
2389 | case PT_LOAD: | |
2390 | if ((unw_word_t) (ip - load_base - phdr[i].p_vaddr) | |
2391 | < phdr[i].p_memsz) | |
2392 | p_text = phdr + i; | |
2393 | break; | |
2394 | ||
2395 | case PT_IA_64_UNWIND: | |
2396 | p_unwind = phdr + i; | |
2397 | break; | |
2398 | ||
2399 | default: | |
2400 | break; | |
2401 | } | |
2402 | } | |
2403 | ||
2404 | if (!p_text || !p_unwind | |
2405 | /* Verify that the segment that contains the IP also contains | |
2406 | the static unwind table. If not, we are dealing with | |
2407 | runtime-generated code, for which we have no info here. */ | |
2408 | || (p_unwind->p_vaddr - p_text->p_vaddr) >= p_text->p_memsz) | |
2409 | return -UNW_ENOINFO; | |
2410 | ||
2411 | segbase = p_text->p_vaddr + load_base; | |
2412 | ||
2413 | dip->start_ip = segbase; | |
2414 | dip->end_ip = dip->start_ip + p_text->p_memsz; | |
2415 | dip->gp = FIND_GLOBAL_POINTER (ip); | |
503ff15d KB |
2416 | dip->format = UNW_INFO_FORMAT_REMOTE_TABLE; |
2417 | dip->u.rti.name_ptr = (unw_word_t) bfd_get_filename (bfd); | |
2418 | dip->u.rti.segbase = segbase; | |
2419 | dip->u.rti.table_len = p_unwind->p_memsz / sizeof (unw_word_t); | |
2420 | dip->u.rti.table_data = p_unwind->p_vaddr + load_base; | |
968d1cb4 JJ |
2421 | |
2422 | return 0; | |
2423 | } | |
2424 | ||
2425 | /* Libunwind callback accessor function to acquire procedure unwind-info. */ | |
2426 | static int | |
2427 | ia64_find_proc_info_x (unw_addr_space_t as, unw_word_t ip, unw_proc_info_t *pi, | |
2428 | int need_unwind_info, void *arg) | |
2429 | { | |
2430 | struct obj_section *sec = find_pc_section (ip); | |
2431 | unw_dyn_info_t di; | |
2432 | int ret; | |
2433 | void *buf = NULL; | |
2434 | ||
2435 | if (!sec) | |
2436 | { | |
2437 | /* XXX This only works if the host and the target architecture are | |
2438 | both ia64 and if the have (more or less) the same kernel | |
2439 | version. */ | |
2440 | if (get_kernel_table (ip, &di) < 0) | |
2441 | return -UNW_ENOINFO; | |
503ff15d KB |
2442 | |
2443 | if (gdbarch_debug >= 1) | |
5439edaa | 2444 | fprintf_unfiltered (gdb_stdlog, "ia64_find_proc_info_x: %lx -> " |
503ff15d | 2445 | "(name=`%s',segbase=%lx,start=%lx,end=%lx,gp=%lx," |
5439edaa | 2446 | "length=%lu,data=%p)\n", |
503ff15d KB |
2447 | ip, (char *)di.u.ti.name_ptr, |
2448 | di.u.ti.segbase, di.start_ip, di.end_ip, | |
2449 | di.gp, di.u.ti.table_len, di.u.ti.table_data); | |
968d1cb4 JJ |
2450 | } |
2451 | else | |
2452 | { | |
2453 | ret = ia64_find_unwind_table (sec->objfile, ip, &di, &buf); | |
2454 | if (ret < 0) | |
2455 | return ret; | |
968d1cb4 | 2456 | |
503ff15d | 2457 | if (gdbarch_debug >= 1) |
5439edaa | 2458 | fprintf_unfiltered (gdb_stdlog, "ia64_find_proc_info_x: %lx -> " |
503ff15d | 2459 | "(name=`%s',segbase=%lx,start=%lx,end=%lx,gp=%lx," |
5439edaa | 2460 | "length=%lu,data=%lx)\n", |
503ff15d KB |
2461 | ip, (char *)di.u.rti.name_ptr, |
2462 | di.u.rti.segbase, di.start_ip, di.end_ip, | |
2463 | di.gp, di.u.rti.table_len, di.u.rti.table_data); | |
2464 | } | |
968d1cb4 | 2465 | |
503ff15d KB |
2466 | ret = libunwind_search_unwind_table (&as, ip, &di, pi, need_unwind_info, |
2467 | arg); | |
968d1cb4 JJ |
2468 | |
2469 | /* We no longer need the dyn info storage so free it. */ | |
2470 | xfree (buf); | |
2471 | ||
2472 | return ret; | |
2473 | } | |
2474 | ||
2475 | /* Libunwind callback accessor function for cleanup. */ | |
2476 | static void | |
2477 | ia64_put_unwind_info (unw_addr_space_t as, | |
2478 | unw_proc_info_t *pip, void *arg) | |
2479 | { | |
2480 | /* Nothing required for now. */ | |
2481 | } | |
2482 | ||
2483 | /* Libunwind callback accessor function to get head of the dynamic | |
2484 | unwind-info registration list. */ | |
2485 | static int | |
2486 | ia64_get_dyn_info_list (unw_addr_space_t as, | |
2487 | unw_word_t *dilap, void *arg) | |
2488 | { | |
2489 | struct obj_section *text_sec; | |
2490 | struct objfile *objfile; | |
2491 | unw_word_t ip, addr; | |
2492 | unw_dyn_info_t di; | |
2493 | int ret; | |
2494 | ||
2495 | if (!libunwind_is_initialized ()) | |
2496 | return -UNW_ENOINFO; | |
2497 | ||
2498 | for (objfile = object_files; objfile; objfile = objfile->next) | |
2499 | { | |
2500 | void *buf = NULL; | |
2501 | ||
2502 | text_sec = objfile->sections + SECT_OFF_TEXT (objfile); | |
2503 | ip = text_sec->addr; | |
2504 | ret = ia64_find_unwind_table (objfile, ip, &di, &buf); | |
2505 | if (ret >= 0) | |
2506 | { | |
503ff15d | 2507 | addr = libunwind_find_dyn_list (as, &di, arg); |
968d1cb4 JJ |
2508 | /* We no longer need the dyn info storage so free it. */ |
2509 | xfree (buf); | |
2510 | ||
2511 | if (addr) | |
2512 | { | |
2513 | if (gdbarch_debug >= 1) | |
2514 | fprintf_unfiltered (gdb_stdlog, | |
2515 | "dynamic unwind table in objfile %s " | |
2516 | "at %lx (gp=%lx)\n", | |
2517 | bfd_get_filename (objfile->obfd), | |
2518 | addr, di.gp); | |
2519 | *dilap = addr; | |
2520 | return 0; | |
2521 | } | |
2522 | } | |
2523 | } | |
2524 | return -UNW_ENOINFO; | |
2525 | } | |
2526 | ||
2527 | ||
2528 | /* Frame interface functions for libunwind. */ | |
2529 | ||
2530 | static void | |
2531 | ia64_libunwind_frame_this_id (struct frame_info *next_frame, void **this_cache, | |
2532 | struct frame_id *this_id) | |
2533 | { | |
2534 | char buf[8]; | |
2535 | CORE_ADDR bsp; | |
2536 | struct frame_id id; | |
2537 | ||
2538 | libunwind_frame_this_id (next_frame, this_cache, &id); | |
2539 | ||
2540 | /* We must add the bsp as the special address for frame comparison purposes. */ | |
2541 | frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf); | |
2542 | bsp = extract_unsigned_integer (buf, 8); | |
2543 | ||
2544 | (*this_id) = frame_id_build_special (id.stack_addr, id.code_addr, bsp); | |
2545 | ||
2546 | if (gdbarch_debug >= 1) | |
2547 | fprintf_unfiltered (gdb_stdlog, | |
2548 | "libunwind frame id: code %lx, stack %lx, special %lx, next_frame %p\n", | |
2549 | id.code_addr, id.stack_addr, bsp, next_frame); | |
2550 | } | |
2551 | ||
2552 | static void | |
2553 | ia64_libunwind_frame_prev_register (struct frame_info *next_frame, | |
2554 | void **this_cache, | |
2555 | int regnum, int *optimizedp, | |
2556 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
2557 | int *realnump, void *valuep) | |
2558 | { | |
2559 | int reg = regnum; | |
2560 | ||
2561 | if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM) | |
2562 | reg = IA64_PR_REGNUM; | |
2563 | else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM) | |
2564 | reg = IA64_UNAT_REGNUM; | |
2565 | ||
2566 | /* Let libunwind do most of the work. */ | |
2567 | libunwind_frame_prev_register (next_frame, this_cache, reg, | |
2568 | optimizedp, lvalp, addrp, realnump, valuep); | |
2569 | ||
2570 | if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM) | |
2571 | { | |
2572 | ULONGEST prN_val; | |
2573 | ||
2574 | if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM) | |
2575 | { | |
2576 | int rrb_pr = 0; | |
2577 | ULONGEST cfm; | |
2578 | unsigned char buf[MAX_REGISTER_SIZE]; | |
2579 | ||
2580 | /* Fetch predicate register rename base from current frame | |
2581 | marker for this frame. */ | |
2582 | frame_unwind_register (next_frame, IA64_CFM_REGNUM, buf); | |
2583 | cfm = extract_unsigned_integer (buf, 8); | |
2584 | rrb_pr = (cfm >> 32) & 0x3f; | |
2585 | ||
2586 | /* Adjust the register number to account for register rotation. */ | |
2587 | regnum = VP16_REGNUM | |
2588 | + ((regnum - VP16_REGNUM) + rrb_pr) % 48; | |
2589 | } | |
2590 | prN_val = extract_bit_field ((unsigned char *) valuep, | |
2591 | regnum - VP0_REGNUM, 1); | |
2592 | store_unsigned_integer (valuep, register_size (current_gdbarch, regnum), prN_val); | |
2593 | } | |
2594 | else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM) | |
2595 | { | |
2596 | ULONGEST unatN_val; | |
2597 | ||
2598 | unatN_val = extract_bit_field ((unsigned char *) valuep, | |
2599 | regnum - IA64_NAT0_REGNUM, 1); | |
2600 | store_unsigned_integer (valuep, register_size (current_gdbarch, regnum), | |
2601 | unatN_val); | |
2602 | } | |
2603 | else if (regnum == IA64_BSP_REGNUM) | |
2604 | { | |
2605 | char cfm_valuep[MAX_REGISTER_SIZE]; | |
2606 | int cfm_optim; | |
2607 | int cfm_realnum; | |
2608 | enum lval_type cfm_lval; | |
2609 | CORE_ADDR cfm_addr; | |
2610 | CORE_ADDR bsp, prev_cfm, prev_bsp; | |
2611 | ||
2612 | /* We want to calculate the previous bsp as the end of the previous register stack frame. | |
2613 | This corresponds to what the hardware bsp register will be if we pop the frame | |
2614 | back which is why we might have been called. We know that libunwind will pass us back | |
2615 | the beginning of the current frame so we should just add sof to it. */ | |
2616 | prev_bsp = extract_unsigned_integer (valuep, 8); | |
2617 | libunwind_frame_prev_register (next_frame, this_cache, IA64_CFM_REGNUM, | |
2618 | &cfm_optim, &cfm_lval, &cfm_addr, &cfm_realnum, cfm_valuep); | |
2619 | prev_cfm = extract_unsigned_integer (cfm_valuep, 8); | |
2620 | prev_bsp = rse_address_add (prev_bsp, (prev_cfm & 0x7f)); | |
2621 | ||
2622 | store_unsigned_integer (valuep, register_size (current_gdbarch, regnum), | |
2623 | prev_bsp); | |
2624 | } | |
2625 | ||
2626 | if (gdbarch_debug >= 1) | |
2627 | fprintf_unfiltered (gdb_stdlog, | |
2628 | "libunwind prev register <%s> is %lx\n", | |
2629 | (((unsigned) regnum <= IA64_NAT127_REGNUM) | |
2630 | ? ia64_register_names[regnum] : "r??"), extract_unsigned_integer (valuep, 8)); | |
2631 | } | |
2632 | ||
2633 | static const struct frame_unwind ia64_libunwind_frame_unwind = | |
2634 | { | |
2635 | NORMAL_FRAME, | |
2636 | ia64_libunwind_frame_this_id, | |
2637 | ia64_libunwind_frame_prev_register | |
2638 | }; | |
2639 | ||
2640 | static const struct frame_unwind * | |
2641 | ia64_libunwind_frame_sniffer (struct frame_info *next_frame) | |
2642 | { | |
2643 | if (libunwind_is_initialized () && libunwind_frame_sniffer (next_frame)) | |
2644 | return &ia64_libunwind_frame_unwind; | |
2645 | ||
2646 | return NULL; | |
2647 | } | |
2648 | ||
2649 | /* Set of libunwind callback acccessor functions. */ | |
2650 | static unw_accessors_t ia64_unw_accessors = | |
2651 | { | |
2652 | ia64_find_proc_info_x, | |
2653 | ia64_put_unwind_info, | |
2654 | ia64_get_dyn_info_list, | |
2655 | ia64_access_mem, | |
2656 | ia64_access_reg, | |
2657 | ia64_access_fpreg, | |
2658 | /* resume */ | |
2659 | /* get_proc_name */ | |
2660 | }; | |
2661 | ||
2662 | /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */ | |
2663 | static struct libunwind_descr ia64_libunwind_descr = | |
2664 | { | |
2665 | ia64_gdb2uw_regnum, | |
2666 | ia64_uw2gdb_regnum, | |
2667 | ia64_is_fpreg, | |
2668 | &ia64_unw_accessors, | |
2669 | }; | |
2670 | ||
2671 | #endif /* HAVE_LIBUNWIND_IA64_H */ | |
2672 | ||
74055713 AC |
2673 | /* Should we use DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS instead of |
2674 | EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc and TYPE | |
2675 | is the type (which is known to be struct, union or array). */ | |
16461d7d KB |
2676 | int |
2677 | ia64_use_struct_convention (int gcc_p, struct type *type) | |
2678 | { | |
64a5b29c KB |
2679 | struct type *float_elt_type; |
2680 | ||
2681 | /* HFAs are structures (or arrays) consisting entirely of floating | |
2682 | point values of the same length. Up to 8 of these are returned | |
2683 | in registers. Don't use the struct convention when this is the | |
004d836a | 2684 | case. */ |
64a5b29c KB |
2685 | float_elt_type = is_float_or_hfa_type (type); |
2686 | if (float_elt_type != NULL | |
2687 | && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8) | |
2688 | return 0; | |
2689 | ||
2690 | /* Other structs of length 32 or less are returned in r8-r11. | |
004d836a | 2691 | Don't use the struct convention for those either. */ |
16461d7d KB |
2692 | return TYPE_LENGTH (type) > 32; |
2693 | } | |
2694 | ||
2695 | void | |
004d836a | 2696 | ia64_extract_return_value (struct type *type, struct regcache *regcache, void *valbuf) |
16461d7d | 2697 | { |
64a5b29c KB |
2698 | struct type *float_elt_type; |
2699 | ||
2700 | float_elt_type = is_float_or_hfa_type (type); | |
2701 | if (float_elt_type != NULL) | |
2702 | { | |
004d836a | 2703 | char from[MAX_REGISTER_SIZE]; |
64a5b29c KB |
2704 | int offset = 0; |
2705 | int regnum = IA64_FR8_REGNUM; | |
2706 | int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type); | |
2707 | ||
2708 | while (n-- > 0) | |
2709 | { | |
004d836a JJ |
2710 | regcache_cooked_read (regcache, regnum, from); |
2711 | convert_typed_floating (from, builtin_type_ia64_ext, | |
2712 | (char *)valbuf + offset, float_elt_type); | |
64a5b29c KB |
2713 | offset += TYPE_LENGTH (float_elt_type); |
2714 | regnum++; | |
2715 | } | |
2716 | } | |
16461d7d | 2717 | else |
004d836a JJ |
2718 | { |
2719 | ULONGEST val; | |
2720 | int offset = 0; | |
2721 | int regnum = IA64_GR8_REGNUM; | |
2722 | int reglen = TYPE_LENGTH (ia64_register_type (NULL, IA64_GR8_REGNUM)); | |
2723 | int n = TYPE_LENGTH (type) / reglen; | |
2724 | int m = TYPE_LENGTH (type) % reglen; | |
16461d7d | 2725 | |
004d836a JJ |
2726 | while (n-- > 0) |
2727 | { | |
2728 | ULONGEST val; | |
2729 | regcache_cooked_read_unsigned (regcache, regnum, &val); | |
2730 | memcpy ((char *)valbuf + offset, &val, reglen); | |
2731 | offset += reglen; | |
2732 | regnum++; | |
2733 | } | |
16461d7d | 2734 | |
004d836a JJ |
2735 | if (m) |
2736 | { | |
2737 | regcache_cooked_read_unsigned (regcache, regnum, &val); | |
2738 | memcpy ((char *)valbuf + offset, &val, m); | |
2739 | } | |
2740 | } | |
16461d7d KB |
2741 | } |
2742 | ||
2743 | CORE_ADDR | |
004d836a | 2744 | ia64_extract_struct_value_address (struct regcache *regcache) |
16461d7d | 2745 | { |
004d836a JJ |
2746 | error ("ia64_extract_struct_value_address called and cannot get struct value address"); |
2747 | return 0; | |
16461d7d KB |
2748 | } |
2749 | ||
16461d7d | 2750 | |
64a5b29c KB |
2751 | static int |
2752 | is_float_or_hfa_type_recurse (struct type *t, struct type **etp) | |
2753 | { | |
2754 | switch (TYPE_CODE (t)) | |
2755 | { | |
2756 | case TYPE_CODE_FLT: | |
2757 | if (*etp) | |
2758 | return TYPE_LENGTH (*etp) == TYPE_LENGTH (t); | |
2759 | else | |
2760 | { | |
2761 | *etp = t; | |
2762 | return 1; | |
2763 | } | |
2764 | break; | |
2765 | case TYPE_CODE_ARRAY: | |
98f96ba1 KB |
2766 | return |
2767 | is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)), | |
2768 | etp); | |
64a5b29c KB |
2769 | break; |
2770 | case TYPE_CODE_STRUCT: | |
2771 | { | |
2772 | int i; | |
2773 | ||
2774 | for (i = 0; i < TYPE_NFIELDS (t); i++) | |
98f96ba1 KB |
2775 | if (!is_float_or_hfa_type_recurse |
2776 | (check_typedef (TYPE_FIELD_TYPE (t, i)), etp)) | |
64a5b29c KB |
2777 | return 0; |
2778 | return 1; | |
2779 | } | |
2780 | break; | |
2781 | default: | |
2782 | return 0; | |
2783 | break; | |
2784 | } | |
2785 | } | |
2786 | ||
2787 | /* Determine if the given type is one of the floating point types or | |
2788 | and HFA (which is a struct, array, or combination thereof whose | |
004d836a | 2789 | bottom-most elements are all of the same floating point type). */ |
64a5b29c KB |
2790 | |
2791 | static struct type * | |
2792 | is_float_or_hfa_type (struct type *t) | |
2793 | { | |
2794 | struct type *et = 0; | |
2795 | ||
2796 | return is_float_or_hfa_type_recurse (t, &et) ? et : 0; | |
2797 | } | |
2798 | ||
2799 | ||
98f96ba1 KB |
2800 | /* Return 1 if the alignment of T is such that the next even slot |
2801 | should be used. Return 0, if the next available slot should | |
2802 | be used. (See section 8.5.1 of the IA-64 Software Conventions | |
004d836a | 2803 | and Runtime manual). */ |
98f96ba1 KB |
2804 | |
2805 | static int | |
2806 | slot_alignment_is_next_even (struct type *t) | |
2807 | { | |
2808 | switch (TYPE_CODE (t)) | |
2809 | { | |
2810 | case TYPE_CODE_INT: | |
2811 | case TYPE_CODE_FLT: | |
2812 | if (TYPE_LENGTH (t) > 8) | |
2813 | return 1; | |
2814 | else | |
2815 | return 0; | |
2816 | case TYPE_CODE_ARRAY: | |
2817 | return | |
2818 | slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t))); | |
2819 | case TYPE_CODE_STRUCT: | |
2820 | { | |
2821 | int i; | |
2822 | ||
2823 | for (i = 0; i < TYPE_NFIELDS (t); i++) | |
2824 | if (slot_alignment_is_next_even | |
2825 | (check_typedef (TYPE_FIELD_TYPE (t, i)))) | |
2826 | return 1; | |
2827 | return 0; | |
2828 | } | |
2829 | default: | |
2830 | return 0; | |
2831 | } | |
2832 | } | |
2833 | ||
64a5b29c KB |
2834 | /* Attempt to find (and return) the global pointer for the given |
2835 | function. | |
2836 | ||
2837 | This is a rather nasty bit of code searchs for the .dynamic section | |
2838 | in the objfile corresponding to the pc of the function we're trying | |
2839 | to call. Once it finds the addresses at which the .dynamic section | |
2840 | lives in the child process, it scans the Elf64_Dyn entries for a | |
2841 | DT_PLTGOT tag. If it finds one of these, the corresponding | |
2842 | d_un.d_ptr value is the global pointer. */ | |
2843 | ||
2844 | static CORE_ADDR | |
698cb3f0 | 2845 | generic_elf_find_global_pointer (CORE_ADDR faddr) |
64a5b29c | 2846 | { |
76d689a6 | 2847 | struct obj_section *faddr_sect; |
64a5b29c | 2848 | |
76d689a6 KB |
2849 | faddr_sect = find_pc_section (faddr); |
2850 | if (faddr_sect != NULL) | |
64a5b29c KB |
2851 | { |
2852 | struct obj_section *osect; | |
2853 | ||
76d689a6 | 2854 | ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect) |
64a5b29c KB |
2855 | { |
2856 | if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0) | |
2857 | break; | |
2858 | } | |
2859 | ||
76d689a6 | 2860 | if (osect < faddr_sect->objfile->sections_end) |
64a5b29c KB |
2861 | { |
2862 | CORE_ADDR addr; | |
2863 | ||
2864 | addr = osect->addr; | |
2865 | while (addr < osect->endaddr) | |
2866 | { | |
2867 | int status; | |
2868 | LONGEST tag; | |
2869 | char buf[8]; | |
2870 | ||
2871 | status = target_read_memory (addr, buf, sizeof (buf)); | |
2872 | if (status != 0) | |
2873 | break; | |
2874 | tag = extract_signed_integer (buf, sizeof (buf)); | |
2875 | ||
2876 | if (tag == DT_PLTGOT) | |
2877 | { | |
2878 | CORE_ADDR global_pointer; | |
2879 | ||
2880 | status = target_read_memory (addr + 8, buf, sizeof (buf)); | |
2881 | if (status != 0) | |
2882 | break; | |
7c0b4a20 | 2883 | global_pointer = extract_unsigned_integer (buf, sizeof (buf)); |
64a5b29c KB |
2884 | |
2885 | /* The payoff... */ | |
2886 | return global_pointer; | |
2887 | } | |
2888 | ||
2889 | if (tag == DT_NULL) | |
2890 | break; | |
2891 | ||
2892 | addr += 16; | |
2893 | } | |
2894 | } | |
2895 | } | |
2896 | return 0; | |
2897 | } | |
2898 | ||
2899 | /* Given a function's address, attempt to find (and return) the | |
2900 | corresponding (canonical) function descriptor. Return 0 if | |
004d836a | 2901 | not found. */ |
64a5b29c KB |
2902 | static CORE_ADDR |
2903 | find_extant_func_descr (CORE_ADDR faddr) | |
2904 | { | |
76d689a6 | 2905 | struct obj_section *faddr_sect; |
64a5b29c | 2906 | |
004d836a | 2907 | /* Return early if faddr is already a function descriptor. */ |
76d689a6 KB |
2908 | faddr_sect = find_pc_section (faddr); |
2909 | if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0) | |
64a5b29c KB |
2910 | return faddr; |
2911 | ||
76d689a6 | 2912 | if (faddr_sect != NULL) |
64a5b29c | 2913 | { |
76d689a6 KB |
2914 | struct obj_section *osect; |
2915 | ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect) | |
64a5b29c KB |
2916 | { |
2917 | if (strcmp (osect->the_bfd_section->name, ".opd") == 0) | |
2918 | break; | |
2919 | } | |
2920 | ||
76d689a6 | 2921 | if (osect < faddr_sect->objfile->sections_end) |
64a5b29c KB |
2922 | { |
2923 | CORE_ADDR addr; | |
2924 | ||
2925 | addr = osect->addr; | |
2926 | while (addr < osect->endaddr) | |
2927 | { | |
2928 | int status; | |
2929 | LONGEST faddr2; | |
2930 | char buf[8]; | |
2931 | ||
2932 | status = target_read_memory (addr, buf, sizeof (buf)); | |
2933 | if (status != 0) | |
2934 | break; | |
2935 | faddr2 = extract_signed_integer (buf, sizeof (buf)); | |
2936 | ||
2937 | if (faddr == faddr2) | |
2938 | return addr; | |
2939 | ||
2940 | addr += 16; | |
2941 | } | |
2942 | } | |
2943 | } | |
2944 | return 0; | |
2945 | } | |
2946 | ||
2947 | /* Attempt to find a function descriptor corresponding to the | |
2948 | given address. If none is found, construct one on the | |
004d836a | 2949 | stack using the address at fdaptr. */ |
64a5b29c KB |
2950 | |
2951 | static CORE_ADDR | |
2952 | find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr) | |
2953 | { | |
2954 | CORE_ADDR fdesc; | |
2955 | ||
2956 | fdesc = find_extant_func_descr (faddr); | |
2957 | ||
2958 | if (fdesc == 0) | |
2959 | { | |
2960 | CORE_ADDR global_pointer; | |
2961 | char buf[16]; | |
2962 | ||
2963 | fdesc = *fdaptr; | |
2964 | *fdaptr += 16; | |
2965 | ||
698cb3f0 | 2966 | global_pointer = FIND_GLOBAL_POINTER (faddr); |
64a5b29c KB |
2967 | |
2968 | if (global_pointer == 0) | |
2969 | global_pointer = read_register (IA64_GR1_REGNUM); | |
2970 | ||
fbd9dcd3 AC |
2971 | store_unsigned_integer (buf, 8, faddr); |
2972 | store_unsigned_integer (buf + 8, 8, global_pointer); | |
64a5b29c KB |
2973 | |
2974 | write_memory (fdesc, buf, 16); | |
2975 | } | |
2976 | ||
2977 | return fdesc; | |
2978 | } | |
16461d7d | 2979 | |
af8b88dd JJ |
2980 | /* Use the following routine when printing out function pointers |
2981 | so the user can see the function address rather than just the | |
2982 | function descriptor. */ | |
2983 | static CORE_ADDR | |
e2d0e7eb AC |
2984 | ia64_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr, |
2985 | struct target_ops *targ) | |
af8b88dd JJ |
2986 | { |
2987 | struct obj_section *s; | |
2988 | ||
2989 | s = find_pc_section (addr); | |
2990 | ||
2991 | /* check if ADDR points to a function descriptor. */ | |
2992 | if (s && strcmp (s->the_bfd_section->name, ".opd") == 0) | |
2993 | return read_memory_unsigned_integer (addr, 8); | |
2994 | ||
2995 | return addr; | |
2996 | } | |
2997 | ||
a78f21af | 2998 | static CORE_ADDR |
004d836a JJ |
2999 | ia64_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp) |
3000 | { | |
3001 | return sp & ~0xfLL; | |
3002 | } | |
3003 | ||
3004 | static CORE_ADDR | |
3005 | ia64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, | |
8dd5115e AS |
3006 | struct regcache *regcache, CORE_ADDR bp_addr, |
3007 | int nargs, struct value **args, CORE_ADDR sp, | |
3008 | int struct_return, CORE_ADDR struct_addr) | |
16461d7d KB |
3009 | { |
3010 | int argno; | |
ea7c478f | 3011 | struct value *arg; |
16461d7d KB |
3012 | struct type *type; |
3013 | int len, argoffset; | |
64a5b29c | 3014 | int nslots, rseslots, memslots, slotnum, nfuncargs; |
16461d7d | 3015 | int floatreg; |
004d836a | 3016 | CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr, pc, global_pointer; |
16461d7d KB |
3017 | |
3018 | nslots = 0; | |
64a5b29c | 3019 | nfuncargs = 0; |
004d836a | 3020 | /* Count the number of slots needed for the arguments. */ |
16461d7d KB |
3021 | for (argno = 0; argno < nargs; argno++) |
3022 | { | |
3023 | arg = args[argno]; | |
3024 | type = check_typedef (VALUE_TYPE (arg)); | |
3025 | len = TYPE_LENGTH (type); | |
3026 | ||
98f96ba1 | 3027 | if ((nslots & 1) && slot_alignment_is_next_even (type)) |
16461d7d KB |
3028 | nslots++; |
3029 | ||
64a5b29c KB |
3030 | if (TYPE_CODE (type) == TYPE_CODE_FUNC) |
3031 | nfuncargs++; | |
3032 | ||
16461d7d KB |
3033 | nslots += (len + 7) / 8; |
3034 | } | |
3035 | ||
004d836a | 3036 | /* Divvy up the slots between the RSE and the memory stack. */ |
16461d7d KB |
3037 | rseslots = (nslots > 8) ? 8 : nslots; |
3038 | memslots = nslots - rseslots; | |
3039 | ||
004d836a JJ |
3040 | /* Allocate a new RSE frame. */ |
3041 | cfm = read_register (IA64_CFM_REGNUM); | |
16461d7d | 3042 | |
004d836a | 3043 | bsp = read_register (IA64_BSP_REGNUM); |
16461d7d | 3044 | new_bsp = rse_address_add (bsp, rseslots); |
004d836a | 3045 | write_register (IA64_BSP_REGNUM, new_bsp); |
16461d7d | 3046 | |
004d836a | 3047 | pfs = read_register (IA64_PFS_REGNUM); |
16461d7d KB |
3048 | pfs &= 0xc000000000000000LL; |
3049 | pfs |= (cfm & 0xffffffffffffLL); | |
004d836a | 3050 | write_register (IA64_PFS_REGNUM, pfs); |
16461d7d KB |
3051 | |
3052 | cfm &= 0xc000000000000000LL; | |
3053 | cfm |= rseslots; | |
004d836a | 3054 | write_register (IA64_CFM_REGNUM, cfm); |
16461d7d | 3055 | |
64a5b29c KB |
3056 | /* We will attempt to find function descriptors in the .opd segment, |
3057 | but if we can't we'll construct them ourselves. That being the | |
004d836a | 3058 | case, we'll need to reserve space on the stack for them. */ |
64a5b29c KB |
3059 | funcdescaddr = sp - nfuncargs * 16; |
3060 | funcdescaddr &= ~0xfLL; | |
3061 | ||
3062 | /* Adjust the stack pointer to it's new value. The calling conventions | |
3063 | require us to have 16 bytes of scratch, plus whatever space is | |
004d836a | 3064 | necessary for the memory slots and our function descriptors. */ |
64a5b29c | 3065 | sp = sp - 16 - (memslots + nfuncargs) * 8; |
004d836a | 3066 | sp &= ~0xfLL; /* Maintain 16 byte alignment. */ |
16461d7d | 3067 | |
64a5b29c KB |
3068 | /* Place the arguments where they belong. The arguments will be |
3069 | either placed in the RSE backing store or on the memory stack. | |
3070 | In addition, floating point arguments or HFAs are placed in | |
004d836a | 3071 | floating point registers. */ |
16461d7d KB |
3072 | slotnum = 0; |
3073 | floatreg = IA64_FR8_REGNUM; | |
3074 | for (argno = 0; argno < nargs; argno++) | |
3075 | { | |
64a5b29c KB |
3076 | struct type *float_elt_type; |
3077 | ||
16461d7d KB |
3078 | arg = args[argno]; |
3079 | type = check_typedef (VALUE_TYPE (arg)); | |
3080 | len = TYPE_LENGTH (type); | |
64a5b29c | 3081 | |
004d836a | 3082 | /* Special handling for function parameters. */ |
64a5b29c KB |
3083 | if (len == 8 |
3084 | && TYPE_CODE (type) == TYPE_CODE_PTR | |
3085 | && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC) | |
3086 | { | |
3087 | char val_buf[8]; | |
3088 | ||
fbd9dcd3 | 3089 | store_unsigned_integer (val_buf, 8, |
7c0b4a20 | 3090 | find_func_descr (extract_unsigned_integer (VALUE_CONTENTS (arg), 8), |
fbd9dcd3 | 3091 | &funcdescaddr)); |
64a5b29c KB |
3092 | if (slotnum < rseslots) |
3093 | write_memory (rse_address_add (bsp, slotnum), val_buf, 8); | |
3094 | else | |
3095 | write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8); | |
3096 | slotnum++; | |
3097 | continue; | |
3098 | } | |
3099 | ||
004d836a | 3100 | /* Normal slots. */ |
98f96ba1 KB |
3101 | |
3102 | /* Skip odd slot if necessary... */ | |
3103 | if ((slotnum & 1) && slot_alignment_is_next_even (type)) | |
16461d7d | 3104 | slotnum++; |
98f96ba1 | 3105 | |
16461d7d KB |
3106 | argoffset = 0; |
3107 | while (len > 0) | |
3108 | { | |
3109 | char val_buf[8]; | |
3110 | ||
3111 | memset (val_buf, 0, 8); | |
3112 | memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len); | |
3113 | ||
3114 | if (slotnum < rseslots) | |
3115 | write_memory (rse_address_add (bsp, slotnum), val_buf, 8); | |
3116 | else | |
3117 | write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8); | |
3118 | ||
3119 | argoffset += 8; | |
3120 | len -= 8; | |
3121 | slotnum++; | |
3122 | } | |
64a5b29c | 3123 | |
004d836a | 3124 | /* Handle floating point types (including HFAs). */ |
64a5b29c KB |
3125 | float_elt_type = is_float_or_hfa_type (type); |
3126 | if (float_elt_type != NULL) | |
3127 | { | |
3128 | argoffset = 0; | |
3129 | len = TYPE_LENGTH (type); | |
3130 | while (len > 0 && floatreg < IA64_FR16_REGNUM) | |
3131 | { | |
004d836a JJ |
3132 | char to[MAX_REGISTER_SIZE]; |
3133 | convert_typed_floating (VALUE_CONTENTS (arg) + argoffset, float_elt_type, | |
3134 | to, builtin_type_ia64_ext); | |
3135 | regcache_cooked_write (regcache, floatreg, (void *)to); | |
64a5b29c KB |
3136 | floatreg++; |
3137 | argoffset += TYPE_LENGTH (float_elt_type); | |
3138 | len -= TYPE_LENGTH (float_elt_type); | |
3139 | } | |
16461d7d KB |
3140 | } |
3141 | } | |
3142 | ||
004d836a | 3143 | /* Store the struct return value in r8 if necessary. */ |
16461d7d KB |
3144 | if (struct_return) |
3145 | { | |
004d836a | 3146 | regcache_cooked_write_unsigned (regcache, IA64_GR8_REGNUM, (ULONGEST)struct_addr); |
16461d7d KB |
3147 | } |
3148 | ||
004d836a | 3149 | global_pointer = FIND_GLOBAL_POINTER (func_addr); |
8dd5115e | 3150 | |
004d836a JJ |
3151 | if (global_pointer != 0) |
3152 | write_register (IA64_GR1_REGNUM, global_pointer); | |
a59fe496 | 3153 | |
004d836a | 3154 | write_register (IA64_BR0_REGNUM, bp_addr); |
16461d7d | 3155 | |
004d836a | 3156 | write_register (sp_regnum, sp); |
16461d7d KB |
3157 | |
3158 | return sp; | |
3159 | } | |
3160 | ||
004d836a JJ |
3161 | static struct frame_id |
3162 | ia64_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
16461d7d | 3163 | { |
004d836a | 3164 | char buf[8]; |
4afcc598 | 3165 | CORE_ADDR sp, bsp; |
004d836a JJ |
3166 | |
3167 | frame_unwind_register (next_frame, sp_regnum, buf); | |
3168 | sp = extract_unsigned_integer (buf, 8); | |
3169 | ||
4afcc598 JJ |
3170 | frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf); |
3171 | bsp = extract_unsigned_integer (buf, 8); | |
3172 | ||
3173 | if (gdbarch_debug >= 1) | |
3174 | fprintf_unfiltered (gdb_stdlog, | |
3175 | "dummy frame id: code %lx, stack %lx, special %lx\n", | |
3176 | frame_pc_unwind (next_frame), sp, bsp); | |
3177 | ||
3178 | return frame_id_build_special (sp, frame_pc_unwind (next_frame), bsp); | |
16461d7d KB |
3179 | } |
3180 | ||
004d836a JJ |
3181 | static CORE_ADDR |
3182 | ia64_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
16461d7d | 3183 | { |
004d836a JJ |
3184 | char buf[8]; |
3185 | CORE_ADDR ip, psr, pc; | |
3186 | ||
3187 | frame_unwind_register (next_frame, IA64_IP_REGNUM, buf); | |
3188 | ip = extract_unsigned_integer (buf, 8); | |
3189 | frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf); | |
3190 | psr = extract_unsigned_integer (buf, 8); | |
3191 | ||
3192 | pc = (ip & ~0xf) | ((psr >> 41) & 3); | |
3193 | return pc; | |
16461d7d KB |
3194 | } |
3195 | ||
3196 | static void | |
004d836a | 3197 | ia64_store_return_value (struct type *type, struct regcache *regcache, const void *valbuf) |
16461d7d | 3198 | { |
004d836a | 3199 | if (TYPE_CODE (type) == TYPE_CODE_FLT) |
16461d7d | 3200 | { |
004d836a JJ |
3201 | char to[MAX_REGISTER_SIZE]; |
3202 | convert_typed_floating (valbuf, type, to, builtin_type_ia64_ext); | |
3203 | regcache_cooked_write (regcache, IA64_FR8_REGNUM, (void *)to); | |
3204 | target_store_registers (IA64_FR8_REGNUM); | |
16461d7d KB |
3205 | } |
3206 | else | |
004d836a | 3207 | regcache_cooked_write (regcache, IA64_GR8_REGNUM, valbuf); |
16461d7d KB |
3208 | } |
3209 | ||
3210 | static void | |
1750fa04 AC |
3211 | ia64_remote_translate_xfer_address (struct gdbarch *gdbarch, |
3212 | struct regcache *regcache, | |
3213 | CORE_ADDR memaddr, int nr_bytes, | |
16461d7d KB |
3214 | CORE_ADDR *targ_addr, int *targ_len) |
3215 | { | |
3216 | *targ_addr = memaddr; | |
3217 | *targ_len = nr_bytes; | |
3218 | } | |
3219 | ||
6926787d AS |
3220 | static int |
3221 | ia64_print_insn (bfd_vma memaddr, struct disassemble_info *info) | |
3222 | { | |
3223 | info->bytes_per_line = SLOT_MULTIPLIER; | |
3224 | return print_insn_ia64 (memaddr, info); | |
3225 | } | |
3226 | ||
16461d7d KB |
3227 | static struct gdbarch * |
3228 | ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
3229 | { | |
3230 | struct gdbarch *gdbarch; | |
244bc108 | 3231 | struct gdbarch_tdep *tdep; |
244bc108 | 3232 | |
85bf2b91 JJ |
3233 | /* If there is already a candidate, use it. */ |
3234 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
3235 | if (arches != NULL) | |
3236 | return arches->gdbarch; | |
16461d7d | 3237 | |
244bc108 KB |
3238 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); |
3239 | gdbarch = gdbarch_alloc (&info, tdep); | |
244bc108 | 3240 | |
d7fa2ae2 KB |
3241 | /* Set the method of obtaining the sigcontext addresses at which |
3242 | registers are saved. The method of checking to see if | |
3243 | native_find_global_pointer is nonzero to indicate that we're | |
3244 | on AIX is kind of hokey, but I can't think of a better way | |
3245 | to do it. */ | |
85bf2b91 | 3246 | if (info.osabi == GDB_OSABI_LINUX) |
244bc108 | 3247 | tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address; |
d7fa2ae2 KB |
3248 | else if (native_find_global_pointer != 0) |
3249 | tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address; | |
244bc108 KB |
3250 | else |
3251 | tdep->sigcontext_register_address = 0; | |
16461d7d | 3252 | |
ca557f44 AC |
3253 | /* We know that GNU/Linux won't have to resort to the |
3254 | native_find_global_pointer hackery. But that's the only one we | |
3255 | know about so far, so if native_find_global_pointer is set to | |
3256 | something non-zero, then use it. Otherwise fall back to using | |
3257 | generic_elf_find_global_pointer. This arrangement should (in | |
3258 | theory) allow us to cross debug GNU/Linux binaries from an AIX | |
3259 | machine. */ | |
85bf2b91 | 3260 | if (info.osabi == GDB_OSABI_LINUX) |
698cb3f0 KB |
3261 | tdep->find_global_pointer = generic_elf_find_global_pointer; |
3262 | else if (native_find_global_pointer != 0) | |
3263 | tdep->find_global_pointer = native_find_global_pointer; | |
3264 | else | |
3265 | tdep->find_global_pointer = generic_elf_find_global_pointer; | |
3266 | ||
004d836a JJ |
3267 | /* Define the ia64 floating-point format to gdb. */ |
3268 | builtin_type_ia64_ext = | |
3269 | init_type (TYPE_CODE_FLT, 128 / 8, | |
3270 | 0, "builtin_type_ia64_ext", NULL); | |
3271 | TYPE_FLOATFORMAT (builtin_type_ia64_ext) = &floatformat_ia64_ext; | |
3272 | ||
5439edaa AC |
3273 | /* According to the ia64 specs, instructions that store long double |
3274 | floats in memory use a long-double format different than that | |
3275 | used in the floating registers. The memory format matches the | |
3276 | x86 extended float format which is 80 bits. An OS may choose to | |
3277 | use this format (e.g. GNU/Linux) or choose to use a different | |
3278 | format for storing long doubles (e.g. HPUX). In the latter case, | |
3279 | the setting of the format may be moved/overridden in an | |
3280 | OS-specific tdep file. */ | |
32edc941 JJ |
3281 | set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext); |
3282 | ||
16461d7d KB |
3283 | set_gdbarch_short_bit (gdbarch, 16); |
3284 | set_gdbarch_int_bit (gdbarch, 32); | |
3285 | set_gdbarch_long_bit (gdbarch, 64); | |
3286 | set_gdbarch_long_long_bit (gdbarch, 64); | |
3287 | set_gdbarch_float_bit (gdbarch, 32); | |
3288 | set_gdbarch_double_bit (gdbarch, 64); | |
33c08150 | 3289 | set_gdbarch_long_double_bit (gdbarch, 128); |
16461d7d KB |
3290 | set_gdbarch_ptr_bit (gdbarch, 64); |
3291 | ||
004d836a JJ |
3292 | set_gdbarch_num_regs (gdbarch, NUM_IA64_RAW_REGS); |
3293 | set_gdbarch_num_pseudo_regs (gdbarch, LAST_PSEUDO_REGNUM - FIRST_PSEUDO_REGNUM); | |
16461d7d | 3294 | set_gdbarch_sp_regnum (gdbarch, sp_regnum); |
698cb3f0 | 3295 | set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM); |
16461d7d KB |
3296 | |
3297 | set_gdbarch_register_name (gdbarch, ia64_register_name); | |
004d836a JJ |
3298 | /* FIXME: Following interface should not be needed, however, without it recurse.exp |
3299 | gets a number of extra failures. */ | |
b1e29e33 | 3300 | set_gdbarch_deprecated_register_size (gdbarch, 8); |
004d836a | 3301 | set_gdbarch_register_type (gdbarch, ia64_register_type); |
16461d7d | 3302 | |
004d836a JJ |
3303 | set_gdbarch_pseudo_register_read (gdbarch, ia64_pseudo_register_read); |
3304 | set_gdbarch_pseudo_register_write (gdbarch, ia64_pseudo_register_write); | |
3305 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, ia64_dwarf_reg_to_regnum); | |
3306 | set_gdbarch_register_reggroup_p (gdbarch, ia64_register_reggroup_p); | |
3307 | set_gdbarch_convert_register_p (gdbarch, ia64_convert_register_p); | |
3308 | set_gdbarch_register_to_value (gdbarch, ia64_register_to_value); | |
3309 | set_gdbarch_value_to_register (gdbarch, ia64_value_to_register); | |
16461d7d | 3310 | |
004d836a | 3311 | set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue); |
16461d7d KB |
3312 | |
3313 | set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention); | |
004d836a | 3314 | set_gdbarch_extract_return_value (gdbarch, ia64_extract_return_value); |
16461d7d | 3315 | |
004d836a | 3316 | set_gdbarch_store_return_value (gdbarch, ia64_store_return_value); |
74055713 | 3317 | set_gdbarch_deprecated_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address); |
16461d7d KB |
3318 | |
3319 | set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint); | |
3320 | set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint); | |
3321 | set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc); | |
3322 | set_gdbarch_read_pc (gdbarch, ia64_read_pc); | |
3323 | set_gdbarch_write_pc (gdbarch, ia64_write_pc); | |
3324 | ||
3325 | /* Settings for calling functions in the inferior. */ | |
8dd5115e | 3326 | set_gdbarch_push_dummy_call (gdbarch, ia64_push_dummy_call); |
004d836a JJ |
3327 | set_gdbarch_frame_align (gdbarch, ia64_frame_align); |
3328 | set_gdbarch_unwind_dummy_id (gdbarch, ia64_unwind_dummy_id); | |
16461d7d | 3329 | |
004d836a JJ |
3330 | set_gdbarch_unwind_pc (gdbarch, ia64_unwind_pc); |
3331 | frame_unwind_append_sniffer (gdbarch, ia64_sigtramp_frame_sniffer); | |
968d1cb4 JJ |
3332 | #ifdef HAVE_LIBUNWIND_IA64_H |
3333 | frame_unwind_append_sniffer (gdbarch, ia64_libunwind_frame_sniffer); | |
3334 | libunwind_frame_set_descr (gdbarch, &ia64_libunwind_descr); | |
3335 | #endif | |
004d836a JJ |
3336 | frame_unwind_append_sniffer (gdbarch, ia64_frame_sniffer); |
3337 | frame_base_set_default (gdbarch, &ia64_frame_base); | |
16461d7d KB |
3338 | |
3339 | /* Settings that should be unnecessary. */ | |
3340 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
3341 | ||
4156bb53 | 3342 | set_gdbarch_frame_args_skip (gdbarch, 0); |
16461d7d KB |
3343 | |
3344 | set_gdbarch_remote_translate_xfer_address ( | |
3345 | gdbarch, ia64_remote_translate_xfer_address); | |
3346 | ||
6926787d | 3347 | set_gdbarch_print_insn (gdbarch, ia64_print_insn); |
af8b88dd | 3348 | set_gdbarch_convert_from_func_ptr_addr (gdbarch, ia64_convert_from_func_ptr_addr); |
6926787d | 3349 | |
16461d7d KB |
3350 | return gdbarch; |
3351 | } | |
3352 | ||
a78f21af AC |
3353 | extern initialize_file_ftype _initialize_ia64_tdep; /* -Wmissing-prototypes */ |
3354 | ||
16461d7d KB |
3355 | void |
3356 | _initialize_ia64_tdep (void) | |
3357 | { | |
3358 | register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init); | |
16461d7d | 3359 | } |