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[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
CommitLineData
16461d7d 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
ca557f44 2
9b254dd1 3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
13547ab6 4 Free Software Foundation, Inc.
16461d7d
KB		 5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
a9762ec7 10 the Free Software Foundation; either version 3 of the License, or
16461d7d
KB		 11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
a9762ec7 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
16461d7d
KB		 20
21#include "defs.h"
22#include "inferior.h"
16461d7d 23#include "gdbcore.h"
8064c6ae 24#include "arch-utils.h"
16461d7d 25#include "floatformat.h"
e6bb342a 26#include "gdbtypes.h"
4e052eda 27#include "regcache.h"
004d836a
JJ		 28#include "reggroups.h"
29#include "frame.h"
30#include "frame-base.h"
31#include "frame-unwind.h"
d16aafd8 32#include "doublest.h"
fd0407d6 33#include "value.h"
bd1ce8ba 34#include "gdb_assert.h"
16461d7d
KB		 35#include "objfiles.h"
36#include "elf/common.h" /* for DT_PLTGOT value */
244bc108 37#include "elf-bfd.h"
a89aa300 38#include "dis-asm.h"
7d9b040b 39#include "infcall.h"
b33e8514 40#include "osabi.h"
9fc9f5e2 41#include "ia64-tdep.h"
0d5de010 42#include "cp-abi.h"
16461d7d 43
968d1cb4 44#ifdef HAVE_LIBUNWIND_IA64_H
8973ff21 45#include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
968d1cb4
JJ		 46#include "libunwind-frame.h"
47#include "libunwind-ia64.h"
c5a27d9c
JJ		 48
49/* Note: KERNEL_START is supposed to be an address which is not going
50 to ever contain any valid unwind info. For ia64 linux, the choice
51 of 0xc000000000000000 is fairly safe since that's uncached space.
52
53 We use KERNEL_START as follows: after obtaining the kernel's
54 unwind table via getunwind(), we project its unwind data into
55 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
56 when ia64_access_mem() sees a memory access to this
57 address-range, we redirect it to ktab instead.
58
59 None of this hackery is needed with a modern kernel/libcs
60 which uses the kernel virtual DSO to provide access to the
61 kernel's unwind info. In that case, ktab_size remains 0 and
62 hence the value of KERNEL_START doesn't matter. */
63
64#define KERNEL_START 0xc000000000000000ULL
65
66static size_t ktab_size = 0;
67struct ia64_table_entry
68 {
69 uint64_t start_offset;
70 uint64_t end_offset;
71 uint64_t info_offset;
72 };
73
74static struct ia64_table_entry *ktab = NULL;
75
968d1cb4
JJ		 76#endif
77
698cb3f0
KB		 78/* An enumeration of the different IA-64 instruction types. */
79
16461d7d
KB		 80typedef enum instruction_type
81{
82 A, /* Integer ALU ; I-unit or M-unit */
83 I, /* Non-ALU integer; I-unit */
84 M, /* Memory ; M-unit */
85 F, /* Floating-point ; F-unit */
86 B, /* Branch ; B-unit */
87 L, /* Extended (L+X) ; I-unit */
88 X, /* Extended (L+X) ; I-unit */
89 undefined /* undefined or reserved */
90} instruction_type;
91
92/* We represent IA-64 PC addresses as the value of the instruction
93 pointer or'd with some bit combination in the low nibble which
94 represents the slot number in the bundle addressed by the
95 instruction pointer. The problem is that the Linux kernel
96 multiplies its slot numbers (for exceptions) by one while the
97 disassembler multiplies its slot numbers by 6. In addition, I've
98 heard it said that the simulator uses 1 as the multiplier.
99
100 I've fixed the disassembler so that the bytes_per_line field will
101 be the slot multiplier. If bytes_per_line comes in as zero, it
102 is set to six (which is how it was set up initially). -- objdump
103 displays pretty disassembly dumps with this value. For our purposes,
104 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
105 never want to also display the raw bytes the way objdump does. */
106
107#define SLOT_MULTIPLIER 1
108
109/* Length in bytes of an instruction bundle */
110
111#define BUNDLE_LEN 16
112
16461d7d
KB		 113static gdbarch_init_ftype ia64_gdbarch_init;
114
115static gdbarch_register_name_ftype ia64_register_name;
004d836a 116static gdbarch_register_type_ftype ia64_register_type;
16461d7d 117static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
16461d7d 118static gdbarch_skip_prologue_ftype ia64_skip_prologue;
64a5b29c 119static struct type *is_float_or_hfa_type (struct type *t);
b33e8514 120static CORE_ADDR ia64_find_global_pointer (CORE_ADDR faddr);
16461d7d 121
004d836a
JJ		 122static struct type *builtin_type_ia64_ext;
123
124#define NUM_IA64_RAW_REGS 462
16461d7d 125
16461d7d
KB		 126static int sp_regnum = IA64_GR12_REGNUM;
127static int fp_regnum = IA64_VFP_REGNUM;
128static int lr_regnum = IA64_VRAP_REGNUM;
129
004d836a 130/* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
4afcc598 131 they may not be accessible via the ptrace register get/set interfaces. */
004d836a
JJ		 132enum pseudo_regs { FIRST_PSEUDO_REGNUM = NUM_IA64_RAW_REGS, VBOF_REGNUM = IA64_NAT127_REGNUM + 1, V32_REGNUM,
133 V127_REGNUM = V32_REGNUM + 95,
134 VP0_REGNUM, VP16_REGNUM = VP0_REGNUM + 16, VP63_REGNUM = VP0_REGNUM + 63, LAST_PSEUDO_REGNUM };
16461d7d
KB		 135
136/* Array of register names; There should be ia64_num_regs strings in
137 the initializer. */
138
139static char *ia64_register_names[] =
140{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
141 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
142 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
143 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
004d836a
JJ		 144 "", "", "", "", "", "", "", "",
145 "", "", "", "", "", "", "", "",
146 "", "", "", "", "", "", "", "",
147 "", "", "", "", "", "", "", "",
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
16461d7d
KB		 156
157 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
158 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
159 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
160 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
161 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
162 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
163 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
164 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
165 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
166 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
167 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
168 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
169 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
170 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
171 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
172 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
173
004d836a
JJ		 174 "", "", "", "", "", "", "", "",
175 "", "", "", "", "", "", "", "",
176 "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
16461d7d
KB		 182
183 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
184
185 "vfp", "vrap",
186
187 "pr", "ip", "psr", "cfm",
188
189 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
190 "", "", "", "", "", "", "", "",
191 "rsc", "bsp", "bspstore", "rnat",
192 "", "fcr", "", "",
193 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
194 "ccv", "", "", "", "unat", "", "", "",
195 "fpsr", "", "", "", "itc",
196 "", "", "", "", "", "", "", "", "", "",
197 "", "", "", "", "", "", "", "", "",
198 "pfs", "lc", "ec",
199 "", "", "", "", "", "", "", "", "", "",
200 "", "", "", "", "", "", "", "", "", "",
201 "", "", "", "", "", "", "", "", "", "",
202 "", "", "", "", "", "", "", "", "", "",
203 "", "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
205 "",
206 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
207 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
208 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
209 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
210 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
211 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
212 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
213 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
214 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
215 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
216 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
217 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
218 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
219 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
220 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
221 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
004d836a
JJ		 222
223 "bof",
224
225 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
226 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
227 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
228 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
229 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
230 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
231 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
232 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
233 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
234 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
235 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
236 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
237
238 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
239 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
240 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
241 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
242 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
243 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
244 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
245 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
16461d7d
KB		 246};
247
004d836a
JJ		 248struct ia64_frame_cache
249{
250 CORE_ADDR base; /* frame pointer base for frame */
251 CORE_ADDR pc; /* function start pc for frame */
252 CORE_ADDR saved_sp; /* stack pointer for frame */
253 CORE_ADDR bsp; /* points at r32 for the current frame */
254 CORE_ADDR cfm; /* cfm value for current frame */
4afcc598 255 CORE_ADDR prev_cfm; /* cfm value for previous frame */
004d836a
JJ		 256 int frameless;
257 int sof; /* Size of frame (decoded from cfm value) */
258 int sol; /* Size of locals (decoded from cfm value) */
259 int sor; /* Number of rotating registers. (decoded from cfm value) */
260 CORE_ADDR after_prologue;
261 /* Address of first instruction after the last
262 prologue instruction; Note that there may
263 be instructions from the function's body
264 intermingled with the prologue. */
265 int mem_stack_frame_size;
266 /* Size of the memory stack frame (may be zero),
267 or -1 if it has not been determined yet. */
268 int fp_reg; /* Register number (if any) used a frame pointer
244bc108 269 for this frame. 0 if no register is being used
16461d7d 270 as the frame pointer. */
004d836a
JJ		 271
272 /* Saved registers. */
273 CORE_ADDR saved_regs[NUM_IA64_RAW_REGS];
274
275};
244bc108 276
004d836a
JJ		 277int
278ia64_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
279 struct reggroup *group)
16461d7d 280{
004d836a
JJ		 281 int vector_p;
282 int float_p;
283 int raw_p;
284 if (group == all_reggroup)
285 return 1;
286 vector_p = TYPE_VECTOR (register_type (gdbarch, regnum));
287 float_p = TYPE_CODE (register_type (gdbarch, regnum)) == TYPE_CODE_FLT;
288 raw_p = regnum < NUM_IA64_RAW_REGS;
289 if (group == float_reggroup)
290 return float_p;
291 if (group == vector_reggroup)
292 return vector_p;
293 if (group == general_reggroup)
294 return (!vector_p && !float_p);
295 if (group == save_reggroup || group == restore_reggroup)
296 return raw_p;
297 return 0;
16461d7d
KB		 298}
299
004d836a 300static const char *
d93859e2 301ia64_register_name (struct gdbarch *gdbarch, int reg)
16461d7d 302{
004d836a 303 return ia64_register_names[reg];
16461d7d
KB		 304}
305
004d836a
JJ		 306struct type *
307ia64_register_type (struct gdbarch *arch, int reg)
16461d7d 308{
004d836a
JJ		 309 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
310 return builtin_type_ia64_ext;
311 else
0dfff4cb 312 return builtin_type (arch)->builtin_long;
16461d7d
KB		 313}
314
a78f21af 315static int
d3f73121 316ia64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
16461d7d 317{
004d836a
JJ		 318 if (reg >= IA64_GR32_REGNUM && reg <= IA64_GR127_REGNUM)
319 return V32_REGNUM + (reg - IA64_GR32_REGNUM);
320 return reg;
16461d7d
KB		 321}
322
4afcc598 323static int
2fda21a6 324floatformat_valid (const struct floatformat *fmt, const void *from)
4afcc598
JJ		 325{
326 return 1;
327}
328
16461d7d
KB		 329const struct floatformat floatformat_ia64_ext =
330{
331 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
b14d30e1 332 floatformat_intbit_yes, "floatformat_ia64_ext", floatformat_valid, NULL
16461d7d
KB		 333};
334
8da61cc4
DJ		 335const struct floatformat *floatformats_ia64_ext[2] =
336{
337 &floatformat_ia64_ext,
338 &floatformat_ia64_ext
339};
340
16461d7d
KB		 341
342/* Extract ``len'' bits from an instruction bundle starting at
343 bit ``from''. */
344
244bc108 345static long long
15c1e57f 346extract_bit_field (const char *bundle, int from, int len)
16461d7d
KB		 347{
348 long long result = 0LL;
349 int to = from + len;
350 int from_byte = from / 8;
351 int to_byte = to / 8;
352 unsigned char *b = (unsigned char *) bundle;
353 unsigned char c;
354 int lshift;
355 int i;
356
357 c = b[from_byte];
358 if (from_byte == to_byte)
359 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
360 result = c >> (from % 8);
361 lshift = 8 - (from % 8);
362
363 for (i = from_byte+1; i < to_byte; i++)
364 {
365 result |= ((long long) b[i]) << lshift;
366 lshift += 8;
367 }
368
369 if (from_byte < to_byte && (to % 8 != 0))
370 {
371 c = b[to_byte];
372 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
373 result |= ((long long) c) << lshift;
374 }
375
376 return result;
377}
378
379/* Replace the specified bits in an instruction bundle */
380
244bc108 381static void
16461d7d
KB		 382replace_bit_field (char *bundle, long long val, int from, int len)
383{
384 int to = from + len;
385 int from_byte = from / 8;
386 int to_byte = to / 8;
387 unsigned char *b = (unsigned char *) bundle;
388 unsigned char c;
389
390 if (from_byte == to_byte)
391 {
392 unsigned char left, right;
393 c = b[from_byte];
394 left = (c >> (to % 8)) << (to % 8);
395 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
396 c = (unsigned char) (val & 0xff);
397 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
398 c |= right | left;
399 b[from_byte] = c;
400 }
401 else
402 {
403 int i;
404 c = b[from_byte];
405 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
406 c = c | (val << (from % 8));
407 b[from_byte] = c;
408 val >>= 8 - from % 8;
409
410 for (i = from_byte+1; i < to_byte; i++)
411 {
412 c = val & 0xff;
413 val >>= 8;
414 b[i] = c;
415 }
416
417 if (to % 8 != 0)
418 {
419 unsigned char cv = (unsigned char) val;
420 c = b[to_byte];
421 c = c >> (to % 8) << (to % 8);
422 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
423 b[to_byte] = c;
424 }
425 }
426}
427
428/* Return the contents of slot N (for N = 0, 1, or 2) in
429 and instruction bundle */
430
244bc108 431static long long
2fc3ac7e 432slotN_contents (char *bundle, int slotnum)
16461d7d
KB		 433{
434 return extract_bit_field (bundle, 5+41*slotnum, 41);
435}
436
437/* Store an instruction in an instruction bundle */
438
244bc108 439static void
2fc3ac7e 440replace_slotN_contents (char *bundle, long long instr, int slotnum)
16461d7d
KB		 441{
442 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
443}
444
64a5b29c 445static enum instruction_type template_encoding_table[32][3] =
16461d7d
KB		 446{
447 { M, I, I }, /* 00 */
448 { M, I, I }, /* 01 */
449 { M, I, I }, /* 02 */
450 { M, I, I }, /* 03 */
451 { M, L, X }, /* 04 */
452 { M, L, X }, /* 05 */
453 { undefined, undefined, undefined }, /* 06 */
454 { undefined, undefined, undefined }, /* 07 */
455 { M, M, I }, /* 08 */
456 { M, M, I }, /* 09 */
457 { M, M, I }, /* 0A */
458 { M, M, I }, /* 0B */
459 { M, F, I }, /* 0C */
460 { M, F, I }, /* 0D */
461 { M, M, F }, /* 0E */
462 { M, M, F }, /* 0F */
463 { M, I, B }, /* 10 */
464 { M, I, B }, /* 11 */
465 { M, B, B }, /* 12 */
466 { M, B, B }, /* 13 */
467 { undefined, undefined, undefined }, /* 14 */
468 { undefined, undefined, undefined }, /* 15 */
469 { B, B, B }, /* 16 */
470 { B, B, B }, /* 17 */
471 { M, M, B }, /* 18 */
472 { M, M, B }, /* 19 */
473 { undefined, undefined, undefined }, /* 1A */
474 { undefined, undefined, undefined }, /* 1B */
475 { M, F, B }, /* 1C */
476 { M, F, B }, /* 1D */
477 { undefined, undefined, undefined }, /* 1E */
478 { undefined, undefined, undefined }, /* 1F */
479};
480
481/* Fetch and (partially) decode an instruction at ADDR and return the
482 address of the next instruction to fetch. */
483
484static CORE_ADDR
485fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
486{
487 char bundle[BUNDLE_LEN];
488 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
489 long long template;
490 int val;
491
c26e1c2b
KB		 492 /* Warn about slot numbers greater than 2. We used to generate
493 an error here on the assumption that the user entered an invalid
494 address. But, sometimes GDB itself requests an invalid address.
495 This can (easily) happen when execution stops in a function for
496 which there are no symbols. The prologue scanner will attempt to
497 find the beginning of the function - if the nearest symbol
498 happens to not be aligned on a bundle boundary (16 bytes), the
499 resulting starting address will cause GDB to think that the slot
500 number is too large.
501
502 So we warn about it and set the slot number to zero. It is
503 not necessarily a fatal condition, particularly if debugging
504 at the assembly language level. */
16461d7d 505 if (slotnum > 2)
c26e1c2b 506 {
8a3fe4f8
AC		 507 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
508 "Using slot 0 instead"));
c26e1c2b
KB		 509 slotnum = 0;
510 }
16461d7d
KB		 511
512 addr &= ~0x0f;
513
514 val = target_read_memory (addr, bundle, BUNDLE_LEN);
515
516 if (val != 0)
517 return 0;
518
519 *instr = slotN_contents (bundle, slotnum);
520 template = extract_bit_field (bundle, 0, 5);
521 *it = template_encoding_table[(int)template][slotnum];
522
64a5b29c 523 if (slotnum == 2 || (slotnum == 1 && *it == L))
16461d7d
KB		 524 addr += 16;
525 else
526 addr += (slotnum + 1) * SLOT_MULTIPLIER;
527
528 return addr;
529}
530
531/* There are 5 different break instructions (break.i, break.b,
532 break.m, break.f, and break.x), but they all have the same
533 encoding. (The five bit template in the low five bits of the
534 instruction bundle distinguishes one from another.)
535
536 The runtime architecture manual specifies that break instructions
537 used for debugging purposes must have the upper two bits of the 21
538 bit immediate set to a 0 and a 1 respectively. A breakpoint
539 instruction encodes the most significant bit of its 21 bit
540 immediate at bit 36 of the 41 bit instruction. The penultimate msb
541 is at bit 25 which leads to the pattern below.
542
543 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
544 it turns out that 0x80000 was used as the syscall break in the early
545 simulators. So I changed the pattern slightly to do "break.i 0x080001"
546 instead. But that didn't work either (I later found out that this
547 pattern was used by the simulator that I was using.) So I ended up
548 using the pattern seen below. */
549
aaab4dba 550#define IA64_BREAKPOINT 0x00003333300LL
16461d7d
KB		 551
552static int
ae4b2284
MD		 553ia64_memory_insert_breakpoint (struct gdbarch *gdbarch,
554 struct bp_target_info *bp_tgt)
16461d7d 555{
8181d85f 556 CORE_ADDR addr = bp_tgt->placed_address;
16461d7d
KB		 557 char bundle[BUNDLE_LEN];
558 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
559 long long instr;
560 int val;
126fa72d 561 int template;
16461d7d
KB		 562
563 if (slotnum > 2)
8a3fe4f8 564 error (_("Can't insert breakpoint for slot numbers greater than 2."));
16461d7d
KB		 565
566 addr &= ~0x0f;
567
568 val = target_read_memory (addr, bundle, BUNDLE_LEN);
126fa72d
PS		 569
570 /* Check for L type instruction in 2nd slot, if present then
571 bump up the slot number to the 3rd slot */
572 template = extract_bit_field (bundle, 0, 5);
573 if (slotnum == 1 && template_encoding_table[template][1] == L)
574 {
575 slotnum = 2;
576 }
577
16461d7d 578 instr = slotN_contents (bundle, slotnum);
8181d85f
DJ		 579 memcpy (bp_tgt->shadow_contents, &instr, sizeof (instr));
580 bp_tgt->placed_size = bp_tgt->shadow_len = sizeof (instr);
aaab4dba 581 replace_slotN_contents (bundle, IA64_BREAKPOINT, slotnum);
16461d7d
KB		 582 if (val == 0)
583 target_write_memory (addr, bundle, BUNDLE_LEN);
584
585 return val;
586}
587
588static int
ae4b2284
MD		 589ia64_memory_remove_breakpoint (struct gdbarch *gdbarch,
590 struct bp_target_info *bp_tgt)
16461d7d 591{
8181d85f 592 CORE_ADDR addr = bp_tgt->placed_address;
16461d7d
KB		 593 char bundle[BUNDLE_LEN];
594 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
595 long long instr;
596 int val;
126fa72d 597 int template;
1de34ab7 598 struct cleanup *cleanup;
16461d7d
KB		 599
600 addr &= ~0x0f;
601
1de34ab7
JB		 602 /* Disable the automatic memory restoration from breakpoints while
603 we read our instruction bundle. Otherwise, the general restoration
604 mechanism kicks in and ends up corrupting our bundle, because it
605 is not aware of the concept of instruction bundles. */
606 cleanup = make_show_memory_breakpoints_cleanup (1);
16461d7d 607 val = target_read_memory (addr, bundle, BUNDLE_LEN);
126fa72d
PS		 608
609 /* Check for L type instruction in 2nd slot, if present then
610 bump up the slot number to the 3rd slot */
611 template = extract_bit_field (bundle, 0, 5);
612 if (slotnum == 1 && template_encoding_table[template][1] == L)
613 {
614 slotnum = 2;
615 }
616
8181d85f 617 memcpy (&instr, bp_tgt->shadow_contents, sizeof instr);
16461d7d
KB		 618 replace_slotN_contents (bundle, instr, slotnum);
619 if (val == 0)
620 target_write_memory (addr, bundle, BUNDLE_LEN);
621
1de34ab7 622 do_cleanups (cleanup);
16461d7d
KB		 623 return val;
624}
625
626/* We don't really want to use this, but remote.c needs to call it in order
627 to figure out if Z-packets are supported or not. Oh, well. */
f4f9705a 628const unsigned char *
67d57894 629ia64_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
16461d7d
KB		 630{
631 static unsigned char breakpoint[] =
632 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
633 *lenptr = sizeof (breakpoint);
634#if 0
635 *pcptr &= ~0x0f;
636#endif
637 return breakpoint;
638}
639
a78f21af 640static CORE_ADDR
61a1198a 641ia64_read_pc (struct regcache *regcache)
16461d7d 642{
61a1198a
UW		 643 ULONGEST psr_value, pc_value;
644 int slot_num;
645
646 regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr_value);
647 regcache_cooked_read_unsigned (regcache, IA64_IP_REGNUM, &pc_value);
648 slot_num = (psr_value >> 41) & 3;
16461d7d
KB		 649
650 return pc_value | (slot_num * SLOT_MULTIPLIER);
651}
652
54a5c8d8 653void
61a1198a 654ia64_write_pc (struct regcache *regcache, CORE_ADDR new_pc)
16461d7d
KB		 655{
656 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
61a1198a
UW		 657 ULONGEST psr_value;
658
659 regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr_value);
16461d7d 660 psr_value &= ~(3LL << 41);
61a1198a 661 psr_value |= (ULONGEST)(slot_num & 0x3) << 41;
16461d7d
KB		 662
663 new_pc &= ~0xfLL;
664
61a1198a
UW		 665 regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr_value);
666 regcache_cooked_write_unsigned (regcache, IA64_IP_REGNUM, new_pc);
16461d7d
KB		 667}
668
669#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
670
671/* Returns the address of the slot that's NSLOTS slots away from
672 the address ADDR. NSLOTS may be positive or negative. */
673static CORE_ADDR
674rse_address_add(CORE_ADDR addr, int nslots)
675{
676 CORE_ADDR new_addr;
677 int mandatory_nat_slots = nslots / 63;
678 int direction = nslots < 0 ? -1 : 1;
679
680 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
681
682 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
683 new_addr += 8 * direction;
684
685 if (IS_NaT_COLLECTION_ADDR(new_addr))
686 new_addr += 8 * direction;
687
688 return new_addr;
689}
690
004d836a
JJ		 691static void
692ia64_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
88d82102 693 int regnum, gdb_byte *buf)
16461d7d 694{
004d836a 695 if (regnum >= V32_REGNUM && regnum <= V127_REGNUM)
244bc108 696 {
88d82102 697#ifdef HAVE_LIBUNWIND_IA64_H
c5a27d9c
JJ		 698 /* First try and use the libunwind special reg accessor, otherwise fallback to
699 standard logic. */
700 if (!libunwind_is_initialized ()
45ecac4b 701 || libunwind_get_reg_special (gdbarch, regcache, regnum, buf) != 0)
88d82102 702#endif
004d836a 703 {
c5a27d9c
JJ		 704 /* The fallback position is to assume that r32-r127 are found sequentially
705 in memory starting at $bof. This isn't always true, but without libunwind,
706 this is the best we can do. */
707 ULONGEST cfm;
708 ULONGEST bsp;
709 CORE_ADDR reg;
710 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
711 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
712
713 /* The bsp points at the end of the register frame so we
714 subtract the size of frame from it to get start of register frame. */
715 bsp = rse_address_add (bsp, -(cfm & 0x7f));
716
717 if ((cfm & 0x7f) > regnum - V32_REGNUM)
718 {
719 ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
720 reg = read_memory_integer ((CORE_ADDR)reg_addr, 8);
088568da 721 store_unsigned_integer (buf, register_size (gdbarch, regnum), reg);
c5a27d9c
JJ		 722 }
723 else
088568da 724 store_unsigned_integer (buf, register_size (gdbarch, regnum), 0);
004d836a 725 }
004d836a
JJ		 726 }
727 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
728 {
729 ULONGEST unatN_val;
730 ULONGEST unat;
731 regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat);
732 unatN_val = (unat & (1LL << (regnum - IA64_NAT0_REGNUM))) != 0;
088568da 733 store_unsigned_integer (buf, register_size (gdbarch, regnum), unatN_val);
004d836a
JJ		 734 }
735 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
736 {
737 ULONGEST natN_val = 0;
738 ULONGEST bsp;
739 ULONGEST cfm;
740 CORE_ADDR gr_addr = 0;
741 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
742 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
743
744 /* The bsp points at the end of the register frame so we
745 subtract the size of frame from it to get start of register frame. */
746 bsp = rse_address_add (bsp, -(cfm & 0x7f));
747
748 if ((cfm & 0x7f) > regnum - V32_REGNUM)
749 gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
750
751 if (gr_addr != 0)
752 {
753 /* Compute address of nat collection bits. */
754 CORE_ADDR nat_addr = gr_addr | 0x1f8;
755 CORE_ADDR nat_collection;
756 int nat_bit;
757 /* If our nat collection address is bigger than bsp, we have to get
758 the nat collection from rnat. Otherwise, we fetch the nat
759 collection from the computed address. */
760 if (nat_addr >= bsp)
761 regcache_cooked_read_unsigned (regcache, IA64_RNAT_REGNUM, &nat_collection);
762 else
763 nat_collection = read_memory_integer (nat_addr, 8);
764 nat_bit = (gr_addr >> 3) & 0x3f;
765 natN_val = (nat_collection >> nat_bit) & 1;
766 }
767
088568da 768 store_unsigned_integer (buf, register_size (gdbarch, regnum), natN_val);
244bc108 769 }
004d836a
JJ		 770 else if (regnum == VBOF_REGNUM)
771 {
772 /* A virtual register frame start is provided for user convenience.
773 It can be calculated as the bsp - sof (sizeof frame). */
774 ULONGEST bsp, vbsp;
775 ULONGEST cfm;
776 CORE_ADDR reg;
777 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
778 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
779
780 /* The bsp points at the end of the register frame so we
781 subtract the size of frame from it to get beginning of frame. */
782 vbsp = rse_address_add (bsp, -(cfm & 0x7f));
088568da 783 store_unsigned_integer (buf, register_size (gdbarch, regnum), vbsp);
004d836a
JJ		 784 }
785 else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
786 {
787 ULONGEST pr;
788 ULONGEST cfm;
789 ULONGEST prN_val;
790 CORE_ADDR reg;
791 regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr);
792 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
793
794 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
795 {
796 /* Fetch predicate register rename base from current frame
797 marker for this frame. */
798 int rrb_pr = (cfm >> 32) & 0x3f;
799
800 /* Adjust the register number to account for register rotation. */
801 regnum = VP16_REGNUM
802 + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
803 }
804 prN_val = (pr & (1LL << (regnum - VP0_REGNUM))) != 0;
088568da 805 store_unsigned_integer (buf, register_size (gdbarch, regnum), prN_val);
004d836a
JJ		 806 }
807 else
088568da 808 memset (buf, 0, register_size (gdbarch, regnum));
16461d7d
KB		 809}
810
004d836a
JJ		 811static void
812ia64_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
88d82102 813 int regnum, const gdb_byte *buf)
16461d7d 814{
004d836a 815 if (regnum >= V32_REGNUM && regnum <= V127_REGNUM)
244bc108 816 {
004d836a
JJ		 817 ULONGEST bsp;
818 ULONGEST cfm;
819 CORE_ADDR reg;
820 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
821 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
822
823 bsp = rse_address_add (bsp, -(cfm & 0x7f));
824
825 if ((cfm & 0x7f) > regnum - V32_REGNUM)
826 {
827 ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
828 write_memory (reg_addr, (void *)buf, 8);
829 }
830 }
831 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
832 {
833 ULONGEST unatN_val, unat, unatN_mask;
834 regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat);
088568da 835 unatN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum));
004d836a
JJ		 836 unatN_mask = (1LL << (regnum - IA64_NAT0_REGNUM));
837 if (unatN_val == 0)
838 unat &= ~unatN_mask;
839 else if (unatN_val == 1)
840 unat |= unatN_mask;
841 regcache_cooked_write_unsigned (regcache, IA64_UNAT_REGNUM, unat);
842 }
843 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
844 {
845 ULONGEST natN_val;
846 ULONGEST bsp;
847 ULONGEST cfm;
848 CORE_ADDR gr_addr = 0;
849 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
850 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
851
852 /* The bsp points at the end of the register frame so we
853 subtract the size of frame from it to get start of register frame. */
854 bsp = rse_address_add (bsp, -(cfm & 0x7f));
855
856 if ((cfm & 0x7f) > regnum - V32_REGNUM)
857 gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
858
088568da 859 natN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum));
004d836a
JJ		 860
861 if (gr_addr != 0 && (natN_val == 0 || natN_val == 1))
862 {
863 /* Compute address of nat collection bits. */
864 CORE_ADDR nat_addr = gr_addr | 0x1f8;
865 CORE_ADDR nat_collection;
866 int natN_bit = (gr_addr >> 3) & 0x3f;
867 ULONGEST natN_mask = (1LL << natN_bit);
868 /* If our nat collection address is bigger than bsp, we have to get
869 the nat collection from rnat. Otherwise, we fetch the nat
870 collection from the computed address. */
871 if (nat_addr >= bsp)
872 {
873 regcache_cooked_read_unsigned (regcache, IA64_RNAT_REGNUM, &nat_collection);
874 if (natN_val)
875 nat_collection |= natN_mask;
876 else
877 nat_collection &= ~natN_mask;
878 regcache_cooked_write_unsigned (regcache, IA64_RNAT_REGNUM, nat_collection);
879 }
880 else
881 {
882 char nat_buf[8];
883 nat_collection = read_memory_integer (nat_addr, 8);
884 if (natN_val)
885 nat_collection |= natN_mask;
886 else
887 nat_collection &= ~natN_mask;
088568da 888 store_unsigned_integer (nat_buf, register_size (gdbarch, regnum), nat_collection);
004d836a
JJ		 889 write_memory (nat_addr, nat_buf, 8);
890 }
891 }
892 }
893 else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
894 {
895 ULONGEST pr;
896 ULONGEST cfm;
897 ULONGEST prN_val;
898 ULONGEST prN_mask;
899
900 regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr);
901 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
902
903 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
904 {
905 /* Fetch predicate register rename base from current frame
906 marker for this frame. */
907 int rrb_pr = (cfm >> 32) & 0x3f;
908
909 /* Adjust the register number to account for register rotation. */
910 regnum = VP16_REGNUM
911 + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
912 }
088568da 913 prN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum));
004d836a
JJ		 914 prN_mask = (1LL << (regnum - VP0_REGNUM));
915 if (prN_val == 0)
916 pr &= ~prN_mask;
917 else if (prN_val == 1)
918 pr |= prN_mask;
919 regcache_cooked_write_unsigned (regcache, IA64_PR_REGNUM, pr);
244bc108 920 }
16461d7d
KB		 921}
922
004d836a
JJ		 923/* The ia64 needs to convert between various ieee floating-point formats
924 and the special ia64 floating point register format. */
925
926static int
0abe36f5 927ia64_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type)
004d836a 928{
83acabca
DJ		 929 return (regno >= IA64_FR0_REGNUM && regno <= IA64_FR127_REGNUM
930 && type != builtin_type_ia64_ext);
004d836a
JJ		 931}
932
933static void
934ia64_register_to_value (struct frame_info *frame, int regnum,
88d82102 935 struct type *valtype, gdb_byte *out)
004d836a
JJ		 936{
937 char in[MAX_REGISTER_SIZE];
938 frame_register_read (frame, regnum, in);
939 convert_typed_floating (in, builtin_type_ia64_ext, out, valtype);
940}
941
942static void
943ia64_value_to_register (struct frame_info *frame, int regnum,
88d82102 944 struct type *valtype, const gdb_byte *in)
004d836a
JJ		 945{
946 char out[MAX_REGISTER_SIZE];
947 convert_typed_floating (in, valtype, out, builtin_type_ia64_ext);
948 put_frame_register (frame, regnum, out);
949}
950
951
58ab00f9
KB		 952/* Limit the number of skipped non-prologue instructions since examining
953 of the prologue is expensive. */
5ea2bd7f 954static int max_skip_non_prologue_insns = 40;
58ab00f9
KB		 955
956/* Given PC representing the starting address of a function, and
957 LIM_PC which is the (sloppy) limit to which to scan when looking
958 for a prologue, attempt to further refine this limit by using
959 the line data in the symbol table. If successful, a better guess
960 on where the prologue ends is returned, otherwise the previous
961 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
962 which will be set to indicate whether the returned limit may be
963 used with no further scanning in the event that the function is
964 frameless. */
965
634aa483
AC		 966/* FIXME: cagney/2004-02-14: This function and logic have largely been
967 superseded by skip_prologue_using_sal. */
968
58ab00f9
KB		 969static CORE_ADDR
970refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
971{
972 struct symtab_and_line prologue_sal;
973 CORE_ADDR start_pc = pc;
39312971
JB		 974 CORE_ADDR end_pc;
975
976 /* The prologue can not possibly go past the function end itself,
977 so we can already adjust LIM_PC accordingly. */
978 if (find_pc_partial_function (pc, NULL, NULL, &end_pc) && end_pc < lim_pc)
979 lim_pc = end_pc;
58ab00f9
KB		 980
981 /* Start off not trusting the limit. */
982 *trust_limit = 0;
983
984 prologue_sal = find_pc_line (pc, 0);
985 if (prologue_sal.line != 0)
986 {
987 int i;
988 CORE_ADDR addr = prologue_sal.end;
989
990 /* Handle the case in which compiler's optimizer/scheduler
991 has moved instructions into the prologue. We scan ahead
992 in the function looking for address ranges whose corresponding
993 line number is less than or equal to the first one that we
994 found for the function. (It can be less than when the
995 scheduler puts a body instruction before the first prologue
996 instruction.) */
997 for (i = 2 * max_skip_non_prologue_insns;
998 i > 0 && (lim_pc == 0 || addr < lim_pc);
999 i--)
1000 {
1001 struct symtab_and_line sal;
1002
1003 sal = find_pc_line (addr, 0);
1004 if (sal.line == 0)
1005 break;
1006 if (sal.line <= prologue_sal.line
1007 && sal.symtab == prologue_sal.symtab)
1008 {
1009 prologue_sal = sal;
1010 }
1011 addr = sal.end;
1012 }
1013
1014 if (lim_pc == 0 || prologue_sal.end < lim_pc)
1015 {
1016 lim_pc = prologue_sal.end;
1017 if (start_pc == get_pc_function_start (lim_pc))
1018 *trust_limit = 1;
1019 }
1020 }
1021 return lim_pc;
1022}
1023
16461d7d
KB		 1024#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1025 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1026 || (14 <= (_regnum_) && (_regnum_) <= 31))
1027#define imm9(_instr_) \
1028 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1029 | (((_instr_) & 0x00008000000LL) >> 20) \
1030 | (((_instr_) & 0x00000001fc0LL) >> 6))
1031
004d836a
JJ		 1032/* Allocate and initialize a frame cache. */
1033
1034static struct ia64_frame_cache *
1035ia64_alloc_frame_cache (void)
1036{
1037 struct ia64_frame_cache *cache;
1038 int i;
1039
1040 cache = FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache);
1041
1042 /* Base address. */
1043 cache->base = 0;
1044 cache->pc = 0;
1045 cache->cfm = 0;
4afcc598 1046 cache->prev_cfm = 0;
004d836a
JJ		 1047 cache->sof = 0;
1048 cache->sol = 0;
1049 cache->sor = 0;
1050 cache->bsp = 0;
1051 cache->fp_reg = 0;
1052 cache->frameless = 1;
1053
1054 for (i = 0; i < NUM_IA64_RAW_REGS; i++)
1055 cache->saved_regs[i] = 0;
1056
1057 return cache;
1058}
1059
16461d7d 1060static CORE_ADDR
15c1e57f
JB		 1061examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc,
1062 struct frame_info *this_frame,
1063 struct ia64_frame_cache *cache)
16461d7d
KB		 1064{
1065 CORE_ADDR next_pc;
1066 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB		 1067 instruction_type it;
1068 long long instr;
16461d7d
KB		 1069 int cfm_reg = 0;
1070 int ret_reg = 0;
1071 int fp_reg = 0;
1072 int unat_save_reg = 0;
1073 int pr_save_reg = 0;
1074 int mem_stack_frame_size = 0;
1075 int spill_reg = 0;
1076 CORE_ADDR spill_addr = 0;
0927a22b
KB		 1077 char instores[8];
1078 char infpstores[8];
5ea2bd7f 1079 char reg_contents[256];
58ab00f9 1080 int trust_limit;
004d836a
JJ		 1081 int frameless = 1;
1082 int i;
1083 CORE_ADDR addr;
1084 char buf[8];
1085 CORE_ADDR bof, sor, sol, sof, cfm, rrb_gr;
0927a22b
KB		 1086
1087 memset (instores, 0, sizeof instores);
1088 memset (infpstores, 0, sizeof infpstores);
5ea2bd7f 1089 memset (reg_contents, 0, sizeof reg_contents);
16461d7d 1090
004d836a
JJ		 1091 if (cache->after_prologue != 0
1092 && cache->after_prologue <= lim_pc)
1093 return cache->after_prologue;
16461d7d 1094
58ab00f9 1095 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
16461d7d 1096 next_pc = fetch_instruction (pc, &it, &instr);
5ea2bd7f
JJ		 1097
1098 /* We want to check if we have a recognizable function start before we
1099 look ahead for a prologue. */
16461d7d
KB		 1100 if (pc < lim_pc && next_pc
1101 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
1102 {
5ea2bd7f 1103 /* alloc - start of a regular function. */
16461d7d
KB		 1104 int sor = (int) ((instr & 0x00078000000LL) >> 27);
1105 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
1106 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
16461d7d 1107 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
004d836a
JJ		 1108
1109 /* Verify that the current cfm matches what we think is the
1110 function start. If we have somehow jumped within a function,
1111 we do not want to interpret the prologue and calculate the
1112 addresses of various registers such as the return address.
1113 We will instead treat the frame as frameless. */
15c1e57f 1114 if (!this_frame ||
004d836a
JJ		 1115 (sof == (cache->cfm & 0x7f) &&
1116 sol == ((cache->cfm >> 7) & 0x7f)))
1117 frameless = 0;
1118
16461d7d
KB		 1119 cfm_reg = rN;
1120 last_prologue_pc = next_pc;
1121 pc = next_pc;
1122 }
1123 else
58ab00f9 1124 {
5ea2bd7f
JJ		 1125 /* Look for a leaf routine. */
1126 if (pc < lim_pc && next_pc
1127 && (it == I || it == M)
1128 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
1129 {
1130 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1131 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
1132 | ((instr & 0x001f8000000LL) >> 20)
1133 | ((instr & 0x000000fe000LL) >> 13));
1134 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
1135 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1136 int qp = (int) (instr & 0x0000000003fLL);
1137 if (qp == 0 && rN == 2 && imm == 0 && rM == 12 && fp_reg == 0)
1138 {
1139 /* mov r2, r12 - beginning of leaf routine */
1140 fp_reg = rN;
5ea2bd7f
JJ		 1141 last_prologue_pc = next_pc;
1142 }
1143 }
1144
1145 /* If we don't recognize a regular function or leaf routine, we are
1146 done. */
1147 if (!fp_reg)
1148 {
1149 pc = lim_pc;
1150 if (trust_limit)
1151 last_prologue_pc = lim_pc;
1152 }
58ab00f9 1153 }
16461d7d
KB		 1154
1155 /* Loop, looking for prologue instructions, keeping track of
1156 where preserved registers were spilled. */
1157 while (pc < lim_pc)
1158 {
1159 next_pc = fetch_instruction (pc, &it, &instr);
1160 if (next_pc == 0)
1161 break;
1162
594706e6 1163 if (it == B && ((instr & 0x1e1f800003fLL) != 0x04000000000LL))
0927a22b 1164 {
102d615a
JJ		 1165 /* Exit loop upon hitting a non-nop branch instruction. */
1166 if (trust_limit)
1167 lim_pc = pc;
1168 break;
1169 }
1170 else if (((instr & 0x3fLL) != 0LL) &&
1171 (frameless || ret_reg != 0))
1172 {
1173 /* Exit loop upon hitting a predicated instruction if
1174 we already have the return register or if we are frameless. */
5ea2bd7f
JJ		 1175 if (trust_limit)
1176 lim_pc = pc;
0927a22b
KB		 1177 break;
1178 }
1179 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
16461d7d
KB		 1180 {
1181 /* Move from BR */
1182 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
1183 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1184 int qp = (int) (instr & 0x0000000003f);
1185
1186 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
1187 {
1188 ret_reg = rN;
1189 last_prologue_pc = next_pc;
1190 }
1191 }
1192 else if ((it == I || it == M)
1193 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
1194 {
1195 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1196 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
1197 | ((instr & 0x001f8000000LL) >> 20)
1198 | ((instr & 0x000000fe000LL) >> 13));
1199 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
1200 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1201 int qp = (int) (instr & 0x0000000003fLL);
1202
1203 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
1204 {
1205 /* mov rN, r12 */
1206 fp_reg = rN;
1207 last_prologue_pc = next_pc;
1208 }
1209 else if (qp == 0 && rN == 12 && rM == 12)
1210 {
1211 /* adds r12, -mem_stack_frame_size, r12 */
1212 mem_stack_frame_size -= imm;
1213 last_prologue_pc = next_pc;
1214 }
1215 else if (qp == 0 && rN == 2
1216 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
1217 {
004d836a
JJ		 1218 char buf[MAX_REGISTER_SIZE];
1219 CORE_ADDR saved_sp = 0;
16461d7d
KB		 1220 /* adds r2, spilloffset, rFramePointer
1221 or
1222 adds r2, spilloffset, r12
1223
1224 Get ready for stf.spill or st8.spill instructions.
1225 The address to start spilling at is loaded into r2.
1226 FIXME: Why r2? That's what gcc currently uses; it
1227 could well be different for other compilers. */
1228
1229 /* Hmm... whether or not this will work will depend on
1230 where the pc is. If it's still early in the prologue
1231 this'll be wrong. FIXME */
15c1e57f 1232 if (this_frame)
004d836a 1233 {
15c1e57f 1234 get_frame_register (this_frame, sp_regnum, buf);
004d836a
JJ		 1235 saved_sp = extract_unsigned_integer (buf, 8);
1236 }
1237 spill_addr = saved_sp
16461d7d
KB		 1238 + (rM == 12 ? 0 : mem_stack_frame_size)
1239 + imm;
1240 spill_reg = rN;
1241 last_prologue_pc = next_pc;
1242 }
b7d038ae 1243 else if (qp == 0 && rM >= 32 && rM < 40 && !instores[rM-32] &&
5ea2bd7f
JJ		 1244 rN < 256 && imm == 0)
1245 {
1246 /* mov rN, rM where rM is an input register */
1247 reg_contents[rN] = rM;
1248 last_prologue_pc = next_pc;
1249 }
1250 else if (frameless && qp == 0 && rN == fp_reg && imm == 0 &&
1251 rM == 2)
1252 {
1253 /* mov r12, r2 */
1254 last_prologue_pc = next_pc;
1255 break;
1256 }
16461d7d
KB		 1257 }
1258 else if (it == M
1259 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
1260 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
1261 {
1262 /* stf.spill [rN] = fM, imm9
1263 or
1264 stf.spill [rN] = fM */
1265
1266 int imm = imm9(instr);
1267 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1268 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1269 int qp = (int) (instr & 0x0000000003fLL);
1270 if (qp == 0 && rN == spill_reg && spill_addr != 0
1271 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
1272 {
004d836a 1273 cache->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
16461d7d 1274
594706e6 1275 if ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
16461d7d
KB		 1276 spill_addr += imm;
1277 else
1278 spill_addr = 0; /* last one; must be done */
1279 last_prologue_pc = next_pc;
1280 }
1281 }
1282 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
1283 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
1284 {
1285 /* mov.m rN = arM
1286 or
1287 mov.i rN = arM */
1288
1289 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
1290 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1291 int qp = (int) (instr & 0x0000000003fLL);
1292 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
1293 {
1294 /* We have something like "mov.m r3 = ar.unat". Remember the
1295 r3 (or whatever) and watch for a store of this register... */
1296 unat_save_reg = rN;
1297 last_prologue_pc = next_pc;
1298 }
1299 }
1300 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
1301 {
1302 /* mov rN = pr */
1303 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1304 int qp = (int) (instr & 0x0000000003fLL);
1305 if (qp == 0 && isScratch (rN))
1306 {
1307 pr_save_reg = rN;
1308 last_prologue_pc = next_pc;
1309 }
1310 }
1311 else if (it == M
1312 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1313 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1314 {
1315 /* st8 [rN] = rM
1316 or
1317 st8 [rN] = rM, imm9 */
1318 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1319 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1320 int qp = (int) (instr & 0x0000000003fLL);
5ea2bd7f 1321 int indirect = rM < 256 ? reg_contents[rM] : 0;
16461d7d
KB		 1322 if (qp == 0 && rN == spill_reg && spill_addr != 0
1323 && (rM == unat_save_reg || rM == pr_save_reg))
1324 {
1325 /* We've found a spill of either the UNAT register or the PR
1326 register. (Well, not exactly; what we've actually found is
1327 a spill of the register that UNAT or PR was moved to).
1328 Record that fact and move on... */
1329 if (rM == unat_save_reg)
1330 {
1331 /* Track UNAT register */
004d836a 1332 cache->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
16461d7d
KB		 1333 unat_save_reg = 0;
1334 }
1335 else
1336 {
1337 /* Track PR register */
004d836a 1338 cache->saved_regs[IA64_PR_REGNUM] = spill_addr;
16461d7d
KB		 1339 pr_save_reg = 0;
1340 }
1341 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1342 /* st8 [rN] = rM, imm9 */
1343 spill_addr += imm9(instr);
1344 else
1345 spill_addr = 0; /* must be done spilling */
1346 last_prologue_pc = next_pc;
1347 }
0927a22b
KB		 1348 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1349 {
1350 /* Allow up to one store of each input register. */
1351 instores[rM-32] = 1;
1352 last_prologue_pc = next_pc;
1353 }
5ea2bd7f
JJ		 1354 else if (qp == 0 && 32 <= indirect && indirect < 40 &&
1355 !instores[indirect-32])
1356 {
1357 /* Allow an indirect store of an input register. */
1358 instores[indirect-32] = 1;
1359 last_prologue_pc = next_pc;
1360 }
0927a22b
KB		 1361 }
1362 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1363 {
1364 /* One of
1365 st1 [rN] = rM
1366 st2 [rN] = rM
1367 st4 [rN] = rM
1368 st8 [rN] = rM
1369 Note that the st8 case is handled in the clause above.
1370
1371 Advance over stores of input registers. One store per input
1372 register is permitted. */
1373 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1374 int qp = (int) (instr & 0x0000000003fLL);
5ea2bd7f 1375 int indirect = rM < 256 ? reg_contents[rM] : 0;
0927a22b
KB		 1376 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1377 {
1378 instores[rM-32] = 1;
1379 last_prologue_pc = next_pc;
1380 }
5ea2bd7f
JJ		 1381 else if (qp == 0 && 32 <= indirect && indirect < 40 &&
1382 !instores[indirect-32])
1383 {
1384 /* Allow an indirect store of an input register. */
1385 instores[indirect-32] = 1;
1386 last_prologue_pc = next_pc;
1387 }
0927a22b
KB		 1388 }
1389 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1390 {
1391 /* Either
1392 stfs [rN] = fM
1393 or
1394 stfd [rN] = fM
1395
1396 Advance over stores of floating point input registers. Again
1397 one store per register is permitted */
1398 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1399 int qp = (int) (instr & 0x0000000003fLL);
1400 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1401 {
1402 infpstores[fM-8] = 1;
1403 last_prologue_pc = next_pc;
1404 }
16461d7d
KB		 1405 }
1406 else if (it == M
1407 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1408 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1409 {
1410 /* st8.spill [rN] = rM
1411 or
1412 st8.spill [rN] = rM, imm9 */
1413 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1414 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1415 int qp = (int) (instr & 0x0000000003fLL);
1416 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1417 {
1418 /* We've found a spill of one of the preserved general purpose
1419 regs. Record the spill address and advance the spill
1420 register if appropriate. */
004d836a 1421 cache->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
16461d7d
KB		 1422 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1423 /* st8.spill [rN] = rM, imm9 */
1424 spill_addr += imm9(instr);
1425 else
1426 spill_addr = 0; /* Done spilling */
1427 last_prologue_pc = next_pc;
1428 }
1429 }
16461d7d
KB		 1430
1431 pc = next_pc;
1432 }
1433
15c1e57f
JB		 1434 /* If not frameless and we aren't called by skip_prologue, then we need
1435 to calculate registers for the previous frame which will be needed
1436 later. */
16461d7d 1437
15c1e57f 1438 if (!frameless && this_frame)
da50a4b7 1439 {
004d836a
JJ		 1440 /* Extract the size of the rotating portion of the stack
1441 frame and the register rename base from the current
1442 frame marker. */
1443 cfm = cache->cfm;
1444 sor = cache->sor;
1445 sof = cache->sof;
1446 sol = cache->sol;
1447 rrb_gr = (cfm >> 18) & 0x7f;
1448
1449 /* Find the bof (beginning of frame). */
1450 bof = rse_address_add (cache->bsp, -sof);
1451
1452 for (i = 0, addr = bof;
1453 i < sof;
1454 i++, addr += 8)
1455 {
1456 if (IS_NaT_COLLECTION_ADDR (addr))
1457 {
1458 addr += 8;
1459 }
1460 if (i+32 == cfm_reg)
1461 cache->saved_regs[IA64_CFM_REGNUM] = addr;
1462 if (i+32 == ret_reg)
1463 cache->saved_regs[IA64_VRAP_REGNUM] = addr;
1464 if (i+32 == fp_reg)
1465 cache->saved_regs[IA64_VFP_REGNUM] = addr;
1466 }
16461d7d 1467
004d836a
JJ		 1468 /* For the previous argument registers we require the previous bof.
1469 If we can't find the previous cfm, then we can do nothing. */
4afcc598 1470 cfm = 0;
004d836a
JJ		 1471 if (cache->saved_regs[IA64_CFM_REGNUM] != 0)
1472 {
1473 cfm = read_memory_integer (cache->saved_regs[IA64_CFM_REGNUM], 8);
4afcc598
JJ		 1474 }
1475 else if (cfm_reg != 0)
1476 {
15c1e57f 1477 get_frame_register (this_frame, cfm_reg, buf);
4afcc598
JJ		 1478 cfm = extract_unsigned_integer (buf, 8);
1479 }
1480 cache->prev_cfm = cfm;
1481
1482 if (cfm != 0)
1483 {
004d836a
JJ		 1484 sor = ((cfm >> 14) & 0xf) * 8;
1485 sof = (cfm & 0x7f);
1486 sol = (cfm >> 7) & 0x7f;
1487 rrb_gr = (cfm >> 18) & 0x7f;
1488
15c1e57f
JB		 1489 /* The previous bof only requires subtraction of the sol (size of
1490 locals) due to the overlap between output and input of
1491 subsequent frames. */
004d836a
JJ		 1492 bof = rse_address_add (bof, -sol);
1493
1494 for (i = 0, addr = bof;
1495 i < sof;
1496 i++, addr += 8)
1497 {
1498 if (IS_NaT_COLLECTION_ADDR (addr))
1499 {
1500 addr += 8;
1501 }
1502 if (i < sor)
1503 cache->saved_regs[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
1504 = addr;
1505 else
1506 cache->saved_regs[IA64_GR32_REGNUM + i] = addr;
1507 }
1508
1509 }
1510 }
1511
5ea2bd7f
JJ		 1512 /* Try and trust the lim_pc value whenever possible. */
1513 if (trust_limit && lim_pc >= last_prologue_pc)
004d836a
JJ		 1514 last_prologue_pc = lim_pc;
1515
1516 cache->frameless = frameless;
1517 cache->after_prologue = last_prologue_pc;
1518 cache->mem_stack_frame_size = mem_stack_frame_size;
1519 cache->fp_reg = fp_reg;
5ea2bd7f 1520
16461d7d
KB		 1521 return last_prologue_pc;
1522}
1523
1524CORE_ADDR
6093d2eb 1525ia64_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
16461d7d 1526{
004d836a
JJ		 1527 struct ia64_frame_cache cache;
1528 cache.base = 0;
1529 cache.after_prologue = 0;
1530 cache.cfm = 0;
1531 cache.bsp = 0;
1532
1533 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1534 return examine_prologue (pc, pc+1024, 0, &cache);
16461d7d
KB		 1535}
1536
004d836a
JJ		 1537
1538/* Normal frames. */
1539
1540static struct ia64_frame_cache *
15c1e57f 1541ia64_frame_cache (struct frame_info *this_frame, void **this_cache)
16461d7d 1542{
004d836a
JJ		 1543 struct ia64_frame_cache *cache;
1544 char buf[8];
1545 CORE_ADDR cfm, sof, sol, bsp, psr;
1546 int i;
16461d7d 1547
004d836a
JJ		 1548 if (*this_cache)
1549 return *this_cache;
16461d7d 1550
004d836a
JJ		 1551 cache = ia64_alloc_frame_cache ();
1552 *this_cache = cache;
16461d7d 1553
15c1e57f 1554 get_frame_register (this_frame, sp_regnum, buf);
004d836a 1555 cache->saved_sp = extract_unsigned_integer (buf, 8);
16461d7d 1556
004d836a
JJ		 1557 /* We always want the bsp to point to the end of frame.
1558 This way, we can always get the beginning of frame (bof)
1559 by subtracting frame size. */
15c1e57f 1560 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
004d836a
JJ		 1561 cache->bsp = extract_unsigned_integer (buf, 8);
1562
15c1e57f 1563 get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
004d836a
JJ		 1564 psr = extract_unsigned_integer (buf, 8);
1565
15c1e57f 1566 get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
004d836a
JJ		 1567 cfm = extract_unsigned_integer (buf, 8);
1568
1569 cache->sof = (cfm & 0x7f);
1570 cache->sol = (cfm >> 7) & 0x7f;
1571 cache->sor = ((cfm >> 14) & 0xf) * 8;
1572
1573 cache->cfm = cfm;
1574
15c1e57f 1575 cache->pc = get_frame_func (this_frame);
004d836a
JJ		 1576
1577 if (cache->pc != 0)
15c1e57f 1578 examine_prologue (cache->pc, get_frame_pc (this_frame), this_frame, cache);
004d836a
JJ		 1579
1580 cache->base = cache->saved_sp + cache->mem_stack_frame_size;
1581
1582 return cache;
16461d7d
KB		 1583}
1584
a78f21af 1585static void
15c1e57f 1586ia64_frame_this_id (struct frame_info *this_frame, void **this_cache,
004d836a 1587 struct frame_id *this_id)
16461d7d 1588{
004d836a 1589 struct ia64_frame_cache *cache =
15c1e57f 1590 ia64_frame_cache (this_frame, this_cache);
16461d7d 1591
c5a27d9c 1592 /* If outermost frame, mark with null frame id. */
004d836a 1593 if (cache->base == 0)
c5a27d9c
JJ		 1594 (*this_id) = null_frame_id;
1595 else
1596 (*this_id) = frame_id_build_special (cache->base, cache->pc, cache->bsp);
4afcc598
JJ		 1597 if (gdbarch_debug >= 1)
1598 fprintf_unfiltered (gdb_stdlog,
15c1e57f 1599 "regular frame id: code 0x%s, stack 0x%s, special 0x%s, this_frame %p\n",
78ced177
JJ		 1600 paddr_nz (this_id->code_addr),
1601 paddr_nz (this_id->stack_addr),
15c1e57f 1602 paddr_nz (cache->bsp), this_frame);
004d836a 1603}
244bc108 1604
15c1e57f
JB		 1605static struct value *
1606ia64_frame_prev_register (struct frame_info *this_frame, void **this_cache,
1607 int regnum)
004d836a 1608{
15c1e57f
JB		 1609 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1610 struct ia64_frame_cache *cache = ia64_frame_cache (this_frame, this_cache);
004d836a
JJ		 1611 char buf[8];
1612
1613 gdb_assert (regnum >= 0);
244bc108 1614
004d836a 1615 if (!target_has_registers)
8a3fe4f8 1616 error (_("No registers."));
244bc108 1617
088568da 1618 if (regnum == gdbarch_sp_regnum (gdbarch))
15c1e57f
JB		 1619 return frame_unwind_got_constant (this_frame, regnum, cache->base);
1620
16461d7d
KB		 1621 else if (regnum == IA64_BSP_REGNUM)
1622 {
15c1e57f
JB		 1623 struct value *val;
1624 CORE_ADDR prev_cfm, bsp, prev_bsp;
1625
1626 /* We want to calculate the previous bsp as the end of the previous
1627 register stack frame. This corresponds to what the hardware bsp
1628 register will be if we pop the frame back which is why we might
1629 have been called. We know the beginning of the current frame is
1630 cache->bsp - cache->sof. This value in the previous frame points
1631 to the start of the output registers. We can calculate the end of
1632 that frame by adding the size of output:
1633 (sof (size of frame) - sol (size of locals)). */
1634 val = ia64_frame_prev_register (this_frame, this_cache, IA64_CFM_REGNUM);
1635 prev_cfm = extract_unsigned_integer (value_contents_all (val), 8);
004d836a 1636 bsp = rse_address_add (cache->bsp, -(cache->sof));
15c1e57f
JB		 1637 prev_bsp =
1638 rse_address_add (bsp, (prev_cfm & 0x7f) - ((prev_cfm >> 7) & 0x7f));
004d836a 1639
15c1e57f 1640 return frame_unwind_got_constant (this_frame, regnum, prev_bsp);
004d836a 1641 }
15c1e57f 1642
004d836a
JJ		 1643 else if (regnum == IA64_CFM_REGNUM)
1644 {
4afcc598
JJ		 1645 CORE_ADDR addr = cache->saved_regs[IA64_CFM_REGNUM];
1646
1647 if (addr != 0)
15c1e57f
JB		 1648 return frame_unwind_got_memory (this_frame, regnum, addr);
1649
1650 if (cache->prev_cfm)
1651 return frame_unwind_got_constant (this_frame, regnum, cache->prev_cfm);
1652
1653 if (cache->frameless)
1654 return frame_unwind_got_register (this_frame, IA64_PFS_REGNUM,
1655 IA64_PFS_REGNUM);
1656 return frame_unwind_got_register (this_frame, regnum, 0);
16461d7d 1657 }
15c1e57f 1658
16461d7d
KB		 1659 else if (regnum == IA64_VFP_REGNUM)
1660 {
1661 /* If the function in question uses an automatic register (r32-r127)
1662 for the frame pointer, it'll be found by ia64_find_saved_register()
1663 above. If the function lacks one of these frame pointers, we can
004d836a 1664 still provide a value since we know the size of the frame. */
15c1e57f 1665 return frame_unwind_got_constant (this_frame, regnum, cache->base);
16461d7d 1666 }
15c1e57f 1667
004d836a 1668 else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
16461d7d 1669 {
15c1e57f
JB		 1670 struct value *pr_val;
1671 ULONGEST prN;
1672
1673 pr_val = ia64_frame_prev_register (this_frame, this_cache,
1674 IA64_PR_REGNUM);
004d836a 1675 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
3a854e23
KB		 1676 {
1677 /* Fetch predicate register rename base from current frame
004d836a
JJ		 1678 marker for this frame. */
1679 int rrb_pr = (cache->cfm >> 32) & 0x3f;
3a854e23 1680
004d836a 1681 /* Adjust the register number to account for register rotation. */
15c1e57f 1682 regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
3a854e23 1683 }
15c1e57f
JB		 1684 prN = extract_bit_field (value_contents_all (pr_val),
1685 regnum - VP0_REGNUM, 1);
1686 return frame_unwind_got_constant (this_frame, regnum, prN);
16461d7d 1687 }
15c1e57f 1688
16461d7d
KB		 1689 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1690 {
15c1e57f
JB		 1691 struct value *unat_val;
1692 ULONGEST unatN;
1693 unat_val = ia64_frame_prev_register (this_frame, this_cache,
1694 IA64_UNAT_REGNUM);
1695 unatN = extract_bit_field (value_contents_all (unat_val),
1696 regnum - IA64_NAT0_REGNUM, 1);
1697 return frame_unwind_got_constant (this_frame, regnum, unatN);
16461d7d 1698 }
15c1e57f 1699
16461d7d
KB		 1700 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1701 {
1702 int natval = 0;
1703 /* Find address of general register corresponding to nat bit we're
004d836a
JJ		 1704 interested in. */
1705 CORE_ADDR gr_addr;
244bc108 1706
15c1e57f
JB		 1707 gr_addr = cache->saved_regs[regnum - IA64_NAT0_REGNUM + IA64_GR0_REGNUM];
1708
004d836a 1709 if (gr_addr != 0)
244bc108 1710 {
004d836a 1711 /* Compute address of nat collection bits. */
16461d7d 1712 CORE_ADDR nat_addr = gr_addr | 0x1f8;
004d836a 1713 CORE_ADDR bsp;
16461d7d
KB		 1714 CORE_ADDR nat_collection;
1715 int nat_bit;
15c1e57f 1716
16461d7d
KB		 1717 /* If our nat collection address is bigger than bsp, we have to get
1718 the nat collection from rnat. Otherwise, we fetch the nat
004d836a 1719 collection from the computed address. */
15c1e57f 1720 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
004d836a 1721 bsp = extract_unsigned_integer (buf, 8);
16461d7d 1722 if (nat_addr >= bsp)
004d836a 1723 {
15c1e57f 1724 get_frame_register (this_frame, IA64_RNAT_REGNUM, buf);
004d836a
JJ		 1725 nat_collection = extract_unsigned_integer (buf, 8);
1726 }
16461d7d
KB		 1727 else
1728 nat_collection = read_memory_integer (nat_addr, 8);
1729 nat_bit = (gr_addr >> 3) & 0x3f;
1730 natval = (nat_collection >> nat_bit) & 1;
1731 }
004d836a 1732
15c1e57f 1733 return frame_unwind_got_constant (this_frame, regnum, natval);
244bc108 1734 }
15c1e57f 1735
244bc108
KB		 1736 else if (regnum == IA64_IP_REGNUM)
1737 {
004d836a 1738 CORE_ADDR pc = 0;
4afcc598 1739 CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
004d836a 1740
4afcc598 1741 if (addr != 0)
15c1e57f
JB		 1742 {
1743 read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
1744 pc = extract_unsigned_integer (buf, 8);
1745 }
4afcc598 1746 else if (cache->frameless)
004d836a 1747 {
15c1e57f 1748 get_frame_register (this_frame, IA64_BR0_REGNUM, buf);
4afcc598 1749 pc = extract_unsigned_integer (buf, 8);
244bc108 1750 }
004d836a 1751 pc &= ~0xf;
15c1e57f 1752 return frame_unwind_got_constant (this_frame, regnum, pc);
244bc108 1753 }
15c1e57f 1754
004d836a 1755 else if (regnum == IA64_PSR_REGNUM)
244bc108 1756 {
15c1e57f
JB		 1757 /* We don't know how to get the complete previous PSR, but we need it
1758 for the slot information when we unwind the pc (pc is formed of IP
1759 register plus slot information from PSR). To get the previous
1760 slot information, we mask it off the return address. */
004d836a 1761 ULONGEST slot_num = 0;
15c1e57f 1762 CORE_ADDR pc = 0;
004d836a 1763 CORE_ADDR psr = 0;
4afcc598 1764 CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
004d836a 1765
15c1e57f 1766 get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
004d836a
JJ		 1767 psr = extract_unsigned_integer (buf, 8);
1768
4afcc598 1769 if (addr != 0)
244bc108 1770 {
088568da 1771 read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
004d836a 1772 pc = extract_unsigned_integer (buf, 8);
244bc108 1773 }
4afcc598 1774 else if (cache->frameless)
004d836a 1775 {
15c1e57f 1776 get_frame_register (this_frame, IA64_BR0_REGNUM, buf);
4afcc598 1777 pc = extract_unsigned_integer (buf, 8);
004d836a
JJ		 1778 }
1779 psr &= ~(3LL << 41);
1780 slot_num = pc & 0x3LL;
1781 psr |= (CORE_ADDR)slot_num << 41;
15c1e57f 1782 return frame_unwind_got_constant (this_frame, regnum, psr);
004d836a 1783 }
15c1e57f 1784
4afcc598
JJ		 1785 else if (regnum == IA64_BR0_REGNUM)
1786 {
4afcc598 1787 CORE_ADDR addr = cache->saved_regs[IA64_BR0_REGNUM];
15c1e57f 1788
4afcc598 1789 if (addr != 0)
15c1e57f
JB		 1790 return frame_unwind_got_memory (this_frame, regnum, addr);
1791
1792 return frame_unwind_got_constant (this_frame, regnum, 0);
4afcc598 1793 }
15c1e57f
JB		 1794
1795 else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM)
1796 || (regnum >= V32_REGNUM && regnum <= V127_REGNUM))
004d836a
JJ		 1797 {
1798 CORE_ADDR addr = 0;
15c1e57f 1799
004d836a
JJ		 1800 if (regnum >= V32_REGNUM)
1801 regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
1802 addr = cache->saved_regs[regnum];
244bc108 1803 if (addr != 0)
15c1e57f
JB		 1804 return frame_unwind_got_memory (this_frame, regnum, addr);
1805
1806 if (cache->frameless)
244bc108 1807 {
15c1e57f
JB		 1808 struct value *reg_val;
1809 CORE_ADDR prev_cfm, prev_bsp, prev_bof;
1810
1811 /* FIXME: brobecker/2008-05-01: Doesn't this seem redundant
1812 with the same code above? */
004d836a
JJ		 1813 if (regnum >= V32_REGNUM)
1814 regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
15c1e57f
JB		 1815 reg_val = ia64_frame_prev_register (this_frame, this_cache,
1816 IA64_CFM_REGNUM);
1817 prev_cfm = extract_unsigned_integer (value_contents_all (reg_val),
1818 8);
1819 reg_val = ia64_frame_prev_register (this_frame, this_cache,
1820 IA64_BSP_REGNUM);
1821 prev_bsp = extract_unsigned_integer (value_contents_all (reg_val),
1822 8);
004d836a
JJ		 1823 prev_bof = rse_address_add (prev_bsp, -(prev_cfm & 0x7f));
1824
1825 addr = rse_address_add (prev_bof, (regnum - IA64_GR32_REGNUM));
15c1e57f 1826 return frame_unwind_got_memory (this_frame, regnum, addr);
244bc108 1827 }
15c1e57f
JB		 1828
1829 return frame_unwind_got_constant (this_frame, regnum, 0);
16461d7d 1830 }
15c1e57f
JB		 1831
1832 else /* All other registers. */
16461d7d 1833 {
004d836a 1834 CORE_ADDR addr = 0;
15c1e57f 1835
3a854e23
KB		 1836 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1837 {
1838 /* Fetch floating point register rename base from current
004d836a
JJ		 1839 frame marker for this frame. */
1840 int rrb_fr = (cache->cfm >> 25) & 0x7f;
3a854e23
KB		 1841
1842 /* Adjust the floating point register number to account for
004d836a 1843 register rotation. */
3a854e23
KB		 1844 regnum = IA64_FR32_REGNUM
1845 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1846 }
1847
004d836a
JJ		 1848 /* If we have stored a memory address, access the register. */
1849 addr = cache->saved_regs[regnum];
1850 if (addr != 0)
15c1e57f 1851 return frame_unwind_got_memory (this_frame, regnum, addr);
004d836a
JJ		 1852 /* Otherwise, punt and get the current value of the register. */
1853 else
15c1e57f 1854 return frame_unwind_got_register (this_frame, regnum, regnum);
16461d7d 1855 }
16461d7d 1856}
004d836a
JJ		 1857
1858static const struct frame_unwind ia64_frame_unwind =
1859{
1860 NORMAL_FRAME,
1861 &ia64_frame_this_id,
15c1e57f
JB		 1862 &ia64_frame_prev_register,
1863 NULL,
1864 default_frame_sniffer
004d836a
JJ		 1865};
1866
004d836a
JJ		 1867/* Signal trampolines. */
1868
1869static void
15c1e57f 1870ia64_sigtramp_frame_init_saved_regs (struct frame_info *this_frame,
2685572f 1871 struct ia64_frame_cache *cache)
004d836a 1872{
15c1e57f 1873 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
2685572f
UW		 1874
1875 if (tdep->sigcontext_register_address)
004d836a
JJ		 1876 {
1877 int regno;
1878
1879 cache->saved_regs[IA64_VRAP_REGNUM] =
2685572f 1880 tdep->sigcontext_register_address (cache->base, IA64_IP_REGNUM);
004d836a 1881 cache->saved_regs[IA64_CFM_REGNUM] =
2685572f 1882 tdep->sigcontext_register_address (cache->base, IA64_CFM_REGNUM);
004d836a 1883 cache->saved_regs[IA64_PSR_REGNUM] =
2685572f 1884 tdep->sigcontext_register_address (cache->base, IA64_PSR_REGNUM);
004d836a 1885 cache->saved_regs[IA64_BSP_REGNUM] =
2685572f 1886 tdep->sigcontext_register_address (cache->base, IA64_BSP_REGNUM);
004d836a 1887 cache->saved_regs[IA64_RNAT_REGNUM] =
2685572f 1888 tdep->sigcontext_register_address (cache->base, IA64_RNAT_REGNUM);
004d836a 1889 cache->saved_regs[IA64_CCV_REGNUM] =
2685572f 1890 tdep->sigcontext_register_address (cache->base, IA64_CCV_REGNUM);
004d836a 1891 cache->saved_regs[IA64_UNAT_REGNUM] =
2685572f 1892 tdep->sigcontext_register_address (cache->base, IA64_UNAT_REGNUM);
004d836a 1893 cache->saved_regs[IA64_FPSR_REGNUM] =
2685572f 1894 tdep->sigcontext_register_address (cache->base, IA64_FPSR_REGNUM);
004d836a 1895 cache->saved_regs[IA64_PFS_REGNUM] =
2685572f 1896 tdep->sigcontext_register_address (cache->base, IA64_PFS_REGNUM);
004d836a 1897 cache->saved_regs[IA64_LC_REGNUM] =
2685572f 1898 tdep->sigcontext_register_address (cache->base, IA64_LC_REGNUM);
004d836a 1899 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
4afcc598 1900 cache->saved_regs[regno] =
2685572f 1901 tdep->sigcontext_register_address (cache->base, regno);
004d836a
JJ		 1902 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1903 cache->saved_regs[regno] =
2685572f 1904 tdep->sigcontext_register_address (cache->base, regno);
932644f0 1905 for (regno = IA64_FR2_REGNUM; regno <= IA64_FR31_REGNUM; regno++)
004d836a 1906 cache->saved_regs[regno] =
2685572f 1907 tdep->sigcontext_register_address (cache->base, regno);
004d836a
JJ		 1908 }
1909}
1910
1911static struct ia64_frame_cache *
15c1e57f 1912ia64_sigtramp_frame_cache (struct frame_info *this_frame, void **this_cache)
004d836a
JJ		 1913{
1914 struct ia64_frame_cache *cache;
1915 CORE_ADDR addr;
1916 char buf[8];
1917 int i;
1918
1919 if (*this_cache)
1920 return *this_cache;
1921
1922 cache = ia64_alloc_frame_cache ();
1923
15c1e57f 1924 get_frame_register (this_frame, sp_regnum, buf);
4afcc598
JJ		 1925 /* Note that frame size is hard-coded below. We cannot calculate it
1926 via prologue examination. */
1927 cache->base = extract_unsigned_integer (buf, 8) + 16;
1928
15c1e57f 1929 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
4afcc598
JJ		 1930 cache->bsp = extract_unsigned_integer (buf, 8);
1931
15c1e57f 1932 get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
4afcc598
JJ		 1933 cache->cfm = extract_unsigned_integer (buf, 8);
1934 cache->sof = cache->cfm & 0x7f;
004d836a 1935
15c1e57f 1936 ia64_sigtramp_frame_init_saved_regs (this_frame, cache);
004d836a
JJ		 1937
1938 *this_cache = cache;
1939 return cache;
1940}
1941
1942static void
15c1e57f
JB		 1943ia64_sigtramp_frame_this_id (struct frame_info *this_frame,
1944 void **this_cache, struct frame_id *this_id)
004d836a
JJ		 1945{
1946 struct ia64_frame_cache *cache =
15c1e57f 1947 ia64_sigtramp_frame_cache (this_frame, this_cache);
004d836a 1948
15c1e57f
JB		 1949 (*this_id) = frame_id_build_special (cache->base,
1950 get_frame_pc (this_frame),
1951 cache->bsp);
4afcc598
JJ		 1952 if (gdbarch_debug >= 1)
1953 fprintf_unfiltered (gdb_stdlog,
15c1e57f 1954 "sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, this_frame %p\n",
78ced177
JJ		 1955 paddr_nz (this_id->code_addr),
1956 paddr_nz (this_id->stack_addr),
15c1e57f 1957 paddr_nz (cache->bsp), this_frame);
004d836a
JJ		 1958}
1959
15c1e57f
JB		 1960static struct value *
1961ia64_sigtramp_frame_prev_register (struct frame_info *this_frame,
1962 void **this_cache, int regnum)
004d836a 1963{
4afcc598
JJ		 1964 char buf[MAX_REGISTER_SIZE];
1965
15c1e57f 1966 struct gdbarch *gdbarch = get_frame_arch (this_frame);
4afcc598 1967 struct ia64_frame_cache *cache =
15c1e57f 1968 ia64_sigtramp_frame_cache (this_frame, this_cache);
4afcc598
JJ		 1969
1970 gdb_assert (regnum >= 0);
1971
1972 if (!target_has_registers)
8a3fe4f8 1973 error (_("No registers."));
4afcc598 1974
4afcc598
JJ		 1975 if (regnum == IA64_IP_REGNUM)
1976 {
1977 CORE_ADDR pc = 0;
1978 CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
1979
1980 if (addr != 0)
1981 {
088568da 1982 read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
4afcc598
JJ		 1983 pc = extract_unsigned_integer (buf, 8);
1984 }
1985 pc &= ~0xf;
15c1e57f 1986 return frame_unwind_got_constant (this_frame, regnum, pc);
4afcc598 1987 }
15c1e57f
JB		 1988
1989 else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM)
1990 || (regnum >= V32_REGNUM && regnum <= V127_REGNUM))
4afcc598
JJ		 1991 {
1992 CORE_ADDR addr = 0;
15c1e57f 1993
4afcc598
JJ		 1994 if (regnum >= V32_REGNUM)
1995 regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
1996 addr = cache->saved_regs[regnum];
1997 if (addr != 0)
15c1e57f
JB		 1998 return frame_unwind_got_memory (this_frame, regnum, addr);
1999
2000 return frame_unwind_got_constant (this_frame, regnum, 0);
4afcc598 2001 }
15c1e57f
JB		 2002
2003 else /* All other registers not listed above. */
4afcc598 2004 {
4afcc598 2005 CORE_ADDR addr = cache->saved_regs[regnum];
15c1e57f 2006
4afcc598 2007 if (addr != 0)
15c1e57f 2008 return frame_unwind_got_memory (this_frame, regnum, addr);
004d836a 2009
15c1e57f
JB		 2010 return frame_unwind_got_constant (this_frame, regnum, 0);
2011 }
004d836a
JJ		 2012}
2013
15c1e57f
JB		 2014static int
2015ia64_sigtramp_frame_sniffer (const struct frame_unwind *self,
2016 struct frame_info *this_frame,
2017 void **this_cache)
004d836a 2018{
15c1e57f 2019 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
74174d2e
UW		 2020 if (tdep->pc_in_sigtramp)
2021 {
15c1e57f 2022 CORE_ADDR pc = get_frame_pc (this_frame);
004d836a 2023
74174d2e 2024 if (tdep->pc_in_sigtramp (pc))
15c1e57f 2025 return 1;
74174d2e 2026 }
004d836a 2027
15c1e57f 2028 return 0;
004d836a 2029}
15c1e57f
JB		 2030
2031static const struct frame_unwind ia64_sigtramp_frame_unwind =
2032{
2033 SIGTRAMP_FRAME,
2034 ia64_sigtramp_frame_this_id,
2035 ia64_sigtramp_frame_prev_register,
2036 NULL,
2037 ia64_sigtramp_frame_sniffer
2038};
2039
004d836a
JJ		 2040\f
2041
2042static CORE_ADDR
15c1e57f 2043ia64_frame_base_address (struct frame_info *this_frame, void **this_cache)
004d836a 2044{
15c1e57f 2045 struct ia64_frame_cache *cache = ia64_frame_cache (this_frame, this_cache);
004d836a
JJ		 2046
2047 return cache->base;
2048}
2049
2050static const struct frame_base ia64_frame_base =
2051{
2052 &ia64_frame_unwind,
2053 ia64_frame_base_address,
2054 ia64_frame_base_address,
2055 ia64_frame_base_address
2056};
16461d7d 2057
968d1cb4
JJ		 2058#ifdef HAVE_LIBUNWIND_IA64_H
2059
2060struct ia64_unwind_table_entry
2061 {
2062 unw_word_t start_offset;
2063 unw_word_t end_offset;
2064 unw_word_t info_offset;
2065 };
2066
2067static __inline__ uint64_t
2068ia64_rse_slot_num (uint64_t addr)
2069{
2070 return (addr >> 3) & 0x3f;
2071}
2072
2073/* Skip over a designated number of registers in the backing
2074 store, remembering every 64th position is for NAT. */
2075static __inline__ uint64_t
2076ia64_rse_skip_regs (uint64_t addr, long num_regs)
2077{
2078 long delta = ia64_rse_slot_num(addr) + num_regs;
2079
2080 if (num_regs < 0)
2081 delta -= 0x3e;
2082 return addr + ((num_regs + delta/0x3f) << 3);
2083}
2084
2085/* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2086 number to a libunwind register number. */
2087static int
2088ia64_gdb2uw_regnum (int regnum)
2089{
2090 if (regnum == sp_regnum)
2091 return UNW_IA64_SP;
2092 else if (regnum == IA64_BSP_REGNUM)
2093 return UNW_IA64_BSP;
2094 else if ((unsigned) (regnum - IA64_GR0_REGNUM) < 128)
2095 return UNW_IA64_GR + (regnum - IA64_GR0_REGNUM);
2096 else if ((unsigned) (regnum - V32_REGNUM) < 95)
2097 return UNW_IA64_GR + 32 + (regnum - V32_REGNUM);
2098 else if ((unsigned) (regnum - IA64_FR0_REGNUM) < 128)
2099 return UNW_IA64_FR + (regnum - IA64_FR0_REGNUM);
2100 else if ((unsigned) (regnum - IA64_PR0_REGNUM) < 64)
2101 return -1;
2102 else if ((unsigned) (regnum - IA64_BR0_REGNUM) < 8)
2103 return UNW_IA64_BR + (regnum - IA64_BR0_REGNUM);
2104 else if (regnum == IA64_PR_REGNUM)
2105 return UNW_IA64_PR;
2106 else if (regnum == IA64_IP_REGNUM)
2107 return UNW_REG_IP;
2108 else if (regnum == IA64_CFM_REGNUM)
2109 return UNW_IA64_CFM;
2110 else if ((unsigned) (regnum - IA64_AR0_REGNUM) < 128)
2111 return UNW_IA64_AR + (regnum - IA64_AR0_REGNUM);
2112 else if ((unsigned) (regnum - IA64_NAT0_REGNUM) < 128)
2113 return UNW_IA64_NAT + (regnum - IA64_NAT0_REGNUM);
2114 else
2115 return -1;
2116}
2117
2118/* Gdb libunwind-frame callback function to convert from a libunwind register
2119 number to a ia64 gdb register number. */
2120static int
2121ia64_uw2gdb_regnum (int uw_regnum)
2122{
2123 if (uw_regnum == UNW_IA64_SP)
2124 return sp_regnum;
2125 else if (uw_regnum == UNW_IA64_BSP)
2126 return IA64_BSP_REGNUM;
2127 else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 32)
2128 return IA64_GR0_REGNUM + (uw_regnum - UNW_IA64_GR);
2129 else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 128)
2130 return V32_REGNUM + (uw_regnum - (IA64_GR0_REGNUM + 32));
2131 else if ((unsigned) (uw_regnum - UNW_IA64_FR) < 128)
2132 return IA64_FR0_REGNUM + (uw_regnum - UNW_IA64_FR);
2133 else if ((unsigned) (uw_regnum - UNW_IA64_BR) < 8)
2134 return IA64_BR0_REGNUM + (uw_regnum - UNW_IA64_BR);
2135 else if (uw_regnum == UNW_IA64_PR)
2136 return IA64_PR_REGNUM;
2137 else if (uw_regnum == UNW_REG_IP)
2138 return IA64_IP_REGNUM;
2139 else if (uw_regnum == UNW_IA64_CFM)
2140 return IA64_CFM_REGNUM;
2141 else if ((unsigned) (uw_regnum - UNW_IA64_AR) < 128)
2142 return IA64_AR0_REGNUM + (uw_regnum - UNW_IA64_AR);
2143 else if ((unsigned) (uw_regnum - UNW_IA64_NAT) < 128)
2144 return IA64_NAT0_REGNUM + (uw_regnum - UNW_IA64_NAT);
2145 else
2146 return -1;
2147}
2148
2149/* Gdb libunwind-frame callback function to reveal if register is a float
2150 register or not. */
2151static int
2152ia64_is_fpreg (int uw_regnum)
2153{
2154 return unw_is_fpreg (uw_regnum);
2155}
2156
2157/* Libunwind callback accessor function for general registers. */
2158static int
2159ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val,
2160 int write, void *arg)
2161{
2162 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2163 unw_word_t bsp, sof, sol, cfm, psr, ip;
15c1e57f 2164 struct frame_info *this_frame = arg;
968d1cb4
JJ		 2165 long new_sof, old_sof;
2166 char buf[MAX_REGISTER_SIZE];
2167
45ecac4b
UW		 2168 /* We never call any libunwind routines that need to write registers. */
2169 gdb_assert (!write);
968d1cb4 2170
45ecac4b 2171 switch (uw_regnum)
968d1cb4 2172 {
45ecac4b
UW		 2173 case UNW_REG_IP:
2174 /* Libunwind expects to see the pc value which means the slot number
2175 from the psr must be merged with the ip word address. */
15c1e57f 2176 get_frame_register (this_frame, IA64_IP_REGNUM, buf);
45ecac4b 2177 ip = extract_unsigned_integer (buf, 8);
15c1e57f 2178 get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
45ecac4b
UW		 2179 psr = extract_unsigned_integer (buf, 8);
2180 *val = ip | ((psr >> 41) & 0x3);
2181 break;
2182
2183 case UNW_IA64_AR_BSP:
2184 /* Libunwind expects to see the beginning of the current register
2185 frame so we must account for the fact that ptrace() will return a value
2186 for bsp that points *after* the current register frame. */
15c1e57f 2187 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
45ecac4b 2188 bsp = extract_unsigned_integer (buf, 8);
15c1e57f 2189 get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
45ecac4b
UW		 2190 cfm = extract_unsigned_integer (buf, 8);
2191 sof = (cfm & 0x7f);
2192 *val = ia64_rse_skip_regs (bsp, -sof);
2193 break;
968d1cb4 2194
45ecac4b
UW		 2195 case UNW_IA64_AR_BSPSTORE:
2196 /* Libunwind wants bspstore to be after the current register frame.
2197 This is what ptrace() and gdb treats as the regular bsp value. */
15c1e57f 2198 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
45ecac4b
UW		 2199 *val = extract_unsigned_integer (buf, 8);
2200 break;
2201
2202 default:
2203 /* For all other registers, just unwind the value directly. */
15c1e57f 2204 get_frame_register (this_frame, regnum, buf);
45ecac4b
UW		 2205 *val = extract_unsigned_integer (buf, 8);
2206 break;
968d1cb4 2207 }
45ecac4b
UW		 2208
2209 if (gdbarch_debug >= 1)
2210 fprintf_unfiltered (gdb_stdlog,
2211 " access_reg: from cache: %4s=0x%s\n",
2212 (((unsigned) regnum <= IA64_NAT127_REGNUM)
2213 ? ia64_register_names[regnum] : "r??"),
2214 paddr_nz (*val));
968d1cb4
JJ		 2215 return 0;
2216}
2217
2218/* Libunwind callback accessor function for floating-point registers. */
2219static int
2220ia64_access_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_fpreg_t *val,
2221 int write, void *arg)
2222{
2223 int regnum = ia64_uw2gdb_regnum (uw_regnum);
15c1e57f 2224 struct frame_info *this_frame = arg;
968d1cb4 2225
45ecac4b
UW		 2226 /* We never call any libunwind routines that need to write registers. */
2227 gdb_assert (!write);
2228
15c1e57f 2229 get_frame_register (this_frame, regnum, (char *) val);
45ecac4b 2230
968d1cb4
JJ		 2231 return 0;
2232}
2233
c5a27d9c
JJ		 2234/* Libunwind callback accessor function for top-level rse registers. */
2235static int
2236ia64_access_rse_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val,
2237 int write, void *arg)
2238{
2239 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2240 unw_word_t bsp, sof, sol, cfm, psr, ip;
45ecac4b 2241 struct regcache *regcache = arg;
c5a27d9c 2242 long new_sof, old_sof;
45ecac4b 2243 char buf[MAX_REGISTER_SIZE];
c5a27d9c 2244
45ecac4b
UW		 2245 /* We never call any libunwind routines that need to write registers. */
2246 gdb_assert (!write);
c5a27d9c 2247
45ecac4b 2248 switch (uw_regnum)
c5a27d9c 2249 {
45ecac4b
UW		 2250 case UNW_REG_IP:
2251 /* Libunwind expects to see the pc value which means the slot number
2252 from the psr must be merged with the ip word address. */
2253 regcache_cooked_read (regcache, IA64_IP_REGNUM, buf);
2254 ip = extract_unsigned_integer (buf, 8);
2255 regcache_cooked_read (regcache, IA64_PSR_REGNUM, buf);
2256 psr = extract_unsigned_integer (buf, 8);
2257 *val = ip | ((psr >> 41) & 0x3);
2258 break;
c5a27d9c 2259
45ecac4b
UW		 2260 case UNW_IA64_AR_BSP:
2261 /* Libunwind expects to see the beginning of the current register
2262 frame so we must account for the fact that ptrace() will return a value
2263 for bsp that points *after* the current register frame. */
2264 regcache_cooked_read (regcache, IA64_BSP_REGNUM, buf);
2265 bsp = extract_unsigned_integer (buf, 8);
2266 regcache_cooked_read (regcache, IA64_CFM_REGNUM, buf);
2267 cfm = extract_unsigned_integer (buf, 8);
2268 sof = (cfm & 0x7f);
2269 *val = ia64_rse_skip_regs (bsp, -sof);
2270 break;
c5a27d9c 2271
45ecac4b
UW		 2272 case UNW_IA64_AR_BSPSTORE:
2273 /* Libunwind wants bspstore to be after the current register frame.
2274 This is what ptrace() and gdb treats as the regular bsp value. */
2275 regcache_cooked_read (regcache, IA64_BSP_REGNUM, buf);
2276 *val = extract_unsigned_integer (buf, 8);
2277 break;
c5a27d9c 2278
45ecac4b
UW		 2279 default:
2280 /* For all other registers, just unwind the value directly. */
2281 regcache_cooked_read (regcache, regnum, buf);
2282 *val = extract_unsigned_integer (buf, 8);
2283 break;
c5a27d9c
JJ		 2284 }
2285
2286 if (gdbarch_debug >= 1)
2287 fprintf_unfiltered (gdb_stdlog,
2288 " access_rse_reg: from cache: %4s=0x%s\n",
2289 (((unsigned) regnum <= IA64_NAT127_REGNUM)
2290 ? ia64_register_names[regnum] : "r??"),
2291 paddr_nz (*val));
2292
2293 return 0;
2294}
2295
45ecac4b
UW		 2296/* Libunwind callback accessor function for top-level fp registers. */
2297static int
2298ia64_access_rse_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum,
2299 unw_fpreg_t *val, int write, void *arg)
2300{
2301 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2302 struct regcache *regcache = arg;
2303
2304 /* We never call any libunwind routines that need to write registers. */
2305 gdb_assert (!write);
2306
2307 regcache_cooked_read (regcache, regnum, (char *) val);
2308
2309 return 0;
2310}
2311
968d1cb4
JJ		 2312/* Libunwind callback accessor function for accessing memory. */
2313static int
2314ia64_access_mem (unw_addr_space_t as,
2315 unw_word_t addr, unw_word_t *val,
2316 int write, void *arg)
2317{
c5a27d9c
JJ		 2318 if (addr - KERNEL_START < ktab_size)
2319 {
2320 unw_word_t *laddr = (unw_word_t*) ((char *) ktab
2321 + (addr - KERNEL_START));
2322
2323 if (write)
2324 *laddr = *val;
2325 else
2326 *val = *laddr;
2327 return 0;
2328 }
2329
968d1cb4
JJ		 2330 /* XXX do we need to normalize byte-order here? */
2331 if (write)
2332 return target_write_memory (addr, (char *) val, sizeof (unw_word_t));
2333 else
2334 return target_read_memory (addr, (char *) val, sizeof (unw_word_t));
2335}
2336
2337/* Call low-level function to access the kernel unwind table. */
13547ab6
DJ		 2338static LONGEST
2339getunwind_table (gdb_byte **buf_p)
968d1cb4
JJ		 2340{
2341 LONGEST x;
c5a27d9c 2342
10d6c8cd
DJ		 2343 /* FIXME drow/2005-09-10: This code used to call
2344 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2345 for the currently running ia64-linux kernel. That data should
2346 come from the core file and be accessed via the auxv vector; if
2347 we want to preserve fall back to the running kernel's table, then
2348 we should find a way to override the corefile layer's
2349 xfer_partial method. */
968d1cb4 2350
13547ab6
DJ		 2351 x = target_read_alloc (&current_target, TARGET_OBJECT_UNWIND_TABLE,
2352 NULL, buf_p);
2353
2354 return x;
968d1cb4 2355}
10d6c8cd 2356
968d1cb4
JJ		 2357/* Get the kernel unwind table. */
2358static int
2359get_kernel_table (unw_word_t ip, unw_dyn_info_t *di)
2360{
c5a27d9c 2361 static struct ia64_table_entry *etab;
968d1cb4 2362
c5a27d9c 2363 if (!ktab)
968d1cb4 2364 {
13547ab6 2365 gdb_byte *ktab_buf;
eeec829c 2366 LONGEST size;
13547ab6 2367
eeec829c
DJ		 2368 size = getunwind_table (&ktab_buf);
2369 if (size <= 0)
13547ab6 2370 return -UNW_ENOINFO;
eeec829c
DJ		 2371
2372 ktab = (struct ia64_table_entry *) ktab_buf;
2373 ktab_size = size;
13547ab6 2374
968d1cb4 2375 for (etab = ktab; etab->start_offset; ++etab)
c5a27d9c 2376 etab->info_offset += KERNEL_START;
968d1cb4
JJ		 2377 }
2378
2379 if (ip < ktab[0].start_offset || ip >= etab[-1].end_offset)
2380 return -UNW_ENOINFO;
2381
2382 di->format = UNW_INFO_FORMAT_TABLE;
2383 di->gp = 0;
2384 di->start_ip = ktab[0].start_offset;
2385 di->end_ip = etab[-1].end_offset;
2386 di->u.ti.name_ptr = (unw_word_t) "<kernel>";
2387 di->u.ti.segbase = 0;
2388 di->u.ti.table_len = ((char *) etab - (char *) ktab) / sizeof (unw_word_t);
2389 di->u.ti.table_data = (unw_word_t *) ktab;
2390
2391 if (gdbarch_debug >= 1)
2392 fprintf_unfiltered (gdb_stdlog, "get_kernel_table: found table `%s': "
78ced177
JJ		 2393 "segbase=0x%s, length=%s, gp=0x%s\n",
2394 (char *) di->u.ti.name_ptr,
2395 paddr_nz (di->u.ti.segbase),
623d3eb1 2396 pulongest (di->u.ti.table_len),
78ced177 2397 paddr_nz (di->gp));
968d1cb4
JJ		 2398 return 0;
2399}
2400
2401/* Find the unwind table entry for a specified address. */
2402static int
2403ia64_find_unwind_table (struct objfile *objfile, unw_word_t ip,
2404 unw_dyn_info_t *dip, void **buf)
2405{
2406 Elf_Internal_Phdr *phdr, *p_text = NULL, *p_unwind = NULL;
2407 Elf_Internal_Ehdr *ehdr;
2408 unw_word_t segbase = 0;
2409 CORE_ADDR load_base;
2410 bfd *bfd;
2411 int i;
2412
2413 bfd = objfile->obfd;
2414
2415 ehdr = elf_tdata (bfd)->elf_header;
2416 phdr = elf_tdata (bfd)->phdr;
2417
2418 load_base = ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT (objfile));
2419
2420 for (i = 0; i < ehdr->e_phnum; ++i)
2421 {
2422 switch (phdr[i].p_type)
2423 {
2424 case PT_LOAD:
2425 if ((unw_word_t) (ip - load_base - phdr[i].p_vaddr)
2426 < phdr[i].p_memsz)
2427 p_text = phdr + i;
2428 break;
2429
2430 case PT_IA_64_UNWIND:
2431 p_unwind = phdr + i;
2432 break;
2433
2434 default:
2435 break;
2436 }
2437 }
2438
c5a27d9c 2439 if (!p_text || !p_unwind)
968d1cb4
JJ		 2440 return -UNW_ENOINFO;
2441
c5a27d9c
JJ		 2442 /* Verify that the segment that contains the IP also contains
2443 the static unwind table. If not, we may be in the Linux kernel's
2444 DSO gate page in which case the unwind table is another segment.
2445 Otherwise, we are dealing with runtime-generated code, for which we
2446 have no info here. */
968d1cb4
JJ		 2447 segbase = p_text->p_vaddr + load_base;
2448
c5a27d9c
JJ		 2449 if ((p_unwind->p_vaddr - p_text->p_vaddr) >= p_text->p_memsz)
2450 {
2451 int ok = 0;
2452 for (i = 0; i < ehdr->e_phnum; ++i)
2453 {
2454 if (phdr[i].p_type == PT_LOAD
2455 && (p_unwind->p_vaddr - phdr[i].p_vaddr) < phdr[i].p_memsz)
2456 {
2457 ok = 1;
2458 /* Get the segbase from the section containing the
2459 libunwind table. */
2460 segbase = phdr[i].p_vaddr + load_base;
2461 }
2462 }
2463 if (!ok)
2464 return -UNW_ENOINFO;
2465 }
2466
2467 dip->start_ip = p_text->p_vaddr + load_base;
968d1cb4 2468 dip->end_ip = dip->start_ip + p_text->p_memsz;
b33e8514 2469 dip->gp = ia64_find_global_pointer (ip);
503ff15d
KB		 2470 dip->format = UNW_INFO_FORMAT_REMOTE_TABLE;
2471 dip->u.rti.name_ptr = (unw_word_t) bfd_get_filename (bfd);
2472 dip->u.rti.segbase = segbase;
2473 dip->u.rti.table_len = p_unwind->p_memsz / sizeof (unw_word_t);
2474 dip->u.rti.table_data = p_unwind->p_vaddr + load_base;
968d1cb4
JJ		 2475
2476 return 0;
2477}
2478
2479/* Libunwind callback accessor function to acquire procedure unwind-info. */
2480static int
2481ia64_find_proc_info_x (unw_addr_space_t as, unw_word_t ip, unw_proc_info_t *pi,
2482 int need_unwind_info, void *arg)
2483{
2484 struct obj_section *sec = find_pc_section (ip);
2485 unw_dyn_info_t di;
2486 int ret;
2487 void *buf = NULL;
2488
2489 if (!sec)
2490 {
2491 /* XXX This only works if the host and the target architecture are
2492 both ia64 and if the have (more or less) the same kernel
2493 version. */
2494 if (get_kernel_table (ip, &di) < 0)
2495 return -UNW_ENOINFO;
503ff15d
KB		 2496
2497 if (gdbarch_debug >= 1)
78ced177
JJ		 2498 fprintf_unfiltered (gdb_stdlog, "ia64_find_proc_info_x: 0x%s -> "
2499 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2500 "length=%s,data=0x%s)\n",
2501 paddr_nz (ip), (char *)di.u.ti.name_ptr,
2502 paddr_nz (di.u.ti.segbase),
2503 paddr_nz (di.start_ip), paddr_nz (di.end_ip),
2504 paddr_nz (di.gp),
623d3eb1 2505 pulongest (di.u.ti.table_len),
78ced177 2506 paddr_nz ((CORE_ADDR)di.u.ti.table_data));
968d1cb4
JJ		 2507 }
2508 else
2509 {
2510 ret = ia64_find_unwind_table (sec->objfile, ip, &di, &buf);
2511 if (ret < 0)
2512 return ret;
968d1cb4 2513
503ff15d 2514 if (gdbarch_debug >= 1)
78ced177
JJ		 2515 fprintf_unfiltered (gdb_stdlog, "ia64_find_proc_info_x: 0x%s -> "
2516 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2517 "length=%s,data=0x%s)\n",
2518 paddr_nz (ip), (char *)di.u.rti.name_ptr,
2519 paddr_nz (di.u.rti.segbase),
2520 paddr_nz (di.start_ip), paddr_nz (di.end_ip),
2521 paddr_nz (di.gp),
623d3eb1 2522 pulongest (di.u.rti.table_len),
78ced177 2523 paddr_nz (di.u.rti.table_data));
503ff15d 2524 }
968d1cb4 2525
503ff15d
KB		 2526 ret = libunwind_search_unwind_table (&as, ip, &di, pi, need_unwind_info,
2527 arg);
968d1cb4
JJ		 2528
2529 /* We no longer need the dyn info storage so free it. */
2530 xfree (buf);
2531
2532 return ret;
2533}
2534
2535/* Libunwind callback accessor function for cleanup. */
2536static void
2537ia64_put_unwind_info (unw_addr_space_t as,
2538 unw_proc_info_t *pip, void *arg)
2539{
2540 /* Nothing required for now. */
2541}
2542
2543/* Libunwind callback accessor function to get head of the dynamic
2544 unwind-info registration list. */
2545static int
2546ia64_get_dyn_info_list (unw_addr_space_t as,
2547 unw_word_t *dilap, void *arg)
2548{
2549 struct obj_section *text_sec;
2550 struct objfile *objfile;
2551 unw_word_t ip, addr;
2552 unw_dyn_info_t di;
2553 int ret;
2554
2555 if (!libunwind_is_initialized ())
2556 return -UNW_ENOINFO;
2557
2558 for (objfile = object_files; objfile; objfile = objfile->next)
2559 {
2560 void *buf = NULL;
2561
2562 text_sec = objfile->sections + SECT_OFF_TEXT (objfile);
8b7a6d61 2563 ip = obj_section_addr (text_sec);
968d1cb4
JJ		 2564 ret = ia64_find_unwind_table (objfile, ip, &di, &buf);
2565 if (ret >= 0)
2566 {
503ff15d 2567 addr = libunwind_find_dyn_list (as, &di, arg);
968d1cb4
JJ		 2568 /* We no longer need the dyn info storage so free it. */
2569 xfree (buf);
2570
2571 if (addr)
2572 {
2573 if (gdbarch_debug >= 1)
2574 fprintf_unfiltered (gdb_stdlog,
2575 "dynamic unwind table in objfile %s "
78ced177 2576 "at 0x%s (gp=0x%s)\n",
968d1cb4 2577 bfd_get_filename (objfile->obfd),
78ced177 2578 paddr_nz (addr), paddr_nz (di.gp));
968d1cb4
JJ		 2579 *dilap = addr;
2580 return 0;
2581 }
2582 }
2583 }
2584 return -UNW_ENOINFO;
2585}
2586
2587
2588/* Frame interface functions for libunwind. */
2589
2590static void
15c1e57f 2591ia64_libunwind_frame_this_id (struct frame_info *this_frame, void **this_cache,
7166c4a9 2592 struct frame_id *this_id)
968d1cb4 2593{
15c1e57f 2594 struct frame_id id;
968d1cb4
JJ		 2595 char buf[8];
2596 CORE_ADDR bsp;
c5a27d9c 2597
968d1cb4 2598
15c1e57f 2599 libunwind_frame_this_id (this_frame, this_cache, &id);
c5a27d9c
JJ		 2600 if (frame_id_eq (id, null_frame_id))
2601 {
2602 (*this_id) = null_frame_id;
2603 return;
2604 }
968d1cb4 2605
c5a27d9c
JJ		 2606 /* We must add the bsp as the special address for frame comparison
2607 purposes. */
15c1e57f 2608 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
968d1cb4
JJ		 2609 bsp = extract_unsigned_integer (buf, 8);
2610
15c1e57f 2611 (*this_id) = frame_id_build_special (id.stack_addr, id.code_addr, bsp);
968d1cb4
JJ		 2612
2613 if (gdbarch_debug >= 1)
2614 fprintf_unfiltered (gdb_stdlog,
15c1e57f 2615 "libunwind frame id: code 0x%s, stack 0x%s, special 0x%s, this_frame %p\n",
78ced177 2616 paddr_nz (id.code_addr), paddr_nz (id.stack_addr),
15c1e57f 2617 paddr_nz (bsp), this_frame);
968d1cb4
JJ		 2618}
2619
15c1e57f
JB		 2620static struct value *
2621ia64_libunwind_frame_prev_register (struct frame_info *this_frame,
2622 void **this_cache, int regnum)
968d1cb4
JJ		 2623{
2624 int reg = regnum;
15c1e57f
JB		 2625 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2626 struct value *val;
968d1cb4
JJ		 2627
2628 if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
2629 reg = IA64_PR_REGNUM;
2630 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
2631 reg = IA64_UNAT_REGNUM;
2632
2633 /* Let libunwind do most of the work. */
15c1e57f 2634 val = libunwind_frame_prev_register (this_frame, this_cache, reg);
6672f2ae 2635
968d1cb4
JJ		 2636 if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
2637 {
2638 ULONGEST prN_val;
2639
2640 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
2641 {
2642 int rrb_pr = 0;
2643 ULONGEST cfm;
2644 unsigned char buf[MAX_REGISTER_SIZE];
2645
2646 /* Fetch predicate register rename base from current frame
2647 marker for this frame. */
15c1e57f 2648 get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
968d1cb4
JJ		 2649 cfm = extract_unsigned_integer (buf, 8);
2650 rrb_pr = (cfm >> 32) & 0x3f;
2651
2652 /* Adjust the register number to account for register rotation. */
15c1e57f 2653 regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
968d1cb4 2654 }
15c1e57f 2655 prN_val = extract_bit_field (value_contents_all (val),
968d1cb4 2656 regnum - VP0_REGNUM, 1);
15c1e57f 2657 return frame_unwind_got_constant (this_frame, regnum, prN_val);
968d1cb4 2658 }
15c1e57f 2659
968d1cb4
JJ		 2660 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
2661 {
2662 ULONGEST unatN_val;
2663
15c1e57f
JB		 2664 unatN_val = extract_bit_field (value_contents_all (val),
2665 regnum - IA64_NAT0_REGNUM, 1);
2666 return frame_unwind_got_constant (this_frame, regnum, unatN_val);
968d1cb4 2667 }
15c1e57f 2668
968d1cb4
JJ		 2669 else if (regnum == IA64_BSP_REGNUM)
2670 {
15c1e57f
JB		 2671 struct value *cfm_val;
2672 CORE_ADDR prev_bsp, prev_cfm;
2673
2674 /* We want to calculate the previous bsp as the end of the previous
2675 register stack frame. This corresponds to what the hardware bsp
2676 register will be if we pop the frame back which is why we might
2677 have been called. We know that libunwind will pass us back the
2678 beginning of the current frame so we should just add sof to it. */
2679 prev_bsp = extract_unsigned_integer (value_contents_all (val), 8);
2680 cfm_val = libunwind_frame_prev_register (this_frame, this_cache,
2681 IA64_CFM_REGNUM);
2682 prev_cfm = extract_unsigned_integer (value_contents_all (cfm_val), 8);
968d1cb4
JJ		 2683 prev_bsp = rse_address_add (prev_bsp, (prev_cfm & 0x7f));
2684
15c1e57f 2685 return frame_unwind_got_constant (this_frame, regnum, prev_bsp);
968d1cb4 2686 }
15c1e57f
JB		 2687 else
2688 return val;
2689}
968d1cb4 2690
15c1e57f
JB		 2691static int
2692ia64_libunwind_frame_sniffer (const struct frame_unwind *self,
2693 struct frame_info *this_frame,
2694 void **this_cache)
2695{
2696 if (libunwind_is_initialized ()
2697 && libunwind_frame_sniffer (self, this_frame, this_cache))
2698 return 1;
2699
2700 return 0;
968d1cb4
JJ		 2701}
2702
2703static const struct frame_unwind ia64_libunwind_frame_unwind =
2704{
2705 NORMAL_FRAME,
2706 ia64_libunwind_frame_this_id,
272dfcfd
AS		 2707 ia64_libunwind_frame_prev_register,
2708 NULL,
15c1e57f 2709 ia64_libunwind_frame_sniffer,
272dfcfd 2710 libunwind_frame_dealloc_cache
968d1cb4
JJ		 2711};
2712
c5a27d9c 2713static void
15c1e57f
JB		 2714ia64_libunwind_sigtramp_frame_this_id (struct frame_info *this_frame,
2715 void **this_cache,
c5a27d9c
JJ		 2716 struct frame_id *this_id)
2717{
2718 char buf[8];
2719 CORE_ADDR bsp;
2720 struct frame_id id;
2721 CORE_ADDR prev_ip;
2722
15c1e57f 2723 libunwind_frame_this_id (this_frame, this_cache, &id);
c5a27d9c
JJ		 2724 if (frame_id_eq (id, null_frame_id))
2725 {
2726 (*this_id) = null_frame_id;
2727 return;
2728 }
2729
2730 /* We must add the bsp as the special address for frame comparison
2731 purposes. */
15c1e57f 2732 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
c5a27d9c
JJ		 2733 bsp = extract_unsigned_integer (buf, 8);
2734
2735 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
2736 (*this_id) = frame_id_build_special (id.stack_addr, id.code_addr, bsp);
2737
2738 if (gdbarch_debug >= 1)
2739 fprintf_unfiltered (gdb_stdlog,
15c1e57f 2740 "libunwind sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, this_frame %p\n",
c5a27d9c 2741 paddr_nz (id.code_addr), paddr_nz (id.stack_addr),
15c1e57f 2742 paddr_nz (bsp), this_frame);
c5a27d9c
JJ		 2743}
2744
15c1e57f
JB		 2745static struct value *
2746ia64_libunwind_sigtramp_frame_prev_register (struct frame_info *this_frame,
2747 void **this_cache, int regnum)
c5a27d9c 2748{
15c1e57f
JB		 2749 struct value *prev_ip_val;
2750 CORE_ADDR prev_ip;
c5a27d9c
JJ		 2751
2752 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
2753 method of getting previous registers. */
15c1e57f
JB		 2754 prev_ip_val = libunwind_frame_prev_register (this_frame, this_cache,
2755 IA64_IP_REGNUM);
2756 prev_ip = extract_unsigned_integer (value_contents_all (prev_ip_val), 8);
c5a27d9c
JJ		 2757
2758 if (prev_ip == 0)
2759 {
2760 void *tmp_cache = NULL;
15c1e57f
JB		 2761 return ia64_sigtramp_frame_prev_register (this_frame, &tmp_cache,
2762 regnum);
c5a27d9c
JJ		 2763 }
2764 else
15c1e57f 2765 return ia64_libunwind_frame_prev_register (this_frame, this_cache, regnum);
c5a27d9c
JJ		 2766}
2767
15c1e57f
JB		 2768static int
2769ia64_libunwind_sigtramp_frame_sniffer (const struct frame_unwind *self,
2770 struct frame_info *this_frame,
2771 void **this_cache)
c5a27d9c
JJ		 2772{
2773 if (libunwind_is_initialized ())
2774 {
15c1e57f
JB		 2775 if (libunwind_sigtramp_frame_sniffer (self, this_frame, this_cache))
2776 return 1;
2777 return 0;
c5a27d9c
JJ		 2778 }
2779 else
15c1e57f 2780 return ia64_sigtramp_frame_sniffer (self, this_frame, this_cache);
c5a27d9c
JJ		 2781}
2782
15c1e57f
JB		 2783static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind =
2784{
2785 SIGTRAMP_FRAME,
2786 ia64_libunwind_sigtramp_frame_this_id,
2787 ia64_libunwind_sigtramp_frame_prev_register,
2788 NULL,
2789 ia64_libunwind_sigtramp_frame_sniffer
2790};
2791
968d1cb4
JJ		 2792/* Set of libunwind callback acccessor functions. */
2793static unw_accessors_t ia64_unw_accessors =
2794{
2795 ia64_find_proc_info_x,
2796 ia64_put_unwind_info,
2797 ia64_get_dyn_info_list,
2798 ia64_access_mem,
2799 ia64_access_reg,
2800 ia64_access_fpreg,
2801 /* resume */
2802 /* get_proc_name */
2803};
2804
c5a27d9c
JJ		 2805/* Set of special libunwind callback acccessor functions specific for accessing
2806 the rse registers. At the top of the stack, we want libunwind to figure out
2807 how to read r32 - r127. Though usually they are found sequentially in memory
2808 starting from $bof, this is not always true. */
2809static unw_accessors_t ia64_unw_rse_accessors =
2810{
2811 ia64_find_proc_info_x,
2812 ia64_put_unwind_info,
2813 ia64_get_dyn_info_list,
2814 ia64_access_mem,
2815 ia64_access_rse_reg,
45ecac4b 2816 ia64_access_rse_fpreg,
c5a27d9c
JJ		 2817 /* resume */
2818 /* get_proc_name */
2819};
2820
968d1cb4
JJ		 2821/* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2822static struct libunwind_descr ia64_libunwind_descr =
2823{
2824 ia64_gdb2uw_regnum,
2825 ia64_uw2gdb_regnum,
2826 ia64_is_fpreg,
2827 &ia64_unw_accessors,
c5a27d9c 2828 &ia64_unw_rse_accessors,
968d1cb4
JJ		 2829};
2830
2831#endif /* HAVE_LIBUNWIND_IA64_H */
2832
4c8b6ae0
UW		 2833static int
2834ia64_use_struct_convention (struct type *type)
16461d7d 2835{
64a5b29c
KB		 2836 struct type *float_elt_type;
2837
4c8b6ae0
UW		 2838 /* Don't use the struct convention for anything but structure,
2839 union, or array types. */
2840 if (!(TYPE_CODE (type) == TYPE_CODE_STRUCT
2841 || TYPE_CODE (type) == TYPE_CODE_UNION
2842 || TYPE_CODE (type) == TYPE_CODE_ARRAY))
2843 return 0;
2844
64a5b29c
KB		 2845 /* HFAs are structures (or arrays) consisting entirely of floating
2846 point values of the same length. Up to 8 of these are returned
2847 in registers. Don't use the struct convention when this is the
004d836a 2848 case. */
64a5b29c
KB		 2849 float_elt_type = is_float_or_hfa_type (type);
2850 if (float_elt_type != NULL
2851 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
2852 return 0;
2853
2854 /* Other structs of length 32 or less are returned in r8-r11.
004d836a 2855 Don't use the struct convention for those either. */
16461d7d
KB		 2856 return TYPE_LENGTH (type) > 32;
2857}
2858
4c8b6ae0 2859static void
2d522557
AC		 2860ia64_extract_return_value (struct type *type, struct regcache *regcache,
2861 gdb_byte *valbuf)
16461d7d 2862{
64a5b29c
KB		 2863 struct type *float_elt_type;
2864
2865 float_elt_type = is_float_or_hfa_type (type);
2866 if (float_elt_type != NULL)
2867 {
004d836a 2868 char from[MAX_REGISTER_SIZE];
64a5b29c
KB		 2869 int offset = 0;
2870 int regnum = IA64_FR8_REGNUM;
2871 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
2872
2873 while (n-- > 0)
2874 {
004d836a
JJ		 2875 regcache_cooked_read (regcache, regnum, from);
2876 convert_typed_floating (from, builtin_type_ia64_ext,
2877 (char *)valbuf + offset, float_elt_type);
64a5b29c
KB		 2878 offset += TYPE_LENGTH (float_elt_type);
2879 regnum++;
2880 }
2881 }
16461d7d 2882 else
004d836a
JJ		 2883 {
2884 ULONGEST val;
2885 int offset = 0;
2886 int regnum = IA64_GR8_REGNUM;
7b9ee6a8
DJ		 2887 int reglen = TYPE_LENGTH (register_type (get_regcache_arch (regcache),
2888 IA64_GR8_REGNUM));
004d836a
JJ		 2889 int n = TYPE_LENGTH (type) / reglen;
2890 int m = TYPE_LENGTH (type) % reglen;
16461d7d 2891
004d836a
JJ		 2892 while (n-- > 0)
2893 {
2894 ULONGEST val;
2895 regcache_cooked_read_unsigned (regcache, regnum, &val);
2896 memcpy ((char *)valbuf + offset, &val, reglen);
2897 offset += reglen;
2898 regnum++;
2899 }
16461d7d 2900
004d836a
JJ		 2901 if (m)
2902 {
2903 regcache_cooked_read_unsigned (regcache, regnum, &val);
2904 memcpy ((char *)valbuf + offset, &val, m);
2905 }
2906 }
16461d7d
KB		 2907}
2908
4c8b6ae0
UW		 2909static void
2910ia64_store_return_value (struct type *type, struct regcache *regcache,
2911 const gdb_byte *valbuf)
2912{
2913 struct type *float_elt_type;
2914
2915 float_elt_type = is_float_or_hfa_type (type);
2916 if (float_elt_type != NULL)
2917 {
2918 char to[MAX_REGISTER_SIZE];
2919 int offset = 0;
2920 int regnum = IA64_FR8_REGNUM;
2921 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
2922
2923 while (n-- > 0)
2924 {
2925 convert_typed_floating ((char *)valbuf + offset, float_elt_type,
2926 to, builtin_type_ia64_ext);
2927 regcache_cooked_write (regcache, regnum, to);
2928 offset += TYPE_LENGTH (float_elt_type);
2929 regnum++;
2930 }
2931 }
2932 else
2933 {
2934 ULONGEST val;
2935 int offset = 0;
2936 int regnum = IA64_GR8_REGNUM;
2937 int reglen = TYPE_LENGTH (register_type (get_regcache_arch (regcache),
2938 IA64_GR8_REGNUM));
2939 int n = TYPE_LENGTH (type) / reglen;
2940 int m = TYPE_LENGTH (type) % reglen;
2941
2942 while (n-- > 0)
2943 {
2944 ULONGEST val;
2945 memcpy (&val, (char *)valbuf + offset, reglen);
2946 regcache_cooked_write_unsigned (regcache, regnum, val);
2947 offset += reglen;
2948 regnum++;
2949 }
2950
2951 if (m)
2952 {
2953 memcpy (&val, (char *)valbuf + offset, m);
2954 regcache_cooked_write_unsigned (regcache, regnum, val);
2955 }
2956 }
2957}
2958
2959static enum return_value_convention
c055b101
CV		 2960ia64_return_value (struct gdbarch *gdbarch, struct type *func_type,
2961 struct type *valtype, struct regcache *regcache,
2962 gdb_byte *readbuf, const gdb_byte *writebuf)
4c8b6ae0
UW		 2963{
2964 int struct_return = ia64_use_struct_convention (valtype);
2965
2966 if (writebuf != NULL)
2967 {
2968 gdb_assert (!struct_return);
2969 ia64_store_return_value (valtype, regcache, writebuf);
2970 }
2971
2972 if (readbuf != NULL)
2973 {
2974 gdb_assert (!struct_return);
2975 ia64_extract_return_value (valtype, regcache, readbuf);
2976 }
2977
2978 if (struct_return)
2979 return RETURN_VALUE_STRUCT_CONVENTION;
2980 else
2981 return RETURN_VALUE_REGISTER_CONVENTION;
2982}
16461d7d 2983
64a5b29c
KB		 2984static int
2985is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
2986{
2987 switch (TYPE_CODE (t))
2988 {
2989 case TYPE_CODE_FLT:
2990 if (*etp)
2991 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
2992 else
2993 {
2994 *etp = t;
2995 return 1;
2996 }
2997 break;
2998 case TYPE_CODE_ARRAY:
98f96ba1
KB		 2999 return
3000 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
3001 etp);
64a5b29c
KB		 3002 break;
3003 case TYPE_CODE_STRUCT:
3004 {
3005 int i;
3006
3007 for (i = 0; i < TYPE_NFIELDS (t); i++)
98f96ba1
KB		 3008 if (!is_float_or_hfa_type_recurse
3009 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
64a5b29c
KB		 3010 return 0;
3011 return 1;
3012 }
3013 break;
3014 default:
3015 return 0;
3016 break;
3017 }
3018}
3019
3020/* Determine if the given type is one of the floating point types or
3021 and HFA (which is a struct, array, or combination thereof whose
004d836a 3022 bottom-most elements are all of the same floating point type). */
64a5b29c
KB		 3023
3024static struct type *
3025is_float_or_hfa_type (struct type *t)
3026{
3027 struct type *et = 0;
3028
3029 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
3030}
3031
3032
98f96ba1
KB		 3033/* Return 1 if the alignment of T is such that the next even slot
3034 should be used. Return 0, if the next available slot should
3035 be used. (See section 8.5.1 of the IA-64 Software Conventions
004d836a 3036 and Runtime manual). */
98f96ba1
KB		 3037
3038static int
3039slot_alignment_is_next_even (struct type *t)
3040{
3041 switch (TYPE_CODE (t))
3042 {
3043 case TYPE_CODE_INT:
3044 case TYPE_CODE_FLT:
3045 if (TYPE_LENGTH (t) > 8)
3046 return 1;
3047 else
3048 return 0;
3049 case TYPE_CODE_ARRAY:
3050 return
3051 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
3052 case TYPE_CODE_STRUCT:
3053 {
3054 int i;
3055
3056 for (i = 0; i < TYPE_NFIELDS (t); i++)
3057 if (slot_alignment_is_next_even
3058 (check_typedef (TYPE_FIELD_TYPE (t, i))))
3059 return 1;
3060 return 0;
3061 }
3062 default:
3063 return 0;
3064 }
3065}
3066
64a5b29c
KB		 3067/* Attempt to find (and return) the global pointer for the given
3068 function.
3069
3070 This is a rather nasty bit of code searchs for the .dynamic section
3071 in the objfile corresponding to the pc of the function we're trying
3072 to call. Once it finds the addresses at which the .dynamic section
3073 lives in the child process, it scans the Elf64_Dyn entries for a
3074 DT_PLTGOT tag. If it finds one of these, the corresponding
3075 d_un.d_ptr value is the global pointer. */
3076
3077static CORE_ADDR
b33e8514 3078ia64_find_global_pointer (CORE_ADDR faddr)
64a5b29c 3079{
76d689a6 3080 struct obj_section *faddr_sect;
64a5b29c 3081
76d689a6
KB		 3082 faddr_sect = find_pc_section (faddr);
3083 if (faddr_sect != NULL)
64a5b29c
KB		 3084 {
3085 struct obj_section *osect;
3086
76d689a6 3087 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 3088 {
3089 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
3090 break;
3091 }
3092
76d689a6 3093 if (osect < faddr_sect->objfile->sections_end)
64a5b29c 3094 {
aded6f54 3095 CORE_ADDR addr, endaddr;
64a5b29c 3096
aded6f54
PA		 3097 addr = obj_section_addr (osect);
3098 endaddr = obj_section_endaddr (osect);
3099
3100 while (addr < endaddr)
64a5b29c
KB		 3101 {
3102 int status;
3103 LONGEST tag;
3104 char buf[8];
3105
3106 status = target_read_memory (addr, buf, sizeof (buf));
3107 if (status != 0)
3108 break;
3109 tag = extract_signed_integer (buf, sizeof (buf));
3110
3111 if (tag == DT_PLTGOT)
3112 {
3113 CORE_ADDR global_pointer;
3114
3115 status = target_read_memory (addr + 8, buf, sizeof (buf));
3116 if (status != 0)
3117 break;
7c0b4a20 3118 global_pointer = extract_unsigned_integer (buf, sizeof (buf));
64a5b29c
KB		 3119
3120 /* The payoff... */
3121 return global_pointer;
3122 }
3123
3124 if (tag == DT_NULL)
3125 break;
3126
3127 addr += 16;
3128 }
3129 }
3130 }
3131 return 0;
3132}
3133
3134/* Given a function's address, attempt to find (and return) the
3135 corresponding (canonical) function descriptor. Return 0 if
004d836a 3136 not found. */
64a5b29c
KB		 3137static CORE_ADDR
3138find_extant_func_descr (CORE_ADDR faddr)
3139{
76d689a6 3140 struct obj_section *faddr_sect;
64a5b29c 3141
004d836a 3142 /* Return early if faddr is already a function descriptor. */
76d689a6
KB		 3143 faddr_sect = find_pc_section (faddr);
3144 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
64a5b29c
KB		 3145 return faddr;
3146
76d689a6 3147 if (faddr_sect != NULL)
64a5b29c 3148 {
76d689a6
KB		 3149 struct obj_section *osect;
3150 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 3151 {
3152 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
3153 break;
3154 }
3155
76d689a6 3156 if (osect < faddr_sect->objfile->sections_end)
64a5b29c 3157 {
aded6f54
PA		 3158 CORE_ADDR addr, endaddr;
3159
3160 addr = obj_section_addr (osect);
3161 endaddr = obj_section_endaddr (osect);
64a5b29c 3162
aded6f54 3163 while (addr < endaddr)
64a5b29c
KB		 3164 {
3165 int status;
3166 LONGEST faddr2;
3167 char buf[8];
3168
3169 status = target_read_memory (addr, buf, sizeof (buf));
3170 if (status != 0)
3171 break;
3172 faddr2 = extract_signed_integer (buf, sizeof (buf));
3173
3174 if (faddr == faddr2)
3175 return addr;
3176
3177 addr += 16;
3178 }
3179 }
3180 }
3181 return 0;
3182}
3183
3184/* Attempt to find a function descriptor corresponding to the
3185 given address. If none is found, construct one on the
004d836a 3186 stack using the address at fdaptr. */
64a5b29c
KB		 3187
3188static CORE_ADDR
9c9acae0 3189find_func_descr (struct regcache *regcache, CORE_ADDR faddr, CORE_ADDR *fdaptr)
64a5b29c
KB		 3190{
3191 CORE_ADDR fdesc;
3192
3193 fdesc = find_extant_func_descr (faddr);
3194
3195 if (fdesc == 0)
3196 {
9c9acae0 3197 ULONGEST global_pointer;
64a5b29c
KB		 3198 char buf[16];
3199
3200 fdesc = *fdaptr;
3201 *fdaptr += 16;
3202
b33e8514 3203 global_pointer = ia64_find_global_pointer (faddr);
64a5b29c
KB		 3204
3205 if (global_pointer == 0)
9c9acae0
UW		 3206 regcache_cooked_read_unsigned (regcache,
3207 IA64_GR1_REGNUM, &global_pointer);
64a5b29c 3208
fbd9dcd3
AC		 3209 store_unsigned_integer (buf, 8, faddr);
3210 store_unsigned_integer (buf + 8, 8, global_pointer);
64a5b29c
KB		 3211
3212 write_memory (fdesc, buf, 16);
3213 }
3214
3215 return fdesc;
3216}
16461d7d 3217
af8b88dd
JJ		 3218/* Use the following routine when printing out function pointers
3219 so the user can see the function address rather than just the
3220 function descriptor. */
3221static CORE_ADDR
e2d0e7eb
AC		 3222ia64_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
3223 struct target_ops *targ)
af8b88dd
JJ		 3224{
3225 struct obj_section *s;
3226
3227 s = find_pc_section (addr);
3228
3229 /* check if ADDR points to a function descriptor. */
3230 if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
3231 return read_memory_unsigned_integer (addr, 8);
3232
fcac911a
JB		 3233 /* Normally, functions live inside a section that is executable.
3234 So, if ADDR points to a non-executable section, then treat it
3235 as a function descriptor and return the target address iff
3236 the target address itself points to a section that is executable. */
b1e6fd19 3237 if (s && (s->the_bfd_section->flags & SEC_CODE) == 0)
fcac911a
JB		 3238 {
3239 CORE_ADDR pc = read_memory_unsigned_integer (addr, 8);
3240 struct obj_section *pc_section = find_pc_section (pc);
3241
3242 if (pc_section && (pc_section->the_bfd_section->flags & SEC_CODE))
3243 return pc;
3244 }
b1e6fd19 3245
0d5de010
DJ		 3246 /* There are also descriptors embedded in vtables. */
3247 if (s)
3248 {
3249 struct minimal_symbol *minsym;
3250
3251 minsym = lookup_minimal_symbol_by_pc (addr);
3252
3253 if (minsym && is_vtable_name (SYMBOL_LINKAGE_NAME (minsym)))
3254 return read_memory_unsigned_integer (addr, 8);
3255 }
3256
af8b88dd
JJ		 3257 return addr;
3258}
3259
a78f21af 3260static CORE_ADDR
004d836a
JJ		 3261ia64_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
3262{
3263 return sp & ~0xfLL;
3264}
3265
3266static CORE_ADDR
7d9b040b 3267ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
8dd5115e
AS		 3268 struct regcache *regcache, CORE_ADDR bp_addr,
3269 int nargs, struct value **args, CORE_ADDR sp,
3270 int struct_return, CORE_ADDR struct_addr)
16461d7d
KB		 3271{
3272 int argno;
ea7c478f 3273 struct value *arg;
16461d7d
KB		 3274 struct type *type;
3275 int len, argoffset;
64a5b29c 3276 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 3277 int floatreg;
9c9acae0
UW		 3278 ULONGEST bsp, cfm, pfs, new_bsp;
3279 CORE_ADDR funcdescaddr, pc, global_pointer;
7d9b040b 3280 CORE_ADDR func_addr = find_function_addr (function, NULL);
16461d7d
KB		 3281
3282 nslots = 0;
64a5b29c 3283 nfuncargs = 0;
004d836a 3284 /* Count the number of slots needed for the arguments. */
16461d7d
KB		 3285 for (argno = 0; argno < nargs; argno++)
3286 {
3287 arg = args[argno];
4991999e 3288 type = check_typedef (value_type (arg));
16461d7d
KB		 3289 len = TYPE_LENGTH (type);
3290
98f96ba1 3291 if ((nslots & 1) && slot_alignment_is_next_even (type))
16461d7d
KB		 3292 nslots++;
3293
64a5b29c
KB		 3294 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
3295 nfuncargs++;
3296
16461d7d
KB		 3297 nslots += (len + 7) / 8;
3298 }
3299
004d836a 3300 /* Divvy up the slots between the RSE and the memory stack. */
16461d7d
KB		 3301 rseslots = (nslots > 8) ? 8 : nslots;
3302 memslots = nslots - rseslots;
3303
004d836a 3304 /* Allocate a new RSE frame. */
9c9acae0 3305 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
16461d7d 3306
9c9acae0 3307 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
16461d7d 3308 new_bsp = rse_address_add (bsp, rseslots);
9c9acae0 3309 regcache_cooked_write_unsigned (regcache, IA64_BSP_REGNUM, new_bsp);
16461d7d 3310
9c9acae0 3311 regcache_cooked_read_unsigned (regcache, IA64_PFS_REGNUM, &pfs);
16461d7d
KB		 3312 pfs &= 0xc000000000000000LL;
3313 pfs |= (cfm & 0xffffffffffffLL);
9c9acae0 3314 regcache_cooked_write_unsigned (regcache, IA64_PFS_REGNUM, pfs);
16461d7d
KB		 3315
3316 cfm &= 0xc000000000000000LL;
3317 cfm |= rseslots;
9c9acae0 3318 regcache_cooked_write_unsigned (regcache, IA64_CFM_REGNUM, cfm);
16461d7d 3319
64a5b29c
KB		 3320 /* We will attempt to find function descriptors in the .opd segment,
3321 but if we can't we'll construct them ourselves. That being the
004d836a 3322 case, we'll need to reserve space on the stack for them. */
64a5b29c
KB		 3323 funcdescaddr = sp - nfuncargs * 16;
3324 funcdescaddr &= ~0xfLL;
3325
3326 /* Adjust the stack pointer to it's new value. The calling conventions
3327 require us to have 16 bytes of scratch, plus whatever space is
004d836a 3328 necessary for the memory slots and our function descriptors. */
64a5b29c 3329 sp = sp - 16 - (memslots + nfuncargs) * 8;
004d836a 3330 sp &= ~0xfLL; /* Maintain 16 byte alignment. */
16461d7d 3331
64a5b29c
KB		 3332 /* Place the arguments where they belong. The arguments will be
3333 either placed in the RSE backing store or on the memory stack.
3334 In addition, floating point arguments or HFAs are placed in
004d836a 3335 floating point registers. */
16461d7d
KB		 3336 slotnum = 0;
3337 floatreg = IA64_FR8_REGNUM;
3338 for (argno = 0; argno < nargs; argno++)
3339 {
64a5b29c
KB		 3340 struct type *float_elt_type;
3341
16461d7d 3342 arg = args[argno];
4991999e 3343 type = check_typedef (value_type (arg));
16461d7d 3344 len = TYPE_LENGTH (type);
64a5b29c 3345
004d836a 3346 /* Special handling for function parameters. */
64a5b29c
KB		 3347 if (len == 8
3348 && TYPE_CODE (type) == TYPE_CODE_PTR
3349 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
3350 {
3351 char val_buf[8];
9c9acae0 3352 ULONGEST faddr = extract_unsigned_integer (value_contents (arg), 8);
fbd9dcd3 3353 store_unsigned_integer (val_buf, 8,
9c9acae0 3354 find_func_descr (regcache, faddr,
fbd9dcd3 3355 &funcdescaddr));
64a5b29c
KB		 3356 if (slotnum < rseslots)
3357 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
3358 else
3359 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
3360 slotnum++;
3361 continue;
3362 }
3363
004d836a 3364 /* Normal slots. */
98f96ba1
KB		 3365
3366 /* Skip odd slot if necessary... */
3367 if ((slotnum & 1) && slot_alignment_is_next_even (type))
16461d7d 3368 slotnum++;
98f96ba1 3369
16461d7d
KB		 3370 argoffset = 0;
3371 while (len > 0)
3372 {
3373 char val_buf[8];
3374
3375 memset (val_buf, 0, 8);
0fd88904 3376 memcpy (val_buf, value_contents (arg) + argoffset, (len > 8) ? 8 : len);
16461d7d
KB		 3377
3378 if (slotnum < rseslots)
3379 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
3380 else
3381 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
3382
3383 argoffset += 8;
3384 len -= 8;
3385 slotnum++;
3386 }
64a5b29c 3387
004d836a 3388 /* Handle floating point types (including HFAs). */
64a5b29c
KB		 3389 float_elt_type = is_float_or_hfa_type (type);
3390 if (float_elt_type != NULL)
3391 {
3392 argoffset = 0;
3393 len = TYPE_LENGTH (type);
3394 while (len > 0 && floatreg < IA64_FR16_REGNUM)
3395 {
004d836a 3396 char to[MAX_REGISTER_SIZE];
0fd88904 3397 convert_typed_floating (value_contents (arg) + argoffset, float_elt_type,
004d836a
JJ		 3398 to, builtin_type_ia64_ext);
3399 regcache_cooked_write (regcache, floatreg, (void *)to);
64a5b29c
KB		 3400 floatreg++;
3401 argoffset += TYPE_LENGTH (float_elt_type);
3402 len -= TYPE_LENGTH (float_elt_type);
3403 }
16461d7d
KB		 3404 }
3405 }
3406
004d836a 3407 /* Store the struct return value in r8 if necessary. */
16461d7d
KB		 3408 if (struct_return)
3409 {
004d836a 3410 regcache_cooked_write_unsigned (regcache, IA64_GR8_REGNUM, (ULONGEST)struct_addr);
16461d7d
KB		 3411 }
3412
b33e8514 3413 global_pointer = ia64_find_global_pointer (func_addr);
8dd5115e 3414
004d836a 3415 if (global_pointer != 0)
9c9acae0 3416 regcache_cooked_write_unsigned (regcache, IA64_GR1_REGNUM, global_pointer);
a59fe496 3417
9c9acae0 3418 regcache_cooked_write_unsigned (regcache, IA64_BR0_REGNUM, bp_addr);
16461d7d 3419
9c9acae0 3420 regcache_cooked_write_unsigned (regcache, sp_regnum, sp);
16461d7d
KB		 3421
3422 return sp;
3423}
3424
004d836a 3425static struct frame_id
15c1e57f 3426ia64_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
16461d7d 3427{
004d836a 3428 char buf[8];
4afcc598 3429 CORE_ADDR sp, bsp;
004d836a 3430
15c1e57f 3431 get_frame_register (this_frame, sp_regnum, buf);
004d836a
JJ		 3432 sp = extract_unsigned_integer (buf, 8);
3433
15c1e57f 3434 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
4afcc598
JJ		 3435 bsp = extract_unsigned_integer (buf, 8);
3436
3437 if (gdbarch_debug >= 1)
3438 fprintf_unfiltered (gdb_stdlog,
78ced177 3439 "dummy frame id: code 0x%s, stack 0x%s, special 0x%s\n",
f92aeb88 3440 paddr_nz (get_frame_pc (this_frame)),
78ced177 3441 paddr_nz (sp), paddr_nz (bsp));
4afcc598 3442
15c1e57f 3443 return frame_id_build_special (sp, get_frame_pc (this_frame), bsp);
16461d7d
KB		 3444}
3445
004d836a
JJ		 3446static CORE_ADDR
3447ia64_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
16461d7d 3448{
004d836a
JJ		 3449 char buf[8];
3450 CORE_ADDR ip, psr, pc;
3451
3452 frame_unwind_register (next_frame, IA64_IP_REGNUM, buf);
3453 ip = extract_unsigned_integer (buf, 8);
3454 frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf);
3455 psr = extract_unsigned_integer (buf, 8);
3456
3457 pc = (ip & ~0xf) | ((psr >> 41) & 3);
3458 return pc;
16461d7d
KB		 3459}
3460
6926787d
AS		 3461static int
3462ia64_print_insn (bfd_vma memaddr, struct disassemble_info *info)
3463{
3464 info->bytes_per_line = SLOT_MULTIPLIER;
3465 return print_insn_ia64 (memaddr, info);
3466}
3467
16461d7d
KB		 3468static struct gdbarch *
3469ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3470{
3471 struct gdbarch *gdbarch;
244bc108 3472 struct gdbarch_tdep *tdep;
244bc108 3473
85bf2b91
JJ		 3474 /* If there is already a candidate, use it. */
3475 arches = gdbarch_list_lookup_by_info (arches, &info);
3476 if (arches != NULL)
3477 return arches->gdbarch;
16461d7d 3478
244bc108
KB		 3479 tdep = xmalloc (sizeof (struct gdbarch_tdep));
3480 gdbarch = gdbarch_alloc (&info, tdep);
244bc108 3481
b33e8514 3482 tdep->sigcontext_register_address = 0;
74174d2e 3483 tdep->pc_in_sigtramp = 0;
698cb3f0 3484
5439edaa
AC		 3485 /* According to the ia64 specs, instructions that store long double
3486 floats in memory use a long-double format different than that
3487 used in the floating registers. The memory format matches the
3488 x86 extended float format which is 80 bits. An OS may choose to
3489 use this format (e.g. GNU/Linux) or choose to use a different
3490 format for storing long doubles (e.g. HPUX). In the latter case,
3491 the setting of the format may be moved/overridden in an
3492 OS-specific tdep file. */
8da61cc4 3493 set_gdbarch_long_double_format (gdbarch, floatformats_i387_ext);
32edc941 3494
16461d7d
KB		 3495 set_gdbarch_short_bit (gdbarch, 16);
3496 set_gdbarch_int_bit (gdbarch, 32);
3497 set_gdbarch_long_bit (gdbarch, 64);
3498 set_gdbarch_long_long_bit (gdbarch, 64);
3499 set_gdbarch_float_bit (gdbarch, 32);
3500 set_gdbarch_double_bit (gdbarch, 64);
33c08150 3501 set_gdbarch_long_double_bit (gdbarch, 128);
16461d7d
KB		 3502 set_gdbarch_ptr_bit (gdbarch, 64);
3503
004d836a
JJ		 3504 set_gdbarch_num_regs (gdbarch, NUM_IA64_RAW_REGS);
3505 set_gdbarch_num_pseudo_regs (gdbarch, LAST_PSEUDO_REGNUM - FIRST_PSEUDO_REGNUM);
16461d7d 3506 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
698cb3f0 3507 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
16461d7d
KB		 3508
3509 set_gdbarch_register_name (gdbarch, ia64_register_name);
004d836a 3510 set_gdbarch_register_type (gdbarch, ia64_register_type);
16461d7d 3511
004d836a
JJ		 3512 set_gdbarch_pseudo_register_read (gdbarch, ia64_pseudo_register_read);
3513 set_gdbarch_pseudo_register_write (gdbarch, ia64_pseudo_register_write);
3514 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, ia64_dwarf_reg_to_regnum);
3515 set_gdbarch_register_reggroup_p (gdbarch, ia64_register_reggroup_p);
3516 set_gdbarch_convert_register_p (gdbarch, ia64_convert_register_p);
3517 set_gdbarch_register_to_value (gdbarch, ia64_register_to_value);
3518 set_gdbarch_value_to_register (gdbarch, ia64_value_to_register);
16461d7d 3519
004d836a 3520 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
16461d7d 3521
4c8b6ae0 3522 set_gdbarch_return_value (gdbarch, ia64_return_value);
16461d7d
KB		 3523
3524 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
3525 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
3526 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
3527 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
b33e8514 3528 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
16461d7d
KB		 3529
3530 /* Settings for calling functions in the inferior. */
8dd5115e 3531 set_gdbarch_push_dummy_call (gdbarch, ia64_push_dummy_call);
004d836a 3532 set_gdbarch_frame_align (gdbarch, ia64_frame_align);
15c1e57f 3533 set_gdbarch_dummy_id (gdbarch, ia64_dummy_id);
16461d7d 3534
004d836a 3535 set_gdbarch_unwind_pc (gdbarch, ia64_unwind_pc);
968d1cb4 3536#ifdef HAVE_LIBUNWIND_IA64_H
15c1e57f
JB		 3537 frame_unwind_append_unwinder (gdbarch,
3538 &ia64_libunwind_sigtramp_frame_unwind);
3539 frame_unwind_append_unwinder (gdbarch, &ia64_libunwind_frame_unwind);
3540 frame_unwind_append_unwinder (gdbarch, &ia64_sigtramp_frame_unwind);
968d1cb4 3541 libunwind_frame_set_descr (gdbarch, &ia64_libunwind_descr);
c5a27d9c 3542#else
15c1e57f 3543 frame_unwind_append_unwinder (gdbarch, &ia64_sigtramp_frame_unwind);
968d1cb4 3544#endif
15c1e57f 3545 frame_unwind_append_unwinder (gdbarch, &ia64_frame_unwind);
004d836a 3546 frame_base_set_default (gdbarch, &ia64_frame_base);
16461d7d
KB		 3547
3548 /* Settings that should be unnecessary. */
3549 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
3550
6926787d 3551 set_gdbarch_print_insn (gdbarch, ia64_print_insn);
af8b88dd 3552 set_gdbarch_convert_from_func_ptr_addr (gdbarch, ia64_convert_from_func_ptr_addr);
6926787d 3553
0d5de010
DJ		 3554 /* The virtual table contains 16-byte descriptors, not pointers to
3555 descriptors. */
3556 set_gdbarch_vtable_function_descriptors (gdbarch, 1);
3557
b33e8514
AS		 3558 /* Hook in ABI-specific overrides, if they have been registered. */
3559 gdbarch_init_osabi (info, gdbarch);
3560
16461d7d
KB		 3561 return gdbarch;
3562}
3563
a78f21af
AC		 3564extern initialize_file_ftype _initialize_ia64_tdep; /* -Wmissing-prototypes */
3565
16461d7d
KB		 3566void
3567_initialize_ia64_tdep (void)
3568{
83acabca
DJ		 3569 /* Define the ia64 floating-point format to gdb. */
3570 builtin_type_ia64_ext =
3571 init_type (TYPE_CODE_FLT, 128 / 8,
3572 0, "builtin_type_ia64_ext", NULL);
3573 TYPE_FLOATFORMAT (builtin_type_ia64_ext) = floatformats_ia64_ext;
3574
b33e8514 3575 gdbarch_register (bfd_arch_ia64, ia64_gdbarch_init, NULL);
16461d7d 3576}
GDB Binutils - Deliverables
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