* ldmain.c (set_scripts_dir): Look for relative to TOOLBINDIR as
[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
CommitLineData
16461d7d 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
ca557f44 2
51603483 3 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
16461d7d
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "inferior.h"
24#include "symfile.h" /* for entry_point_address */
25#include "gdbcore.h"
8064c6ae 26#include "arch-utils.h"
16461d7d 27#include "floatformat.h"
4e052eda 28#include "regcache.h"
d16aafd8 29#include "doublest.h"
fd0407d6 30#include "value.h"
16461d7d
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31
32#include "objfiles.h"
33#include "elf/common.h" /* for DT_PLTGOT value */
244bc108 34#include "elf-bfd.h"
16461d7d 35
698cb3f0
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36/* Hook for determining the global pointer when calling functions in
37 the inferior under AIX. The initialization code in ia64-aix-nat.c
38 sets this hook to the address of a function which will find the
39 global pointer for a given address.
40
41 The generic code which uses the dynamic section in the inferior for
42 finding the global pointer is not of much use on AIX since the
43 values obtained from the inferior have not been relocated. */
44
45CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
46
47/* An enumeration of the different IA-64 instruction types. */
48
16461d7d
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49typedef enum instruction_type
50{
51 A, /* Integer ALU ; I-unit or M-unit */
52 I, /* Non-ALU integer; I-unit */
53 M, /* Memory ; M-unit */
54 F, /* Floating-point ; F-unit */
55 B, /* Branch ; B-unit */
56 L, /* Extended (L+X) ; I-unit */
57 X, /* Extended (L+X) ; I-unit */
58 undefined /* undefined or reserved */
59} instruction_type;
60
61/* We represent IA-64 PC addresses as the value of the instruction
62 pointer or'd with some bit combination in the low nibble which
63 represents the slot number in the bundle addressed by the
64 instruction pointer. The problem is that the Linux kernel
65 multiplies its slot numbers (for exceptions) by one while the
66 disassembler multiplies its slot numbers by 6. In addition, I've
67 heard it said that the simulator uses 1 as the multiplier.
68
69 I've fixed the disassembler so that the bytes_per_line field will
70 be the slot multiplier. If bytes_per_line comes in as zero, it
71 is set to six (which is how it was set up initially). -- objdump
72 displays pretty disassembly dumps with this value. For our purposes,
73 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
74 never want to also display the raw bytes the way objdump does. */
75
76#define SLOT_MULTIPLIER 1
77
78/* Length in bytes of an instruction bundle */
79
80#define BUNDLE_LEN 16
81
d7fa2ae2 82/* FIXME: These extern declarations should go in ia64-tdep.h. */
244bc108 83extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
d7fa2ae2 84extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
244bc108 85
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86static gdbarch_init_ftype ia64_gdbarch_init;
87
88static gdbarch_register_name_ftype ia64_register_name;
89static gdbarch_register_raw_size_ftype ia64_register_raw_size;
90static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
91static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
92static gdbarch_register_byte_ftype ia64_register_byte;
93static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
94static gdbarch_frame_chain_ftype ia64_frame_chain;
95static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc;
96static gdbarch_skip_prologue_ftype ia64_skip_prologue;
16461d7d 97static gdbarch_get_saved_register_ftype ia64_get_saved_register;
26e9b323
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98static gdbarch_deprecated_extract_return_value_ftype ia64_extract_return_value;
99static gdbarch_deprecated_extract_struct_value_address_ftype ia64_extract_struct_value_address;
16461d7d
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100static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
101static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
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102static gdbarch_store_struct_return_ftype ia64_store_struct_return;
103static gdbarch_push_arguments_ftype ia64_push_arguments;
104static gdbarch_push_return_address_ftype ia64_push_return_address;
105static gdbarch_pop_frame_ftype ia64_pop_frame;
106static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
16461d7d 107static void ia64_pop_frame_regular (struct frame_info *frame);
64a5b29c 108static struct type *is_float_or_hfa_type (struct type *t);
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109
110static int ia64_num_regs = 590;
111
112static int pc_regnum = IA64_IP_REGNUM;
113static int sp_regnum = IA64_GR12_REGNUM;
114static int fp_regnum = IA64_VFP_REGNUM;
115static int lr_regnum = IA64_VRAP_REGNUM;
116
117static LONGEST ia64_call_dummy_words[] = {0};
118
119/* Array of register names; There should be ia64_num_regs strings in
120 the initializer. */
121
122static char *ia64_register_names[] =
123{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
124 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
125 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
126 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
127 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
128 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
129 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
130 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
131 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
132 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
133 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
134 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
135 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
136 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
137 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
138 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
139
140 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
141 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
142 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
143 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
144 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
145 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
146 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
147 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
148 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
149 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
150 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
151 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
152 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
153 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
154 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
155 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
156
157 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
158 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
159 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
160 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
161 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
162 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
163 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
164 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
165
166 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
167
168 "vfp", "vrap",
169
170 "pr", "ip", "psr", "cfm",
171
172 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
173 "", "", "", "", "", "", "", "",
174 "rsc", "bsp", "bspstore", "rnat",
175 "", "fcr", "", "",
176 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
177 "ccv", "", "", "", "unat", "", "", "",
178 "fpsr", "", "", "", "itc",
179 "", "", "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "", "",
181 "pfs", "lc", "ec",
182 "", "", "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "", "", "",
188 "",
189 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
190 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
191 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
192 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
193 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
194 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
195 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
196 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
197 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
198 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
199 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
200 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
201 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
202 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
203 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
204 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
205};
206
207struct frame_extra_info
244bc108
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208 {
209 CORE_ADDR bsp; /* points at r32 for the current frame */
210 CORE_ADDR cfm; /* cfm value for current frame */
211 int sof; /* Size of frame (decoded from cfm value) */
212 int sol; /* Size of locals (decoded from cfm value) */
213 CORE_ADDR after_prologue;
214 /* Address of first instruction after the last
16461d7d
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215 prologue instruction; Note that there may
216 be instructions from the function's body
217 intermingled with the prologue. */
244bc108
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218 int mem_stack_frame_size;
219 /* Size of the memory stack frame (may be zero),
16461d7d 220 or -1 if it has not been determined yet. */
244bc108
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221 int fp_reg; /* Register number (if any) used a frame pointer
222 for this frame. 0 if no register is being used
16461d7d 223 as the frame pointer. */
244bc108
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224 };
225
226struct gdbarch_tdep
227 {
228 int os_ident; /* From the ELF header, one of the ELFOSABI_
ef58a6ac 229 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
244bc108
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230 etc. */
231 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
232 /* OS specific function which, given a frame address
233 and register number, returns the offset to the
234 given register from the start of the frame. */
698cb3f0 235 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
244bc108
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236 };
237
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238#define SIGCONTEXT_REGISTER_ADDRESS \
239 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
240#define FIND_GLOBAL_POINTER \
241 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
16461d7d 242
fa88f677 243static const char *
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244ia64_register_name (int reg)
245{
246 return ia64_register_names[reg];
247}
248
249int
250ia64_register_raw_size (int reg)
251{
252 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
253}
254
255int
256ia64_register_virtual_size (int reg)
257{
258 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
259}
260
261/* Return true iff register N's virtual format is different from
262 its raw format. */
263int
264ia64_register_convertible (int nr)
265{
266 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
267}
268
269const struct floatformat floatformat_ia64_ext =
270{
271 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
272 floatformat_intbit_yes
273};
274
275void
276ia64_register_convert_to_virtual (int regnum, struct type *type,
277 char *from, char *to)
278{
279 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
280 {
281 DOUBLEST val;
282 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
283 store_floating(to, TYPE_LENGTH(type), val);
284 }
285 else
286 error("ia64_register_convert_to_virtual called with non floating point register number");
287}
288
289void
290ia64_register_convert_to_raw (struct type *type, int regnum,
291 char *from, char *to)
292{
293 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
294 {
295 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
296 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
297 }
298 else
299 error("ia64_register_convert_to_raw called with non floating point register number");
300}
301
302struct type *
303ia64_register_virtual_type (int reg)
304{
305 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
306 return builtin_type_long_double;
307 else
308 return builtin_type_long;
309}
310
311int
312ia64_register_byte (int reg)
313{
314 return (8 * reg) +
315 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
316}
317
244bc108
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318/* Read the given register from a sigcontext structure in the
319 specified frame. */
320
321static CORE_ADDR
322read_sigcontext_register (struct frame_info *frame, int regnum)
323{
324 CORE_ADDR regaddr;
325
326 if (frame == NULL)
8e65ff28
AC
327 internal_error (__FILE__, __LINE__,
328 "read_sigcontext_register: NULL frame");
5a203e44 329 if (!(get_frame_type (frame) == SIGTRAMP_FRAME))
8e65ff28 330 internal_error (__FILE__, __LINE__,
5a203e44 331 "read_sigcontext_register: frame not a signal trampoline");
244bc108 332 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
8e65ff28
AC
333 internal_error (__FILE__, __LINE__,
334 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
244bc108 335
1e2330ba 336 regaddr = SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regnum);
244bc108
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337 if (regaddr)
338 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
339 else
8e65ff28
AC
340 internal_error (__FILE__, __LINE__,
341 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
244bc108
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342}
343
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344/* Extract ``len'' bits from an instruction bundle starting at
345 bit ``from''. */
346
244bc108 347static long long
16461d7d
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348extract_bit_field (char *bundle, int from, int len)
349{
350 long long result = 0LL;
351 int to = from + len;
352 int from_byte = from / 8;
353 int to_byte = to / 8;
354 unsigned char *b = (unsigned char *) bundle;
355 unsigned char c;
356 int lshift;
357 int i;
358
359 c = b[from_byte];
360 if (from_byte == to_byte)
361 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
362 result = c >> (from % 8);
363 lshift = 8 - (from % 8);
364
365 for (i = from_byte+1; i < to_byte; i++)
366 {
367 result |= ((long long) b[i]) << lshift;
368 lshift += 8;
369 }
370
371 if (from_byte < to_byte && (to % 8 != 0))
372 {
373 c = b[to_byte];
374 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
375 result |= ((long long) c) << lshift;
376 }
377
378 return result;
379}
380
381/* Replace the specified bits in an instruction bundle */
382
244bc108 383static void
16461d7d
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384replace_bit_field (char *bundle, long long val, int from, int len)
385{
386 int to = from + len;
387 int from_byte = from / 8;
388 int to_byte = to / 8;
389 unsigned char *b = (unsigned char *) bundle;
390 unsigned char c;
391
392 if (from_byte == to_byte)
393 {
394 unsigned char left, right;
395 c = b[from_byte];
396 left = (c >> (to % 8)) << (to % 8);
397 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
398 c = (unsigned char) (val & 0xff);
399 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
400 c |= right | left;
401 b[from_byte] = c;
402 }
403 else
404 {
405 int i;
406 c = b[from_byte];
407 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
408 c = c | (val << (from % 8));
409 b[from_byte] = c;
410 val >>= 8 - from % 8;
411
412 for (i = from_byte+1; i < to_byte; i++)
413 {
414 c = val & 0xff;
415 val >>= 8;
416 b[i] = c;
417 }
418
419 if (to % 8 != 0)
420 {
421 unsigned char cv = (unsigned char) val;
422 c = b[to_byte];
423 c = c >> (to % 8) << (to % 8);
424 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
425 b[to_byte] = c;
426 }
427 }
428}
429
430/* Return the contents of slot N (for N = 0, 1, or 2) in
431 and instruction bundle */
432
244bc108 433static long long
2fc3ac7e 434slotN_contents (char *bundle, int slotnum)
16461d7d
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435{
436 return extract_bit_field (bundle, 5+41*slotnum, 41);
437}
438
439/* Store an instruction in an instruction bundle */
440
244bc108 441static void
2fc3ac7e 442replace_slotN_contents (char *bundle, long long instr, int slotnum)
16461d7d
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443{
444 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
445}
446
64a5b29c 447static enum instruction_type template_encoding_table[32][3] =
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448{
449 { M, I, I }, /* 00 */
450 { M, I, I }, /* 01 */
451 { M, I, I }, /* 02 */
452 { M, I, I }, /* 03 */
453 { M, L, X }, /* 04 */
454 { M, L, X }, /* 05 */
455 { undefined, undefined, undefined }, /* 06 */
456 { undefined, undefined, undefined }, /* 07 */
457 { M, M, I }, /* 08 */
458 { M, M, I }, /* 09 */
459 { M, M, I }, /* 0A */
460 { M, M, I }, /* 0B */
461 { M, F, I }, /* 0C */
462 { M, F, I }, /* 0D */
463 { M, M, F }, /* 0E */
464 { M, M, F }, /* 0F */
465 { M, I, B }, /* 10 */
466 { M, I, B }, /* 11 */
467 { M, B, B }, /* 12 */
468 { M, B, B }, /* 13 */
469 { undefined, undefined, undefined }, /* 14 */
470 { undefined, undefined, undefined }, /* 15 */
471 { B, B, B }, /* 16 */
472 { B, B, B }, /* 17 */
473 { M, M, B }, /* 18 */
474 { M, M, B }, /* 19 */
475 { undefined, undefined, undefined }, /* 1A */
476 { undefined, undefined, undefined }, /* 1B */
477 { M, F, B }, /* 1C */
478 { M, F, B }, /* 1D */
479 { undefined, undefined, undefined }, /* 1E */
480 { undefined, undefined, undefined }, /* 1F */
481};
482
483/* Fetch and (partially) decode an instruction at ADDR and return the
484 address of the next instruction to fetch. */
485
486static CORE_ADDR
487fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
488{
489 char bundle[BUNDLE_LEN];
490 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
491 long long template;
492 int val;
493
c26e1c2b
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494 /* Warn about slot numbers greater than 2. We used to generate
495 an error here on the assumption that the user entered an invalid
496 address. But, sometimes GDB itself requests an invalid address.
497 This can (easily) happen when execution stops in a function for
498 which there are no symbols. The prologue scanner will attempt to
499 find the beginning of the function - if the nearest symbol
500 happens to not be aligned on a bundle boundary (16 bytes), the
501 resulting starting address will cause GDB to think that the slot
502 number is too large.
503
504 So we warn about it and set the slot number to zero. It is
505 not necessarily a fatal condition, particularly if debugging
506 at the assembly language level. */
16461d7d 507 if (slotnum > 2)
c26e1c2b
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508 {
509 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
510 "Using slot 0 instead");
511 slotnum = 0;
512 }
16461d7d
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513
514 addr &= ~0x0f;
515
516 val = target_read_memory (addr, bundle, BUNDLE_LEN);
517
518 if (val != 0)
519 return 0;
520
521 *instr = slotN_contents (bundle, slotnum);
522 template = extract_bit_field (bundle, 0, 5);
523 *it = template_encoding_table[(int)template][slotnum];
524
64a5b29c 525 if (slotnum == 2 || (slotnum == 1 && *it == L))
16461d7d
KB
526 addr += 16;
527 else
528 addr += (slotnum + 1) * SLOT_MULTIPLIER;
529
530 return addr;
531}
532
533/* There are 5 different break instructions (break.i, break.b,
534 break.m, break.f, and break.x), but they all have the same
535 encoding. (The five bit template in the low five bits of the
536 instruction bundle distinguishes one from another.)
537
538 The runtime architecture manual specifies that break instructions
539 used for debugging purposes must have the upper two bits of the 21
540 bit immediate set to a 0 and a 1 respectively. A breakpoint
541 instruction encodes the most significant bit of its 21 bit
542 immediate at bit 36 of the 41 bit instruction. The penultimate msb
543 is at bit 25 which leads to the pattern below.
544
545 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
546 it turns out that 0x80000 was used as the syscall break in the early
547 simulators. So I changed the pattern slightly to do "break.i 0x080001"
548 instead. But that didn't work either (I later found out that this
549 pattern was used by the simulator that I was using.) So I ended up
550 using the pattern seen below. */
551
552#if 0
553#define BREAKPOINT 0x00002000040LL
554#endif
555#define BREAKPOINT 0x00003333300LL
556
557static int
558ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
559{
560 char bundle[BUNDLE_LEN];
561 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
562 long long instr;
563 int val;
126fa72d 564 int template;
16461d7d
KB
565
566 if (slotnum > 2)
567 error("Can't insert breakpoint for slot numbers greater than 2.");
568
569 addr &= ~0x0f;
570
571 val = target_read_memory (addr, bundle, BUNDLE_LEN);
126fa72d
PS
572
573 /* Check for L type instruction in 2nd slot, if present then
574 bump up the slot number to the 3rd slot */
575 template = extract_bit_field (bundle, 0, 5);
576 if (slotnum == 1 && template_encoding_table[template][1] == L)
577 {
578 slotnum = 2;
579 }
580
16461d7d
KB
581 instr = slotN_contents (bundle, slotnum);
582 memcpy(contents_cache, &instr, sizeof(instr));
583 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
584 if (val == 0)
585 target_write_memory (addr, bundle, BUNDLE_LEN);
586
587 return val;
588}
589
590static int
591ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
592{
593 char bundle[BUNDLE_LEN];
594 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
595 long long instr;
596 int val;
126fa72d 597 int template;
16461d7d
KB
598
599 addr &= ~0x0f;
600
601 val = target_read_memory (addr, bundle, BUNDLE_LEN);
126fa72d
PS
602
603 /* Check for L type instruction in 2nd slot, if present then
604 bump up the slot number to the 3rd slot */
605 template = extract_bit_field (bundle, 0, 5);
606 if (slotnum == 1 && template_encoding_table[template][1] == L)
607 {
608 slotnum = 2;
609 }
610
16461d7d
KB
611 memcpy (&instr, contents_cache, sizeof instr);
612 replace_slotN_contents (bundle, instr, slotnum);
613 if (val == 0)
614 target_write_memory (addr, bundle, BUNDLE_LEN);
615
616 return val;
617}
618
619/* We don't really want to use this, but remote.c needs to call it in order
620 to figure out if Z-packets are supported or not. Oh, well. */
f4f9705a 621const unsigned char *
fba45db2 622ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
16461d7d
KB
623{
624 static unsigned char breakpoint[] =
625 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
626 *lenptr = sizeof (breakpoint);
627#if 0
628 *pcptr &= ~0x0f;
629#endif
630 return breakpoint;
631}
632
633CORE_ADDR
39f77062 634ia64_read_pc (ptid_t ptid)
16461d7d 635{
39f77062
KB
636 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
637 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid);
16461d7d
KB
638 int slot_num = (psr_value >> 41) & 3;
639
640 return pc_value | (slot_num * SLOT_MULTIPLIER);
641}
642
643void
39f77062 644ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid)
16461d7d
KB
645{
646 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
39f77062 647 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
16461d7d
KB
648 psr_value &= ~(3LL << 41);
649 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
650
651 new_pc &= ~0xfLL;
652
39f77062
KB
653 write_register_pid (IA64_PSR_REGNUM, psr_value, ptid);
654 write_register_pid (IA64_IP_REGNUM, new_pc, ptid);
16461d7d
KB
655}
656
657#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
658
659/* Returns the address of the slot that's NSLOTS slots away from
660 the address ADDR. NSLOTS may be positive or negative. */
661static CORE_ADDR
662rse_address_add(CORE_ADDR addr, int nslots)
663{
664 CORE_ADDR new_addr;
665 int mandatory_nat_slots = nslots / 63;
666 int direction = nslots < 0 ? -1 : 1;
667
668 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
669
670 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
671 new_addr += 8 * direction;
672
673 if (IS_NaT_COLLECTION_ADDR(new_addr))
674 new_addr += 8 * direction;
675
676 return new_addr;
677}
678
679/* The IA-64 frame chain is a bit odd. We won't always have a frame
680 pointer, so we use the SP value as the FP for the purpose of
681 creating a frame. There is sometimes a register (not fixed) which
682 is used as a frame pointer. When this register exists, it is not
683 especially hard to determine which one is being used. It isn't
684 even really hard to compute the frame chain, but it can be
685 computationally expensive. So, instead of making life difficult
686 (and slow), we pick a more convenient representation of the frame
8227c0ff
AC
687 chain, knowing that we'll have to make some small adjustments in
688 other places. (E.g, note that read_fp() is actually read_sp() in
689 ia64_gdbarch_init() below.)
16461d7d
KB
690
691 Okay, so what is the frame chain exactly? It'll be the SP value
692 at the time that the function in question was entered.
693
694 Note that this *should* actually the frame pointer for the current
695 function! But as I note above, if we were to attempt to find the
696 address of the beginning of the previous frame, we'd waste a lot
697 of cycles for no good reason. So instead, we simply choose to
698 represent the frame chain as the end of the previous frame instead
699 of the beginning. */
700
701CORE_ADDR
702ia64_frame_chain (struct frame_info *frame)
703{
5a203e44 704 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
244bc108 705 return read_sigcontext_register (frame, sp_regnum);
1e2330ba
AC
706 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
707 get_frame_base (frame),
708 get_frame_base (frame)))
709 return get_frame_base (frame);
16461d7d 710 else
244bc108 711 {
f30ee0bc 712 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
b2fb4676
AC
713 if (get_frame_saved_regs (frame)[IA64_VFP_REGNUM])
714 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VFP_REGNUM], 8);
244bc108 715 else
1e2330ba 716 return (get_frame_base (frame)
da50a4b7 717 + get_frame_extra_info (frame)->mem_stack_frame_size);
244bc108 718 }
16461d7d
KB
719}
720
721CORE_ADDR
722ia64_frame_saved_pc (struct frame_info *frame)
723{
5a203e44 724 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
244bc108 725 return read_sigcontext_register (frame, pc_regnum);
1e2330ba
AC
726 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
727 get_frame_base (frame),
728 get_frame_base (frame)))
729 return deprecated_read_register_dummy (get_frame_pc (frame),
730 get_frame_base (frame), pc_regnum);
244bc108
KB
731 else
732 {
f30ee0bc 733 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
16461d7d 734
b2fb4676
AC
735 if (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM])
736 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM], 8);
11c02a10
AC
737 else if (get_next_frame (frame)
738 && (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
739 return read_sigcontext_register (get_next_frame (frame), IA64_BR0_REGNUM);
244bc108
KB
740 else /* either frameless, or not far enough along in the prologue... */
741 return ia64_saved_pc_after_call (frame);
742 }
16461d7d
KB
743}
744
58ab00f9
KB
745/* Limit the number of skipped non-prologue instructions since examining
746 of the prologue is expensive. */
747static int max_skip_non_prologue_insns = 10;
748
749/* Given PC representing the starting address of a function, and
750 LIM_PC which is the (sloppy) limit to which to scan when looking
751 for a prologue, attempt to further refine this limit by using
752 the line data in the symbol table. If successful, a better guess
753 on where the prologue ends is returned, otherwise the previous
754 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
755 which will be set to indicate whether the returned limit may be
756 used with no further scanning in the event that the function is
757 frameless. */
758
759static CORE_ADDR
760refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
761{
762 struct symtab_and_line prologue_sal;
763 CORE_ADDR start_pc = pc;
764
765 /* Start off not trusting the limit. */
766 *trust_limit = 0;
767
768 prologue_sal = find_pc_line (pc, 0);
769 if (prologue_sal.line != 0)
770 {
771 int i;
772 CORE_ADDR addr = prologue_sal.end;
773
774 /* Handle the case in which compiler's optimizer/scheduler
775 has moved instructions into the prologue. We scan ahead
776 in the function looking for address ranges whose corresponding
777 line number is less than or equal to the first one that we
778 found for the function. (It can be less than when the
779 scheduler puts a body instruction before the first prologue
780 instruction.) */
781 for (i = 2 * max_skip_non_prologue_insns;
782 i > 0 && (lim_pc == 0 || addr < lim_pc);
783 i--)
784 {
785 struct symtab_and_line sal;
786
787 sal = find_pc_line (addr, 0);
788 if (sal.line == 0)
789 break;
790 if (sal.line <= prologue_sal.line
791 && sal.symtab == prologue_sal.symtab)
792 {
793 prologue_sal = sal;
794 }
795 addr = sal.end;
796 }
797
798 if (lim_pc == 0 || prologue_sal.end < lim_pc)
799 {
800 lim_pc = prologue_sal.end;
801 if (start_pc == get_pc_function_start (lim_pc))
802 *trust_limit = 1;
803 }
804 }
805 return lim_pc;
806}
807
16461d7d
KB
808#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
809 || (8 <= (_regnum_) && (_regnum_) <= 11) \
810 || (14 <= (_regnum_) && (_regnum_) <= 31))
811#define imm9(_instr_) \
812 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
813 | (((_instr_) & 0x00008000000LL) >> 20) \
814 | (((_instr_) & 0x00000001fc0LL) >> 6))
815
816static CORE_ADDR
817examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
818{
819 CORE_ADDR next_pc;
820 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB
821 instruction_type it;
822 long long instr;
823 int do_fsr_stuff = 0;
824
825 int cfm_reg = 0;
826 int ret_reg = 0;
827 int fp_reg = 0;
828 int unat_save_reg = 0;
829 int pr_save_reg = 0;
830 int mem_stack_frame_size = 0;
831 int spill_reg = 0;
832 CORE_ADDR spill_addr = 0;
0927a22b
KB
833 char instores[8];
834 char infpstores[8];
58ab00f9 835 int trust_limit;
0927a22b
KB
836
837 memset (instores, 0, sizeof instores);
838 memset (infpstores, 0, sizeof infpstores);
16461d7d 839
b2fb4676 840 if (frame && !get_frame_saved_regs (frame))
16461d7d
KB
841 {
842 frame_saved_regs_zalloc (frame);
843 do_fsr_stuff = 1;
844 }
845
846 if (frame
847 && !do_fsr_stuff
da50a4b7
AC
848 && get_frame_extra_info (frame)->after_prologue != 0
849 && get_frame_extra_info (frame)->after_prologue <= lim_pc)
850 return get_frame_extra_info (frame)->after_prologue;
16461d7d 851
58ab00f9
KB
852 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
853
16461d7d
KB
854 /* Must start with an alloc instruction */
855 next_pc = fetch_instruction (pc, &it, &instr);
856 if (pc < lim_pc && next_pc
857 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
858 {
859 /* alloc */
860 int sor = (int) ((instr & 0x00078000000LL) >> 27);
861 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
862 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
863 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
864 we could compare against the size given to us via the cfm as
865 either a sanity check or possibly to see if the frame has been
866 changed by a later alloc instruction... */
867 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
868 cfm_reg = rN;
869 last_prologue_pc = next_pc;
870 pc = next_pc;
871 }
872 else
58ab00f9
KB
873 {
874 pc = lim_pc; /* Frameless: We're done early. */
875 if (trust_limit)
876 last_prologue_pc = lim_pc;
877 }
16461d7d
KB
878
879 /* Loop, looking for prologue instructions, keeping track of
880 where preserved registers were spilled. */
881 while (pc < lim_pc)
882 {
883 next_pc = fetch_instruction (pc, &it, &instr);
884 if (next_pc == 0)
885 break;
886
902d7086
KB
887 if ((it == B && ((instr & 0x1e1f800003f) != 0x04000000000))
888 || ((instr & 0x3fLL) != 0LL))
0927a22b 889 {
902d7086
KB
890 /* Exit loop upon hitting a non-nop branch instruction
891 or a predicated instruction. */
0927a22b
KB
892 break;
893 }
894 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
16461d7d
KB
895 {
896 /* Move from BR */
897 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
898 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
899 int qp = (int) (instr & 0x0000000003f);
900
901 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
902 {
903 ret_reg = rN;
904 last_prologue_pc = next_pc;
905 }
906 }
907 else if ((it == I || it == M)
908 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
909 {
910 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
911 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
912 | ((instr & 0x001f8000000LL) >> 20)
913 | ((instr & 0x000000fe000LL) >> 13));
914 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
915 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
916 int qp = (int) (instr & 0x0000000003fLL);
917
918 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
919 {
920 /* mov rN, r12 */
921 fp_reg = rN;
922 last_prologue_pc = next_pc;
923 }
924 else if (qp == 0 && rN == 12 && rM == 12)
925 {
926 /* adds r12, -mem_stack_frame_size, r12 */
927 mem_stack_frame_size -= imm;
928 last_prologue_pc = next_pc;
929 }
930 else if (qp == 0 && rN == 2
931 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
932 {
933 /* adds r2, spilloffset, rFramePointer
934 or
935 adds r2, spilloffset, r12
936
937 Get ready for stf.spill or st8.spill instructions.
938 The address to start spilling at is loaded into r2.
939 FIXME: Why r2? That's what gcc currently uses; it
940 could well be different for other compilers. */
941
942 /* Hmm... whether or not this will work will depend on
943 where the pc is. If it's still early in the prologue
944 this'll be wrong. FIXME */
1e2330ba 945 spill_addr = (frame ? get_frame_base (frame) : 0)
16461d7d
KB
946 + (rM == 12 ? 0 : mem_stack_frame_size)
947 + imm;
948 spill_reg = rN;
949 last_prologue_pc = next_pc;
950 }
951 }
952 else if (it == M
953 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
954 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
955 {
956 /* stf.spill [rN] = fM, imm9
957 or
958 stf.spill [rN] = fM */
959
960 int imm = imm9(instr);
961 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
962 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
963 int qp = (int) (instr & 0x0000000003fLL);
964 if (qp == 0 && rN == spill_reg && spill_addr != 0
965 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
966 {
967 if (do_fsr_stuff)
b2fb4676 968 get_frame_saved_regs (frame)[IA64_FR0_REGNUM + fM] = spill_addr;
16461d7d
KB
969
970 if ((instr & 0x1efc0000000) == 0x0eec0000000)
971 spill_addr += imm;
972 else
973 spill_addr = 0; /* last one; must be done */
974 last_prologue_pc = next_pc;
975 }
976 }
977 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
978 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
979 {
980 /* mov.m rN = arM
981 or
982 mov.i rN = arM */
983
984 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
985 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
986 int qp = (int) (instr & 0x0000000003fLL);
987 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
988 {
989 /* We have something like "mov.m r3 = ar.unat". Remember the
990 r3 (or whatever) and watch for a store of this register... */
991 unat_save_reg = rN;
992 last_prologue_pc = next_pc;
993 }
994 }
995 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
996 {
997 /* mov rN = pr */
998 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
999 int qp = (int) (instr & 0x0000000003fLL);
1000 if (qp == 0 && isScratch (rN))
1001 {
1002 pr_save_reg = rN;
1003 last_prologue_pc = next_pc;
1004 }
1005 }
1006 else if (it == M
1007 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1008 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1009 {
1010 /* st8 [rN] = rM
1011 or
1012 st8 [rN] = rM, imm9 */
1013 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1014 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1015 int qp = (int) (instr & 0x0000000003fLL);
1016 if (qp == 0 && rN == spill_reg && spill_addr != 0
1017 && (rM == unat_save_reg || rM == pr_save_reg))
1018 {
1019 /* We've found a spill of either the UNAT register or the PR
1020 register. (Well, not exactly; what we've actually found is
1021 a spill of the register that UNAT or PR was moved to).
1022 Record that fact and move on... */
1023 if (rM == unat_save_reg)
1024 {
1025 /* Track UNAT register */
1026 if (do_fsr_stuff)
b2fb4676 1027 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] = spill_addr;
16461d7d
KB
1028 unat_save_reg = 0;
1029 }
1030 else
1031 {
1032 /* Track PR register */
1033 if (do_fsr_stuff)
b2fb4676 1034 get_frame_saved_regs (frame)[IA64_PR_REGNUM] = spill_addr;
16461d7d
KB
1035 pr_save_reg = 0;
1036 }
1037 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1038 /* st8 [rN] = rM, imm9 */
1039 spill_addr += imm9(instr);
1040 else
1041 spill_addr = 0; /* must be done spilling */
1042 last_prologue_pc = next_pc;
1043 }
0927a22b
KB
1044 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1045 {
1046 /* Allow up to one store of each input register. */
1047 instores[rM-32] = 1;
1048 last_prologue_pc = next_pc;
1049 }
1050 }
1051 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1052 {
1053 /* One of
1054 st1 [rN] = rM
1055 st2 [rN] = rM
1056 st4 [rN] = rM
1057 st8 [rN] = rM
1058 Note that the st8 case is handled in the clause above.
1059
1060 Advance over stores of input registers. One store per input
1061 register is permitted. */
1062 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1063 int qp = (int) (instr & 0x0000000003fLL);
1064 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1065 {
1066 instores[rM-32] = 1;
1067 last_prologue_pc = next_pc;
1068 }
1069 }
1070 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1071 {
1072 /* Either
1073 stfs [rN] = fM
1074 or
1075 stfd [rN] = fM
1076
1077 Advance over stores of floating point input registers. Again
1078 one store per register is permitted */
1079 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1080 int qp = (int) (instr & 0x0000000003fLL);
1081 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1082 {
1083 infpstores[fM-8] = 1;
1084 last_prologue_pc = next_pc;
1085 }
16461d7d
KB
1086 }
1087 else if (it == M
1088 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1089 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1090 {
1091 /* st8.spill [rN] = rM
1092 or
1093 st8.spill [rN] = rM, imm9 */
1094 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1095 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1096 int qp = (int) (instr & 0x0000000003fLL);
1097 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1098 {
1099 /* We've found a spill of one of the preserved general purpose
1100 regs. Record the spill address and advance the spill
1101 register if appropriate. */
1102 if (do_fsr_stuff)
b2fb4676 1103 get_frame_saved_regs (frame)[IA64_GR0_REGNUM + rM] = spill_addr;
16461d7d
KB
1104 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1105 /* st8.spill [rN] = rM, imm9 */
1106 spill_addr += imm9(instr);
1107 else
1108 spill_addr = 0; /* Done spilling */
1109 last_prologue_pc = next_pc;
1110 }
1111 }
16461d7d
KB
1112
1113 pc = next_pc;
1114 }
1115
1116 if (do_fsr_stuff) {
1117 int i;
1118 CORE_ADDR addr;
3a854e23
KB
1119 int sor, rrb_gr;
1120
1121 /* Extract the size of the rotating portion of the stack
1122 frame and the register rename base from the current
1123 frame marker. */
da50a4b7
AC
1124 sor = ((get_frame_extra_info (frame)->cfm >> 14) & 0xf) * 8;
1125 rrb_gr = (get_frame_extra_info (frame)->cfm >> 18) & 0x7f;
16461d7d 1126
da50a4b7
AC
1127 for (i = 0, addr = get_frame_extra_info (frame)->bsp;
1128 i < get_frame_extra_info (frame)->sof;
16461d7d
KB
1129 i++, addr += 8)
1130 {
1131 if (IS_NaT_COLLECTION_ADDR (addr))
1132 {
1133 addr += 8;
1134 }
3a854e23 1135 if (i < sor)
b2fb4676 1136 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
3a854e23
KB
1137 = addr;
1138 else
b2fb4676 1139 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + i] = addr;
16461d7d
KB
1140
1141 if (i+32 == cfm_reg)
b2fb4676 1142 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] = addr;
16461d7d 1143 if (i+32 == ret_reg)
b2fb4676 1144 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] = addr;
16461d7d 1145 if (i+32 == fp_reg)
b2fb4676 1146 get_frame_saved_regs (frame)[IA64_VFP_REGNUM] = addr;
16461d7d
KB
1147 }
1148 }
1149
da50a4b7
AC
1150 if (frame && get_frame_extra_info (frame))
1151 {
1152 get_frame_extra_info (frame)->after_prologue = last_prologue_pc;
1153 get_frame_extra_info (frame)->mem_stack_frame_size = mem_stack_frame_size;
1154 get_frame_extra_info (frame)->fp_reg = fp_reg;
1155 }
16461d7d
KB
1156
1157 return last_prologue_pc;
1158}
1159
1160CORE_ADDR
1161ia64_skip_prologue (CORE_ADDR pc)
1162{
1163 return examine_prologue (pc, pc+1024, 0);
1164}
1165
1166void
1167ia64_frame_init_saved_regs (struct frame_info *frame)
1168{
b2fb4676 1169 if (get_frame_saved_regs (frame))
16461d7d
KB
1170 return;
1171
5a203e44 1172 if ((get_frame_type (frame) == SIGTRAMP_FRAME) && SIGCONTEXT_REGISTER_ADDRESS)
244bc108
KB
1173 {
1174 int regno;
16461d7d 1175
244bc108 1176 frame_saved_regs_zalloc (frame);
16461d7d 1177
b2fb4676 1178 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] =
1e2330ba 1179 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_IP_REGNUM);
b2fb4676 1180 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] =
1e2330ba 1181 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CFM_REGNUM);
b2fb4676 1182 get_frame_saved_regs (frame)[IA64_PSR_REGNUM] =
1e2330ba 1183 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PSR_REGNUM);
244bc108 1184#if 0
b2fb4676 1185 get_frame_saved_regs (frame)[IA64_BSP_REGNUM] =
244bc108
KB
1186 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1187#endif
b2fb4676 1188 get_frame_saved_regs (frame)[IA64_RNAT_REGNUM] =
1e2330ba 1189 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_RNAT_REGNUM);
b2fb4676 1190 get_frame_saved_regs (frame)[IA64_CCV_REGNUM] =
1e2330ba 1191 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CCV_REGNUM);
b2fb4676 1192 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] =
1e2330ba 1193 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_UNAT_REGNUM);
b2fb4676 1194 get_frame_saved_regs (frame)[IA64_FPSR_REGNUM] =
1e2330ba 1195 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_FPSR_REGNUM);
b2fb4676 1196 get_frame_saved_regs (frame)[IA64_PFS_REGNUM] =
1e2330ba 1197 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PFS_REGNUM);
b2fb4676 1198 get_frame_saved_regs (frame)[IA64_LC_REGNUM] =
1e2330ba 1199 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_LC_REGNUM);
244bc108
KB
1200 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1201 if (regno != sp_regnum)
b2fb4676 1202 get_frame_saved_regs (frame)[regno] =
1e2330ba 1203 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
244bc108 1204 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
b2fb4676 1205 get_frame_saved_regs (frame)[regno] =
1e2330ba 1206 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
244bc108 1207 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
b2fb4676 1208 get_frame_saved_regs (frame)[regno] =
1e2330ba 1209 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
16461d7d
KB
1210 }
1211 else
1212 {
244bc108 1213 CORE_ADDR func_start;
16461d7d 1214
50abf9e5
AC
1215 func_start = get_pc_function_start (get_frame_pc (frame));
1216 examine_prologue (func_start, get_frame_pc (frame), frame);
244bc108 1217 }
16461d7d
KB
1218}
1219
1220void
1221ia64_get_saved_register (char *raw_buffer,
1222 int *optimized,
1223 CORE_ADDR *addrp,
1224 struct frame_info *frame,
1225 int regnum,
1226 enum lval_type *lval)
1227{
244bc108 1228 int is_dummy_frame;
16461d7d
KB
1229
1230 if (!target_has_registers)
1231 error ("No registers.");
1232
1233 if (optimized != NULL)
1234 *optimized = 0;
244bc108
KB
1235
1236 if (addrp != NULL)
1237 *addrp = 0;
1238
1239 if (lval != NULL)
1240 *lval = not_lval;
1241
1e2330ba
AC
1242 is_dummy_frame = DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
1243 get_frame_base (frame),
1244 get_frame_base (frame));
244bc108 1245
11c02a10 1246 if (regnum == SP_REGNUM && get_next_frame (frame))
16461d7d
KB
1247 {
1248 /* Handle SP values for all frames but the topmost. */
1e2330ba
AC
1249 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1250 get_frame_base (frame));
16461d7d
KB
1251 }
1252 else if (regnum == IA64_BSP_REGNUM)
1253 {
16461d7d 1254 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
da50a4b7 1255 get_frame_extra_info (frame)->bsp);
16461d7d
KB
1256 }
1257 else if (regnum == IA64_VFP_REGNUM)
1258 {
1259 /* If the function in question uses an automatic register (r32-r127)
1260 for the frame pointer, it'll be found by ia64_find_saved_register()
1261 above. If the function lacks one of these frame pointers, we can
1262 still provide a value since we know the size of the frame */
1e2330ba 1263 CORE_ADDR vfp = (get_frame_base (frame)
da50a4b7 1264 + get_frame_extra_info (frame)->mem_stack_frame_size);
16461d7d
KB
1265 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1266 }
1267 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1268 {
2fc3ac7e 1269 char *pr_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB
1270 int pr_optim;
1271 enum lval_type pr_lval;
1272 CORE_ADDR pr_addr;
1273 int prN_val;
1274 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1275 frame, IA64_PR_REGNUM, &pr_lval);
3a854e23
KB
1276 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1277 {
1278 /* Fetch predicate register rename base from current frame
1279 marker for this frame. */
da50a4b7 1280 int rrb_pr = (get_frame_extra_info (frame)->cfm >> 32) & 0x3f;
3a854e23
KB
1281
1282 /* Adjust the register number to account for register rotation. */
1283 regnum = IA64_PR16_REGNUM
1284 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1285 }
16461d7d
KB
1286 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1287 regnum - IA64_PR0_REGNUM, 1);
1288 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
16461d7d
KB
1289 }
1290 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1291 {
2fc3ac7e 1292 char *unat_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB
1293 int unat_optim;
1294 enum lval_type unat_lval;
1295 CORE_ADDR unat_addr;
1296 int unatN_val;
1297 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1298 frame, IA64_UNAT_REGNUM, &unat_lval);
1299 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1300 regnum - IA64_NAT0_REGNUM, 1);
1301 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1302 unatN_val);
16461d7d
KB
1303 }
1304 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1305 {
1306 int natval = 0;
1307 /* Find address of general register corresponding to nat bit we're
1308 interested in. */
244bc108
KB
1309 CORE_ADDR gr_addr = 0;
1310
1311 if (!is_dummy_frame)
1312 {
f30ee0bc 1313 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
b2fb4676
AC
1314 gr_addr = get_frame_saved_regs (frame)[ regnum - IA64_NAT0_REGNUM
1315 + IA64_GR0_REGNUM];
244bc108 1316 }
16461d7d
KB
1317 if (gr_addr)
1318 {
1319 /* Compute address of nat collection bits */
1320 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1321 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1322 CORE_ADDR nat_collection;
1323 int nat_bit;
1324 /* If our nat collection address is bigger than bsp, we have to get
1325 the nat collection from rnat. Otherwise, we fetch the nat
1326 collection from the computed address. */
1327 if (nat_addr >= bsp)
1328 nat_collection = read_register (IA64_RNAT_REGNUM);
1329 else
1330 nat_collection = read_memory_integer (nat_addr, 8);
1331 nat_bit = (gr_addr >> 3) & 0x3f;
1332 natval = (nat_collection >> nat_bit) & 1;
1333 }
1334 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
244bc108
KB
1335 }
1336 else if (regnum == IA64_IP_REGNUM)
1337 {
1338 CORE_ADDR pc;
11c02a10 1339 if (get_next_frame (frame))
244bc108
KB
1340 {
1341 /* FIXME: Set *addrp, *lval when possible. */
11c02a10 1342 pc = ia64_frame_saved_pc (get_next_frame (frame));
244bc108
KB
1343 }
1344 else
1345 {
1346 pc = read_pc ();
1347 }
1348 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1349 }
1350 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1351 {
1352 CORE_ADDR addr = 0;
1353 if (!is_dummy_frame)
1354 {
f30ee0bc 1355 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
b2fb4676 1356 addr = get_frame_saved_regs (frame)[regnum];
244bc108
KB
1357 }
1358
1359 if (addr != 0)
1360 {
1361 if (lval != NULL)
1362 *lval = lval_memory;
1363 if (addrp != NULL)
1364 *addrp = addr;
1365 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1366 }
1367 else
1368 {
1369 /* r32 - r127 must be fetchable via memory. If they aren't,
1370 then the register is unavailable */
1371 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1372 }
16461d7d
KB
1373 }
1374 else
1375 {
3a854e23
KB
1376 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1377 {
1378 /* Fetch floating point register rename base from current
1379 frame marker for this frame. */
da50a4b7 1380 int rrb_fr = (get_frame_extra_info (frame)->cfm >> 25) & 0x7f;
3a854e23
KB
1381
1382 /* Adjust the floating point register number to account for
1383 register rotation. */
1384 regnum = IA64_FR32_REGNUM
1385 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1386 }
1387
bdcdd535
AC
1388 deprecated_generic_get_saved_register (raw_buffer, optimized, addrp,
1389 frame, regnum, lval);
16461d7d 1390 }
16461d7d
KB
1391}
1392
1393/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1394 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1395 and TYPE is the type (which is known to be struct, union or array). */
1396int
1397ia64_use_struct_convention (int gcc_p, struct type *type)
1398{
64a5b29c
KB
1399 struct type *float_elt_type;
1400
1401 /* HFAs are structures (or arrays) consisting entirely of floating
1402 point values of the same length. Up to 8 of these are returned
1403 in registers. Don't use the struct convention when this is the
1404 case. */
1405 float_elt_type = is_float_or_hfa_type (type);
1406 if (float_elt_type != NULL
1407 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1408 return 0;
1409
1410 /* Other structs of length 32 or less are returned in r8-r11.
1411 Don't use the struct convention for those either. */
16461d7d
KB
1412 return TYPE_LENGTH (type) > 32;
1413}
1414
1415void
1416ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1417{
64a5b29c
KB
1418 struct type *float_elt_type;
1419
1420 float_elt_type = is_float_or_hfa_type (type);
1421 if (float_elt_type != NULL)
1422 {
1423 int offset = 0;
1424 int regnum = IA64_FR8_REGNUM;
1425 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1426
1427 while (n-- > 0)
1428 {
1429 ia64_register_convert_to_virtual (regnum, float_elt_type,
1430 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1431 offset += TYPE_LENGTH (float_elt_type);
1432 regnum++;
1433 }
1434 }
16461d7d 1435 else
64a5b29c
KB
1436 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1437 TYPE_LENGTH (type));
16461d7d
KB
1438}
1439
1440/* FIXME: Turn this into a stack of some sort. Unfortunately, something
1441 like this is necessary though since the IA-64 calling conventions specify
1442 that r8 is not preserved. */
1443static CORE_ADDR struct_return_address;
1444
1445CORE_ADDR
1446ia64_extract_struct_value_address (char *regbuf)
1447{
1448 /* FIXME: See above. */
1449 return struct_return_address;
1450}
1451
1452void
1453ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1454{
1455 /* FIXME: See above. */
1456 /* Note that most of the work was done in ia64_push_arguments() */
1457 struct_return_address = addr;
1458}
1459
1460int
1461ia64_frameless_function_invocation (struct frame_info *frame)
1462{
f30ee0bc 1463 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
da50a4b7 1464 return (get_frame_extra_info (frame)->mem_stack_frame_size == 0);
16461d7d
KB
1465}
1466
1467CORE_ADDR
1468ia64_saved_pc_after_call (struct frame_info *frame)
1469{
1470 return read_register (IA64_BR0_REGNUM);
1471}
1472
1473CORE_ADDR
1474ia64_frame_args_address (struct frame_info *frame)
1475{
1476 /* frame->frame points at the SP for this frame; But we want the start
1477 of the frame, not the end. Calling frame chain will get his for us. */
1478 return ia64_frame_chain (frame);
1479}
1480
1481CORE_ADDR
1482ia64_frame_locals_address (struct frame_info *frame)
1483{
1484 /* frame->frame points at the SP for this frame; But we want the start
1485 of the frame, not the end. Calling frame chain will get his for us. */
1486 return ia64_frame_chain (frame);
1487}
1488
1489void
1490ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1491{
1492 CORE_ADDR bsp, cfm;
11c02a10
AC
1493 int next_frame_is_call_dummy = ((get_next_frame (frame) != NULL)
1494 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frame)),
1495 get_frame_base (get_next_frame (frame)),
1496 get_frame_base (get_next_frame (frame))));
16461d7d 1497
a00a19e9 1498 frame_extra_info_zalloc (frame, sizeof (struct frame_extra_info));
16461d7d 1499
11c02a10 1500 if (get_next_frame (frame) == 0)
16461d7d
KB
1501 {
1502 bsp = read_register (IA64_BSP_REGNUM);
1503 cfm = read_register (IA64_CFM_REGNUM);
1504
1505 }
11c02a10 1506 else if ((get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
244bc108 1507 {
11c02a10
AC
1508 bsp = read_sigcontext_register (get_next_frame (frame), IA64_BSP_REGNUM);
1509 cfm = read_sigcontext_register (get_next_frame (frame), IA64_CFM_REGNUM);
244bc108
KB
1510 }
1511 else if (next_frame_is_call_dummy)
1512 {
11c02a10
AC
1513 bsp = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1514 get_frame_base (get_next_frame (frame)),
135c175f 1515 IA64_BSP_REGNUM);
11c02a10
AC
1516 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1517 get_frame_base (get_next_frame (frame)),
135c175f 1518 IA64_CFM_REGNUM);
244bc108 1519 }
16461d7d
KB
1520 else
1521 {
11c02a10 1522 struct frame_info *frn = get_next_frame (frame);
16461d7d 1523
f30ee0bc 1524 DEPRECATED_FRAME_INIT_SAVED_REGS (frn);
16461d7d 1525
b2fb4676
AC
1526 if (get_frame_saved_regs (frn)[IA64_CFM_REGNUM] != 0)
1527 cfm = read_memory_integer (get_frame_saved_regs (frn)[IA64_CFM_REGNUM], 8);
11c02a10
AC
1528 else if (get_next_frame (frn) && (get_frame_type (get_next_frame (frn)) == SIGTRAMP_FRAME))
1529 cfm = read_sigcontext_register (get_next_frame (frn), IA64_PFS_REGNUM);
1530 else if (get_next_frame (frn)
1531 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frn)),
1532 get_frame_base (get_next_frame (frn)),
1533 get_frame_base (get_next_frame (frn))))
1534 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frn)),
1535 get_frame_base (get_next_frame (frn)),
135c175f 1536 IA64_PFS_REGNUM);
16461d7d 1537 else
76d689a6 1538 cfm = read_register (IA64_PFS_REGNUM);
16461d7d 1539
da50a4b7 1540 bsp = get_frame_extra_info (frn)->bsp;
16461d7d 1541 }
da50a4b7
AC
1542 get_frame_extra_info (frame)->cfm = cfm;
1543 get_frame_extra_info (frame)->sof = cfm & 0x7f;
1544 get_frame_extra_info (frame)->sol = (cfm >> 7) & 0x7f;
11c02a10
AC
1545 if (get_next_frame (frame) == 0
1546 || (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME)
244bc108 1547 || next_frame_is_call_dummy)
da50a4b7
AC
1548 get_frame_extra_info (frame)->bsp =
1549 rse_address_add (bsp, -get_frame_extra_info (frame)->sof);
16461d7d 1550 else
da50a4b7
AC
1551 get_frame_extra_info (frame)->bsp =
1552 rse_address_add (bsp, -get_frame_extra_info (frame)->sol);
16461d7d 1553
da50a4b7
AC
1554 get_frame_extra_info (frame)->after_prologue = 0;
1555 get_frame_extra_info (frame)->mem_stack_frame_size = -1; /* Not yet determined */
1556 get_frame_extra_info (frame)->fp_reg = 0;
16461d7d
KB
1557}
1558
64a5b29c
KB
1559static int
1560is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1561{
1562 switch (TYPE_CODE (t))
1563 {
1564 case TYPE_CODE_FLT:
1565 if (*etp)
1566 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1567 else
1568 {
1569 *etp = t;
1570 return 1;
1571 }
1572 break;
1573 case TYPE_CODE_ARRAY:
98f96ba1
KB
1574 return
1575 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
1576 etp);
64a5b29c
KB
1577 break;
1578 case TYPE_CODE_STRUCT:
1579 {
1580 int i;
1581
1582 for (i = 0; i < TYPE_NFIELDS (t); i++)
98f96ba1
KB
1583 if (!is_float_or_hfa_type_recurse
1584 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
64a5b29c
KB
1585 return 0;
1586 return 1;
1587 }
1588 break;
1589 default:
1590 return 0;
1591 break;
1592 }
1593}
1594
1595/* Determine if the given type is one of the floating point types or
1596 and HFA (which is a struct, array, or combination thereof whose
1597 bottom-most elements are all of the same floating point type.) */
1598
1599static struct type *
1600is_float_or_hfa_type (struct type *t)
1601{
1602 struct type *et = 0;
1603
1604 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1605}
1606
1607
98f96ba1
KB
1608/* Return 1 if the alignment of T is such that the next even slot
1609 should be used. Return 0, if the next available slot should
1610 be used. (See section 8.5.1 of the IA-64 Software Conventions
1611 and Runtime manual.) */
1612
1613static int
1614slot_alignment_is_next_even (struct type *t)
1615{
1616 switch (TYPE_CODE (t))
1617 {
1618 case TYPE_CODE_INT:
1619 case TYPE_CODE_FLT:
1620 if (TYPE_LENGTH (t) > 8)
1621 return 1;
1622 else
1623 return 0;
1624 case TYPE_CODE_ARRAY:
1625 return
1626 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
1627 case TYPE_CODE_STRUCT:
1628 {
1629 int i;
1630
1631 for (i = 0; i < TYPE_NFIELDS (t); i++)
1632 if (slot_alignment_is_next_even
1633 (check_typedef (TYPE_FIELD_TYPE (t, i))))
1634 return 1;
1635 return 0;
1636 }
1637 default:
1638 return 0;
1639 }
1640}
1641
64a5b29c
KB
1642/* Attempt to find (and return) the global pointer for the given
1643 function.
1644
1645 This is a rather nasty bit of code searchs for the .dynamic section
1646 in the objfile corresponding to the pc of the function we're trying
1647 to call. Once it finds the addresses at which the .dynamic section
1648 lives in the child process, it scans the Elf64_Dyn entries for a
1649 DT_PLTGOT tag. If it finds one of these, the corresponding
1650 d_un.d_ptr value is the global pointer. */
1651
1652static CORE_ADDR
698cb3f0 1653generic_elf_find_global_pointer (CORE_ADDR faddr)
64a5b29c 1654{
76d689a6 1655 struct obj_section *faddr_sect;
64a5b29c 1656
76d689a6
KB
1657 faddr_sect = find_pc_section (faddr);
1658 if (faddr_sect != NULL)
64a5b29c
KB
1659 {
1660 struct obj_section *osect;
1661
76d689a6 1662 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB
1663 {
1664 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1665 break;
1666 }
1667
76d689a6 1668 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB
1669 {
1670 CORE_ADDR addr;
1671
1672 addr = osect->addr;
1673 while (addr < osect->endaddr)
1674 {
1675 int status;
1676 LONGEST tag;
1677 char buf[8];
1678
1679 status = target_read_memory (addr, buf, sizeof (buf));
1680 if (status != 0)
1681 break;
1682 tag = extract_signed_integer (buf, sizeof (buf));
1683
1684 if (tag == DT_PLTGOT)
1685 {
1686 CORE_ADDR global_pointer;
1687
1688 status = target_read_memory (addr + 8, buf, sizeof (buf));
1689 if (status != 0)
1690 break;
1691 global_pointer = extract_address (buf, sizeof (buf));
1692
1693 /* The payoff... */
1694 return global_pointer;
1695 }
1696
1697 if (tag == DT_NULL)
1698 break;
1699
1700 addr += 16;
1701 }
1702 }
1703 }
1704 return 0;
1705}
1706
1707/* Given a function's address, attempt to find (and return) the
1708 corresponding (canonical) function descriptor. Return 0 if
1709 not found. */
1710static CORE_ADDR
1711find_extant_func_descr (CORE_ADDR faddr)
1712{
76d689a6 1713 struct obj_section *faddr_sect;
64a5b29c
KB
1714
1715 /* Return early if faddr is already a function descriptor */
76d689a6
KB
1716 faddr_sect = find_pc_section (faddr);
1717 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
64a5b29c
KB
1718 return faddr;
1719
76d689a6 1720 if (faddr_sect != NULL)
64a5b29c 1721 {
76d689a6
KB
1722 struct obj_section *osect;
1723 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB
1724 {
1725 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1726 break;
1727 }
1728
76d689a6 1729 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB
1730 {
1731 CORE_ADDR addr;
1732
1733 addr = osect->addr;
1734 while (addr < osect->endaddr)
1735 {
1736 int status;
1737 LONGEST faddr2;
1738 char buf[8];
1739
1740 status = target_read_memory (addr, buf, sizeof (buf));
1741 if (status != 0)
1742 break;
1743 faddr2 = extract_signed_integer (buf, sizeof (buf));
1744
1745 if (faddr == faddr2)
1746 return addr;
1747
1748 addr += 16;
1749 }
1750 }
1751 }
1752 return 0;
1753}
1754
1755/* Attempt to find a function descriptor corresponding to the
1756 given address. If none is found, construct one on the
1757 stack using the address at fdaptr */
1758
1759static CORE_ADDR
1760find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1761{
1762 CORE_ADDR fdesc;
1763
1764 fdesc = find_extant_func_descr (faddr);
1765
1766 if (fdesc == 0)
1767 {
1768 CORE_ADDR global_pointer;
1769 char buf[16];
1770
1771 fdesc = *fdaptr;
1772 *fdaptr += 16;
1773
698cb3f0 1774 global_pointer = FIND_GLOBAL_POINTER (faddr);
64a5b29c
KB
1775
1776 if (global_pointer == 0)
1777 global_pointer = read_register (IA64_GR1_REGNUM);
1778
1779 store_address (buf, 8, faddr);
1780 store_address (buf + 8, 8, global_pointer);
1781
1782 write_memory (fdesc, buf, 16);
1783 }
1784
1785 return fdesc;
1786}
16461d7d
KB
1787
1788CORE_ADDR
ea7c478f 1789ia64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
16461d7d
KB
1790 int struct_return, CORE_ADDR struct_addr)
1791{
1792 int argno;
ea7c478f 1793 struct value *arg;
16461d7d
KB
1794 struct type *type;
1795 int len, argoffset;
64a5b29c 1796 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 1797 int floatreg;
64a5b29c 1798 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
16461d7d
KB
1799
1800 nslots = 0;
64a5b29c 1801 nfuncargs = 0;
16461d7d
KB
1802 /* Count the number of slots needed for the arguments */
1803 for (argno = 0; argno < nargs; argno++)
1804 {
1805 arg = args[argno];
1806 type = check_typedef (VALUE_TYPE (arg));
1807 len = TYPE_LENGTH (type);
1808
98f96ba1 1809 if ((nslots & 1) && slot_alignment_is_next_even (type))
16461d7d
KB
1810 nslots++;
1811
64a5b29c
KB
1812 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1813 nfuncargs++;
1814
16461d7d
KB
1815 nslots += (len + 7) / 8;
1816 }
1817
64a5b29c 1818 /* Divvy up the slots between the RSE and the memory stack */
16461d7d
KB
1819 rseslots = (nslots > 8) ? 8 : nslots;
1820 memslots = nslots - rseslots;
1821
64a5b29c 1822 /* Allocate a new RSE frame */
16461d7d
KB
1823 cfm = read_register (IA64_CFM_REGNUM);
1824
1825 bsp = read_register (IA64_BSP_REGNUM);
1826 bsp = rse_address_add (bsp, cfm & 0x7f);
1827 new_bsp = rse_address_add (bsp, rseslots);
1828 write_register (IA64_BSP_REGNUM, new_bsp);
1829
1830 pfs = read_register (IA64_PFS_REGNUM);
1831 pfs &= 0xc000000000000000LL;
1832 pfs |= (cfm & 0xffffffffffffLL);
1833 write_register (IA64_PFS_REGNUM, pfs);
1834
1835 cfm &= 0xc000000000000000LL;
1836 cfm |= rseslots;
1837 write_register (IA64_CFM_REGNUM, cfm);
1838
64a5b29c
KB
1839 /* We will attempt to find function descriptors in the .opd segment,
1840 but if we can't we'll construct them ourselves. That being the
1841 case, we'll need to reserve space on the stack for them. */
1842 funcdescaddr = sp - nfuncargs * 16;
1843 funcdescaddr &= ~0xfLL;
1844
1845 /* Adjust the stack pointer to it's new value. The calling conventions
1846 require us to have 16 bytes of scratch, plus whatever space is
1847 necessary for the memory slots and our function descriptors */
1848 sp = sp - 16 - (memslots + nfuncargs) * 8;
16461d7d
KB
1849 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1850
64a5b29c
KB
1851 /* Place the arguments where they belong. The arguments will be
1852 either placed in the RSE backing store or on the memory stack.
1853 In addition, floating point arguments or HFAs are placed in
1854 floating point registers. */
16461d7d
KB
1855 slotnum = 0;
1856 floatreg = IA64_FR8_REGNUM;
1857 for (argno = 0; argno < nargs; argno++)
1858 {
64a5b29c
KB
1859 struct type *float_elt_type;
1860
16461d7d
KB
1861 arg = args[argno];
1862 type = check_typedef (VALUE_TYPE (arg));
1863 len = TYPE_LENGTH (type);
64a5b29c
KB
1864
1865 /* Special handling for function parameters */
1866 if (len == 8
1867 && TYPE_CODE (type) == TYPE_CODE_PTR
1868 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1869 {
1870 char val_buf[8];
1871
1872 store_address (val_buf, 8,
1873 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1874 &funcdescaddr));
1875 if (slotnum < rseslots)
1876 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1877 else
1878 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1879 slotnum++;
1880 continue;
1881 }
1882
1883 /* Normal slots */
98f96ba1
KB
1884
1885 /* Skip odd slot if necessary... */
1886 if ((slotnum & 1) && slot_alignment_is_next_even (type))
16461d7d 1887 slotnum++;
98f96ba1 1888
16461d7d
KB
1889 argoffset = 0;
1890 while (len > 0)
1891 {
1892 char val_buf[8];
1893
1894 memset (val_buf, 0, 8);
1895 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1896
1897 if (slotnum < rseslots)
1898 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1899 else
1900 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1901
1902 argoffset += 8;
1903 len -= 8;
1904 slotnum++;
1905 }
64a5b29c
KB
1906
1907 /* Handle floating point types (including HFAs) */
1908 float_elt_type = is_float_or_hfa_type (type);
1909 if (float_elt_type != NULL)
1910 {
1911 argoffset = 0;
1912 len = TYPE_LENGTH (type);
1913 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1914 {
1915 ia64_register_convert_to_raw (
1916 float_elt_type,
1917 floatreg,
1918 VALUE_CONTENTS (arg) + argoffset,
524d7c18 1919 &deprecated_registers[REGISTER_BYTE (floatreg)]);
64a5b29c
KB
1920 floatreg++;
1921 argoffset += TYPE_LENGTH (float_elt_type);
1922 len -= TYPE_LENGTH (float_elt_type);
1923 }
16461d7d
KB
1924 }
1925 }
1926
64a5b29c 1927 /* Store the struct return value in r8 if necessary. */
16461d7d
KB
1928 if (struct_return)
1929 {
524d7c18 1930 store_address (&deprecated_registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
16461d7d
KB
1931 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1932 struct_addr);
1933 }
1934
64a5b29c 1935 /* Sync gdb's idea of what the registers are with the target. */
16461d7d
KB
1936 target_store_registers (-1);
1937
1938 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1939 to be defined to call generic_save_dummy_frame_tos(). But at the
1940 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1941 I chose to put this call here instead of using the old mechanisms.
1942 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1943 line
1944
1945 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1946
1947 to ia64_gdbarch_init() and remove the line below. */
1948 generic_save_dummy_frame_tos (sp);
1949
1950 return sp;
1951}
1952
1953CORE_ADDR
1954ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1955{
698cb3f0 1956 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
16461d7d 1957
64a5b29c
KB
1958 if (global_pointer != 0)
1959 write_register (IA64_GR1_REGNUM, global_pointer);
16461d7d
KB
1960
1961 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1962 return sp;
1963}
1964
1965void
1966ia64_store_return_value (struct type *type, char *valbuf)
1967{
1968 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1969 {
1970 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
524d7c18 1971 &deprecated_registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
16461d7d
KB
1972 target_store_registers (IA64_FR8_REGNUM);
1973 }
1974 else
73937e03
AC
1975 deprecated_write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1976 valbuf, TYPE_LENGTH (type));
16461d7d
KB
1977}
1978
1979void
1980ia64_pop_frame (void)
1981{
1982 generic_pop_current_frame (ia64_pop_frame_regular);
1983}
1984
1985static void
1986ia64_pop_frame_regular (struct frame_info *frame)
1987{
1988 int regno;
1989 CORE_ADDR bsp, cfm, pfs;
1990
f30ee0bc 1991 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
16461d7d
KB
1992
1993 for (regno = 0; regno < ia64_num_regs; regno++)
1994 {
b2fb4676 1995 if (get_frame_saved_regs (frame)[regno]
16461d7d
KB
1996 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1997 && regno != pc_regnum
1998 && regno != sp_regnum
1999 && regno != IA64_PFS_REGNUM
2000 && regno != IA64_CFM_REGNUM
2001 && regno != IA64_BSP_REGNUM
2002 && regno != IA64_BSPSTORE_REGNUM)
2003 {
2004 write_register (regno,
b2fb4676 2005 read_memory_integer (get_frame_saved_regs (frame)[regno],
16461d7d
KB
2006 REGISTER_RAW_SIZE (regno)));
2007 }
2008 }
2009
2010 write_register (sp_regnum, FRAME_CHAIN (frame));
2011 write_pc (FRAME_SAVED_PC (frame));
2012
2013 cfm = read_register (IA64_CFM_REGNUM);
2014
b2fb4676 2015 if (get_frame_saved_regs (frame)[IA64_PFS_REGNUM])
16461d7d 2016 {
b2fb4676 2017 pfs = read_memory_integer (get_frame_saved_regs (frame)[IA64_PFS_REGNUM],
16461d7d
KB
2018 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
2019 }
2020 else
2021 pfs = read_register (IA64_PFS_REGNUM);
2022
2023 /* Compute the new bsp by *adding* the difference between the
2024 size of the frame and the size of the locals (both wrt the
2025 frame that we're going back to). This seems kind of strange,
2026 especially since it seems like we ought to be subtracting the
ca557f44 2027 size of the locals... and we should; but the Linux kernel
16461d7d
KB
2028 wants bsp to be set at the end of all used registers. It's
2029 likely that this code will need to be revised to accomodate
2030 other operating systems. */
da50a4b7 2031 bsp = rse_address_add (get_frame_extra_info (frame)->bsp,
16461d7d
KB
2032 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
2033 write_register (IA64_BSP_REGNUM, bsp);
2034
2035 /* FIXME: What becomes of the epilog count in the PFS? */
2036 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
2037 write_register (IA64_CFM_REGNUM, cfm);
2038
2039 flush_cached_frames ();
2040}
2041
2042static void
2043ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
2044 CORE_ADDR *targ_addr, int *targ_len)
2045{
2046 *targ_addr = memaddr;
2047 *targ_len = nr_bytes;
2048}
2049
244bc108
KB
2050static void
2051process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
2052{
2053 int *os_ident_ptr = obj;
2054 const char *name;
2055 unsigned int sectsize;
2056
2057 name = bfd_get_section_name (abfd, sect);
2058 sectsize = bfd_section_size (abfd, sect);
2059 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
2060 {
2061 unsigned int name_length, data_length, note_type;
2062 char *note = alloca (sectsize);
2063
2064 bfd_get_section_contents (abfd, sect, note,
2065 (file_ptr) 0, (bfd_size_type) sectsize);
2066
2067 name_length = bfd_h_get_32 (abfd, note);
2068 data_length = bfd_h_get_32 (abfd, note + 4);
2069 note_type = bfd_h_get_32 (abfd, note + 8);
2070
2071 if (name_length == 4 && data_length == 16 && note_type == 1
2072 && strcmp (note + 12, "GNU") == 0)
2073 {
2074 int os_number = bfd_h_get_32 (abfd, note + 16);
2075
2076 /* The case numbers are from abi-tags in glibc */
2077 switch (os_number)
2078 {
2079 case 0 :
2080 *os_ident_ptr = ELFOSABI_LINUX;
2081 break;
244bc108
KB
2082 case 1 :
2083 *os_ident_ptr = ELFOSABI_HURD;
2084 break;
2085 case 2 :
2086 *os_ident_ptr = ELFOSABI_SOLARIS;
2087 break;
244bc108 2088 default :
8e65ff28
AC
2089 internal_error (__FILE__, __LINE__,
2090 "process_note_abi_sections: unknown OS number %d", os_number);
244bc108
KB
2091 break;
2092 }
2093 }
2094 }
2095}
2096
16461d7d
KB
2097static struct gdbarch *
2098ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2099{
2100 struct gdbarch *gdbarch;
244bc108
KB
2101 struct gdbarch_tdep *tdep;
2102 int os_ident;
2103
2104 if (info.abfd != NULL
2105 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
2106 {
2107 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
2108
ca557f44
AC
2109 /* If os_ident is 0, it is not necessarily the case that we're
2110 on a SYSV system. (ELFOSABI_NONE is defined to be 0.)
2111 GNU/Linux uses a note section to record OS/ABI info, but
2112 leaves e_ident[EI_OSABI] zero. So we have to check for note
2113 sections too. */
244bc108
KB
2114 if (os_ident == 0)
2115 {
2116 bfd_map_over_sections (info.abfd,
2117 process_note_abi_tag_sections,
2118 &os_ident);
2119 }
2120 }
2121 else
2122 os_ident = -1;
16461d7d 2123
244bc108
KB
2124 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2125 arches != NULL;
2126 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2127 {
57bc8964
KB
2128 tdep = gdbarch_tdep (arches->gdbarch);
2129 if (tdep &&tdep->os_ident == os_ident)
2130 return arches->gdbarch;
244bc108 2131 }
16461d7d 2132
244bc108
KB
2133 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2134 gdbarch = gdbarch_alloc (&info, tdep);
2135 tdep->os_ident = os_ident;
2136
a5afb99f
AC
2137 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2138 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2139 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
d7fa2ae2
KB
2140
2141 /* Set the method of obtaining the sigcontext addresses at which
2142 registers are saved. The method of checking to see if
2143 native_find_global_pointer is nonzero to indicate that we're
2144 on AIX is kind of hokey, but I can't think of a better way
2145 to do it. */
244bc108
KB
2146 if (os_ident == ELFOSABI_LINUX)
2147 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
d7fa2ae2
KB
2148 else if (native_find_global_pointer != 0)
2149 tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
244bc108
KB
2150 else
2151 tdep->sigcontext_register_address = 0;
16461d7d 2152
ca557f44
AC
2153 /* We know that GNU/Linux won't have to resort to the
2154 native_find_global_pointer hackery. But that's the only one we
2155 know about so far, so if native_find_global_pointer is set to
2156 something non-zero, then use it. Otherwise fall back to using
2157 generic_elf_find_global_pointer. This arrangement should (in
2158 theory) allow us to cross debug GNU/Linux binaries from an AIX
2159 machine. */
698cb3f0
KB
2160 if (os_ident == ELFOSABI_LINUX)
2161 tdep->find_global_pointer = generic_elf_find_global_pointer;
2162 else if (native_find_global_pointer != 0)
2163 tdep->find_global_pointer = native_find_global_pointer;
2164 else
2165 tdep->find_global_pointer = generic_elf_find_global_pointer;
2166
16461d7d
KB
2167 set_gdbarch_short_bit (gdbarch, 16);
2168 set_gdbarch_int_bit (gdbarch, 32);
2169 set_gdbarch_long_bit (gdbarch, 64);
2170 set_gdbarch_long_long_bit (gdbarch, 64);
2171 set_gdbarch_float_bit (gdbarch, 32);
2172 set_gdbarch_double_bit (gdbarch, 64);
2173 set_gdbarch_long_double_bit (gdbarch, 64);
2174 set_gdbarch_ptr_bit (gdbarch, 64);
2175
2176 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2177 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
2178 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
2179 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
698cb3f0 2180 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
16461d7d
KB
2181
2182 set_gdbarch_register_name (gdbarch, ia64_register_name);
2183 set_gdbarch_register_size (gdbarch, 8);
2184 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
2185 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2186 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
2187 set_gdbarch_max_register_raw_size (gdbarch, 16);
2188 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
2189 set_gdbarch_max_register_virtual_size (gdbarch, 16);
2190 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2191
2192 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2193
2194 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2195 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2196
2197 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
2198
2199 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
16461d7d
KB
2200 set_gdbarch_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
2201
f30ee0bc 2202 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
16461d7d
KB
2203 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
2204
2205 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
2206 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2207 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
2208
2209 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
26e9b323 2210 set_gdbarch_deprecated_extract_return_value (gdbarch, ia64_extract_return_value);
16461d7d
KB
2211
2212 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
ebba8386 2213 set_gdbarch_deprecated_store_return_value (gdbarch, ia64_store_return_value);
26e9b323 2214 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
16461d7d
KB
2215
2216 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2217 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2218 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2219 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2220 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2221
2222 /* Settings for calling functions in the inferior. */
16461d7d
KB
2223 set_gdbarch_call_dummy_length (gdbarch, 0);
2224 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
2225 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
2226 set_gdbarch_pop_frame (gdbarch, ia64_pop_frame);
2227
2228 set_gdbarch_call_dummy_p (gdbarch, 1);
2229 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
2230 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
2231 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
e9582e71 2232 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
16461d7d
KB
2233 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2234 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2235
2236 /* We won't necessarily have a frame pointer and even if we do,
2237 it winds up being extraordinarly messy when attempting to find
2238 the frame chain. So for the purposes of creating frames (which
2239 is all read_fp() is used for), simply use the stack pointer value
2240 instead. */
2241 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
16461d7d
KB
2242
2243 /* Settings that should be unnecessary. */
2244 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2245
2246 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2247 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2248
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KB
2249 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2250 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2251 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
16461d7d 2252 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
16461d7d
KB
2253 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2254
2255 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2256 set_gdbarch_function_start_offset (gdbarch, 0);
4156bb53 2257 set_gdbarch_frame_args_skip (gdbarch, 0);
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KB
2258
2259 set_gdbarch_remote_translate_xfer_address (
2260 gdbarch, ia64_remote_translate_xfer_address);
2261
2262 return gdbarch;
2263}
2264
2265void
2266_initialize_ia64_tdep (void)
2267{
2268 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2269
2270 tm_print_insn = print_insn_ia64;
2271 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2272}
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