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9fc9f5e2 AC |
1 | /* Target-dependent code for the ia64. |
2 | ||
7b6bb8da | 3 | Copyright (C) 2004, 2005, 2007, 2008, 2009, 2010, 2011 |
4c38e0a4 | 4 | Free Software Foundation, Inc. |
9fc9f5e2 AC |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 10 | the Free Software Foundation; either version 3 of the License, or |
9fc9f5e2 AC |
11 | (at your option) any later version. |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
9fc9f5e2 AC |
20 | |
21 | #ifndef IA64_TDEP_H | |
22 | #define IA64_TDEP_H | |
23 | ||
4b48ac22 MK |
24 | /* Register numbers of various important registers. */ |
25 | ||
26 | /* General registers; there are 128 of these 64 bit wide registers. | |
27 | The first 32 are static and the last 96 are stacked. */ | |
28 | #define IA64_GR0_REGNUM 0 | |
29 | #define IA64_GR1_REGNUM (IA64_GR0_REGNUM + 1) | |
30 | #define IA64_GR2_REGNUM (IA64_GR0_REGNUM + 2) | |
31 | #define IA64_GR3_REGNUM (IA64_GR0_REGNUM + 3) | |
32 | #define IA64_GR4_REGNUM (IA64_GR0_REGNUM + 4) | |
33 | #define IA64_GR5_REGNUM (IA64_GR0_REGNUM + 5) | |
34 | #define IA64_GR6_REGNUM (IA64_GR0_REGNUM + 6) | |
35 | #define IA64_GR7_REGNUM (IA64_GR0_REGNUM + 7) | |
36 | #define IA64_GR8_REGNUM (IA64_GR0_REGNUM + 8) | |
37 | #define IA64_GR9_REGNUM (IA64_GR0_REGNUM + 9) | |
38 | #define IA64_GR10_REGNUM (IA64_GR0_REGNUM + 10) | |
39 | #define IA64_GR11_REGNUM (IA64_GR0_REGNUM + 11) | |
40 | #define IA64_GR12_REGNUM (IA64_GR0_REGNUM + 12) | |
41 | #define IA64_GR31_REGNUM (IA64_GR0_REGNUM + 31) | |
42 | #define IA64_GR32_REGNUM (IA64_GR0_REGNUM + 32) | |
43 | #define IA64_GR127_REGNUM (IA64_GR0_REGNUM + 127) | |
44 | ||
45 | /* Floating point registers; 128 82-bit wide registers. */ | |
46 | #define IA64_FR0_REGNUM 128 | |
47 | #define IA64_FR1_REGNUM (IA64_FR0_REGNUM + 1) | |
48 | #define IA64_FR2_REGNUM (IA64_FR0_REGNUM + 2) | |
49 | #define IA64_FR8_REGNUM (IA64_FR0_REGNUM + 8) | |
50 | #define IA64_FR9_REGNUM (IA64_FR0_REGNUM + 9) | |
51 | #define IA64_FR10_REGNUM (IA64_FR0_REGNUM + 10) | |
52 | #define IA64_FR11_REGNUM (IA64_FR0_REGNUM + 11) | |
53 | #define IA64_FR12_REGNUM (IA64_FR0_REGNUM + 12) | |
54 | #define IA64_FR13_REGNUM (IA64_FR0_REGNUM + 13) | |
55 | #define IA64_FR14_REGNUM (IA64_FR0_REGNUM + 14) | |
56 | #define IA64_FR15_REGNUM (IA64_FR0_REGNUM + 15) | |
57 | #define IA64_FR16_REGNUM (IA64_FR0_REGNUM + 16) | |
58 | #define IA64_FR31_REGNUM (IA64_FR0_REGNUM + 31) | |
59 | #define IA64_FR32_REGNUM (IA64_FR0_REGNUM + 32) | |
60 | #define IA64_FR127_REGNUM (IA64_FR0_REGNUM + 127) | |
61 | ||
62 | /* Predicate registers; There are 64 of these one bit registers. It'd | |
63 | be more convenient (implementation-wise) to use a single 64 bit | |
64 | word with all of these register in them. Note that there's also a | |
65 | IA64_PR_REGNUM below which contains all the bits and is used for | |
66 | communicating the actual values to the target. */ | |
67 | #define IA64_PR0_REGNUM 256 | |
68 | #define IA64_PR1_REGNUM (IA64_PR0_REGNUM + 1) | |
69 | #define IA64_PR2_REGNUM (IA64_PR0_REGNUM + 2) | |
70 | #define IA64_PR3_REGNUM (IA64_PR0_REGNUM + 3) | |
71 | #define IA64_PR4_REGNUM (IA64_PR0_REGNUM + 4) | |
72 | #define IA64_PR5_REGNUM (IA64_PR0_REGNUM + 5) | |
73 | #define IA64_PR6_REGNUM (IA64_PR0_REGNUM + 6) | |
74 | #define IA64_PR7_REGNUM (IA64_PR0_REGNUM + 7) | |
75 | #define IA64_PR8_REGNUM (IA64_PR0_REGNUM + 8) | |
76 | #define IA64_PR9_REGNUM (IA64_PR0_REGNUM + 9) | |
77 | #define IA64_PR10_REGNUM (IA64_PR0_REGNUM + 10) | |
78 | #define IA64_PR11_REGNUM (IA64_PR0_REGNUM + 11) | |
79 | #define IA64_PR12_REGNUM (IA64_PR0_REGNUM + 12) | |
80 | #define IA64_PR13_REGNUM (IA64_PR0_REGNUM + 13) | |
81 | #define IA64_PR14_REGNUM (IA64_PR0_REGNUM + 14) | |
82 | #define IA64_PR15_REGNUM (IA64_PR0_REGNUM + 15) | |
83 | #define IA64_PR16_REGNUM (IA64_PR0_REGNUM + 16) | |
84 | #define IA64_PR17_REGNUM (IA64_PR0_REGNUM + 17) | |
85 | #define IA64_PR18_REGNUM (IA64_PR0_REGNUM + 18) | |
86 | #define IA64_PR19_REGNUM (IA64_PR0_REGNUM + 19) | |
87 | #define IA64_PR20_REGNUM (IA64_PR0_REGNUM + 20) | |
88 | #define IA64_PR21_REGNUM (IA64_PR0_REGNUM + 21) | |
89 | #define IA64_PR22_REGNUM (IA64_PR0_REGNUM + 22) | |
90 | #define IA64_PR23_REGNUM (IA64_PR0_REGNUM + 23) | |
91 | #define IA64_PR24_REGNUM (IA64_PR0_REGNUM + 24) | |
92 | #define IA64_PR25_REGNUM (IA64_PR0_REGNUM + 25) | |
93 | #define IA64_PR26_REGNUM (IA64_PR0_REGNUM + 26) | |
94 | #define IA64_PR27_REGNUM (IA64_PR0_REGNUM + 27) | |
95 | #define IA64_PR28_REGNUM (IA64_PR0_REGNUM + 28) | |
96 | #define IA64_PR29_REGNUM (IA64_PR0_REGNUM + 29) | |
97 | #define IA64_PR30_REGNUM (IA64_PR0_REGNUM + 30) | |
98 | #define IA64_PR31_REGNUM (IA64_PR0_REGNUM + 31) | |
99 | #define IA64_PR32_REGNUM (IA64_PR0_REGNUM + 32) | |
100 | #define IA64_PR33_REGNUM (IA64_PR0_REGNUM + 33) | |
101 | #define IA64_PR34_REGNUM (IA64_PR0_REGNUM + 34) | |
102 | #define IA64_PR35_REGNUM (IA64_PR0_REGNUM + 35) | |
103 | #define IA64_PR36_REGNUM (IA64_PR0_REGNUM + 36) | |
104 | #define IA64_PR37_REGNUM (IA64_PR0_REGNUM + 37) | |
105 | #define IA64_PR38_REGNUM (IA64_PR0_REGNUM + 38) | |
106 | #define IA64_PR39_REGNUM (IA64_PR0_REGNUM + 39) | |
107 | #define IA64_PR40_REGNUM (IA64_PR0_REGNUM + 40) | |
108 | #define IA64_PR41_REGNUM (IA64_PR0_REGNUM + 41) | |
109 | #define IA64_PR42_REGNUM (IA64_PR0_REGNUM + 42) | |
110 | #define IA64_PR43_REGNUM (IA64_PR0_REGNUM + 43) | |
111 | #define IA64_PR44_REGNUM (IA64_PR0_REGNUM + 44) | |
112 | #define IA64_PR45_REGNUM (IA64_PR0_REGNUM + 45) | |
113 | #define IA64_PR46_REGNUM (IA64_PR0_REGNUM + 46) | |
114 | #define IA64_PR47_REGNUM (IA64_PR0_REGNUM + 47) | |
115 | #define IA64_PR48_REGNUM (IA64_PR0_REGNUM + 48) | |
116 | #define IA64_PR49_REGNUM (IA64_PR0_REGNUM + 49) | |
117 | #define IA64_PR50_REGNUM (IA64_PR0_REGNUM + 50) | |
118 | #define IA64_PR51_REGNUM (IA64_PR0_REGNUM + 51) | |
119 | #define IA64_PR52_REGNUM (IA64_PR0_REGNUM + 52) | |
120 | #define IA64_PR53_REGNUM (IA64_PR0_REGNUM + 53) | |
121 | #define IA64_PR54_REGNUM (IA64_PR0_REGNUM + 54) | |
122 | #define IA64_PR55_REGNUM (IA64_PR0_REGNUM + 55) | |
123 | #define IA64_PR56_REGNUM (IA64_PR0_REGNUM + 56) | |
124 | #define IA64_PR57_REGNUM (IA64_PR0_REGNUM + 57) | |
125 | #define IA64_PR58_REGNUM (IA64_PR0_REGNUM + 58) | |
126 | #define IA64_PR59_REGNUM (IA64_PR0_REGNUM + 59) | |
127 | #define IA64_PR60_REGNUM (IA64_PR0_REGNUM + 60) | |
128 | #define IA64_PR61_REGNUM (IA64_PR0_REGNUM + 61) | |
129 | #define IA64_PR62_REGNUM (IA64_PR0_REGNUM + 62) | |
130 | #define IA64_PR63_REGNUM (IA64_PR0_REGNUM + 63) | |
131 | ||
132 | /* Branch registers: 8 64-bit registers for holding branch targets. */ | |
133 | #define IA64_BR0_REGNUM 320 | |
134 | #define IA64_BR1_REGNUM (IA64_BR0_REGNUM + 1) | |
135 | #define IA64_BR2_REGNUM (IA64_BR0_REGNUM + 2) | |
136 | #define IA64_BR3_REGNUM (IA64_BR0_REGNUM + 3) | |
137 | #define IA64_BR4_REGNUM (IA64_BR0_REGNUM + 4) | |
138 | #define IA64_BR5_REGNUM (IA64_BR0_REGNUM + 5) | |
139 | #define IA64_BR6_REGNUM (IA64_BR0_REGNUM + 6) | |
140 | #define IA64_BR7_REGNUM (IA64_BR0_REGNUM + 7) | |
141 | ||
142 | /* Virtual frame pointer; this matches IA64_FRAME_POINTER_REGNUM in | |
143 | gcc/config/ia64/ia64.h. */ | |
144 | #define IA64_VFP_REGNUM 328 | |
145 | ||
146 | /* Virtual return address pointer; this matches | |
147 | IA64_RETURN_ADDRESS_POINTER_REGNUM in gcc/config/ia64/ia64.h. */ | |
148 | #define IA64_VRAP_REGNUM 329 | |
149 | ||
150 | /* Predicate registers: There are 64 of these 1-bit registers. We | |
151 | define a single register which is used to communicate these values | |
152 | to/from the target. We will somehow contrive to make it appear | |
153 | that IA64_PR0_REGNUM thru IA64_PR63_REGNUM hold the actual values. */ | |
154 | #define IA64_PR_REGNUM 330 | |
155 | ||
156 | /* Instruction pointer: 64 bits wide. */ | |
157 | #define IA64_IP_REGNUM 331 | |
158 | ||
159 | /* Process Status Register. */ | |
160 | #define IA64_PSR_REGNUM 332 | |
161 | ||
162 | /* Current Frame Marker (raw form may be the cr.ifs). */ | |
163 | #define IA64_CFM_REGNUM 333 | |
164 | ||
165 | /* Application registers; 128 64-bit wide registers possible, but some | |
166 | of them are reserved. */ | |
167 | #define IA64_AR0_REGNUM 334 | |
168 | #define IA64_KR0_REGNUM (IA64_AR0_REGNUM + 0) | |
169 | #define IA64_KR7_REGNUM (IA64_KR0_REGNUM + 7) | |
170 | ||
171 | #define IA64_RSC_REGNUM (IA64_AR0_REGNUM + 16) | |
172 | #define IA64_BSP_REGNUM (IA64_AR0_REGNUM + 17) | |
173 | #define IA64_BSPSTORE_REGNUM (IA64_AR0_REGNUM + 18) | |
174 | #define IA64_RNAT_REGNUM (IA64_AR0_REGNUM + 19) | |
175 | #define IA64_FCR_REGNUM (IA64_AR0_REGNUM + 21) | |
176 | #define IA64_EFLAG_REGNUM (IA64_AR0_REGNUM + 24) | |
177 | #define IA64_CSD_REGNUM (IA64_AR0_REGNUM + 25) | |
178 | #define IA64_SSD_REGNUM (IA64_AR0_REGNUM + 26) | |
179 | #define IA64_CFLG_REGNUM (IA64_AR0_REGNUM + 27) | |
180 | #define IA64_FSR_REGNUM (IA64_AR0_REGNUM + 28) | |
181 | #define IA64_FIR_REGNUM (IA64_AR0_REGNUM + 29) | |
182 | #define IA64_FDR_REGNUM (IA64_AR0_REGNUM + 30) | |
183 | #define IA64_CCV_REGNUM (IA64_AR0_REGNUM + 32) | |
184 | #define IA64_UNAT_REGNUM (IA64_AR0_REGNUM + 36) | |
185 | #define IA64_FPSR_REGNUM (IA64_AR0_REGNUM + 40) | |
186 | #define IA64_ITC_REGNUM (IA64_AR0_REGNUM + 44) | |
187 | #define IA64_PFS_REGNUM (IA64_AR0_REGNUM + 64) | |
188 | #define IA64_LC_REGNUM (IA64_AR0_REGNUM + 65) | |
189 | #define IA64_EC_REGNUM (IA64_AR0_REGNUM + 66) | |
190 | ||
191 | /* NAT (Not A Thing) Bits for the general registers; there are 128 of | |
192 | these. */ | |
193 | #define IA64_NAT0_REGNUM 462 | |
194 | #define IA64_NAT31_REGNUM (IA64_NAT0_REGNUM + 31) | |
195 | #define IA64_NAT32_REGNUM (IA64_NAT0_REGNUM + 32) | |
196 | #define IA64_NAT127_REGNUM (IA64_NAT0_REGNUM + 127) | |
197 | ||
77ca787b | 198 | struct frame_info; |
c4de7027 JB |
199 | struct regcache; |
200 | ||
201 | /* A struction containing pointers to all the target-dependent operations | |
202 | performed to setup an inferior function call. */ | |
203 | ||
204 | struct ia64_infcall_ops | |
205 | { | |
206 | /* Allocate a new register stack frame starting after the output | |
207 | region of the current frame. The new frame will contain SOF | |
208 | registers, all in the output region. This is one way of protecting | |
209 | the stacked registers of the current frame. | |
210 | ||
211 | Should do nothing if this operation is not permitted by the OS. */ | |
212 | void (*allocate_new_rse_frame) (struct regcache *regcache, ULONGEST bsp, | |
213 | int sof); | |
214 | ||
215 | /* Store the argument stored in BUF into the appropriate location | |
216 | given the BSP and the SLOTNUM. */ | |
217 | void (*store_argument_in_slot) (struct regcache *regcache, CORE_ADDR bsp, | |
218 | int slotnum, gdb_byte *buf); | |
219 | ||
220 | /* For targets where we cannot call the function directly, store | |
221 | the address of the function we want to call at the location | |
222 | expected by the calling sequence. */ | |
223 | void (*set_function_addr) (struct regcache *regcache, CORE_ADDR func_addr); | |
224 | }; | |
77ca787b | 225 | |
b33e8514 AS |
226 | struct gdbarch_tdep |
227 | { | |
e17a4113 | 228 | CORE_ADDR (*sigcontext_register_address) (struct gdbarch *, CORE_ADDR, int); |
74174d2e | 229 | int (*pc_in_sigtramp) (CORE_ADDR); |
27067745 | 230 | |
77ca787b JB |
231 | /* Return the total size of THIS_FRAME's register frame. |
232 | CFM is THIS_FRAME's cfm register value. | |
233 | ||
234 | Normally, the size of the register frame is always obtained by | |
235 | extracting the lowest 7 bits ("cfm & 0x7f"). */ | |
236 | int (*size_of_register_frame) (struct frame_info *this_frame, ULONGEST cfm); | |
237 | ||
c4de7027 JB |
238 | /* Determine the function address FADDR belongs to a shared library. |
239 | If it does, then return the associated global pointer. If no shared | |
240 | library was found to contain that function, then return zero. | |
241 | ||
242 | This pointer may be NULL. */ | |
243 | CORE_ADDR (*find_global_pointer_from_solib) (struct gdbarch *gdbarch, | |
244 | CORE_ADDR faddr); | |
245 | ||
27067745 UW |
246 | /* ISA-specific data types. */ |
247 | struct type *ia64_ext_type; | |
c4de7027 JB |
248 | |
249 | struct ia64_infcall_ops infcall_ops; | |
b33e8514 AS |
250 | }; |
251 | ||
61a1198a | 252 | extern void ia64_write_pc (struct regcache *, CORE_ADDR); |
9fc9f5e2 | 253 | |
4b48ac22 | 254 | #endif /* ia64-tdep.h */ |