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20be272b CV |
1 | /* Target-dependent code for the IQ2000 architecture, for GDB, the GNU |
2 | Debugger. | |
3 | ||
42a4f53d | 4 | Copyright (C) 2000-2019 Free Software Foundation, Inc. |
20be272b CV |
5 | |
6 | Contributed by Red Hat. | |
7 | ||
8 | This file is part of GDB. | |
9 | ||
10 | This program is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 12 | the Free Software Foundation; either version 3 of the License, or |
20be272b CV |
13 | (at your option) any later version. |
14 | ||
15 | This program is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 21 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
20be272b CV |
22 | |
23 | #include "defs.h" | |
24 | #include "frame.h" | |
25 | #include "frame-base.h" | |
26 | #include "frame-unwind.h" | |
27 | #include "dwarf2-frame.h" | |
28 | #include "gdbtypes.h" | |
29 | #include "value.h" | |
30 | #include "dis-asm.h" | |
20be272b CV |
31 | #include "arch-utils.h" |
32 | #include "regcache.h" | |
33 | #include "osabi.h" | |
34 | #include "gdbcore.h" | |
35 | ||
36 | enum gdb_regnum | |
37 | { | |
38 | E_R0_REGNUM, E_R1_REGNUM, E_R2_REGNUM, E_R3_REGNUM, | |
39 | E_R4_REGNUM, E_R5_REGNUM, E_R6_REGNUM, E_R7_REGNUM, | |
40 | E_R8_REGNUM, E_R9_REGNUM, E_R10_REGNUM, E_R11_REGNUM, | |
41 | E_R12_REGNUM, E_R13_REGNUM, E_R14_REGNUM, E_R15_REGNUM, | |
42 | E_R16_REGNUM, E_R17_REGNUM, E_R18_REGNUM, E_R19_REGNUM, | |
43 | E_R20_REGNUM, E_R21_REGNUM, E_R22_REGNUM, E_R23_REGNUM, | |
44 | E_R24_REGNUM, E_R25_REGNUM, E_R26_REGNUM, E_R27_REGNUM, | |
45 | E_R28_REGNUM, E_R29_REGNUM, E_R30_REGNUM, E_R31_REGNUM, | |
46 | E_PC_REGNUM, | |
47 | E_LR_REGNUM = E_R31_REGNUM, /* Link register. */ | |
48 | E_SP_REGNUM = E_R29_REGNUM, /* Stack pointer. */ | |
49 | E_FP_REGNUM = E_R27_REGNUM, /* Frame pointer. */ | |
50 | E_FN_RETURN_REGNUM = E_R2_REGNUM, /* Function return value register. */ | |
51 | E_1ST_ARGREG = E_R4_REGNUM, /* 1st function arg register. */ | |
52 | E_LAST_ARGREG = E_R11_REGNUM, /* Last function arg register. */ | |
53 | E_NUM_REGS = E_PC_REGNUM + 1 | |
54 | }; | |
55 | ||
56 | /* Use an invalid address value as 'not available' marker. */ | |
57 | enum { REG_UNAVAIL = (CORE_ADDR) -1 }; | |
58 | ||
59 | struct iq2000_frame_cache | |
60 | { | |
61 | /* Base address. */ | |
62 | CORE_ADDR base; | |
63 | CORE_ADDR pc; | |
64 | LONGEST framesize; | |
65 | int using_fp; | |
66 | CORE_ADDR saved_sp; | |
67 | CORE_ADDR saved_regs [E_NUM_REGS]; | |
68 | }; | |
69 | ||
70 | /* Harvard methods: */ | |
71 | ||
72 | static CORE_ADDR | |
73 | insn_ptr_from_addr (CORE_ADDR addr) /* CORE_ADDR to target pointer. */ | |
74 | { | |
75 | return addr & 0x7fffffffL; | |
76 | } | |
77 | ||
78 | static CORE_ADDR | |
79 | insn_addr_from_ptr (CORE_ADDR ptr) /* target_pointer to CORE_ADDR. */ | |
80 | { | |
81 | return (ptr & 0x7fffffffL) | 0x80000000L; | |
82 | } | |
83 | ||
84 | /* Function: pointer_to_address | |
1777feb0 | 85 | Convert a target pointer to an address in host (CORE_ADDR) format. */ |
20be272b CV |
86 | |
87 | static CORE_ADDR | |
9898f801 UW |
88 | iq2000_pointer_to_address (struct gdbarch *gdbarch, |
89 | struct type * type, const gdb_byte * buf) | |
20be272b | 90 | { |
e17a4113 | 91 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
20be272b | 92 | enum type_code target = TYPE_CODE (TYPE_TARGET_TYPE (type)); |
e17a4113 UW |
93 | CORE_ADDR addr |
94 | = extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order); | |
20be272b CV |
95 | |
96 | if (target == TYPE_CODE_FUNC | |
97 | || target == TYPE_CODE_METHOD | |
876cecd0 | 98 | || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type))) |
20be272b CV |
99 | addr = insn_addr_from_ptr (addr); |
100 | ||
101 | return addr; | |
102 | } | |
103 | ||
104 | /* Function: address_to_pointer | |
105 | Convert a host-format address (CORE_ADDR) into a target pointer. */ | |
106 | ||
107 | static void | |
9898f801 UW |
108 | iq2000_address_to_pointer (struct gdbarch *gdbarch, |
109 | struct type *type, gdb_byte *buf, CORE_ADDR addr) | |
20be272b | 110 | { |
e17a4113 | 111 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
20be272b CV |
112 | enum type_code target = TYPE_CODE (TYPE_TARGET_TYPE (type)); |
113 | ||
114 | if (target == TYPE_CODE_FUNC || target == TYPE_CODE_METHOD) | |
115 | addr = insn_ptr_from_addr (addr); | |
e17a4113 | 116 | store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order, addr); |
20be272b CV |
117 | } |
118 | ||
119 | /* Real register methods: */ | |
120 | ||
121 | /* Function: register_name | |
122 | Returns the name of the iq2000 register number N. */ | |
123 | ||
124 | static const char * | |
d93859e2 | 125 | iq2000_register_name (struct gdbarch *gdbarch, int regnum) |
20be272b CV |
126 | { |
127 | static const char * names[E_NUM_REGS] = | |
128 | { | |
129 | "r0", "r1", "r2", "r3", "r4", | |
130 | "r5", "r6", "r7", "r8", "r9", | |
131 | "r10", "r11", "r12", "r13", "r14", | |
132 | "r15", "r16", "r17", "r18", "r19", | |
133 | "r20", "r21", "r22", "r23", "r24", | |
134 | "r25", "r26", "r27", "r28", "r29", | |
135 | "r30", "r31", | |
136 | "pc" | |
137 | }; | |
138 | if (regnum < 0 || regnum >= E_NUM_REGS) | |
139 | return NULL; | |
140 | return names[regnum]; | |
141 | } | |
142 | ||
143 | /* Prologue analysis methods: */ | |
144 | ||
145 | /* ADDIU insn (001001 rs(5) rt(5) imm(16)). */ | |
146 | #define INSN_IS_ADDIU(X) (((X) & 0xfc000000) == 0x24000000) | |
147 | #define ADDIU_REG_SRC(X) (((X) & 0x03e00000) >> 21) | |
148 | #define ADDIU_REG_TGT(X) (((X) & 0x001f0000) >> 16) | |
149 | #define ADDIU_IMMEDIATE(X) ((signed short) ((X) & 0x0000ffff)) | |
150 | ||
151 | /* "MOVE" (OR) insn (000000 rs(5) rt(5) rd(5) 00000 100101). */ | |
152 | #define INSN_IS_MOVE(X) (((X) & 0xffe007ff) == 0x00000025) | |
153 | #define MOVE_REG_SRC(X) (((X) & 0x001f0000) >> 16) | |
154 | #define MOVE_REG_TGT(X) (((X) & 0x0000f800) >> 11) | |
155 | ||
156 | /* STORE WORD insn (101011 rs(5) rt(5) offset(16)). */ | |
157 | #define INSN_IS_STORE_WORD(X) (((X) & 0xfc000000) == 0xac000000) | |
158 | #define SW_REG_INDEX(X) (((X) & 0x03e00000) >> 21) | |
159 | #define SW_REG_SRC(X) (((X) & 0x001f0000) >> 16) | |
160 | #define SW_OFFSET(X) ((signed short) ((X) & 0x0000ffff)) | |
161 | ||
162 | /* Function: find_last_line_symbol | |
163 | ||
164 | Given an address range, first find a line symbol corresponding to | |
165 | the starting address. Then find the last line symbol within the | |
166 | range that has a line number less than or equal to the first line. | |
167 | ||
168 | For optimized code with code motion, this finds the last address | |
169 | for the lowest-numbered line within the address range. */ | |
170 | ||
171 | static struct symtab_and_line | |
172 | find_last_line_symbol (CORE_ADDR start, CORE_ADDR end, int notcurrent) | |
173 | { | |
174 | struct symtab_and_line sal = find_pc_line (start, notcurrent); | |
175 | struct symtab_and_line best_sal = sal; | |
176 | ||
177 | if (sal.pc == 0 || sal.line == 0 || sal.end == 0) | |
178 | return sal; | |
179 | ||
180 | do | |
181 | { | |
182 | if (sal.line && sal.line <= best_sal.line) | |
183 | best_sal = sal; | |
184 | sal = find_pc_line (sal.end, notcurrent); | |
185 | } | |
186 | while (sal.pc && sal.pc < end); | |
187 | ||
188 | return best_sal; | |
189 | } | |
190 | ||
191 | /* Function: scan_prologue | |
192 | Decode the instructions within the given address range. | |
193 | Decide when we must have reached the end of the function prologue. | |
194 | If a frame_info pointer is provided, fill in its prologue information. | |
195 | ||
196 | Returns the address of the first instruction after the prologue. */ | |
197 | ||
198 | static CORE_ADDR | |
e17a4113 UW |
199 | iq2000_scan_prologue (struct gdbarch *gdbarch, |
200 | CORE_ADDR scan_start, | |
20be272b CV |
201 | CORE_ADDR scan_end, |
202 | struct frame_info *fi, | |
203 | struct iq2000_frame_cache *cache) | |
204 | { | |
e17a4113 | 205 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
20be272b CV |
206 | struct symtab_and_line sal; |
207 | CORE_ADDR pc; | |
208 | CORE_ADDR loop_end; | |
20be272b CV |
209 | int srcreg; |
210 | int tgtreg; | |
211 | signed short offset; | |
212 | ||
213 | if (scan_end == (CORE_ADDR) 0) | |
214 | { | |
215 | loop_end = scan_start + 100; | |
216 | sal.end = sal.pc = 0; | |
217 | } | |
218 | else | |
219 | { | |
220 | loop_end = scan_end; | |
221 | if (fi) | |
222 | sal = find_last_line_symbol (scan_start, scan_end, 0); | |
706774f2 JK |
223 | else |
224 | sal.end = 0; /* Avoid GCC false warning. */ | |
20be272b CV |
225 | } |
226 | ||
227 | /* Saved registers: | |
228 | We first have to save the saved register's offset, and | |
229 | only later do we compute its actual address. Since the | |
230 | offset can be zero, we must first initialize all the | |
231 | saved regs to minus one (so we can later distinguish | |
1777feb0 | 232 | between one that's not saved, and one that's saved at zero). */ |
20be272b CV |
233 | for (srcreg = 0; srcreg < E_NUM_REGS; srcreg ++) |
234 | cache->saved_regs[srcreg] = -1; | |
235 | cache->using_fp = 0; | |
236 | cache->framesize = 0; | |
237 | ||
238 | for (pc = scan_start; pc < loop_end; pc += 4) | |
239 | { | |
e17a4113 | 240 | LONGEST insn = read_memory_unsigned_integer (pc, 4, byte_order); |
20be272b | 241 | /* Skip any instructions writing to (sp) or decrementing the |
1777feb0 | 242 | SP. */ |
20be272b CV |
243 | if ((insn & 0xffe00000) == 0xac200000) |
244 | { | |
245 | /* sw using SP/%1 as base. */ | |
246 | /* LEGACY -- from assembly-only port. */ | |
247 | tgtreg = ((insn >> 16) & 0x1f); | |
248 | if (tgtreg >= 0 && tgtreg < E_NUM_REGS) | |
249 | cache->saved_regs[tgtreg] = -((signed short) (insn & 0xffff)); | |
250 | ||
20be272b CV |
251 | continue; |
252 | } | |
253 | ||
254 | if ((insn & 0xffff8000) == 0x20218000) | |
255 | { | |
256 | /* addi %1, %1, -N == addi %sp, %sp, -N */ | |
1777feb0 | 257 | /* LEGACY -- from assembly-only port. */ |
20be272b CV |
258 | cache->framesize = -((signed short) (insn & 0xffff)); |
259 | continue; | |
260 | } | |
261 | ||
262 | if (INSN_IS_ADDIU (insn)) | |
263 | { | |
264 | srcreg = ADDIU_REG_SRC (insn); | |
265 | tgtreg = ADDIU_REG_TGT (insn); | |
266 | offset = ADDIU_IMMEDIATE (insn); | |
267 | if (srcreg == E_SP_REGNUM && tgtreg == E_SP_REGNUM) | |
268 | cache->framesize = -offset; | |
269 | continue; | |
270 | } | |
271 | ||
272 | if (INSN_IS_STORE_WORD (insn)) | |
273 | { | |
274 | srcreg = SW_REG_SRC (insn); | |
275 | tgtreg = SW_REG_INDEX (insn); | |
276 | offset = SW_OFFSET (insn); | |
277 | ||
278 | if (tgtreg == E_SP_REGNUM || tgtreg == E_FP_REGNUM) | |
279 | { | |
1777feb0 | 280 | /* "push" to stack (via SP or FP reg). */ |
20be272b CV |
281 | if (cache->saved_regs[srcreg] == -1) /* Don't save twice. */ |
282 | cache->saved_regs[srcreg] = offset; | |
283 | continue; | |
284 | } | |
285 | } | |
286 | ||
287 | if (INSN_IS_MOVE (insn)) | |
288 | { | |
289 | srcreg = MOVE_REG_SRC (insn); | |
290 | tgtreg = MOVE_REG_TGT (insn); | |
291 | ||
292 | if (srcreg == E_SP_REGNUM && tgtreg == E_FP_REGNUM) | |
293 | { | |
294 | /* Copy sp to fp. */ | |
295 | cache->using_fp = 1; | |
296 | continue; | |
297 | } | |
298 | } | |
299 | ||
300 | /* Unknown instruction encountered in frame. Bail out? | |
301 | 1) If we have a subsequent line symbol, we can keep going. | |
302 | 2) If not, we need to bail out and quit scanning instructions. */ | |
303 | ||
304 | if (fi && sal.end && (pc < sal.end)) /* Keep scanning. */ | |
305 | continue; | |
306 | else /* bail */ | |
307 | break; | |
308 | } | |
309 | ||
310 | return pc; | |
311 | } | |
312 | ||
313 | static void | |
314 | iq2000_init_frame_cache (struct iq2000_frame_cache *cache) | |
315 | { | |
316 | int i; | |
317 | ||
318 | cache->base = 0; | |
319 | cache->framesize = 0; | |
320 | cache->using_fp = 0; | |
321 | cache->saved_sp = 0; | |
322 | for (i = 0; i < E_NUM_REGS; i++) | |
323 | cache->saved_regs[i] = -1; | |
324 | } | |
325 | ||
326 | /* Function: iq2000_skip_prologue | |
327 | If the input address is in a function prologue, | |
328 | returns the address of the end of the prologue; | |
329 | else returns the input address. | |
330 | ||
331 | Note: the input address is likely to be the function start, | |
332 | since this function is mainly used for advancing a breakpoint | |
333 | to the first line, or stepping to the first line when we have | |
334 | stepped into a function call. */ | |
335 | ||
336 | static CORE_ADDR | |
6093d2eb | 337 | iq2000_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
20be272b CV |
338 | { |
339 | CORE_ADDR func_addr = 0 , func_end = 0; | |
340 | ||
341 | if (find_pc_partial_function (pc, NULL, & func_addr, & func_end)) | |
342 | { | |
343 | struct symtab_and_line sal; | |
344 | struct iq2000_frame_cache cache; | |
345 | ||
346 | /* Found a function. */ | |
347 | sal = find_pc_line (func_addr, 0); | |
348 | if (sal.end && sal.end < func_end) | |
349 | /* Found a line number, use it as end of prologue. */ | |
350 | return sal.end; | |
351 | ||
352 | /* No useable line symbol. Use prologue parsing method. */ | |
353 | iq2000_init_frame_cache (&cache); | |
e17a4113 | 354 | return iq2000_scan_prologue (gdbarch, func_addr, func_end, NULL, &cache); |
20be272b CV |
355 | } |
356 | ||
357 | /* No function symbol -- just return the PC. */ | |
358 | return (CORE_ADDR) pc; | |
359 | } | |
360 | ||
361 | static struct iq2000_frame_cache * | |
94afd7a6 | 362 | iq2000_frame_cache (struct frame_info *this_frame, void **this_cache) |
20be272b | 363 | { |
e17a4113 | 364 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
20be272b CV |
365 | struct iq2000_frame_cache *cache; |
366 | CORE_ADDR current_pc; | |
367 | int i; | |
368 | ||
369 | if (*this_cache) | |
9a3c8263 | 370 | return (struct iq2000_frame_cache *) *this_cache; |
20be272b CV |
371 | |
372 | cache = FRAME_OBSTACK_ZALLOC (struct iq2000_frame_cache); | |
373 | iq2000_init_frame_cache (cache); | |
374 | *this_cache = cache; | |
375 | ||
94afd7a6 | 376 | cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM); |
20be272b | 377 | |
94afd7a6 | 378 | current_pc = get_frame_pc (this_frame); |
20be272b CV |
379 | find_pc_partial_function (current_pc, NULL, &cache->pc, NULL); |
380 | if (cache->pc != 0) | |
e17a4113 | 381 | iq2000_scan_prologue (gdbarch, cache->pc, current_pc, this_frame, cache); |
20be272b | 382 | if (!cache->using_fp) |
94afd7a6 | 383 | cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM); |
20be272b CV |
384 | |
385 | cache->saved_sp = cache->base + cache->framesize; | |
386 | ||
387 | for (i = 0; i < E_NUM_REGS; i++) | |
388 | if (cache->saved_regs[i] != -1) | |
389 | cache->saved_regs[i] += cache->base; | |
390 | ||
391 | return cache; | |
392 | } | |
393 | ||
94afd7a6 UW |
394 | static struct value * |
395 | iq2000_frame_prev_register (struct frame_info *this_frame, void **this_cache, | |
396 | int regnum) | |
20be272b | 397 | { |
1777feb0 MS |
398 | struct iq2000_frame_cache *cache = iq2000_frame_cache (this_frame, |
399 | this_cache); | |
94afd7a6 | 400 | |
20be272b | 401 | if (regnum == E_SP_REGNUM && cache->saved_sp) |
94afd7a6 | 402 | return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp); |
20be272b CV |
403 | |
404 | if (regnum == E_PC_REGNUM) | |
405 | regnum = E_LR_REGNUM; | |
406 | ||
407 | if (regnum < E_NUM_REGS && cache->saved_regs[regnum] != -1) | |
94afd7a6 UW |
408 | return frame_unwind_got_memory (this_frame, regnum, |
409 | cache->saved_regs[regnum]); | |
20be272b | 410 | |
94afd7a6 | 411 | return frame_unwind_got_register (this_frame, regnum, regnum); |
20be272b CV |
412 | } |
413 | ||
414 | static void | |
94afd7a6 | 415 | iq2000_frame_this_id (struct frame_info *this_frame, void **this_cache, |
20be272b CV |
416 | struct frame_id *this_id) |
417 | { | |
1777feb0 MS |
418 | struct iq2000_frame_cache *cache = iq2000_frame_cache (this_frame, |
419 | this_cache); | |
20be272b CV |
420 | |
421 | /* This marks the outermost frame. */ | |
422 | if (cache->base == 0) | |
423 | return; | |
424 | ||
425 | *this_id = frame_id_build (cache->saved_sp, cache->pc); | |
426 | } | |
427 | ||
428 | static const struct frame_unwind iq2000_frame_unwind = { | |
429 | NORMAL_FRAME, | |
8fbca658 | 430 | default_frame_unwind_stop_reason, |
20be272b | 431 | iq2000_frame_this_id, |
94afd7a6 UW |
432 | iq2000_frame_prev_register, |
433 | NULL, | |
434 | default_frame_sniffer | |
20be272b CV |
435 | }; |
436 | ||
20be272b | 437 | static CORE_ADDR |
94afd7a6 | 438 | iq2000_frame_base_address (struct frame_info *this_frame, void **this_cache) |
20be272b | 439 | { |
1777feb0 MS |
440 | struct iq2000_frame_cache *cache = iq2000_frame_cache (this_frame, |
441 | this_cache); | |
20be272b CV |
442 | |
443 | return cache->base; | |
444 | } | |
445 | ||
446 | static const struct frame_base iq2000_frame_base = { | |
447 | &iq2000_frame_unwind, | |
448 | iq2000_frame_base_address, | |
449 | iq2000_frame_base_address, | |
450 | iq2000_frame_base_address | |
451 | }; | |
452 | ||
d19280ad YQ |
453 | static int |
454 | iq2000_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr) | |
20be272b | 455 | { |
20be272b | 456 | if ((*pcptr & 3) != 0) |
a73c6dcd | 457 | error (_("breakpoint_from_pc: invalid breakpoint address 0x%lx"), |
20be272b CV |
458 | (long) *pcptr); |
459 | ||
d19280ad YQ |
460 | return 4; |
461 | } | |
462 | ||
463 | static const gdb_byte * | |
464 | iq2000_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size) | |
465 | { | |
466 | static const unsigned char big_breakpoint[] = { 0x00, 0x00, 0x00, 0x0d }; | |
467 | static const unsigned char little_breakpoint[] = { 0x0d, 0x00, 0x00, 0x00 }; | |
468 | *size = kind; | |
469 | ||
67d57894 MD |
470 | return (gdbarch_byte_order (gdbarch) |
471 | == BFD_ENDIAN_BIG) ? big_breakpoint : little_breakpoint; | |
20be272b CV |
472 | } |
473 | ||
474 | /* Target function return value methods: */ | |
475 | ||
476 | /* Function: store_return_value | |
477 | Copy the function return value from VALBUF into the | |
478 | proper location for a function return. */ | |
479 | ||
480 | static void | |
481 | iq2000_store_return_value (struct type *type, struct regcache *regcache, | |
482 | const void *valbuf) | |
483 | { | |
484 | int len = TYPE_LENGTH (type); | |
485 | int regno = E_FN_RETURN_REGNUM; | |
486 | ||
487 | while (len > 0) | |
488 | { | |
e362b510 | 489 | gdb_byte buf[4]; |
20be272b CV |
490 | int size = len % 4 ?: 4; |
491 | ||
492 | memset (buf, 0, 4); | |
493 | memcpy (buf + 4 - size, valbuf, size); | |
10eaee5f | 494 | regcache->raw_write (regno++, buf); |
20be272b CV |
495 | len -= size; |
496 | valbuf = ((char *) valbuf) + size; | |
497 | } | |
498 | } | |
499 | ||
500 | /* Function: use_struct_convention | |
501 | Returns non-zero if the given struct type will be returned using | |
502 | a special convention, rather than the normal function return method. */ | |
503 | ||
504 | static int | |
505 | iq2000_use_struct_convention (struct type *type) | |
506 | { | |
507 | return ((TYPE_CODE (type) == TYPE_CODE_STRUCT) | |
508 | || (TYPE_CODE (type) == TYPE_CODE_UNION)) | |
509 | && TYPE_LENGTH (type) > 8; | |
510 | } | |
511 | ||
512 | /* Function: extract_return_value | |
513 | Copy the function's return value into VALBUF. | |
514 | This function is called only in the context of "target function calls", | |
515 | ie. when the debugger forces a function to be called in the child, and | |
516 | when the debugger forces a function to return prematurely via the | |
517 | "return" command. */ | |
518 | ||
519 | static void | |
520 | iq2000_extract_return_value (struct type *type, struct regcache *regcache, | |
7c543f7b | 521 | gdb_byte *valbuf) |
20be272b | 522 | { |
ac7936df | 523 | struct gdbarch *gdbarch = regcache->arch (); |
e17a4113 UW |
524 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
525 | ||
20be272b CV |
526 | /* If the function's return value is 8 bytes or less, it is |
527 | returned in a register, and if larger than 8 bytes, it is | |
528 | returned in a stack location which is pointed to by the same | |
529 | register. */ | |
20be272b CV |
530 | int len = TYPE_LENGTH (type); |
531 | ||
532 | if (len <= (2 * 4)) | |
533 | { | |
534 | int regno = E_FN_RETURN_REGNUM; | |
535 | ||
536 | /* Return values of <= 8 bytes are returned in | |
537 | FN_RETURN_REGNUM. */ | |
538 | while (len > 0) | |
539 | { | |
540 | ULONGEST tmp; | |
541 | int size = len % 4 ?: 4; | |
542 | ||
543 | /* By using store_unsigned_integer we avoid having to | |
544 | do anything special for small big-endian values. */ | |
545 | regcache_cooked_read_unsigned (regcache, regno++, &tmp); | |
e17a4113 | 546 | store_unsigned_integer (valbuf, size, byte_order, tmp); |
20be272b | 547 | len -= size; |
7c543f7b | 548 | valbuf += size; |
20be272b CV |
549 | } |
550 | } | |
551 | else | |
552 | { | |
553 | /* Return values > 8 bytes are returned in memory, | |
554 | pointed to by FN_RETURN_REGNUM. */ | |
ec20a626 UW |
555 | ULONGEST return_buffer; |
556 | regcache_cooked_read_unsigned (regcache, E_FN_RETURN_REGNUM, | |
557 | &return_buffer); | |
20be272b CV |
558 | read_memory (return_buffer, valbuf, TYPE_LENGTH (type)); |
559 | } | |
560 | } | |
561 | ||
562 | static enum return_value_convention | |
6a3a010b | 563 | iq2000_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 | 564 | struct type *type, struct regcache *regcache, |
ec20a626 | 565 | gdb_byte *readbuf, const gdb_byte *writebuf) |
20be272b CV |
566 | { |
567 | if (iq2000_use_struct_convention (type)) | |
568 | return RETURN_VALUE_STRUCT_CONVENTION; | |
569 | if (writebuf) | |
570 | iq2000_store_return_value (type, regcache, writebuf); | |
571 | else if (readbuf) | |
572 | iq2000_extract_return_value (type, regcache, readbuf); | |
573 | return RETURN_VALUE_REGISTER_CONVENTION; | |
574 | } | |
575 | ||
576 | /* Function: register_virtual_type | |
577 | Returns the default type for register N. */ | |
578 | ||
579 | static struct type * | |
580 | iq2000_register_type (struct gdbarch *gdbarch, int regnum) | |
581 | { | |
df4df182 | 582 | return builtin_type (gdbarch)->builtin_int32; |
20be272b CV |
583 | } |
584 | ||
585 | static CORE_ADDR | |
586 | iq2000_frame_align (struct gdbarch *ignore, CORE_ADDR sp) | |
587 | { | |
588 | /* This is the same frame alignment used by gcc. */ | |
589 | return ((sp + 7) & ~7); | |
590 | } | |
591 | ||
592 | /* Convenience function to check 8-byte types for being a scalar type | |
1777feb0 | 593 | or a struct with only one long long or double member. */ |
20be272b CV |
594 | static int |
595 | iq2000_pass_8bytetype_by_address (struct type *type) | |
596 | { | |
597 | struct type *ftype; | |
598 | ||
599 | /* Skip typedefs. */ | |
600 | while (TYPE_CODE (type) == TYPE_CODE_TYPEDEF) | |
601 | type = TYPE_TARGET_TYPE (type); | |
602 | /* Non-struct and non-union types are always passed by value. */ | |
603 | if (TYPE_CODE (type) != TYPE_CODE_STRUCT | |
604 | && TYPE_CODE (type) != TYPE_CODE_UNION) | |
605 | return 0; | |
606 | /* Structs with more than 1 field are always passed by address. */ | |
607 | if (TYPE_NFIELDS (type) != 1) | |
608 | return 1; | |
609 | /* Get field type. */ | |
610 | ftype = (TYPE_FIELDS (type))[0].type; | |
611 | /* The field type must have size 8, otherwise pass by address. */ | |
612 | if (TYPE_LENGTH (ftype) != 8) | |
613 | return 1; | |
614 | /* Skip typedefs of field type. */ | |
615 | while (TYPE_CODE (ftype) == TYPE_CODE_TYPEDEF) | |
616 | ftype = TYPE_TARGET_TYPE (ftype); | |
617 | /* If field is int or float, pass by value. */ | |
618 | if (TYPE_CODE (ftype) == TYPE_CODE_FLT | |
619 | || TYPE_CODE (ftype) == TYPE_CODE_INT) | |
620 | return 0; | |
1777feb0 | 621 | /* Everything else, pass by address. */ |
20be272b CV |
622 | return 1; |
623 | } | |
624 | ||
625 | static CORE_ADDR | |
626 | iq2000_push_dummy_call (struct gdbarch *gdbarch, struct value *function, | |
627 | struct regcache *regcache, CORE_ADDR bp_addr, | |
628 | int nargs, struct value **args, CORE_ADDR sp, | |
cf84fa6b AH |
629 | function_call_return_method return_method, |
630 | CORE_ADDR struct_addr) | |
20be272b | 631 | { |
e17a4113 | 632 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
20be272b CV |
633 | const bfd_byte *val; |
634 | bfd_byte buf[4]; | |
635 | struct type *type; | |
636 | int i, argreg, typelen, slacklen; | |
637 | int stackspace = 0; | |
1777feb0 | 638 | /* Used to copy struct arguments into the stack. */ |
20be272b CV |
639 | CORE_ADDR struct_ptr; |
640 | ||
1777feb0 | 641 | /* First determine how much stack space we will need. */ |
cf84fa6b AH |
642 | for (i = 0, argreg = E_1ST_ARGREG + (return_method == return_method_struct); |
643 | i < nargs; | |
644 | i++) | |
20be272b CV |
645 | { |
646 | type = value_type (args[i]); | |
647 | typelen = TYPE_LENGTH (type); | |
648 | if (typelen <= 4) | |
649 | { | |
650 | /* Scalars of up to 4 bytes, | |
651 | structs of up to 4 bytes, and | |
652 | pointers. */ | |
653 | if (argreg <= E_LAST_ARGREG) | |
654 | argreg++; | |
655 | else | |
656 | stackspace += 4; | |
657 | } | |
658 | else if (typelen == 8 && !iq2000_pass_8bytetype_by_address (type)) | |
659 | { | |
660 | /* long long, | |
661 | double, and possibly | |
1777feb0 | 662 | structs with a single field of long long or double. */ |
20be272b CV |
663 | if (argreg <= E_LAST_ARGREG - 1) |
664 | { | |
665 | /* 8-byte arg goes into a register pair | |
1777feb0 | 666 | (must start with an even-numbered reg). */ |
20be272b CV |
667 | if (((argreg - E_1ST_ARGREG) % 2) != 0) |
668 | argreg ++; | |
669 | argreg += 2; | |
670 | } | |
671 | else | |
672 | { | |
1777feb0 MS |
673 | argreg = E_LAST_ARGREG + 1; /* no more argregs. */ |
674 | /* 8-byte arg goes on stack, must be 8-byte aligned. */ | |
20be272b CV |
675 | stackspace = ((stackspace + 7) & ~7); |
676 | stackspace += 8; | |
677 | } | |
678 | } | |
679 | else | |
680 | { | |
681 | /* Structs are passed as pointer to a copy of the struct. | |
682 | So we need room on the stack for a copy of the struct | |
1777feb0 | 683 | plus for the argument pointer. */ |
20be272b CV |
684 | if (argreg <= E_LAST_ARGREG) |
685 | argreg++; | |
686 | else | |
687 | stackspace += 4; | |
688 | /* Care for 8-byte alignment of structs saved on stack. */ | |
689 | stackspace += ((typelen + 7) & ~7); | |
690 | } | |
691 | } | |
692 | ||
693 | /* Now copy params, in ascending order, into their assigned location | |
1777feb0 | 694 | (either in a register or on the stack). */ |
20be272b CV |
695 | |
696 | sp -= (sp % 8); /* align */ | |
697 | struct_ptr = sp; | |
698 | sp -= stackspace; | |
699 | sp -= (sp % 8); /* align again */ | |
700 | stackspace = 0; | |
701 | ||
702 | argreg = E_1ST_ARGREG; | |
cf84fa6b | 703 | if (return_method == return_method_struct) |
20be272b | 704 | { |
1777feb0 | 705 | /* A function that returns a struct will consume one argreg to do so. |
20be272b CV |
706 | */ |
707 | regcache_cooked_write_unsigned (regcache, argreg++, struct_addr); | |
708 | } | |
709 | ||
710 | for (i = 0; i < nargs; i++) | |
711 | { | |
712 | type = value_type (args[i]); | |
713 | typelen = TYPE_LENGTH (type); | |
714 | val = value_contents (args[i]); | |
715 | if (typelen <= 4) | |
716 | { | |
1777feb0 | 717 | /* Char, short, int, float, pointer, and structs <= four bytes. */ |
20be272b CV |
718 | slacklen = (4 - (typelen % 4)) % 4; |
719 | memset (buf, 0, sizeof (buf)); | |
720 | memcpy (buf + slacklen, val, typelen); | |
721 | if (argreg <= E_LAST_ARGREG) | |
722 | { | |
1777feb0 | 723 | /* Passed in a register. */ |
10eaee5f | 724 | regcache->raw_write (argreg++, buf); |
20be272b CV |
725 | } |
726 | else | |
727 | { | |
1777feb0 | 728 | /* Passed on the stack. */ |
20be272b CV |
729 | write_memory (sp + stackspace, buf, 4); |
730 | stackspace += 4; | |
731 | } | |
732 | } | |
733 | else if (typelen == 8 && !iq2000_pass_8bytetype_by_address (type)) | |
734 | { | |
735 | /* (long long), (double), or struct consisting of | |
1777feb0 | 736 | a single (long long) or (double). */ |
20be272b CV |
737 | if (argreg <= E_LAST_ARGREG - 1) |
738 | { | |
739 | /* 8-byte arg goes into a register pair | |
1777feb0 | 740 | (must start with an even-numbered reg). */ |
20be272b CV |
741 | if (((argreg - E_1ST_ARGREG) % 2) != 0) |
742 | argreg++; | |
10eaee5f SM |
743 | regcache->raw_write (argreg++, val); |
744 | regcache->raw_write (argreg++, val + 4); | |
20be272b CV |
745 | } |
746 | else | |
747 | { | |
1777feb0 MS |
748 | /* 8-byte arg goes on stack, must be 8-byte aligned. */ |
749 | argreg = E_LAST_ARGREG + 1; /* no more argregs. */ | |
20be272b CV |
750 | stackspace = ((stackspace + 7) & ~7); |
751 | write_memory (sp + stackspace, val, typelen); | |
752 | stackspace += 8; | |
753 | } | |
754 | } | |
755 | else | |
756 | { | |
757 | /* Store struct beginning at the upper end of the previously | |
758 | computed stack space. Then store the address of the struct | |
759 | using the usual rules for a 4 byte value. */ | |
760 | struct_ptr -= ((typelen + 7) & ~7); | |
761 | write_memory (struct_ptr, val, typelen); | |
762 | if (argreg <= E_LAST_ARGREG) | |
763 | regcache_cooked_write_unsigned (regcache, argreg++, struct_ptr); | |
764 | else | |
765 | { | |
e17a4113 | 766 | store_unsigned_integer (buf, 4, byte_order, struct_ptr); |
20be272b CV |
767 | write_memory (sp + stackspace, buf, 4); |
768 | stackspace += 4; | |
769 | } | |
770 | } | |
771 | } | |
772 | ||
1777feb0 | 773 | /* Store return address. */ |
20be272b CV |
774 | regcache_cooked_write_unsigned (regcache, E_LR_REGNUM, bp_addr); |
775 | ||
776 | /* Update stack pointer. */ | |
777 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); | |
778 | ||
1777feb0 | 779 | /* And that should do it. Return the new stack pointer. */ |
20be272b CV |
780 | return sp; |
781 | } | |
782 | ||
783 | /* Function: gdbarch_init | |
784 | Initializer function for the iq2000 gdbarch vector. | |
785 | Called by gdbarch. Sets up the gdbarch vector(s) for this target. */ | |
786 | ||
787 | static struct gdbarch * | |
788 | iq2000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
789 | { | |
790 | struct gdbarch *gdbarch; | |
791 | ||
792 | /* Look up list for candidates - only one. */ | |
793 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
794 | if (arches != NULL) | |
795 | return arches->gdbarch; | |
796 | ||
797 | gdbarch = gdbarch_alloc (&info, NULL); | |
798 | ||
799 | set_gdbarch_num_regs (gdbarch, E_NUM_REGS); | |
800 | set_gdbarch_num_pseudo_regs (gdbarch, 0); | |
801 | set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); | |
802 | set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); | |
803 | set_gdbarch_register_name (gdbarch, iq2000_register_name); | |
804 | set_gdbarch_address_to_pointer (gdbarch, iq2000_address_to_pointer); | |
805 | set_gdbarch_pointer_to_address (gdbarch, iq2000_pointer_to_address); | |
806 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
807 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
808 | set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
809 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
810 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
811 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
812 | set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
813 | set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
8da61cc4 DJ |
814 | set_gdbarch_float_format (gdbarch, floatformats_ieee_single); |
815 | set_gdbarch_double_format (gdbarch, floatformats_ieee_double); | |
816 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double); | |
20be272b | 817 | set_gdbarch_return_value (gdbarch, iq2000_return_value); |
04180708 YQ |
818 | set_gdbarch_breakpoint_kind_from_pc (gdbarch, |
819 | iq2000_breakpoint_kind_from_pc); | |
820 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, | |
821 | iq2000_sw_breakpoint_from_kind); | |
20be272b CV |
822 | set_gdbarch_frame_args_skip (gdbarch, 0); |
823 | set_gdbarch_skip_prologue (gdbarch, iq2000_skip_prologue); | |
824 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
20be272b CV |
825 | set_gdbarch_register_type (gdbarch, iq2000_register_type); |
826 | set_gdbarch_frame_align (gdbarch, iq2000_frame_align); | |
20be272b CV |
827 | frame_base_set_default (gdbarch, &iq2000_frame_base); |
828 | set_gdbarch_push_dummy_call (gdbarch, iq2000_push_dummy_call); | |
829 | ||
830 | gdbarch_init_osabi (info, gdbarch); | |
831 | ||
94afd7a6 UW |
832 | dwarf2_append_unwinders (gdbarch); |
833 | frame_unwind_append_unwinder (gdbarch, &iq2000_frame_unwind); | |
20be272b CV |
834 | |
835 | return gdbarch; | |
836 | } | |
837 | ||
838 | /* Function: _initialize_iq2000_tdep | |
839 | Initializer function for the iq2000 module. | |
1777feb0 | 840 | Called by gdb at start-up. */ |
20be272b CV |
841 | |
842 | void | |
843 | _initialize_iq2000_tdep (void) | |
844 | { | |
845 | register_gdbarch_init (bfd_arch_iq2000, iq2000_gdbarch_init); | |
846 | } |