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c906108c | 1 | /* Native support for the SGI Iris running IRIX version 5, for GDB. |
1b13c4f6 | 2 | |
6aba47ca DJ |
3 | Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, |
4 | 1999, 2000, 2001, 2002, 2004, 2006, 2007 Free Software Foundation, Inc. | |
1b13c4f6 | 5 | |
c906108c SS |
6 | Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU |
7 | and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin. | |
8 | Implemented for Irix 4.x by Garrett A. Wollman. | |
9 | Modified for Irix 5.x by Ian Lance Taylor. | |
10 | ||
c5aa993b | 11 | This file is part of GDB. |
c906108c | 12 | |
c5aa993b JM |
13 | This program is free software; you can redistribute it and/or modify |
14 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 15 | the Free Software Foundation; either version 3 of the License, or |
c5aa993b | 16 | (at your option) any later version. |
c906108c | 17 | |
c5aa993b JM |
18 | This program is distributed in the hope that it will be useful, |
19 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | GNU General Public License for more details. | |
c906108c | 22 | |
c5aa993b | 23 | You should have received a copy of the GNU General Public License |
a9762ec7 | 24 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
c906108c SS |
25 | |
26 | #include "defs.h" | |
27 | #include "inferior.h" | |
28 | #include "gdbcore.h" | |
29 | #include "target.h" | |
4e052eda | 30 | #include "regcache.h" |
c906108c SS |
31 | |
32 | #include "gdb_string.h" | |
33 | #include <sys/time.h> | |
34 | #include <sys/procfs.h> | |
35 | #include <setjmp.h> /* For JB_XXX. */ | |
36 | ||
c60c0f5f MS |
37 | /* Prototypes for supply_gregset etc. */ |
38 | #include "gregset.h" | |
b639a770 | 39 | #include "mips-tdep.h" |
c60c0f5f | 40 | |
9eefc95f UW |
41 | static void fetch_core_registers (struct regcache *, char *, |
42 | unsigned int, int, CORE_ADDR); | |
c906108c | 43 | |
c906108c SS |
44 | |
45 | /* | |
46 | * See the comment in m68k-tdep.c regarding the utility of these functions. | |
47 | * | |
48 | * These definitions are from the MIPS SVR4 ABI, so they may work for | |
49 | * any MIPS SVR4 target. | |
50 | */ | |
51 | ||
c5aa993b | 52 | void |
7f7fe91e | 53 | supply_gregset (struct regcache *regcache, const gregset_t *gregsetp) |
c906108c | 54 | { |
52f0bd74 | 55 | int regi; |
7f7fe91e | 56 | const greg_t *regp = &(*gregsetp)[0]; |
d611717a UW |
57 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
58 | int gregoff = sizeof (greg_t) - mips_isa_regsize (gdbarch); | |
466d7106 | 59 | static char zerobuf[32] = {0}; |
c906108c | 60 | |
c5aa993b | 61 | for (regi = 0; regi <= CTX_RA; regi++) |
7f7fe91e UW |
62 | regcache_raw_supply (regcache, regi, |
63 | (const char *) (regp + regi) + gregoff); | |
64 | ||
d611717a | 65 | regcache_raw_supply (regcache, mips_regnum (gdbarch)->pc, |
7f7fe91e | 66 | (const char *) (regp + CTX_EPC) + gregoff); |
d611717a | 67 | regcache_raw_supply (regcache, mips_regnum (gdbarch)->hi, |
7f7fe91e | 68 | (const char *) (regp + CTX_MDHI) + gregoff); |
d611717a | 69 | regcache_raw_supply (regcache, mips_regnum (gdbarch)->lo, |
7f7fe91e | 70 | (const char *) (regp + CTX_MDLO) + gregoff); |
d611717a | 71 | regcache_raw_supply (regcache, mips_regnum (gdbarch)->cause, |
7f7fe91e | 72 | (const char *) (regp + CTX_CAUSE) + gregoff); |
c906108c SS |
73 | |
74 | /* Fill inaccessible registers with zero. */ | |
d611717a | 75 | regcache_raw_supply (regcache, mips_regnum (gdbarch)->badvaddr, zerobuf); |
c906108c SS |
76 | } |
77 | ||
78 | void | |
7f7fe91e | 79 | fill_gregset (const struct regcache *regcache, gregset_t *gregsetp, int regno) |
c906108c | 80 | { |
6a1872e4 | 81 | int regi, size; |
52f0bd74 | 82 | greg_t *regp = &(*gregsetp)[0]; |
6a1872e4 | 83 | gdb_byte buf[MAX_REGISTER_SIZE]; |
d611717a | 84 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
c906108c SS |
85 | |
86 | /* Under Irix6, if GDB is built with N32 ABI and is debugging an O32 | |
87 | executable, we have to sign extend the registers to 64 bits before | |
88 | filling in the gregset structure. */ | |
89 | ||
90 | for (regi = 0; regi <= CTX_RA; regi++) | |
91 | if ((regno == -1) || (regno == regi)) | |
44ed547b | 92 | { |
d611717a | 93 | size = register_size (gdbarch, regi); |
7f7fe91e | 94 | regcache_raw_collect (regcache, regi, buf); |
6a1872e4 | 95 | *(regp + regi) = extract_signed_integer (buf, size); |
44ed547b | 96 | } |
c906108c | 97 | |
d611717a | 98 | if ((regno == -1) || (regno == gdbarch_pc_regnum (gdbarch))) |
44ed547b | 99 | { |
d611717a UW |
100 | regi = mips_regnum (gdbarch)->pc; |
101 | size = register_size (gdbarch, regi); | |
7f7fe91e | 102 | regcache_raw_collect (regcache, regi, buf); |
6a1872e4 | 103 | *(regp + CTX_EPC) = extract_signed_integer (buf, size); |
44ed547b | 104 | } |
c906108c | 105 | |
d611717a | 106 | if ((regno == -1) || (regno == mips_regnum (gdbarch)->cause)) |
44ed547b | 107 | { |
d611717a UW |
108 | regi = mips_regnum (gdbarch)->cause; |
109 | size = register_size (gdbarch, regi); | |
7f7fe91e | 110 | regcache_raw_collect (regcache, regi, buf); |
6a1872e4 | 111 | *(regp + CTX_CAUSE) = extract_signed_integer (buf, size); |
44ed547b | 112 | } |
c906108c | 113 | |
d611717a | 114 | if ((regno == -1) || (regno == mips_regnum (gdbarch)->hi)) |
44ed547b | 115 | { |
d611717a UW |
116 | regi = mips_regnum (gdbarch)->hi; |
117 | size = register_size (gdbarch, regi); | |
7f7fe91e | 118 | regcache_raw_collect (regcache, regi, buf); |
6a1872e4 | 119 | *(regp + CTX_MDHI) = extract_signed_integer (buf, size); |
44ed547b | 120 | } |
c906108c | 121 | |
d611717a | 122 | if ((regno == -1) || (regno == mips_regnum (gdbarch)->lo)) |
44ed547b | 123 | { |
d611717a UW |
124 | regi = mips_regnum (gdbarch)->lo; |
125 | size = register_size (gdbarch, regi); | |
7f7fe91e | 126 | regcache_raw_collect (regcache, regi, buf); |
6a1872e4 | 127 | *(regp + CTX_MDLO) = extract_signed_integer (buf, size); |
44ed547b | 128 | } |
c906108c SS |
129 | } |
130 | ||
131 | /* | |
132 | * Now we do the same thing for floating-point registers. | |
3e8c568d | 133 | * We don't bother to condition on gdbarch_fp0_regnum since any |
c906108c SS |
134 | * reasonable MIPS configuration has an R3010 in it. |
135 | * | |
136 | * Again, see the comments in m68k-tdep.c. | |
137 | */ | |
138 | ||
139 | void | |
7f7fe91e | 140 | supply_fpregset (struct regcache *regcache, const fpregset_t *fpregsetp) |
c906108c | 141 | { |
52f0bd74 | 142 | int regi; |
466d7106 | 143 | static char zerobuf[32] = {0}; |
6d1eba4c | 144 | char fsrbuf[8]; |
d611717a | 145 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
c906108c SS |
146 | |
147 | /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */ | |
148 | ||
149 | for (regi = 0; regi < 32; regi++) | |
d611717a | 150 | regcache_raw_supply (regcache, gdbarch_fp0_regnum (gdbarch) + regi, |
7f7fe91e | 151 | (const char *) &fpregsetp->fp_r.fp_regs[regi]); |
c906108c | 152 | |
6d1eba4c JB |
153 | /* We can't supply the FSR register directly to the regcache, |
154 | because there is a size issue: On one hand, fpregsetp->fp_csr | |
155 | is 32bits long, while the regcache expects a 64bits long value. | |
156 | So we use a buffer of the correct size and copy into it the register | |
157 | value at the proper location. */ | |
158 | memset (fsrbuf, 0, 4); | |
159 | memcpy (fsrbuf + 4, &fpregsetp->fp_csr, 4); | |
160 | ||
7f7fe91e | 161 | regcache_raw_supply (regcache, |
d611717a | 162 | mips_regnum (gdbarch)->fp_control_status, fsrbuf); |
c906108c | 163 | |
56cea623 | 164 | /* FIXME: how can we supply FCRIR? SGI doesn't tell us. */ |
7f7fe91e | 165 | regcache_raw_supply (regcache, |
d611717a | 166 | mips_regnum (gdbarch)->fp_implementation_revision, |
23a6d369 | 167 | zerobuf); |
c906108c SS |
168 | } |
169 | ||
170 | void | |
7f7fe91e | 171 | fill_fpregset (const struct regcache *regcache, fpregset_t *fpregsetp, int regno) |
c906108c SS |
172 | { |
173 | int regi; | |
174 | char *from, *to; | |
d611717a | 175 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
c906108c SS |
176 | |
177 | /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */ | |
178 | ||
d611717a UW |
179 | for (regi = gdbarch_fp0_regnum (gdbarch); |
180 | regi < gdbarch_fp0_regnum (gdbarch) + 32; regi++) | |
c906108c SS |
181 | { |
182 | if ((regno == -1) || (regno == regi)) | |
183 | { | |
3e8c568d | 184 | to = (char *) &(fpregsetp->fp_r.fp_regs[regi - gdbarch_fp0_regnum |
d611717a | 185 | (gdbarch)]); |
7f7fe91e | 186 | regcache_raw_collect (regcache, regi, to); |
c906108c SS |
187 | } |
188 | } | |
189 | ||
6d1eba4c | 190 | if (regno == -1 |
d611717a | 191 | || regno == mips_regnum (gdbarch)->fp_control_status) |
6d1eba4c JB |
192 | { |
193 | char fsrbuf[8]; | |
194 | ||
195 | /* We can't fill the FSR register directly from the regcache, | |
196 | because there is a size issue: On one hand, fpregsetp->fp_csr | |
197 | is 32bits long, while the regcache expects a 64bits long buffer. | |
198 | So we use a buffer of the correct size and copy the register | |
199 | value from that buffer. */ | |
7f7fe91e | 200 | regcache_raw_collect (regcache, |
d611717a | 201 | mips_regnum (gdbarch)->fp_control_status, fsrbuf); |
6d1eba4c JB |
202 | |
203 | memcpy (&fpregsetp->fp_csr, fsrbuf + 4, 4); | |
204 | } | |
c906108c SS |
205 | } |
206 | ||
207 | ||
16bce26c KB |
208 | /* Provide registers to GDB from a core file. |
209 | ||
210 | CORE_REG_SECT points to an array of bytes, which were obtained from | |
211 | a core file which BFD thinks might contain register contents. | |
212 | CORE_REG_SIZE is its size. | |
213 | ||
214 | Normally, WHICH says which register set corelow suspects this is: | |
215 | 0 --- the general-purpose register set | |
216 | 2 --- the floating-point register set | |
217 | However, for Irix 5, WHICH isn't used. | |
218 | ||
219 | REG_ADDR is also unused. */ | |
220 | ||
c906108c | 221 | static void |
9eefc95f UW |
222 | fetch_core_registers (struct regcache *regcache, |
223 | char *core_reg_sect, unsigned core_reg_size, | |
16bce26c | 224 | int which, CORE_ADDR reg_addr) |
c906108c | 225 | { |
f6e1bffc | 226 | char *srcp = core_reg_sect; |
d611717a UW |
227 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
228 | int regsize = mips_isa_regsize (gdbarch); | |
f6e1bffc JB |
229 | int regno; |
230 | ||
f58b68aa DJ |
231 | /* If regsize is 8, this is a N32 or N64 core file. |
232 | If regsize is 4, this is an O32 core file. */ | |
d611717a | 233 | if (core_reg_size != regsize * gdbarch_num_regs (gdbarch)) |
c906108c | 234 | { |
8a3fe4f8 | 235 | warning (_("wrong size gregset struct in core file")); |
c906108c SS |
236 | return; |
237 | } | |
f58b68aa | 238 | |
d611717a | 239 | for (regno = 0; regno < gdbarch_num_regs (gdbarch); regno++) |
f58b68aa | 240 | { |
9eefc95f | 241 | regcache_raw_supply (regcache, regno, srcp); |
f58b68aa DJ |
242 | srcp += regsize; |
243 | } | |
c906108c | 244 | } |
c5aa993b | 245 | |
c906108c SS |
246 | /* Register that we are able to handle irix5 core file formats. |
247 | This really is bfd_target_unknown_flavour */ | |
248 | ||
249 | static struct core_fns irix5_core_fns = | |
250 | { | |
2acceee2 JM |
251 | bfd_target_unknown_flavour, /* core_flavour */ |
252 | default_check_format, /* check_format */ | |
253 | default_core_sniffer, /* core_sniffer */ | |
254 | fetch_core_registers, /* core_read_registers */ | |
255 | NULL /* next */ | |
c906108c SS |
256 | }; |
257 | ||
258 | void | |
fba45db2 | 259 | _initialize_core_irix5 (void) |
c906108c | 260 | { |
00e32a35 | 261 | deprecated_add_core_fns (&irix5_core_fns); |
c906108c | 262 | } |