Commit | Line | Data |
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c906108c | 1 | /* Native support for the SGI Iris running IRIX version 5, for GDB. |
1b13c4f6 | 2 | |
6aba47ca | 3 | Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, |
0fb0cc75 | 4 | 1999, 2000, 2001, 2002, 2004, 2006, 2007, 2008, 2009 |
9b254dd1 | 5 | Free Software Foundation, Inc. |
1b13c4f6 | 6 | |
c906108c SS |
7 | Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU |
8 | and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin. | |
9 | Implemented for Irix 4.x by Garrett A. Wollman. | |
10 | Modified for Irix 5.x by Ian Lance Taylor. | |
11 | ||
c5aa993b | 12 | This file is part of GDB. |
c906108c | 13 | |
c5aa993b JM |
14 | This program is free software; you can redistribute it and/or modify |
15 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 16 | the Free Software Foundation; either version 3 of the License, or |
c5aa993b | 17 | (at your option) any later version. |
c906108c | 18 | |
c5aa993b JM |
19 | This program is distributed in the hope that it will be useful, |
20 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
22 | GNU General Public License for more details. | |
c906108c | 23 | |
c5aa993b | 24 | You should have received a copy of the GNU General Public License |
a9762ec7 | 25 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
c906108c SS |
26 | |
27 | #include "defs.h" | |
28 | #include "inferior.h" | |
29 | #include "gdbcore.h" | |
30 | #include "target.h" | |
4e052eda | 31 | #include "regcache.h" |
d1a7880c | 32 | #include "procfs.h" |
c906108c SS |
33 | |
34 | #include "gdb_string.h" | |
35 | #include <sys/time.h> | |
36 | #include <sys/procfs.h> | |
37 | #include <setjmp.h> /* For JB_XXX. */ | |
38 | ||
c60c0f5f MS |
39 | /* Prototypes for supply_gregset etc. */ |
40 | #include "gregset.h" | |
b639a770 | 41 | #include "mips-tdep.h" |
c60c0f5f | 42 | |
9eefc95f UW |
43 | static void fetch_core_registers (struct regcache *, char *, |
44 | unsigned int, int, CORE_ADDR); | |
c906108c | 45 | |
c906108c SS |
46 | |
47 | /* | |
48 | * See the comment in m68k-tdep.c regarding the utility of these functions. | |
49 | * | |
50 | * These definitions are from the MIPS SVR4 ABI, so they may work for | |
51 | * any MIPS SVR4 target. | |
52 | */ | |
53 | ||
c5aa993b | 54 | void |
7f7fe91e | 55 | supply_gregset (struct regcache *regcache, const gregset_t *gregsetp) |
c906108c | 56 | { |
52f0bd74 | 57 | int regi; |
7f7fe91e | 58 | const greg_t *regp = &(*gregsetp)[0]; |
d611717a UW |
59 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
60 | int gregoff = sizeof (greg_t) - mips_isa_regsize (gdbarch); | |
466d7106 | 61 | static char zerobuf[32] = {0}; |
c906108c | 62 | |
c5aa993b | 63 | for (regi = 0; regi <= CTX_RA; regi++) |
7f7fe91e UW |
64 | regcache_raw_supply (regcache, regi, |
65 | (const char *) (regp + regi) + gregoff); | |
66 | ||
d611717a | 67 | regcache_raw_supply (regcache, mips_regnum (gdbarch)->pc, |
7f7fe91e | 68 | (const char *) (regp + CTX_EPC) + gregoff); |
d611717a | 69 | regcache_raw_supply (regcache, mips_regnum (gdbarch)->hi, |
7f7fe91e | 70 | (const char *) (regp + CTX_MDHI) + gregoff); |
d611717a | 71 | regcache_raw_supply (regcache, mips_regnum (gdbarch)->lo, |
7f7fe91e | 72 | (const char *) (regp + CTX_MDLO) + gregoff); |
d611717a | 73 | regcache_raw_supply (regcache, mips_regnum (gdbarch)->cause, |
7f7fe91e | 74 | (const char *) (regp + CTX_CAUSE) + gregoff); |
c906108c SS |
75 | |
76 | /* Fill inaccessible registers with zero. */ | |
d611717a | 77 | regcache_raw_supply (regcache, mips_regnum (gdbarch)->badvaddr, zerobuf); |
c906108c SS |
78 | } |
79 | ||
80 | void | |
7f7fe91e | 81 | fill_gregset (const struct regcache *regcache, gregset_t *gregsetp, int regno) |
c906108c | 82 | { |
6a1872e4 | 83 | int regi, size; |
52f0bd74 | 84 | greg_t *regp = &(*gregsetp)[0]; |
6a1872e4 | 85 | gdb_byte buf[MAX_REGISTER_SIZE]; |
d611717a | 86 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
c906108c SS |
87 | |
88 | /* Under Irix6, if GDB is built with N32 ABI and is debugging an O32 | |
89 | executable, we have to sign extend the registers to 64 bits before | |
90 | filling in the gregset structure. */ | |
91 | ||
92 | for (regi = 0; regi <= CTX_RA; regi++) | |
93 | if ((regno == -1) || (regno == regi)) | |
44ed547b | 94 | { |
d611717a | 95 | size = register_size (gdbarch, regi); |
7f7fe91e | 96 | regcache_raw_collect (regcache, regi, buf); |
6a1872e4 | 97 | *(regp + regi) = extract_signed_integer (buf, size); |
44ed547b | 98 | } |
c906108c | 99 | |
d611717a | 100 | if ((regno == -1) || (regno == gdbarch_pc_regnum (gdbarch))) |
44ed547b | 101 | { |
d611717a UW |
102 | regi = mips_regnum (gdbarch)->pc; |
103 | size = register_size (gdbarch, regi); | |
7f7fe91e | 104 | regcache_raw_collect (regcache, regi, buf); |
6a1872e4 | 105 | *(regp + CTX_EPC) = extract_signed_integer (buf, size); |
44ed547b | 106 | } |
c906108c | 107 | |
d611717a | 108 | if ((regno == -1) || (regno == mips_regnum (gdbarch)->cause)) |
44ed547b | 109 | { |
d611717a UW |
110 | regi = mips_regnum (gdbarch)->cause; |
111 | size = register_size (gdbarch, regi); | |
7f7fe91e | 112 | regcache_raw_collect (regcache, regi, buf); |
6a1872e4 | 113 | *(regp + CTX_CAUSE) = extract_signed_integer (buf, size); |
44ed547b | 114 | } |
c906108c | 115 | |
d611717a | 116 | if ((regno == -1) || (regno == mips_regnum (gdbarch)->hi)) |
44ed547b | 117 | { |
d611717a UW |
118 | regi = mips_regnum (gdbarch)->hi; |
119 | size = register_size (gdbarch, regi); | |
7f7fe91e | 120 | regcache_raw_collect (regcache, regi, buf); |
6a1872e4 | 121 | *(regp + CTX_MDHI) = extract_signed_integer (buf, size); |
44ed547b | 122 | } |
c906108c | 123 | |
d611717a | 124 | if ((regno == -1) || (regno == mips_regnum (gdbarch)->lo)) |
44ed547b | 125 | { |
d611717a UW |
126 | regi = mips_regnum (gdbarch)->lo; |
127 | size = register_size (gdbarch, regi); | |
7f7fe91e | 128 | regcache_raw_collect (regcache, regi, buf); |
6a1872e4 | 129 | *(regp + CTX_MDLO) = extract_signed_integer (buf, size); |
44ed547b | 130 | } |
c906108c SS |
131 | } |
132 | ||
133 | /* | |
134 | * Now we do the same thing for floating-point registers. | |
3e8c568d | 135 | * We don't bother to condition on gdbarch_fp0_regnum since any |
c906108c SS |
136 | * reasonable MIPS configuration has an R3010 in it. |
137 | * | |
138 | * Again, see the comments in m68k-tdep.c. | |
139 | */ | |
140 | ||
141 | void | |
7f7fe91e | 142 | supply_fpregset (struct regcache *regcache, const fpregset_t *fpregsetp) |
c906108c | 143 | { |
52f0bd74 | 144 | int regi; |
466d7106 | 145 | static char zerobuf[32] = {0}; |
6d1eba4c | 146 | char fsrbuf[8]; |
d611717a | 147 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
c906108c SS |
148 | |
149 | /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */ | |
150 | ||
151 | for (regi = 0; regi < 32; regi++) | |
d611717a | 152 | regcache_raw_supply (regcache, gdbarch_fp0_regnum (gdbarch) + regi, |
7f7fe91e | 153 | (const char *) &fpregsetp->fp_r.fp_regs[regi]); |
c906108c | 154 | |
6d1eba4c JB |
155 | /* We can't supply the FSR register directly to the regcache, |
156 | because there is a size issue: On one hand, fpregsetp->fp_csr | |
157 | is 32bits long, while the regcache expects a 64bits long value. | |
158 | So we use a buffer of the correct size and copy into it the register | |
159 | value at the proper location. */ | |
160 | memset (fsrbuf, 0, 4); | |
161 | memcpy (fsrbuf + 4, &fpregsetp->fp_csr, 4); | |
162 | ||
7f7fe91e | 163 | regcache_raw_supply (regcache, |
d611717a | 164 | mips_regnum (gdbarch)->fp_control_status, fsrbuf); |
c906108c | 165 | |
56cea623 | 166 | /* FIXME: how can we supply FCRIR? SGI doesn't tell us. */ |
7f7fe91e | 167 | regcache_raw_supply (regcache, |
d611717a | 168 | mips_regnum (gdbarch)->fp_implementation_revision, |
23a6d369 | 169 | zerobuf); |
c906108c SS |
170 | } |
171 | ||
172 | void | |
7f7fe91e | 173 | fill_fpregset (const struct regcache *regcache, fpregset_t *fpregsetp, int regno) |
c906108c SS |
174 | { |
175 | int regi; | |
176 | char *from, *to; | |
d611717a | 177 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
c906108c SS |
178 | |
179 | /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */ | |
180 | ||
d611717a UW |
181 | for (regi = gdbarch_fp0_regnum (gdbarch); |
182 | regi < gdbarch_fp0_regnum (gdbarch) + 32; regi++) | |
c906108c SS |
183 | { |
184 | if ((regno == -1) || (regno == regi)) | |
185 | { | |
3e8c568d | 186 | to = (char *) &(fpregsetp->fp_r.fp_regs[regi - gdbarch_fp0_regnum |
d611717a | 187 | (gdbarch)]); |
7f7fe91e | 188 | regcache_raw_collect (regcache, regi, to); |
c906108c SS |
189 | } |
190 | } | |
191 | ||
6d1eba4c | 192 | if (regno == -1 |
d611717a | 193 | || regno == mips_regnum (gdbarch)->fp_control_status) |
6d1eba4c JB |
194 | { |
195 | char fsrbuf[8]; | |
196 | ||
197 | /* We can't fill the FSR register directly from the regcache, | |
198 | because there is a size issue: On one hand, fpregsetp->fp_csr | |
199 | is 32bits long, while the regcache expects a 64bits long buffer. | |
200 | So we use a buffer of the correct size and copy the register | |
201 | value from that buffer. */ | |
7f7fe91e | 202 | regcache_raw_collect (regcache, |
d611717a | 203 | mips_regnum (gdbarch)->fp_control_status, fsrbuf); |
6d1eba4c JB |
204 | |
205 | memcpy (&fpregsetp->fp_csr, fsrbuf + 4, 4); | |
206 | } | |
c906108c SS |
207 | } |
208 | ||
209 | ||
16bce26c KB |
210 | /* Provide registers to GDB from a core file. |
211 | ||
212 | CORE_REG_SECT points to an array of bytes, which were obtained from | |
213 | a core file which BFD thinks might contain register contents. | |
214 | CORE_REG_SIZE is its size. | |
215 | ||
216 | Normally, WHICH says which register set corelow suspects this is: | |
217 | 0 --- the general-purpose register set | |
218 | 2 --- the floating-point register set | |
219 | However, for Irix 5, WHICH isn't used. | |
220 | ||
221 | REG_ADDR is also unused. */ | |
222 | ||
c906108c | 223 | static void |
9eefc95f UW |
224 | fetch_core_registers (struct regcache *regcache, |
225 | char *core_reg_sect, unsigned core_reg_size, | |
16bce26c | 226 | int which, CORE_ADDR reg_addr) |
c906108c | 227 | { |
f6e1bffc | 228 | char *srcp = core_reg_sect; |
d611717a UW |
229 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
230 | int regsize = mips_isa_regsize (gdbarch); | |
f6e1bffc JB |
231 | int regno; |
232 | ||
f58b68aa DJ |
233 | /* If regsize is 8, this is a N32 or N64 core file. |
234 | If regsize is 4, this is an O32 core file. */ | |
d611717a | 235 | if (core_reg_size != regsize * gdbarch_num_regs (gdbarch)) |
c906108c | 236 | { |
8a3fe4f8 | 237 | warning (_("wrong size gregset struct in core file")); |
c906108c SS |
238 | return; |
239 | } | |
f58b68aa | 240 | |
d611717a | 241 | for (regno = 0; regno < gdbarch_num_regs (gdbarch); regno++) |
f58b68aa | 242 | { |
9eefc95f | 243 | regcache_raw_supply (regcache, regno, srcp); |
f58b68aa DJ |
244 | srcp += regsize; |
245 | } | |
c906108c | 246 | } |
c5aa993b | 247 | |
c906108c SS |
248 | /* Register that we are able to handle irix5 core file formats. |
249 | This really is bfd_target_unknown_flavour */ | |
250 | ||
251 | static struct core_fns irix5_core_fns = | |
252 | { | |
2acceee2 JM |
253 | bfd_target_unknown_flavour, /* core_flavour */ |
254 | default_check_format, /* check_format */ | |
255 | default_core_sniffer, /* core_sniffer */ | |
256 | fetch_core_registers, /* core_read_registers */ | |
257 | NULL /* next */ | |
c906108c SS |
258 | }; |
259 | ||
d1a7880c PA |
260 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
261 | extern initialize_file_ftype _initialize_irix5_nat; | |
262 | ||
c906108c | 263 | void |
d1a7880c | 264 | _initialize_irix5_nat (void) |
c906108c | 265 | { |
d1a7880c PA |
266 | struct target_ops *t; |
267 | ||
268 | t = procfs_target (); | |
269 | procfs_use_watchpoints (t); | |
270 | add_target (t); | |
271 | ||
00e32a35 | 272 | deprecated_add_core_fns (&irix5_core_fns); |
c906108c | 273 | } |