Commit | Line | Data |
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c906108c | 1 | /* Native support for the SGI Iris running IRIX version 5, for GDB. |
1b13c4f6 | 2 | |
6aba47ca DJ |
3 | Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, |
4 | 1999, 2000, 2001, 2002, 2004, 2006, 2007 Free Software Foundation, Inc. | |
1b13c4f6 | 5 | |
c906108c SS |
6 | Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU |
7 | and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin. | |
8 | Implemented for Irix 4.x by Garrett A. Wollman. | |
9 | Modified for Irix 5.x by Ian Lance Taylor. | |
10 | ||
c5aa993b | 11 | This file is part of GDB. |
c906108c | 12 | |
c5aa993b JM |
13 | This program is free software; you can redistribute it and/or modify |
14 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 15 | the Free Software Foundation; either version 3 of the License, or |
c5aa993b | 16 | (at your option) any later version. |
c906108c | 17 | |
c5aa993b JM |
18 | This program is distributed in the hope that it will be useful, |
19 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | GNU General Public License for more details. | |
c906108c | 22 | |
c5aa993b | 23 | You should have received a copy of the GNU General Public License |
a9762ec7 | 24 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
c906108c SS |
25 | |
26 | #include "defs.h" | |
27 | #include "inferior.h" | |
28 | #include "gdbcore.h" | |
29 | #include "target.h" | |
4e052eda | 30 | #include "regcache.h" |
c906108c SS |
31 | |
32 | #include "gdb_string.h" | |
33 | #include <sys/time.h> | |
34 | #include <sys/procfs.h> | |
35 | #include <setjmp.h> /* For JB_XXX. */ | |
36 | ||
c60c0f5f MS |
37 | /* Prototypes for supply_gregset etc. */ |
38 | #include "gregset.h" | |
b639a770 | 39 | #include "mips-tdep.h" |
c60c0f5f | 40 | |
9eefc95f UW |
41 | static void fetch_core_registers (struct regcache *, char *, |
42 | unsigned int, int, CORE_ADDR); | |
c906108c | 43 | |
c906108c SS |
44 | |
45 | /* | |
46 | * See the comment in m68k-tdep.c regarding the utility of these functions. | |
47 | * | |
48 | * These definitions are from the MIPS SVR4 ABI, so they may work for | |
49 | * any MIPS SVR4 target. | |
50 | */ | |
51 | ||
c5aa993b | 52 | void |
7f7fe91e | 53 | supply_gregset (struct regcache *regcache, const gregset_t *gregsetp) |
c906108c | 54 | { |
52f0bd74 | 55 | int regi; |
7f7fe91e | 56 | const greg_t *regp = &(*gregsetp)[0]; |
1b13c4f6 | 57 | int gregoff = sizeof (greg_t) - mips_isa_regsize (current_gdbarch); |
466d7106 | 58 | static char zerobuf[32] = {0}; |
c906108c | 59 | |
c5aa993b | 60 | for (regi = 0; regi <= CTX_RA; regi++) |
7f7fe91e UW |
61 | regcache_raw_supply (regcache, regi, |
62 | (const char *) (regp + regi) + gregoff); | |
63 | ||
64 | regcache_raw_supply (regcache, mips_regnum (current_gdbarch)->pc, | |
65 | (const char *) (regp + CTX_EPC) + gregoff); | |
66 | regcache_raw_supply (regcache, mips_regnum (current_gdbarch)->hi, | |
67 | (const char *) (regp + CTX_MDHI) + gregoff); | |
68 | regcache_raw_supply (regcache, mips_regnum (current_gdbarch)->lo, | |
69 | (const char *) (regp + CTX_MDLO) + gregoff); | |
70 | regcache_raw_supply (regcache, mips_regnum (current_gdbarch)->cause, | |
71 | (const char *) (regp + CTX_CAUSE) + gregoff); | |
c906108c SS |
72 | |
73 | /* Fill inaccessible registers with zero. */ | |
7f7fe91e | 74 | regcache_raw_supply (regcache, mips_regnum (current_gdbarch)->badvaddr, zerobuf); |
c906108c SS |
75 | } |
76 | ||
77 | void | |
7f7fe91e | 78 | fill_gregset (const struct regcache *regcache, gregset_t *gregsetp, int regno) |
c906108c | 79 | { |
6a1872e4 | 80 | int regi, size; |
52f0bd74 | 81 | greg_t *regp = &(*gregsetp)[0]; |
6a1872e4 | 82 | gdb_byte buf[MAX_REGISTER_SIZE]; |
c906108c SS |
83 | |
84 | /* Under Irix6, if GDB is built with N32 ABI and is debugging an O32 | |
85 | executable, we have to sign extend the registers to 64 bits before | |
86 | filling in the gregset structure. */ | |
87 | ||
88 | for (regi = 0; regi <= CTX_RA; regi++) | |
89 | if ((regno == -1) || (regno == regi)) | |
44ed547b | 90 | { |
6a1872e4 | 91 | size = register_size (current_gdbarch, regi); |
7f7fe91e | 92 | regcache_raw_collect (regcache, regi, buf); |
6a1872e4 | 93 | *(regp + regi) = extract_signed_integer (buf, size); |
44ed547b | 94 | } |
c906108c | 95 | |
3e8c568d | 96 | if ((regno == -1) || (regno == gdbarch_pc_regnum (current_gdbarch))) |
44ed547b | 97 | { |
6a1872e4 UW |
98 | regi = mips_regnum (current_gdbarch)->pc; |
99 | size = register_size (current_gdbarch, regi); | |
7f7fe91e | 100 | regcache_raw_collect (regcache, regi, buf); |
6a1872e4 | 101 | *(regp + CTX_EPC) = extract_signed_integer (buf, size); |
44ed547b | 102 | } |
c906108c | 103 | |
56cea623 | 104 | if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->cause)) |
44ed547b | 105 | { |
6a1872e4 UW |
106 | regi = mips_regnum (current_gdbarch)->cause; |
107 | size = register_size (current_gdbarch, regi); | |
7f7fe91e | 108 | regcache_raw_collect (regcache, regi, buf); |
6a1872e4 | 109 | *(regp + CTX_CAUSE) = extract_signed_integer (buf, size); |
44ed547b | 110 | } |
c906108c | 111 | |
6a1872e4 | 112 | if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->hi)) |
44ed547b | 113 | { |
6a1872e4 UW |
114 | regi = mips_regnum (current_gdbarch)->hi; |
115 | size = register_size (current_gdbarch, regi); | |
7f7fe91e | 116 | regcache_raw_collect (regcache, regi, buf); |
6a1872e4 | 117 | *(regp + CTX_MDHI) = extract_signed_integer (buf, size); |
44ed547b | 118 | } |
c906108c | 119 | |
56cea623 | 120 | if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->lo)) |
44ed547b | 121 | { |
6a1872e4 UW |
122 | regi = mips_regnum (current_gdbarch)->lo; |
123 | size = register_size (current_gdbarch, regi); | |
7f7fe91e | 124 | regcache_raw_collect (regcache, regi, buf); |
6a1872e4 | 125 | *(regp + CTX_MDLO) = extract_signed_integer (buf, size); |
44ed547b | 126 | } |
c906108c SS |
127 | } |
128 | ||
129 | /* | |
130 | * Now we do the same thing for floating-point registers. | |
3e8c568d | 131 | * We don't bother to condition on gdbarch_fp0_regnum since any |
c906108c SS |
132 | * reasonable MIPS configuration has an R3010 in it. |
133 | * | |
134 | * Again, see the comments in m68k-tdep.c. | |
135 | */ | |
136 | ||
137 | void | |
7f7fe91e | 138 | supply_fpregset (struct regcache *regcache, const fpregset_t *fpregsetp) |
c906108c | 139 | { |
52f0bd74 | 140 | int regi; |
466d7106 | 141 | static char zerobuf[32] = {0}; |
6d1eba4c | 142 | char fsrbuf[8]; |
c906108c SS |
143 | |
144 | /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */ | |
145 | ||
146 | for (regi = 0; regi < 32; regi++) | |
3e8c568d | 147 | regcache_raw_supply (regcache, gdbarch_fp0_regnum (current_gdbarch) + regi, |
7f7fe91e | 148 | (const char *) &fpregsetp->fp_r.fp_regs[regi]); |
c906108c | 149 | |
6d1eba4c JB |
150 | /* We can't supply the FSR register directly to the regcache, |
151 | because there is a size issue: On one hand, fpregsetp->fp_csr | |
152 | is 32bits long, while the regcache expects a 64bits long value. | |
153 | So we use a buffer of the correct size and copy into it the register | |
154 | value at the proper location. */ | |
155 | memset (fsrbuf, 0, 4); | |
156 | memcpy (fsrbuf + 4, &fpregsetp->fp_csr, 4); | |
157 | ||
7f7fe91e | 158 | regcache_raw_supply (regcache, |
23a6d369 | 159 | mips_regnum (current_gdbarch)->fp_control_status, |
6d1eba4c | 160 | fsrbuf); |
c906108c | 161 | |
56cea623 | 162 | /* FIXME: how can we supply FCRIR? SGI doesn't tell us. */ |
7f7fe91e | 163 | regcache_raw_supply (regcache, |
23a6d369 AC |
164 | mips_regnum (current_gdbarch)->fp_implementation_revision, |
165 | zerobuf); | |
c906108c SS |
166 | } |
167 | ||
168 | void | |
7f7fe91e | 169 | fill_fpregset (const struct regcache *regcache, fpregset_t *fpregsetp, int regno) |
c906108c SS |
170 | { |
171 | int regi; | |
172 | char *from, *to; | |
173 | ||
174 | /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */ | |
175 | ||
3e8c568d UW |
176 | for (regi = gdbarch_fp0_regnum (current_gdbarch); |
177 | regi < gdbarch_fp0_regnum (current_gdbarch) + 32; regi++) | |
c906108c SS |
178 | { |
179 | if ((regno == -1) || (regno == regi)) | |
180 | { | |
3e8c568d UW |
181 | to = (char *) &(fpregsetp->fp_r.fp_regs[regi - gdbarch_fp0_regnum |
182 | (current_gdbarch)]); | |
7f7fe91e | 183 | regcache_raw_collect (regcache, regi, to); |
c906108c SS |
184 | } |
185 | } | |
186 | ||
6d1eba4c JB |
187 | if (regno == -1 |
188 | || regno == mips_regnum (current_gdbarch)->fp_control_status) | |
189 | { | |
190 | char fsrbuf[8]; | |
191 | ||
192 | /* We can't fill the FSR register directly from the regcache, | |
193 | because there is a size issue: On one hand, fpregsetp->fp_csr | |
194 | is 32bits long, while the regcache expects a 64bits long buffer. | |
195 | So we use a buffer of the correct size and copy the register | |
196 | value from that buffer. */ | |
7f7fe91e | 197 | regcache_raw_collect (regcache, |
6a1872e4 UW |
198 | mips_regnum (current_gdbarch)->fp_control_status, |
199 | fsrbuf); | |
6d1eba4c JB |
200 | |
201 | memcpy (&fpregsetp->fp_csr, fsrbuf + 4, 4); | |
202 | } | |
c906108c SS |
203 | } |
204 | ||
205 | ||
16bce26c KB |
206 | /* Provide registers to GDB from a core file. |
207 | ||
208 | CORE_REG_SECT points to an array of bytes, which were obtained from | |
209 | a core file which BFD thinks might contain register contents. | |
210 | CORE_REG_SIZE is its size. | |
211 | ||
212 | Normally, WHICH says which register set corelow suspects this is: | |
213 | 0 --- the general-purpose register set | |
214 | 2 --- the floating-point register set | |
215 | However, for Irix 5, WHICH isn't used. | |
216 | ||
217 | REG_ADDR is also unused. */ | |
218 | ||
c906108c | 219 | static void |
9eefc95f UW |
220 | fetch_core_registers (struct regcache *regcache, |
221 | char *core_reg_sect, unsigned core_reg_size, | |
16bce26c | 222 | int which, CORE_ADDR reg_addr) |
c906108c | 223 | { |
f6e1bffc | 224 | char *srcp = core_reg_sect; |
f58b68aa | 225 | int regsize = mips_isa_regsize (current_gdbarch); |
f6e1bffc JB |
226 | int regno; |
227 | ||
f58b68aa DJ |
228 | /* If regsize is 8, this is a N32 or N64 core file. |
229 | If regsize is 4, this is an O32 core file. */ | |
f57d151a | 230 | if (core_reg_size != regsize * gdbarch_num_regs (current_gdbarch)) |
c906108c | 231 | { |
8a3fe4f8 | 232 | warning (_("wrong size gregset struct in core file")); |
c906108c SS |
233 | return; |
234 | } | |
f58b68aa | 235 | |
f57d151a | 236 | for (regno = 0; regno < gdbarch_num_regs (current_gdbarch); regno++) |
f58b68aa | 237 | { |
9eefc95f | 238 | regcache_raw_supply (regcache, regno, srcp); |
f58b68aa DJ |
239 | srcp += regsize; |
240 | } | |
c906108c | 241 | } |
c5aa993b | 242 | |
c906108c SS |
243 | /* Register that we are able to handle irix5 core file formats. |
244 | This really is bfd_target_unknown_flavour */ | |
245 | ||
246 | static struct core_fns irix5_core_fns = | |
247 | { | |
2acceee2 JM |
248 | bfd_target_unknown_flavour, /* core_flavour */ |
249 | default_check_format, /* check_format */ | |
250 | default_core_sniffer, /* core_sniffer */ | |
251 | fetch_core_registers, /* core_read_registers */ | |
252 | NULL /* next */ | |
c906108c SS |
253 | }; |
254 | ||
255 | void | |
fba45db2 | 256 | _initialize_core_irix5 (void) |
c906108c | 257 | { |
00e32a35 | 258 | deprecated_add_core_fns (&irix5_core_fns); |
c906108c | 259 | } |