2011-02-28 Michael Snyder <msnyder@vmware.com>
[deliverable/binutils-gdb.git] / gdb / irix5-nat.c
CommitLineData
c906108c 1/* Native support for the SGI Iris running IRIX version 5, for GDB.
1b13c4f6 2
6aba47ca 3 Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998,
7b6bb8da 4 1999, 2000, 2001, 2002, 2004, 2006, 2007, 2008, 2009, 2010, 2011
9b254dd1 5 Free Software Foundation, Inc.
1b13c4f6 6
c906108c
SS
7 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
8 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
9 Implemented for Irix 4.x by Garrett A. Wollman.
10 Modified for Irix 5.x by Ian Lance Taylor.
11
c5aa993b 12 This file is part of GDB.
c906108c 13
c5aa993b
JM
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
a9762ec7 16 the Free Software Foundation; either version 3 of the License, or
c5aa993b 17 (at your option) any later version.
c906108c 18
c5aa993b
JM
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
c906108c 23
c5aa993b 24 You should have received a copy of the GNU General Public License
a9762ec7 25 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
26
27#include "defs.h"
28#include "inferior.h"
29#include "gdbcore.h"
30#include "target.h"
4e052eda 31#include "regcache.h"
d1a7880c 32#include "procfs.h"
c906108c
SS
33
34#include "gdb_string.h"
35#include <sys/time.h>
36#include <sys/procfs.h>
37#include <setjmp.h> /* For JB_XXX. */
38
1777feb0 39/* Prototypes for supply_gregset etc. */
c60c0f5f 40#include "gregset.h"
b639a770 41#include "mips-tdep.h"
c60c0f5f 42
9eefc95f
UW
43static void fetch_core_registers (struct regcache *, char *,
44 unsigned int, int, CORE_ADDR);
c906108c 45
c906108c
SS
46
47/*
48 * See the comment in m68k-tdep.c regarding the utility of these functions.
49 *
50 * These definitions are from the MIPS SVR4 ABI, so they may work for
51 * any MIPS SVR4 target.
52 */
53
c5aa993b 54void
7f7fe91e 55supply_gregset (struct regcache *regcache, const gregset_t *gregsetp)
c906108c 56{
52f0bd74 57 int regi;
7f7fe91e 58 const greg_t *regp = &(*gregsetp)[0];
d611717a
UW
59 struct gdbarch *gdbarch = get_regcache_arch (regcache);
60 int gregoff = sizeof (greg_t) - mips_isa_regsize (gdbarch);
466d7106 61 static char zerobuf[32] = {0};
c906108c 62
c5aa993b 63 for (regi = 0; regi <= CTX_RA; regi++)
7f7fe91e
UW
64 regcache_raw_supply (regcache, regi,
65 (const char *) (regp + regi) + gregoff);
66
d611717a 67 regcache_raw_supply (regcache, mips_regnum (gdbarch)->pc,
7f7fe91e 68 (const char *) (regp + CTX_EPC) + gregoff);
d611717a 69 regcache_raw_supply (regcache, mips_regnum (gdbarch)->hi,
7f7fe91e 70 (const char *) (regp + CTX_MDHI) + gregoff);
d611717a 71 regcache_raw_supply (regcache, mips_regnum (gdbarch)->lo,
7f7fe91e 72 (const char *) (regp + CTX_MDLO) + gregoff);
d611717a 73 regcache_raw_supply (regcache, mips_regnum (gdbarch)->cause,
7f7fe91e 74 (const char *) (regp + CTX_CAUSE) + gregoff);
c906108c
SS
75
76 /* Fill inaccessible registers with zero. */
d611717a 77 regcache_raw_supply (regcache, mips_regnum (gdbarch)->badvaddr, zerobuf);
c906108c
SS
78}
79
80void
7f7fe91e 81fill_gregset (const struct regcache *regcache, gregset_t *gregsetp, int regno)
c906108c 82{
6a1872e4 83 int regi, size;
52f0bd74 84 greg_t *regp = &(*gregsetp)[0];
6a1872e4 85 gdb_byte buf[MAX_REGISTER_SIZE];
d611717a 86 struct gdbarch *gdbarch = get_regcache_arch (regcache);
e17a4113 87 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
c906108c
SS
88
89 /* Under Irix6, if GDB is built with N32 ABI and is debugging an O32
90 executable, we have to sign extend the registers to 64 bits before
91 filling in the gregset structure. */
92
93 for (regi = 0; regi <= CTX_RA; regi++)
94 if ((regno == -1) || (regno == regi))
44ed547b 95 {
d611717a 96 size = register_size (gdbarch, regi);
7f7fe91e 97 regcache_raw_collect (regcache, regi, buf);
e17a4113 98 *(regp + regi) = extract_signed_integer (buf, size, byte_order);
44ed547b 99 }
c906108c 100
e4b97d48 101 if ((regno == -1) || (regno == mips_regnum (gdbarch)->pc))
44ed547b 102 {
d611717a
UW
103 regi = mips_regnum (gdbarch)->pc;
104 size = register_size (gdbarch, regi);
7f7fe91e 105 regcache_raw_collect (regcache, regi, buf);
e17a4113 106 *(regp + CTX_EPC) = extract_signed_integer (buf, size, byte_order);
44ed547b 107 }
c906108c 108
d611717a 109 if ((regno == -1) || (regno == mips_regnum (gdbarch)->cause))
44ed547b 110 {
d611717a
UW
111 regi = mips_regnum (gdbarch)->cause;
112 size = register_size (gdbarch, regi);
7f7fe91e 113 regcache_raw_collect (regcache, regi, buf);
e17a4113 114 *(regp + CTX_CAUSE) = extract_signed_integer (buf, size, byte_order);
44ed547b 115 }
c906108c 116
d611717a 117 if ((regno == -1) || (regno == mips_regnum (gdbarch)->hi))
44ed547b 118 {
d611717a
UW
119 regi = mips_regnum (gdbarch)->hi;
120 size = register_size (gdbarch, regi);
7f7fe91e 121 regcache_raw_collect (regcache, regi, buf);
e17a4113 122 *(regp + CTX_MDHI) = extract_signed_integer (buf, size, byte_order);
44ed547b 123 }
c906108c 124
d611717a 125 if ((regno == -1) || (regno == mips_regnum (gdbarch)->lo))
44ed547b 126 {
d611717a
UW
127 regi = mips_regnum (gdbarch)->lo;
128 size = register_size (gdbarch, regi);
7f7fe91e 129 regcache_raw_collect (regcache, regi, buf);
e17a4113 130 *(regp + CTX_MDLO) = extract_signed_integer (buf, size, byte_order);
44ed547b 131 }
c906108c
SS
132}
133
134/*
135 * Now we do the same thing for floating-point registers.
3e8c568d 136 * We don't bother to condition on gdbarch_fp0_regnum since any
c906108c
SS
137 * reasonable MIPS configuration has an R3010 in it.
138 *
139 * Again, see the comments in m68k-tdep.c.
140 */
141
142void
7f7fe91e 143supply_fpregset (struct regcache *regcache, const fpregset_t *fpregsetp)
c906108c 144{
52f0bd74 145 int regi;
466d7106 146 static char zerobuf[32] = {0};
6d1eba4c 147 char fsrbuf[8];
d611717a 148 struct gdbarch *gdbarch = get_regcache_arch (regcache);
c906108c 149
1777feb0 150 /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */
c906108c
SS
151
152 for (regi = 0; regi < 32; regi++)
d611717a 153 regcache_raw_supply (regcache, gdbarch_fp0_regnum (gdbarch) + regi,
043b6510 154 (const char *) &fpregsetp->__fp_r.__fp_regs[regi]);
c906108c 155
6d1eba4c
JB
156 /* We can't supply the FSR register directly to the regcache,
157 because there is a size issue: On one hand, fpregsetp->fp_csr
158 is 32bits long, while the regcache expects a 64bits long value.
159 So we use a buffer of the correct size and copy into it the register
160 value at the proper location. */
161 memset (fsrbuf, 0, 4);
043b6510 162 memcpy (fsrbuf + 4, &fpregsetp->__fp_csr, 4);
6d1eba4c 163
7f7fe91e 164 regcache_raw_supply (regcache,
d611717a 165 mips_regnum (gdbarch)->fp_control_status, fsrbuf);
c906108c 166
1777feb0 167 /* FIXME: how can we supply FCRIR? SGI doesn't tell us. */
7f7fe91e 168 regcache_raw_supply (regcache,
d611717a 169 mips_regnum (gdbarch)->fp_implementation_revision,
23a6d369 170 zerobuf);
c906108c
SS
171}
172
173void
1777feb0
MS
174fill_fpregset (const struct regcache *regcache,
175 fpregset_t *fpregsetp, int regno)
c906108c
SS
176{
177 int regi;
178 char *from, *to;
d611717a 179 struct gdbarch *gdbarch = get_regcache_arch (regcache);
c906108c 180
1777feb0 181 /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */
c906108c 182
d611717a
UW
183 for (regi = gdbarch_fp0_regnum (gdbarch);
184 regi < gdbarch_fp0_regnum (gdbarch) + 32; regi++)
c906108c
SS
185 {
186 if ((regno == -1) || (regno == regi))
187 {
043b6510
JB
188 const int fp0_regnum = gdbarch_fp0_regnum (gdbarch);
189
190 to = (char *) &(fpregsetp->__fp_r.__fp_regs[regi - fp0_regnum]);
7f7fe91e 191 regcache_raw_collect (regcache, regi, to);
c906108c
SS
192 }
193 }
194
6d1eba4c 195 if (regno == -1
d611717a 196 || regno == mips_regnum (gdbarch)->fp_control_status)
6d1eba4c
JB
197 {
198 char fsrbuf[8];
199
200 /* We can't fill the FSR register directly from the regcache,
201 because there is a size issue: On one hand, fpregsetp->fp_csr
202 is 32bits long, while the regcache expects a 64bits long buffer.
203 So we use a buffer of the correct size and copy the register
204 value from that buffer. */
7f7fe91e 205 regcache_raw_collect (regcache,
d611717a 206 mips_regnum (gdbarch)->fp_control_status, fsrbuf);
6d1eba4c 207
043b6510 208 memcpy (&fpregsetp->__fp_csr, fsrbuf + 4, 4);
6d1eba4c 209 }
c906108c
SS
210}
211
212
16bce26c
KB
213/* Provide registers to GDB from a core file.
214
215 CORE_REG_SECT points to an array of bytes, which were obtained from
216 a core file which BFD thinks might contain register contents.
217 CORE_REG_SIZE is its size.
218
219 Normally, WHICH says which register set corelow suspects this is:
220 0 --- the general-purpose register set
221 2 --- the floating-point register set
222 However, for Irix 5, WHICH isn't used.
223
224 REG_ADDR is also unused. */
225
c906108c 226static void
9eefc95f
UW
227fetch_core_registers (struct regcache *regcache,
228 char *core_reg_sect, unsigned core_reg_size,
16bce26c 229 int which, CORE_ADDR reg_addr)
c906108c 230{
f6e1bffc 231 char *srcp = core_reg_sect;
d611717a
UW
232 struct gdbarch *gdbarch = get_regcache_arch (regcache);
233 int regsize = mips_isa_regsize (gdbarch);
f6e1bffc
JB
234 int regno;
235
f58b68aa
DJ
236 /* If regsize is 8, this is a N32 or N64 core file.
237 If regsize is 4, this is an O32 core file. */
d611717a 238 if (core_reg_size != regsize * gdbarch_num_regs (gdbarch))
c906108c 239 {
8a3fe4f8 240 warning (_("wrong size gregset struct in core file"));
c906108c
SS
241 return;
242 }
f58b68aa 243
d611717a 244 for (regno = 0; regno < gdbarch_num_regs (gdbarch); regno++)
f58b68aa 245 {
9eefc95f 246 regcache_raw_supply (regcache, regno, srcp);
f58b68aa
DJ
247 srcp += regsize;
248 }
c906108c 249}
c5aa993b 250
c906108c 251/* Register that we are able to handle irix5 core file formats.
1777feb0 252 This really is bfd_target_unknown_flavour. */
c906108c
SS
253
254static struct core_fns irix5_core_fns =
255{
2acceee2
JM
256 bfd_target_unknown_flavour, /* core_flavour */
257 default_check_format, /* check_format */
258 default_core_sniffer, /* core_sniffer */
259 fetch_core_registers, /* core_read_registers */
260 NULL /* next */
c906108c
SS
261};
262
d1a7880c
PA
263/* Provide a prototype to silence -Wmissing-prototypes. */
264extern initialize_file_ftype _initialize_irix5_nat;
265
c906108c 266void
d1a7880c 267_initialize_irix5_nat (void)
c906108c 268{
d1a7880c
PA
269 struct target_ops *t;
270
271 t = procfs_target ();
272 procfs_use_watchpoints (t);
273 add_target (t);
274
00e32a35 275 deprecated_add_core_fns (&irix5_core_fns);
c906108c 276}
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