Fix whitespace problem in my most recent entry.
[deliverable/binutils-gdb.git] / gdb / lynx-nat.c
CommitLineData
c906108c 1/* Native-dependent code for LynxOS.
4e052eda 2 Copyright 1993, 1994, 2001 Free Software Foundation, Inc.
c906108c 3
c5aa993b 4 This file is part of GDB.
c906108c 5
c5aa993b
JM
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
c906108c 10
c5aa993b
JM
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
c906108c 15
c5aa993b
JM
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
c906108c
SS
20
21#include "defs.h"
22#include "frame.h"
23#include "inferior.h"
24#include "target.h"
25#include "gdbcore.h"
4e052eda 26#include "regcache.h"
c906108c
SS
27
28#include <sys/ptrace.h>
29#include <sys/wait.h>
30#include <sys/fpp.h>
31
a14ed312
KB
32static unsigned long registers_addr (int pid);
33static void fetch_core_registers (char *, unsigned, int, CORE_ADDR);
c906108c
SS
34
35#define X(ENTRY)(offsetof(struct econtext, ENTRY))
36
37#ifdef I386
38/* Mappings from tm-i386v.h */
39
40static int regmap[] =
41{
c5aa993b
JM
42 X (eax),
43 X (ecx),
44 X (edx),
45 X (ebx),
46 X (esp), /* sp */
47 X (ebp), /* fp */
48 X (esi),
49 X (edi),
50 X (eip), /* pc */
51 X (flags), /* ps */
52 X (cs),
53 X (ss),
54 X (ds),
55 X (es),
56 X (ecode), /* Lynx doesn't give us either fs or gs, so */
57 X (fault), /* we just substitute these two in the hopes
c906108c
SS
58 that they are useful. */
59};
60#endif /* I386 */
61
62#ifdef M68K
63/* Mappings from tm-m68k.h */
64
65static int regmap[] =
66{
c5aa993b
JM
67 X (regs[0]), /* d0 */
68 X (regs[1]), /* d1 */
69 X (regs[2]), /* d2 */
70 X (regs[3]), /* d3 */
71 X (regs[4]), /* d4 */
72 X (regs[5]), /* d5 */
73 X (regs[6]), /* d6 */
74 X (regs[7]), /* d7 */
75 X (regs[8]), /* a0 */
76 X (regs[9]), /* a1 */
77 X (regs[10]), /* a2 */
78 X (regs[11]), /* a3 */
79 X (regs[12]), /* a4 */
80 X (regs[13]), /* a5 */
81 X (regs[14]), /* fp */
82 offsetof (st_t, usp) - offsetof (st_t, ec), /* sp */
83 X (status), /* ps */
84 X (pc),
85
86 X (fregs[0 * 3]), /* fp0 */
87 X (fregs[1 * 3]), /* fp1 */
88 X (fregs[2 * 3]), /* fp2 */
89 X (fregs[3 * 3]), /* fp3 */
90 X (fregs[4 * 3]), /* fp4 */
91 X (fregs[5 * 3]), /* fp5 */
92 X (fregs[6 * 3]), /* fp6 */
93 X (fregs[7 * 3]), /* fp7 */
94
95 X (fcregs[0]), /* fpcontrol */
96 X (fcregs[1]), /* fpstatus */
97 X (fcregs[2]), /* fpiaddr */
98 X (ssw), /* fpcode */
99 X (fault), /* fpflags */
c906108c
SS
100};
101#endif /* M68K */
102
103#ifdef SPARC
104/* Mappings from tm-sparc.h */
105
106#define FX(ENTRY)(offsetof(struct fcontext, ENTRY))
107
108static int regmap[] =
109{
110 -1, /* g0 */
c5aa993b
JM
111 X (g1),
112 X (g2),
113 X (g3),
114 X (g4),
c906108c
SS
115 -1, /* g5->g7 aren't saved by Lynx */
116 -1,
117 -1,
118
c5aa993b
JM
119 X (o[0]),
120 X (o[1]),
121 X (o[2]),
122 X (o[3]),
123 X (o[4]),
124 X (o[5]),
125 X (o[6]), /* sp */
126 X (o[7]), /* ra */
127
128 -1, -1, -1, -1, -1, -1, -1, -1, /* l0 -> l7 */
129
130 -1, -1, -1, -1, -1, -1, -1, -1, /* i0 -> i7 */
131
132 FX (f.fregs[0]), /* f0 */
133 FX (f.fregs[1]),
134 FX (f.fregs[2]),
135 FX (f.fregs[3]),
136 FX (f.fregs[4]),
137 FX (f.fregs[5]),
138 FX (f.fregs[6]),
139 FX (f.fregs[7]),
140 FX (f.fregs[8]),
141 FX (f.fregs[9]),
142 FX (f.fregs[10]),
143 FX (f.fregs[11]),
144 FX (f.fregs[12]),
145 FX (f.fregs[13]),
146 FX (f.fregs[14]),
147 FX (f.fregs[15]),
148 FX (f.fregs[16]),
149 FX (f.fregs[17]),
150 FX (f.fregs[18]),
151 FX (f.fregs[19]),
152 FX (f.fregs[20]),
153 FX (f.fregs[21]),
154 FX (f.fregs[22]),
155 FX (f.fregs[23]),
156 FX (f.fregs[24]),
157 FX (f.fregs[25]),
158 FX (f.fregs[26]),
159 FX (f.fregs[27]),
160 FX (f.fregs[28]),
161 FX (f.fregs[29]),
162 FX (f.fregs[30]),
163 FX (f.fregs[31]),
164
165 X (y),
166 X (psr),
167 X (wim),
168 X (tbr),
169 X (pc),
170 X (npc),
171 FX (fsr), /* fpsr */
c906108c
SS
172 -1, /* cpsr */
173};
174#endif /* SPARC */
175
176#ifdef rs6000
177
178static int regmap[] =
179{
c5aa993b
JM
180 X (iregs[0]), /* r0 */
181 X (iregs[1]),
182 X (iregs[2]),
183 X (iregs[3]),
184 X (iregs[4]),
185 X (iregs[5]),
186 X (iregs[6]),
187 X (iregs[7]),
188 X (iregs[8]),
189 X (iregs[9]),
190 X (iregs[10]),
191 X (iregs[11]),
192 X (iregs[12]),
193 X (iregs[13]),
194 X (iregs[14]),
195 X (iregs[15]),
196 X (iregs[16]),
197 X (iregs[17]),
198 X (iregs[18]),
199 X (iregs[19]),
200 X (iregs[20]),
201 X (iregs[21]),
202 X (iregs[22]),
203 X (iregs[23]),
204 X (iregs[24]),
205 X (iregs[25]),
206 X (iregs[26]),
207 X (iregs[27]),
208 X (iregs[28]),
209 X (iregs[29]),
210 X (iregs[30]),
211 X (iregs[31]),
212
213 X (fregs[0]), /* f0 */
214 X (fregs[1]),
215 X (fregs[2]),
216 X (fregs[3]),
217 X (fregs[4]),
218 X (fregs[5]),
219 X (fregs[6]),
220 X (fregs[7]),
221 X (fregs[8]),
222 X (fregs[9]),
223 X (fregs[10]),
224 X (fregs[11]),
225 X (fregs[12]),
226 X (fregs[13]),
227 X (fregs[14]),
228 X (fregs[15]),
229 X (fregs[16]),
230 X (fregs[17]),
231 X (fregs[18]),
232 X (fregs[19]),
233 X (fregs[20]),
234 X (fregs[21]),
235 X (fregs[22]),
236 X (fregs[23]),
237 X (fregs[24]),
238 X (fregs[25]),
239 X (fregs[26]),
240 X (fregs[27]),
241 X (fregs[28]),
242 X (fregs[29]),
243 X (fregs[30]),
244 X (fregs[31]),
245
246 X (srr0), /* IAR (PC) */
247 X (srr1), /* MSR (PS) */
248 X (cr), /* CR */
249 X (lr), /* LR */
250 X (ctr), /* CTR */
251 X (xer), /* XER */
252 X (mq) /* MQ */
c906108c
SS
253};
254
255#endif /* rs6000 */
256
257#ifdef SPARC
258
259/* This routine handles some oddball cases for Sparc registers and LynxOS.
260 In partucular, it causes refs to G0, g5->7, and all fp regs to return zero.
261 It also handles knows where to find the I & L regs on the stack. */
262
263void
fba45db2 264fetch_inferior_registers (int regno)
c906108c
SS
265{
266 int whatregs = 0;
267
268#define WHATREGS_FLOAT 1
269#define WHATREGS_GEN 2
270#define WHATREGS_STACK 4
271
272 if (regno == -1)
273 whatregs = WHATREGS_FLOAT | WHATREGS_GEN | WHATREGS_STACK;
274 else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
275 whatregs = WHATREGS_STACK;
276 else if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
277 whatregs = WHATREGS_FLOAT;
278 else
279 whatregs = WHATREGS_GEN;
280
281 if (whatregs & WHATREGS_GEN)
282 {
c5aa993b 283 struct econtext ec; /* general regs */
c906108c
SS
284 char buf[MAX_REGISTER_RAW_SIZE];
285 int retval;
286 int i;
287
288 errno = 0;
c5aa993b 289 retval = ptrace (PTRACE_GETREGS, inferior_pid, (PTRACE_ARG3_TYPE) & ec,
c906108c
SS
290 0);
291 if (errno)
292 perror_with_name ("ptrace(PTRACE_GETREGS)");
c5aa993b 293
c906108c
SS
294 memset (buf, 0, REGISTER_RAW_SIZE (G0_REGNUM));
295 supply_register (G0_REGNUM, buf);
c5aa993b 296 supply_register (TBR_REGNUM, (char *) &ec.tbr);
c906108c
SS
297
298 memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &ec.g1,
299 4 * REGISTER_RAW_SIZE (G1_REGNUM));
300 for (i = G1_REGNUM; i <= G1_REGNUM + 3; i++)
301 register_valid[i] = 1;
302
c5aa993b
JM
303 supply_register (PS_REGNUM, (char *) &ec.psr);
304 supply_register (Y_REGNUM, (char *) &ec.y);
305 supply_register (PC_REGNUM, (char *) &ec.pc);
306 supply_register (NPC_REGNUM, (char *) &ec.npc);
307 supply_register (WIM_REGNUM, (char *) &ec.wim);
c906108c
SS
308
309 memcpy (&registers[REGISTER_BYTE (O0_REGNUM)], ec.o,
310 8 * REGISTER_RAW_SIZE (O0_REGNUM));
311 for (i = O0_REGNUM; i <= O0_REGNUM + 7; i++)
312 register_valid[i] = 1;
313 }
314
315 if (whatregs & WHATREGS_STACK)
316 {
317 CORE_ADDR sp;
318 int i;
319
320 sp = read_register (SP_REGNUM);
321
f7384f0f 322 target_read_memory (sp + FRAME_SAVED_I0,
c5aa993b 323 &registers[REGISTER_BYTE (I0_REGNUM)],
f7384f0f 324 8 * REGISTER_RAW_SIZE (I0_REGNUM));
c906108c
SS
325 for (i = I0_REGNUM; i <= I7_REGNUM; i++)
326 register_valid[i] = 1;
327
f7384f0f 328 target_read_memory (sp + FRAME_SAVED_L0,
c5aa993b 329 &registers[REGISTER_BYTE (L0_REGNUM)],
f7384f0f 330 8 * REGISTER_RAW_SIZE (L0_REGNUM));
c906108c
SS
331 for (i = L0_REGNUM; i <= L0_REGNUM + 7; i++)
332 register_valid[i] = 1;
333 }
334
335 if (whatregs & WHATREGS_FLOAT)
336 {
c5aa993b 337 struct fcontext fc; /* fp regs */
c906108c
SS
338 int retval;
339 int i;
340
341 errno = 0;
c5aa993b 342 retval = ptrace (PTRACE_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) & fc,
c906108c
SS
343 0);
344 if (errno)
345 perror_with_name ("ptrace(PTRACE_GETFPREGS)");
c5aa993b 346
c906108c
SS
347 memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fc.f.fregs,
348 32 * REGISTER_RAW_SIZE (FP0_REGNUM));
349 for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++)
350 register_valid[i] = 1;
351
c5aa993b 352 supply_register (FPS_REGNUM, (char *) &fc.fsr);
c906108c
SS
353 }
354}
355
356/* This routine handles storing of the I & L regs for the Sparc. The trick
357 here is that they actually live on the stack. The really tricky part is
358 that when changing the stack pointer, the I & L regs must be written to
359 where the new SP points, otherwise the regs will be incorrect when the
360 process is started up again. We assume that the I & L regs are valid at
361 this point. */
362
363void
fba45db2 364store_inferior_registers (int regno)
c906108c
SS
365{
366 int whatregs = 0;
367
368 if (regno == -1)
369 whatregs = WHATREGS_FLOAT | WHATREGS_GEN | WHATREGS_STACK;
370 else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
371 whatregs = WHATREGS_STACK;
372 else if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
373 whatregs = WHATREGS_FLOAT;
374 else if (regno == SP_REGNUM)
375 whatregs = WHATREGS_STACK | WHATREGS_GEN;
376 else
377 whatregs = WHATREGS_GEN;
378
379 if (whatregs & WHATREGS_GEN)
380 {
c5aa993b 381 struct econtext ec; /* general regs */
c906108c
SS
382 int retval;
383
384 ec.tbr = read_register (TBR_REGNUM);
385 memcpy (&ec.g1, &registers[REGISTER_BYTE (G1_REGNUM)],
386 4 * REGISTER_RAW_SIZE (G1_REGNUM));
387
388 ec.psr = read_register (PS_REGNUM);
389 ec.y = read_register (Y_REGNUM);
390 ec.pc = read_register (PC_REGNUM);
391 ec.npc = read_register (NPC_REGNUM);
392 ec.wim = read_register (WIM_REGNUM);
393
394 memcpy (ec.o, &registers[REGISTER_BYTE (O0_REGNUM)],
395 8 * REGISTER_RAW_SIZE (O0_REGNUM));
396
397 errno = 0;
c5aa993b 398 retval = ptrace (PTRACE_SETREGS, inferior_pid, (PTRACE_ARG3_TYPE) & ec,
c906108c
SS
399 0);
400 if (errno)
401 perror_with_name ("ptrace(PTRACE_SETREGS)");
402 }
403
404 if (whatregs & WHATREGS_STACK)
405 {
406 int regoffset;
407 CORE_ADDR sp;
408
409 sp = read_register (SP_REGNUM);
410
411 if (regno == -1 || regno == SP_REGNUM)
412 {
c5aa993b 413 if (!register_valid[L0_REGNUM + 5])
e1e9e218 414 internal_error (__FILE__, __LINE__, "failed internal consistency check");
f7384f0f 415 target_write_memory (sp + FRAME_SAVED_I0,
c906108c 416 &registers[REGISTER_BYTE (I0_REGNUM)],
f7384f0f 417 8 * REGISTER_RAW_SIZE (I0_REGNUM));
c906108c 418
f7384f0f 419 target_write_memory (sp + FRAME_SAVED_L0,
c906108c 420 &registers[REGISTER_BYTE (L0_REGNUM)],
f7384f0f 421 8 * REGISTER_RAW_SIZE (L0_REGNUM));
c906108c
SS
422 }
423 else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
424 {
425 if (!register_valid[regno])
e1e9e218 426 internal_error (__FILE__, __LINE__, "failed internal consistency check");
c906108c
SS
427 if (regno >= L0_REGNUM && regno <= L0_REGNUM + 7)
428 regoffset = REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM)
429 + FRAME_SAVED_L0;
430 else
431 regoffset = REGISTER_BYTE (regno) - REGISTER_BYTE (I0_REGNUM)
432 + FRAME_SAVED_I0;
f7384f0f
AC
433 target_write_memory (sp + regoffset,
434 &registers[REGISTER_BYTE (regno)],
435 REGISTER_RAW_SIZE (regno));
c906108c
SS
436 }
437 }
438
439 if (whatregs & WHATREGS_FLOAT)
440 {
c5aa993b 441 struct fcontext fc; /* fp regs */
c906108c
SS
442 int retval;
443
444/* We read fcontext first so that we can get good values for fq_t... */
445 errno = 0;
c5aa993b 446 retval = ptrace (PTRACE_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) & fc,
c906108c
SS
447 0);
448 if (errno)
449 perror_with_name ("ptrace(PTRACE_GETFPREGS)");
c5aa993b 450
c906108c
SS
451 memcpy (fc.f.fregs, &registers[REGISTER_BYTE (FP0_REGNUM)],
452 32 * REGISTER_RAW_SIZE (FP0_REGNUM));
453
454 fc.fsr = read_register (FPS_REGNUM);
455
456 errno = 0;
c5aa993b 457 retval = ptrace (PTRACE_SETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) & fc,
c906108c
SS
458 0);
459 if (errno)
460 perror_with_name ("ptrace(PTRACE_SETFPREGS)");
c5aa993b 461 }
c906108c
SS
462}
463#endif /* SPARC */
464
465#if defined (I386) || defined (M68K) || defined (rs6000)
466
467/* Return the offset relative to the start of the per-thread data to the
468 saved context block. */
469
470static unsigned long
fba45db2 471registers_addr (int pid)
c906108c
SS
472{
473 CORE_ADDR stblock;
c5aa993b 474 int ecpoff = offsetof (st_t, ecp);
c906108c
SS
475 CORE_ADDR ecp;
476
477 errno = 0;
c5aa993b 478 stblock = (CORE_ADDR) ptrace (PTRACE_THREADUSER, pid, (PTRACE_ARG3_TYPE) 0,
c906108c
SS
479 0);
480 if (errno)
481 perror_with_name ("ptrace(PTRACE_THREADUSER)");
482
c5aa993b 483 ecp = (CORE_ADDR) ptrace (PTRACE_PEEKTHREAD, pid, (PTRACE_ARG3_TYPE) ecpoff,
c906108c
SS
484 0);
485 if (errno)
486 perror_with_name ("ptrace(PTRACE_PEEKTHREAD)");
487
488 return ecp - stblock;
489}
490
491/* Fetch one or more registers from the inferior. REGNO == -1 to get
492 them all. We actually fetch more than requested, when convenient,
493 marking them as valid so we won't fetch them again. */
494
495void
fba45db2 496fetch_inferior_registers (int regno)
c906108c
SS
497{
498 int reglo, reghi;
499 int i;
500 unsigned long ecp;
501
502 if (regno == -1)
503 {
504 reglo = 0;
505 reghi = NUM_REGS - 1;
506 }
507 else
508 reglo = reghi = regno;
509
510 ecp = registers_addr (inferior_pid);
511
512 for (regno = reglo; regno <= reghi; regno++)
513 {
514 char buf[MAX_REGISTER_RAW_SIZE];
515 int ptrace_fun = PTRACE_PEEKTHREAD;
516
517#ifdef M68K
518 ptrace_fun = regno == SP_REGNUM ? PTRACE_PEEKUSP : PTRACE_PEEKTHREAD;
519#endif
520
521 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
522 {
523 unsigned int reg;
524
525 errno = 0;
526 reg = ptrace (ptrace_fun, inferior_pid,
527 (PTRACE_ARG3_TYPE) (ecp + regmap[regno] + i), 0);
528 if (errno)
529 perror_with_name ("ptrace(PTRACE_PEEKUSP)");
c5aa993b
JM
530
531 *(int *) &buf[i] = reg;
c906108c
SS
532 }
533 supply_register (regno, buf);
534 }
535}
536
537/* Store our register values back into the inferior.
538 If REGNO is -1, do this for all registers.
539 Otherwise, REGNO specifies which register (so we can save time). */
540
541/* Registers we shouldn't try to store. */
542#if !defined (CANNOT_STORE_REGISTER)
543#define CANNOT_STORE_REGISTER(regno) 0
544#endif
545
546void
fba45db2 547store_inferior_registers (int regno)
c906108c
SS
548{
549 int reglo, reghi;
550 int i;
551 unsigned long ecp;
552
553 if (regno == -1)
554 {
555 reglo = 0;
556 reghi = NUM_REGS - 1;
557 }
558 else
559 reglo = reghi = regno;
560
561 ecp = registers_addr (inferior_pid);
562
563 for (regno = reglo; regno <= reghi; regno++)
564 {
565 int ptrace_fun = PTRACE_POKEUSER;
566
567 if (CANNOT_STORE_REGISTER (regno))
568 continue;
569
570#ifdef M68K
571 ptrace_fun = regno == SP_REGNUM ? PTRACE_POKEUSP : PTRACE_POKEUSER;
572#endif
573
574 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
575 {
576 unsigned int reg;
577
c5aa993b 578 reg = *(unsigned int *) &registers[REGISTER_BYTE (regno) + i];
c906108c
SS
579
580 errno = 0;
581 ptrace (ptrace_fun, inferior_pid,
582 (PTRACE_ARG3_TYPE) (ecp + regmap[regno] + i), reg);
583 if (errno)
584 perror_with_name ("ptrace(PTRACE_POKEUSP)");
585 }
586 }
587}
588#endif /* defined (I386) || defined (M68K) || defined (rs6000) */
589
590/* Wait for child to do something. Return pid of child, or -1 in case
591 of error; store status through argument pointer OURSTATUS. */
592
593int
fba45db2 594child_wait (int pid, struct target_waitstatus *ourstatus)
c906108c
SS
595{
596 int save_errno;
597 int thread;
598 union wait status;
599
600 while (1)
601 {
602 int sig;
603
c5aa993b 604 set_sigint_trap (); /* Causes SIGINT to be passed on to the
c906108c
SS
605 attached process. */
606 pid = wait (&status);
607
608 save_errno = errno;
609
c5aa993b 610 clear_sigint_trap ();
c906108c
SS
611
612 if (pid == -1)
613 {
614 if (save_errno == EINTR)
615 continue;
616 fprintf_unfiltered (gdb_stderr, "Child process unexpectedly missing: %s.\n",
c5aa993b 617 safe_strerror (save_errno));
c906108c
SS
618 /* Claim it exited with unknown signal. */
619 ourstatus->kind = TARGET_WAITKIND_SIGNALLED;
620 ourstatus->value.sig = TARGET_SIGNAL_UNKNOWN;
621 return -1;
622 }
623
c5aa993b 624 if (pid != PIDGET (inferior_pid)) /* Some other process?!? */
c906108c
SS
625 continue;
626
627 thread = status.w_tid; /* Get thread id from status */
628
629 /* Initial thread value can only be acquired via wait, so we have to
c5aa993b 630 resort to this hack. */
c906108c
SS
631
632 if (TIDGET (inferior_pid) == 0 && thread != 0)
633 {
634 inferior_pid = BUILDPID (inferior_pid, thread);
635 add_thread (inferior_pid);
636 }
637
638 pid = BUILDPID (pid, thread);
639
640 /* We've become a single threaded process again. */
641 if (thread == 0)
642 inferior_pid = pid;
643
644 /* Check for thread creation. */
c5aa993b
JM
645 if (WIFSTOPPED (status)
646 && WSTOPSIG (status) == SIGTRAP
c906108c
SS
647 && !in_thread_list (pid))
648 {
649 int realsig;
650
c5aa993b 651 realsig = ptrace (PTRACE_GETTRACESIG, pid, (PTRACE_ARG3_TYPE) 0, 0);
c906108c
SS
652
653 if (realsig == SIGNEWTHREAD)
654 {
655 /* It's a new thread notification. We don't want to much with
c5aa993b 656 realsig -- the code in wait_for_inferior expects SIGTRAP. */
c906108c
SS
657 ourstatus->kind = TARGET_WAITKIND_SPURIOUS;
658 ourstatus->value.sig = TARGET_SIGNAL_0;
659 return pid;
660 }
661 else
662 error ("Signal for unknown thread was not SIGNEWTHREAD");
663 }
664
665 /* Check for thread termination. */
c5aa993b
JM
666 else if (WIFSTOPPED (status)
667 && WSTOPSIG (status) == SIGTRAP
c906108c
SS
668 && in_thread_list (pid))
669 {
670 int realsig;
671
c5aa993b 672 realsig = ptrace (PTRACE_GETTRACESIG, pid, (PTRACE_ARG3_TYPE) 0, 0);
c906108c
SS
673
674 if (realsig == SIGTHREADEXIT)
675 {
c5aa993b 676 ptrace (PTRACE_CONT, PIDGET (pid), (PTRACE_ARG3_TYPE) 0, 0);
c906108c
SS
677 continue;
678 }
679 }
680
681#ifdef SPARC
682 /* SPARC Lynx uses an byte reversed wait status; we must use the
c5aa993b
JM
683 host macros to access it. These lines just a copy of
684 store_waitstatus. We can't use CHILD_SPECIAL_WAITSTATUS
685 because target.c can't include the Lynx <sys/wait.h>. */
c906108c
SS
686 if (WIFEXITED (status))
687 {
688 ourstatus->kind = TARGET_WAITKIND_EXITED;
689 ourstatus->value.integer = WEXITSTATUS (status);
690 }
691 else if (!WIFSTOPPED (status))
692 {
693 ourstatus->kind = TARGET_WAITKIND_SIGNALLED;
694 ourstatus->value.sig =
695 target_signal_from_host (WTERMSIG (status));
696 }
697 else
698 {
699 ourstatus->kind = TARGET_WAITKIND_STOPPED;
700 ourstatus->value.sig =
701 target_signal_from_host (WSTOPSIG (status));
702 }
703#else
704 store_waitstatus (ourstatus, status.w_status);
705#endif
706
707 return pid;
708 }
709}
710
711/* Return nonzero if the given thread is still alive. */
712int
fba45db2 713child_thread_alive (int pid)
c906108c
SS
714{
715 /* Arggh. Apparently pthread_kill only works for threads within
716 the process that calls pthread_kill.
717
718 We want to avoid the lynx signal extensions as they simply don't
719 map well to the generic gdb interface we want to keep.
720
721 All we want to do is determine if a particular thread is alive;
722 it appears as if we can just make a harmless thread specific
723 ptrace call to do that. */
724 return (ptrace (PTRACE_THREADUSER, pid, 0, 0) != -1);
725}
726
727/* Resume execution of the inferior process.
728 If STEP is nonzero, single-step it.
729 If SIGNAL is nonzero, give it that signal. */
730
731void
fba45db2 732child_resume (int pid, int step, enum target_signal signal)
c906108c
SS
733{
734 int func;
735
736 errno = 0;
737
738 /* If pid == -1, then we want to step/continue all threads, else
739 we only want to step/continue a single thread. */
740 if (pid == -1)
741 {
742 pid = inferior_pid;
743 func = step ? PTRACE_SINGLESTEP : PTRACE_CONT;
744 }
745 else
746 func = step ? PTRACE_SINGLESTEP_ONE : PTRACE_CONT_ONE;
747
748
749 /* An address of (PTRACE_ARG3_TYPE)1 tells ptrace to continue from where
750 it was. (If GDB wanted it to start some other way, we have already
751 written a new PC value to the child.)
752
753 If this system does not support PT_STEP, a higher level function will
754 have called single_step() to transmute the step request into a
755 continue request (by setting breakpoints on all possible successor
756 instructions), so we don't have to worry about that here. */
757
758 ptrace (func, pid, (PTRACE_ARG3_TYPE) 1, target_signal_to_host (signal));
759
760 if (errno)
761 perror_with_name ("ptrace");
762}
763
764/* Convert a Lynx process ID to a string. Returns the string in a static
765 buffer. */
766
767char *
fba45db2 768child_pid_to_str (int pid)
c906108c
SS
769{
770 static char buf[40];
771
772 sprintf (buf, "process %d thread %d", PIDGET (pid), TIDGET (pid));
773
774 return buf;
775}
776
777/* Extract the register values out of the core file and store
778 them where `read_register' will find them.
779
780 CORE_REG_SECT points to the register values themselves, read into memory.
781 CORE_REG_SIZE is the size of that area.
782 WHICH says which set of registers we are handling (0 = int, 2 = float
c5aa993b 783 on machines where they are discontiguous).
c906108c 784 REG_ADDR is the offset from u.u_ar0 to the register values relative to
c5aa993b
JM
785 core_reg_sect. This is used with old-fashioned core files to
786 locate the registers in a large upage-plus-stack ".reg" section.
787 Original upage address X is at location core_reg_sect+x+reg_addr.
c906108c
SS
788 */
789
790static void
fba45db2
KB
791fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which,
792 CORE_ADDR reg_addr)
c906108c
SS
793{
794 struct st_entry s;
795 unsigned int regno;
796
797 for (regno = 0; regno < NUM_REGS; regno++)
798 if (regmap[regno] != -1)
799 supply_register (regno, core_reg_sect + offsetof (st_t, ec)
800 + regmap[regno]);
801
802#ifdef SPARC
803/* Fetching this register causes all of the I & L regs to be read from the
804 stack and validated. */
805
806 fetch_inferior_registers (I0_REGNUM);
807#endif
808}
c906108c 809\f
c5aa993b 810
c906108c
SS
811/* Register that we are able to handle lynx core file formats.
812 FIXME: is this really bfd_target_unknown_flavour? */
813
814static struct core_fns lynx_core_fns =
815{
2acceee2
JM
816 bfd_target_unknown_flavour, /* core_flavour */
817 default_check_format, /* check_format */
818 default_core_sniffer, /* core_sniffer */
819 fetch_core_registers, /* core_read_registers */
820 NULL /* next */
c906108c
SS
821};
822
823void
fba45db2 824_initialize_core_lynx (void)
c906108c
SS
825{
826 add_core_fns (&lynx_core_fns);
827}
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