[deliverable/binutils-gdb.git] / gdb / lynx-nat.c

/* Native-dependent code for LynxOS.
   Copyright 1993, 1994 Free Software Foundation, Inc.

This file is part of GDB.

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */

#include "defs.h"
#include "frame.h"
#include "inferior.h"
#include "target.h"

#include <sys/ptrace.h>
#include <sys/wait.h>
#include <sys/fpp.h>

static unsigned long registers_addr PARAMS ((int pid));

#define X(ENTRY)(offsetof(struct econtext, ENTRY))

#ifdef I386
/* Mappings from tm-i386v.h */

static int regmap[] =
{
  X(eax),
  X(ecx),
  X(edx),
  X(ebx),
  X(esp),			/* sp */
  X(ebp),			/* fp */
  X(esi),
  X(edi),
  X(eip),			/* pc */
  X(flags),			/* ps */
  X(cs),
  X(ss),
  X(ds),
  X(es),
  X(ecode),			/* Lynx doesn't give us either fs or gs, so */
  X(fault),			/* we just substitute these two in the hopes
				   that they are useful. */
};
#endif

#ifdef M68K
/* Mappings from tm-m68k.h */

static int regmap[] =
{
  X(regs[0]),			/* d0 */
  X(regs[1]),			/* d1 */
  X(regs[2]),			/* d2 */
  X(regs[3]),			/* d3 */
  X(regs[4]),			/* d4 */
  X(regs[5]),			/* d5 */
  X(regs[6]),			/* d6 */
  X(regs[7]),			/* d7 */
  X(regs[8]),			/* a0 */
  X(regs[9]),			/* a1 */
  X(regs[10]),			/* a2 */
  X(regs[11]),			/* a3 */
  X(regs[12]),			/* a4 */
  X(regs[13]),			/* a5 */
  X(regs[14]),			/* fp */
  offsetof (st_t, usp) - offsetof (st_t, ec), /* sp */
  X(status),			/* ps */
  X(pc),

  X(fregs[0*3]),		/* fp0 */
  X(fregs[1*3]),		/* fp1 */
  X(fregs[2*3]),		/* fp2 */
  X(fregs[3*3]),		/* fp3 */
  X(fregs[4*3]),		/* fp4 */
  X(fregs[5*3]),		/* fp5 */
  X(fregs[6*3]),		/* fp6 */
  X(fregs[7*3]),		/* fp7 */

  X(fcregs[0]),			/* fpcontrol */
  X(fcregs[1]),			/* fpstatus */
  X(fcregs[2]),			/* fpiaddr */
  X(ssw),			/* fpcode */
  X(fault),			/* fpflags */
};
#endif

#ifdef rs6000

static int regmap[] =
{
  X(iregs[0]),			/* r0 */
  X(iregs[1]),
  X(iregs[2]),
  X(iregs[3]),
  X(iregs[4]),
  X(iregs[5]),
  X(iregs[6]),
  X(iregs[7]),
  X(iregs[8]),
  X(iregs[9]),
  X(iregs[10]),
  X(iregs[11]),
  X(iregs[12]),
  X(iregs[13]),
  X(iregs[14]),
  X(iregs[15]),
  X(iregs[16]),
  X(iregs[17]),
  X(iregs[18]),
  X(iregs[19]),
  X(iregs[20]),
  X(iregs[21]),
  X(iregs[22]),
  X(iregs[23]),
  X(iregs[24]),
  X(iregs[25]),
  X(iregs[26]),
  X(iregs[27]),
  X(iregs[28]),
  X(iregs[29]),
  X(iregs[30]),
  X(iregs[31]),

  X(fregs[0]),			/* f0 */
  X(fregs[1]),
  X(fregs[2]),
  X(fregs[3]),
  X(fregs[4]),
  X(fregs[5]),
  X(fregs[6]),
  X(fregs[7]),
  X(fregs[8]),
  X(fregs[9]),
  X(fregs[10]),
  X(fregs[11]),
  X(fregs[12]),
  X(fregs[13]),
  X(fregs[14]),
  X(fregs[15]),
  X(fregs[16]),
  X(fregs[17]),
  X(fregs[18]),
  X(fregs[19]),
  X(fregs[20]),
  X(fregs[21]),
  X(fregs[22]),
  X(fregs[23]),
  X(fregs[24]),
  X(fregs[25]),
  X(fregs[26]),
  X(fregs[27]),
  X(fregs[28]),
  X(fregs[29]),
  X(fregs[30]),
  X(fregs[31]),

  X(srr0),			/* IAR (PC) */
  X(srr1),			/* MSR (PS) */
  X(cr),			/* CR */
  X(lr),			/* LR */
  X(ctr),			/* CTR */
  X(xer),			/* XER */
  X(mq)				/* MQ */
};

#endif /* rs6000 */

#ifdef SPARC

/* This routine handles some oddball cases for Sparc registers and LynxOS.
   In partucular, it causes refs to G0, g5->7, and all fp regs to return zero.
   It also handles knows where to find the I & L regs on the stack.  */

void
fetch_inferior_registers (regno)
     int regno;
{
  int whatregs = 0;

#define WHATREGS_FLOAT 1
#define WHATREGS_GEN 2
#define WHATREGS_STACK 4

  if (regno == -1)
    whatregs = WHATREGS_FLOAT | WHATREGS_GEN | WHATREGS_STACK;
  else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
    whatregs = WHATREGS_STACK;
  else if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
    whatregs = WHATREGS_FLOAT;
  else
    whatregs = WHATREGS_GEN;

  if (whatregs & WHATREGS_GEN)
    {
      struct econtext ec;		/* general regs */
      char buf[MAX_REGISTER_RAW_SIZE];
      int retval;
      int i;

      errno = 0;
      retval = ptrace (PTRACE_GETREGS, inferior_pid, (PTRACE_ARG3_TYPE) &ec,
		       0);
      if (errno)
	perror_with_name ("ptrace(PTRACE_GETREGS)");
  
      memset (buf, 0, REGISTER_RAW_SIZE (G0_REGNUM));
      supply_register (G0_REGNUM, buf);
      supply_register (TBR_REGNUM, (char *)&ec.tbr);

      memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &ec.g1,
	      4 * REGISTER_RAW_SIZE (G1_REGNUM));
      for (i = G1_REGNUM; i <= G1_REGNUM + 3; i++)
	register_valid[i] = 1;

      supply_register (PS_REGNUM, (char *)&ec.psr);
      supply_register (Y_REGNUM, (char *)&ec.y);
      supply_register (PC_REGNUM, (char *)&ec.pc);
      supply_register (NPC_REGNUM, (char *)&ec.npc);
      supply_register (WIM_REGNUM, (char *)&ec.wim);

      memcpy (&registers[REGISTER_BYTE (O0_REGNUM)], ec.o,
	      8 * REGISTER_RAW_SIZE (O0_REGNUM));
      for (i = O0_REGNUM; i <= O0_REGNUM + 7; i++)
	register_valid[i] = 1;
    }

  if (whatregs & WHATREGS_STACK)
    {
      CORE_ADDR sp;
      int i;

      sp = read_register (SP_REGNUM);

      target_xfer_memory (sp + FRAME_SAVED_I0,
			  &registers[REGISTER_BYTE(I0_REGNUM)],
			  8 * REGISTER_RAW_SIZE (I0_REGNUM), 0);
      for (i = I0_REGNUM; i <= I7_REGNUM; i++)
	register_valid[i] = 1;

      target_xfer_memory (sp + FRAME_SAVED_L0,
			  &registers[REGISTER_BYTE(L0_REGNUM)],
			  8 * REGISTER_RAW_SIZE (L0_REGNUM), 0);
      for (i = L0_REGNUM; i <= L0_REGNUM + 7; i++)
	register_valid[i] = 1;
    }

  if (whatregs & WHATREGS_FLOAT)
    {
      struct fcontext fc;		/* fp regs */
      int retval;
      int i;

      errno = 0;
      retval = ptrace (PTRACE_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
		       0);
      if (errno)
	perror_with_name ("ptrace(PTRACE_GETFPREGS)");
  
      memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fc.f.fregs,
	      32 * REGISTER_RAW_SIZE (FP0_REGNUM));
      for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++)
	register_valid[i] = 1;

      supply_register (FPS_REGNUM, (char *)&fc.fsr);
    }
}

/* This routine handles storing of the I & L regs for the Sparc.  The trick
   here is that they actually live on the stack.  The really tricky part is
   that when changing the stack pointer, the I & L regs must be written to
   where the new SP points, otherwise the regs will be incorrect when the
   process is started up again.   We assume that the I & L regs are valid at
   this point.  */

void
store_inferior_registers (regno)
     int regno;
{
  int whatregs = 0;

  if (regno == -1)
    whatregs = WHATREGS_FLOAT | WHATREGS_GEN | WHATREGS_STACK;
  else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
    whatregs = WHATREGS_STACK;
  else if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
    whatregs = WHATREGS_FLOAT;
  else if (regno == SP_REGNUM)
    whatregs = WHATREGS_STACK | WHATREGS_GEN;
  else
    whatregs = WHATREGS_GEN;

  if (whatregs & WHATREGS_GEN)
    {
      struct econtext ec;		/* general regs */
      int retval;

      ec.tbr = read_register (TBR_REGNUM);
      memcpy (&ec.g1, &registers[REGISTER_BYTE (G1_REGNUM)],
	      4 * REGISTER_RAW_SIZE (G1_REGNUM));

      ec.psr = read_register (PS_REGNUM);
      ec.y = read_register (Y_REGNUM);
      ec.pc = read_register (PC_REGNUM);
      ec.npc = read_register (NPC_REGNUM);
      ec.wim = read_register (WIM_REGNUM);

      memcpy (ec.o, &registers[REGISTER_BYTE (O0_REGNUM)],
	      8 * REGISTER_RAW_SIZE (O0_REGNUM));

      errno = 0;
      retval = ptrace (PTRACE_SETREGS, inferior_pid, (PTRACE_ARG3_TYPE) &ec,
		       0);
      if (errno)
	perror_with_name ("ptrace(PTRACE_SETREGS)");
    }

  if (whatregs & WHATREGS_STACK)
    {
      int regoffset;
      CORE_ADDR sp;

      sp = read_register (SP_REGNUM);

      if (regno == -1 || regno == SP_REGNUM)
	{
	  if (!register_valid[L0_REGNUM+5])
	    abort();
	  target_xfer_memory (sp + FRAME_SAVED_I0,
			      &registers[REGISTER_BYTE (I0_REGNUM)],
			      8 * REGISTER_RAW_SIZE (I0_REGNUM), 1);

	  target_xfer_memory (sp + FRAME_SAVED_L0,
			      &registers[REGISTER_BYTE (L0_REGNUM)],
			      8 * REGISTER_RAW_SIZE (L0_REGNUM), 1);
	}
      else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
	{
	  if (!register_valid[regno])
	    abort();
	  if (regno >= L0_REGNUM && regno <= L0_REGNUM + 7)
	    regoffset = REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM)
	      + FRAME_SAVED_L0;
	  else
	    regoffset = REGISTER_BYTE (regno) - REGISTER_BYTE (I0_REGNUM)
	      + FRAME_SAVED_I0;
	  target_xfer_memory (sp + regoffset, &registers[REGISTER_BYTE (regno)],
			      REGISTER_RAW_SIZE (regno), 1);
	}
    }

  if (whatregs & WHATREGS_FLOAT)
    {
      struct fcontext fc;		/* fp regs */
      int retval;

/* We read fcontext first so that we can get good values for fq_t... */
      errno = 0;
      retval = ptrace (PTRACE_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
		       0);
      if (errno)
	perror_with_name ("ptrace(PTRACE_GETFPREGS)");
  
      memcpy (fc.f.fregs, &registers[REGISTER_BYTE (FP0_REGNUM)],
	      32 * REGISTER_RAW_SIZE (FP0_REGNUM));

      fc.fsr = read_register (FPS_REGNUM);

      errno = 0;
      retval = ptrace (PTRACE_SETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
		       0);
      if (errno)
	perror_with_name ("ptrace(PTRACE_SETFPREGS)");
      }
}
#endif /* SPARC */

#if defined (I386) || defined (M68K) || defined (rs6000)

/* Return the offset relative to the start of the per-thread data to the
   saved context block.  */

static unsigned long
registers_addr(pid)
     int pid;
{
  CORE_ADDR stblock;
  int ecpoff = offsetof(st_t, ecp);
  CORE_ADDR ecp;

  errno = 0;
  stblock = (CORE_ADDR) ptrace (PTRACE_THREADUSER, pid, (PTRACE_ARG3_TYPE)0,
				0);
  if (errno)
    perror_with_name ("ptrace(PTRACE_THREADUSER)");

  ecp = (CORE_ADDR) ptrace (PTRACE_PEEKTHREAD, pid, (PTRACE_ARG3_TYPE)ecpoff,
			    0);
  if (errno)
    perror_with_name ("ptrace(PTRACE_PEEKTHREAD)");

  return ecp - stblock;
}

/* Fetch one or more registers from the inferior.  REGNO == -1 to get
   them all.  We actually fetch more than requested, when convenient,
   marking them as valid so we won't fetch them again.  */

void
fetch_inferior_registers (regno)
     int regno;
{
  int reglo, reghi;
  int i;
  unsigned long ecp;

  if (regno == -1)
    {
      reglo = 0;
      reghi = NUM_REGS - 1;
    }
  else
    reglo = reghi = regno;

  ecp = registers_addr (inferior_pid);

  for (regno = reglo; regno <= reghi; regno++)
    {
      char buf[MAX_REGISTER_RAW_SIZE];
      int ptrace_fun = PTRACE_PEEKTHREAD;

#ifdef M68K
      ptrace_fun = regno == SP_REGNUM ? PTRACE_PEEKUSP : PTRACE_PEEKTHREAD;
#endif

      for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
	{
	  unsigned int reg;

	  errno = 0;
	  reg = ptrace (ptrace_fun, inferior_pid,
			(PTRACE_ARG3_TYPE) (ecp + regmap[regno] + i), 0);
	  if (errno)
	    perror_with_name ("ptrace(PTRACE_PEEKUSP)");
  
	  *(int *)&buf[i] = reg;
	}
      supply_register (regno, buf);
    }
}

/* Store our register values back into the inferior.
   If REGNO is -1, do this for all registers.
   Otherwise, REGNO specifies which register (so we can save time).  */

void
store_inferior_registers (regno)
     int regno;
{
  int reglo, reghi;
  int i;
  unsigned long ecp;

  if (regno == -1)
    {
      reglo = 0;
      reghi = NUM_REGS - 1;
    }
  else
    reglo = reghi = regno;

  ecp = registers_addr (inferior_pid);

  for (regno = reglo; regno <= reghi; regno++)
    {
      int ptrace_fun = PTRACE_POKEUSER;

      if (CANNOT_STORE_REGISTER (regno))
	continue;

#ifdef M68K
      ptrace_fun = regno == SP_REGNUM ? PTRACE_POKEUSP : PTRACE_POKEUSER;
#endif

      for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
	{
	  unsigned int reg;

	  reg = *(unsigned int *)&registers[REGISTER_BYTE (regno) + i];

	  errno = 0;
	  ptrace (ptrace_fun, inferior_pid,
		  (PTRACE_ARG3_TYPE) (ecp + regmap[regno] + i), reg);
	  if (errno)
	    perror_with_name ("ptrace(PTRACE_POKEUSP)");
	}
    }
}
#endif /* defined (I386) || defined (M68K) || defined (rs6000) */

/* Wait for child to do something.  Return pid of child, or -1 in case
   of error; store status through argument pointer OURSTATUS.  */

int
child_wait (pid, ourstatus)
     int pid;
     struct target_waitstatus *ourstatus;
{
  int save_errno;
  int thread;
  int status;

  while (1)
    {
      int sig;

      if (attach_flag)
	set_sigint_trap();	/* Causes SIGINT to be passed on to the
				   attached process. */
      pid = wait (&status);
#ifdef SPARC
/* Swap halves of status so that the rest of GDB can understand it */
      status = (status << 16) | ((unsigned)status >> 16);
#endif

      save_errno = errno;

      if (attach_flag)
	clear_sigint_trap();

      if (pid == -1)
	{
	  if (save_errno == EINTR)
	    continue;
	  fprintf_unfiltered (gdb_stderr, "Child process unexpectedly missing: %s.\n",
		   safe_strerror (save_errno));
	  /* Claim it exited with unknown signal.  */
	  ourstatus->kind = TARGET_WAITKIND_SIGNALLED;
	  ourstatus->value.sig = TARGET_SIGNAL_UNKNOWN;
	  return -1;
	}

      if (pid != PIDGET (inferior_pid))	/* Some other process?!? */
	continue;

/*      thread = WIFTID (status);*/
      thread = status >> 16;

      /* Initial thread value can only be acquired via wait, so we have to
	 resort to this hack.  */

      if (TIDGET (inferior_pid) == 0)
	{
	  inferior_pid = BUILDPID (inferior_pid, thread);
	  add_thread (inferior_pid);
	}

      pid = BUILDPID (pid, thread);

      store_waitstatus (ourstatus, status);

      return pid;
    }
}

/* Convert a Lynx process ID to a string.  Returns the string in a static
   buffer.  */

char *
lynx_pid_to_str (pid)
     int pid;
{
  static char buf[40];

  sprintf (buf, "process %d thread %d", PIDGET (pid), TIDGET (pid));

  return buf;
}

/* Extract the register values out of the core file and store
   them where `read_register' will find them.

   CORE_REG_SECT points to the register values themselves, read into memory.
   CORE_REG_SIZE is the size of that area.
   WHICH says which set of registers we are handling (0 = int, 2 = float
         on machines where they are discontiguous).
   REG_ADDR is the offset from u.u_ar0 to the register values relative to
            core_reg_sect.  This is used with old-fashioned core files to
	    locate the registers in a large upage-plus-stack ".reg" section.
	    Original upage address X is at location core_reg_sect+x+reg_addr.
 */

void
fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr)
     char *core_reg_sect;
     unsigned core_reg_size;
     int which;
     unsigned reg_addr;
{
  struct st_entry s;
  unsigned int regno;

  for (regno = 0; regno < NUM_REGS; regno++)
    supply_register (regno, core_reg_sect + offsetof (st_t, ec)
		     + regmap[regno]);

#ifdef SPARC
/* Fetching this register causes all of the I & L regs to be read from the
   stack and validated.  */

  fetch_inferior_registers (I0_REGNUM);
#endif
}
Commit	Line	Data
d3225ea0	1	/* Native-dependent code for LynxOS.
658821b9	2	Copyright 1993, 1994 Free Software Foundation, Inc.
d3225ea0 SG	3
	4	This file is part of GDB.
	5
	6	This program is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
	8	the Free Software Foundation; either version 2 of the License, or
	9	(at your option) any later version.
	10
	11	This program is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
	15
	16	You should have received a copy of the GNU General Public License
	17	along with this program; if not, write to the Free Software
	18	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
	19
	20	#include "defs.h"
	21	#include "frame.h"
	22	#include "inferior.h"
	23	#include "target.h"
	24
	25	#include <sys/ptrace.h>
658821b9	26	#include <sys/wait.h>
d575ddc0	27	#include <sys/fpp.h>
d3225ea0 SG	28
	29	static unsigned long registers_addr PARAMS ((int pid));
	30
	31	#define X(ENTRY)(offsetof(struct econtext, ENTRY))
	32
	33	#ifdef I386
	34	/* Mappings from tm-i386v.h */
	35
	36	static int regmap[] =
	37	{
	38	X(eax),
	39	X(ecx),
	40	X(edx),
	41	X(ebx),
	42	X(esp), /* sp */
	43	X(ebp), /* fp */
	44	X(esi),
	45	X(edi),
	46	X(eip), /* pc */
	47	X(flags), /* ps */
	48	X(cs),
	49	X(ss),
	50	X(ds),
	51	X(es),
	52	X(ecode), /* Lynx doesn't give us either fs or gs, so */
	53	X(fault), /* we just substitute these two in the hopes
	54	that they are useful. */
	55	};
	56	#endif
	57
	58	#ifdef M68K
	59	/* Mappings from tm-m68k.h */
	60
	61	static int regmap[] =
	62	{
	63	X(regs[0]), /* d0 */
	64	X(regs[1]), /* d1 */
	65	X(regs[2]), /* d2 */
	66	X(regs[3]), /* d3 */
	67	X(regs[4]), /* d4 */
	68	X(regs[5]), /* d5 */
	69	X(regs[6]), /* d6 */
	70	X(regs[7]), /* d7 */
	71	X(regs[8]), /* a0 */
	72	X(regs[9]), /* a1 */
	73	X(regs[10]), /* a2 */
	74	X(regs[11]), /* a3 */
	75	X(regs[12]), /* a4 */
	76	X(regs[13]), /* a5 */
	77	X(regs[14]), /* fp */
	78	offsetof (st_t, usp) - offsetof (st_t, ec), /* sp */
	79	X(status), /* ps */
	80	X(pc),
	81
	82	X(fregs[03]), / fp0 */
	83	X(fregs[13]), / fp1 */
	84	X(fregs[23]), / fp2 */
	85	X(fregs[33]), / fp3 */
	86	X(fregs[43]), / fp4 */
	87	X(fregs[53]), / fp5 */
	88	X(fregs[63]), / fp6 */
	89	X(fregs[73]), / fp7 */
	90
	91	X(fcregs[0]), /* fpcontrol */
92	X(fcregs[1]), /* fpstatus */
93	X(fcregs[2]), /* fpiaddr */
94	X(ssw), /* fpcode */
95	X(fault), /* fpflags */
96	};
97	#endif
98
d87d7b10	99	#ifdef rs6000
d575ddc0 SG	100
	101	static int regmap[] =
	102	{
d87d7b10 SG	103	X(iregs[0]), /* r0 */
	104	X(iregs[1]),
	105	X(iregs[2]),
	106	X(iregs[3]),
	107	X(iregs[4]),
	108	X(iregs[5]),
	109	X(iregs[6]),
	110	X(iregs[7]),
	111	X(iregs[8]),
	112	X(iregs[9]),
	113	X(iregs[10]),
	114	X(iregs[11]),
	115	X(iregs[12]),
	116	X(iregs[13]),
	117	X(iregs[14]),
	118	X(iregs[15]),
	119	X(iregs[16]),
	120	X(iregs[17]),
	121	X(iregs[18]),
	122	X(iregs[19]),
	123	X(iregs[20]),
	124	X(iregs[21]),
	125	X(iregs[22]),
	126	X(iregs[23]),
	127	X(iregs[24]),
	128	X(iregs[25]),
	129	X(iregs[26]),
	130	X(iregs[27]),
	131	X(iregs[28]),
	132	X(iregs[29]),
	133	X(iregs[30]),
	134	X(iregs[31]),
	135
	136	X(fregs[0]), /* f0 */
	137	X(fregs[1]),
	138	X(fregs[2]),
	139	X(fregs[3]),
	140	X(fregs[4]),
	141	X(fregs[5]),
	142	X(fregs[6]),
	143	X(fregs[7]),
	144	X(fregs[8]),
	145	X(fregs[9]),
	146	X(fregs[10]),
	147	X(fregs[11]),
	148	X(fregs[12]),
	149	X(fregs[13]),
	150	X(fregs[14]),
	151	X(fregs[15]),
	152	X(fregs[16]),
	153	X(fregs[17]),
	154	X(fregs[18]),
	155	X(fregs[19]),
	156	X(fregs[20]),
	157	X(fregs[21]),
	158	X(fregs[22]),
	159	X(fregs[23]),
	160	X(fregs[24]),
	161	X(fregs[25]),
	162	X(fregs[26]),
	163	X(fregs[27]),
	164	X(fregs[28]),
	165	X(fregs[29]),
	166	X(fregs[30]),
167	X(fregs[31]),
168
169	X(srr0), /* IAR (PC) */
170	X(srr1), /* MSR (PS) */
171	X(cr), /* CR */
172	X(lr), /* LR */
173	X(ctr), /* CTR */
174	X(xer), /* XER */
175	X(mq) /* MQ */
d575ddc0	176	};
d87d7b10 SG	177
d87d7b10 SG	178	#endif /* rs6000 */
d575ddc0 SG	179
	180	#ifdef SPARC
	181
	182	/* This routine handles some oddball cases for Sparc registers and LynxOS.
	183	In partucular, it causes refs to G0, g5->7, and all fp regs to return zero.
	184	It also handles knows where to find the I & L regs on the stack. */
	185
	186	void
	187	fetch_inferior_registers (regno)
	188	int regno;
	189	{
	190	int whatregs = 0;
	191
	192	#define WHATREGS_FLOAT 1
	193	#define WHATREGS_GEN 2
	194	#define WHATREGS_STACK 4
	195
	196	if (regno == -1)
	197	whatregs = WHATREGS_FLOAT \| WHATREGS_GEN \| WHATREGS_STACK;
	198	else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
	199	whatregs = WHATREGS_STACK;
	200	else if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
	201	whatregs = WHATREGS_FLOAT;
	202	else
	203	whatregs = WHATREGS_GEN;
	204
	205	if (whatregs & WHATREGS_GEN)
	206	{
	207	struct econtext ec; /* general regs */
	208	char buf[MAX_REGISTER_RAW_SIZE];
	209	int retval;
	210	int i;
	211
	212	errno = 0;
	213	retval = ptrace (PTRACE_GETREGS, inferior_pid, (PTRACE_ARG3_TYPE) &ec,
	214	0);
	215	if (errno)
d87d7b10	216	perror_with_name ("ptrace(PTRACE_GETREGS)");
d575ddc0 SG	217
	218	memset (buf, 0, REGISTER_RAW_SIZE (G0_REGNUM));
	219	supply_register (G0_REGNUM, buf);
	220	supply_register (TBR_REGNUM, (char *)&ec.tbr);
	221
	222	memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &ec.g1,
	223	4 * REGISTER_RAW_SIZE (G1_REGNUM));
	224	for (i = G1_REGNUM; i <= G1_REGNUM + 3; i++)
	225	register_valid[i] = 1;
	226
	227	supply_register (PS_REGNUM, (char *)&ec.psr);
	228	supply_register (Y_REGNUM, (char *)&ec.y);
	229	supply_register (PC_REGNUM, (char *)&ec.pc);
	230	supply_register (NPC_REGNUM, (char *)&ec.npc);
	231	supply_register (WIM_REGNUM, (char *)&ec.wim);
	232
	233	memcpy (&registers[REGISTER_BYTE (O0_REGNUM)], ec.o,
	234	8 * REGISTER_RAW_SIZE (O0_REGNUM));
	235	for (i = O0_REGNUM; i <= O0_REGNUM + 7; i++)
	236	register_valid[i] = 1;
	237	}
	238
	239	if (whatregs & WHATREGS_STACK)
	240	{
	241	CORE_ADDR sp;
	242	int i;
	243
	244	sp = read_register (SP_REGNUM);
	245
8bf94f44 SG	246	target_xfer_memory (sp + FRAME_SAVED_I0,
8bf94f44 SG	247	&registers[REGISTER_BYTE(I0_REGNUM)],
d575ddc0 SG	248	8 * REGISTER_RAW_SIZE (I0_REGNUM), 0);
	249	for (i = I0_REGNUM; i <= I7_REGNUM; i++)
	250	register_valid[i] = 1;
	251
8bf94f44 SG	252	target_xfer_memory (sp + FRAME_SAVED_L0,
8bf94f44 SG	253	&registers[REGISTER_BYTE(L0_REGNUM)],
d575ddc0 SG	254	8 * REGISTER_RAW_SIZE (L0_REGNUM), 0);
	255	for (i = L0_REGNUM; i <= L0_REGNUM + 7; i++)
	256	register_valid[i] = 1;
	257	}
	258
	259	if (whatregs & WHATREGS_FLOAT)
	260	{
	261	struct fcontext fc; /* fp regs */
	262	int retval;
	263	int i;
	264
	265	errno = 0;
	266	retval = ptrace (PTRACE_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
	267	0);
	268	if (errno)
d87d7b10	269	perror_with_name ("ptrace(PTRACE_GETFPREGS)");
d575ddc0 SG	270
	271	memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fc.f.fregs,
	272	32 * REGISTER_RAW_SIZE (FP0_REGNUM));
	273	for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++)
	274	register_valid[i] = 1;
	275
	276	supply_register (FPS_REGNUM, (char *)&fc.fsr);
	277	}
	278	}
	279
	280	/* This routine handles storing of the I & L regs for the Sparc. The trick
	281	here is that they actually live on the stack. The really tricky part is
	282	that when changing the stack pointer, the I & L regs must be written to
	283	where the new SP points, otherwise the regs will be incorrect when the
	284	process is started up again. We assume that the I & L regs are valid at
	285	this point. */
	286
	287	void
	288	store_inferior_registers (regno)
	289	int regno;
	290	{
	291	int whatregs = 0;
	292
	293	if (regno == -1)
	294	whatregs = WHATREGS_FLOAT \| WHATREGS_GEN \| WHATREGS_STACK;
	295	else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
	296	whatregs = WHATREGS_STACK;
	297	else if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
	298	whatregs = WHATREGS_FLOAT;
	299	else if (regno == SP_REGNUM)
	300	whatregs = WHATREGS_STACK \| WHATREGS_GEN;
	301	else
	302	whatregs = WHATREGS_GEN;
	303
	304	if (whatregs & WHATREGS_GEN)
	305	{
	306	struct econtext ec; /* general regs */
	307	int retval;
	308
	309	ec.tbr = read_register (TBR_REGNUM);
	310	memcpy (&ec.g1, &registers[REGISTER_BYTE (G1_REGNUM)],
	311	4 * REGISTER_RAW_SIZE (G1_REGNUM));
	312
	313	ec.psr = read_register (PS_REGNUM);
	314	ec.y = read_register (Y_REGNUM);
	315	ec.pc = read_register (PC_REGNUM);
	316	ec.npc = read_register (NPC_REGNUM);
	317	ec.wim = read_register (WIM_REGNUM);
	318
	319	memcpy (ec.o, &registers[REGISTER_BYTE (O0_REGNUM)],
	320	8 * REGISTER_RAW_SIZE (O0_REGNUM));
	321
	322	errno = 0;
	323	retval = ptrace (PTRACE_SETREGS, inferior_pid, (PTRACE_ARG3_TYPE) &ec,
	324	0);
	325	if (errno)
d87d7b10	326	perror_with_name ("ptrace(PTRACE_SETREGS)");
d575ddc0 SG	327	}
	328
	329	if (whatregs & WHATREGS_STACK)
	330	{
	331	int regoffset;
	332	CORE_ADDR sp;
	333
	334	sp = read_register (SP_REGNUM);
	335
	336	if (regno == -1 \|\| regno == SP_REGNUM)
	337	{
	338	if (!register_valid[L0_REGNUM+5])
	339	abort();
8bf94f44 SG	340	target_xfer_memory (sp + FRAME_SAVED_I0,
8bf94f44 SG	341	&registers[REGISTER_BYTE (I0_REGNUM)],
d575ddc0	342	8 * REGISTER_RAW_SIZE (I0_REGNUM), 1);
8bf94f44 SG	343
	344	target_xfer_memory (sp + FRAME_SAVED_L0,
	345	&registers[REGISTER_BYTE (L0_REGNUM)],
d575ddc0 SG	346	8 * REGISTER_RAW_SIZE (L0_REGNUM), 1);
	347	}
	348	else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
	349	{
	350	if (!register_valid[regno])
	351	abort();
	352	if (regno >= L0_REGNUM && regno <= L0_REGNUM + 7)
	353	regoffset = REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM)
8bf94f44	354	+ FRAME_SAVED_L0;
d575ddc0	355	else
8bf94f44 SG	356	regoffset = REGISTER_BYTE (regno) - REGISTER_BYTE (I0_REGNUM)
8bf94f44 SG	357	+ FRAME_SAVED_I0;
d575ddc0 SG	358	target_xfer_memory (sp + regoffset, &registers[REGISTER_BYTE (regno)],
	359	REGISTER_RAW_SIZE (regno), 1);
	360	}
	361	}
	362
	363	if (whatregs & WHATREGS_FLOAT)
	364	{
	365	struct fcontext fc; /* fp regs */
	366	int retval;
	367
	368	/* We read fcontext first so that we can get good values for fq_t... */
	369	errno = 0;
	370	retval = ptrace (PTRACE_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
	371	0);
	372	if (errno)
d87d7b10	373	perror_with_name ("ptrace(PTRACE_GETFPREGS)");
d575ddc0 SG	374
	375	memcpy (fc.f.fregs, &registers[REGISTER_BYTE (FP0_REGNUM)],
	376	32 * REGISTER_RAW_SIZE (FP0_REGNUM));
	377
	378	fc.fsr = read_register (FPS_REGNUM);
	379
	380	errno = 0;
	381	retval = ptrace (PTRACE_SETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
	382	0);
	383	if (errno)
d87d7b10	384	perror_with_name ("ptrace(PTRACE_SETFPREGS)");
d575ddc0 SG	385	}
d575ddc0 SG	386	}
e90445c9	387	#endif /* SPARC */
d575ddc0	388
d87d7b10	389	#if defined (I386) \|\| defined (M68K) \|\| defined (rs6000)
d575ddc0	390
d3225ea0 SG	391	/* Return the offset relative to the start of the per-thread data to the
	392	saved context block. */
	393
	394	static unsigned long
	395	registers_addr(pid)
	396	int pid;
	397	{
	398	CORE_ADDR stblock;
	399	int ecpoff = offsetof(st_t, ecp);
	400	CORE_ADDR ecp;
	401
	402	errno = 0;
	403	stblock = (CORE_ADDR) ptrace (PTRACE_THREADUSER, pid, (PTRACE_ARG3_TYPE)0,
	404	0);
	405	if (errno)
d87d7b10	406	perror_with_name ("ptrace(PTRACE_THREADUSER)");
d3225ea0 SG	407
	408	ecp = (CORE_ADDR) ptrace (PTRACE_PEEKTHREAD, pid, (PTRACE_ARG3_TYPE)ecpoff,
	409	0);
	410	if (errno)
d87d7b10	411	perror_with_name ("ptrace(PTRACE_PEEKTHREAD)");
d3225ea0 SG	412
	413	return ecp - stblock;
	414	}
	415
	416	/* Fetch one or more registers from the inferior. REGNO == -1 to get
	417	them all. We actually fetch more than requested, when convenient,
	418	marking them as valid so we won't fetch them again. */
	419
	420	void
	421	fetch_inferior_registers (regno)
	422	int regno;
	423	{
	424	int reglo, reghi;
	425	int i;
	426	unsigned long ecp;
	427
	428	if (regno == -1)
	429	{
	430	reglo = 0;
	431	reghi = NUM_REGS - 1;
	432	}
	433	else
	434	reglo = reghi = regno;
	435
	436	ecp = registers_addr (inferior_pid);
	437
e90445c9	438	for (regno = reglo; regno <= reghi; regno++)
d3225ea0 SG	439	{
	440	char buf[MAX_REGISTER_RAW_SIZE];
	441	int ptrace_fun = PTRACE_PEEKTHREAD;
	442
d87d7b10	443	#ifdef M68K
d3225ea0 SG	444	ptrace_fun = regno == SP_REGNUM ? PTRACE_PEEKUSP : PTRACE_PEEKTHREAD;
	445	#endif
	446
	447	for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
	448	{
	449	unsigned int reg;
	450
	451	errno = 0;
	452	reg = ptrace (ptrace_fun, inferior_pid,
	453	(PTRACE_ARG3_TYPE) (ecp + regmap[regno] + i), 0);
	454	if (errno)
d87d7b10	455	perror_with_name ("ptrace(PTRACE_PEEKUSP)");
d3225ea0 SG	456
	457	(int )&buf[i] = reg;
	458	}
	459	supply_register (regno, buf);
	460	}
	461	}
	462
	463	/* Store our register values back into the inferior.
	464	If REGNO is -1, do this for all registers.
	465	Otherwise, REGNO specifies which register (so we can save time). */
	466
	467	void
	468	store_inferior_registers (regno)
	469	int regno;
	470	{
	471	int reglo, reghi;
	472	int i;
	473	unsigned long ecp;
	474
	475	if (regno == -1)
	476	{
	477	reglo = 0;
	478	reghi = NUM_REGS - 1;
	479	}
	480	else
	481	reglo = reghi = regno;
	482
	483	ecp = registers_addr (inferior_pid);
	484
e90445c9	485	for (regno = reglo; regno <= reghi; regno++)
d3225ea0 SG	486	{
	487	int ptrace_fun = PTRACE_POKEUSER;
	488
d87d7b10 SG	489	if (CANNOT_STORE_REGISTER (regno))
	490	continue;
	491
	492	#ifdef M68K
d3225ea0 SG	493	ptrace_fun = regno == SP_REGNUM ? PTRACE_POKEUSP : PTRACE_POKEUSER;
	494	#endif
	495
	496	for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
	497	{
	498	unsigned int reg;
	499
	500	reg = (unsigned int )&registers[REGISTER_BYTE (regno) + i];
	501
	502	errno = 0;
	503	ptrace (ptrace_fun, inferior_pid,
	504	(PTRACE_ARG3_TYPE) (ecp + regmap[regno] + i), reg);
	505	if (errno)
d87d7b10	506	perror_with_name ("ptrace(PTRACE_POKEUSP)");
d3225ea0 SG	507	}
	508	}
	509	}
d87d7b10	510	#endif /* defined (I386) \|\| defined (M68K) \|\| defined (rs6000) */
d3225ea0 SG	511
d3225ea0 SG	512	/* Wait for child to do something. Return pid of child, or -1 in case
67ac9759	513	of error; store status through argument pointer OURSTATUS. */
d3225ea0 SG	514
d3225ea0 SG	515	int
2919ae5a	516	child_wait (pid, ourstatus)
d3225ea0	517	int pid;
67ac9759	518	struct target_waitstatus *ourstatus;
d3225ea0 SG	519	{
	520	int save_errno;
	521	int thread;
2919ae5a	522	int status;
d3225ea0 SG	523
	524	while (1)
	525	{
	526	int sig;
	527
	528	if (attach_flag)
	529	set_sigint_trap(); /* Causes SIGINT to be passed on to the
	530	attached process. */
d575ddc0 SG	531	pid = wait (&status);
	532	#ifdef SPARC
	533	/* Swap halves of status so that the rest of GDB can understand it */
	534	status = (status << 16) \| ((unsigned)status >> 16);
	535	#endif
	536
d3225ea0 SG	537	save_errno = errno;
	538
	539	if (attach_flag)
	540	clear_sigint_trap();
	541
	542	if (pid == -1)
	543	{
	544	if (save_errno == EINTR)
	545	continue;
	546	fprintf_unfiltered (gdb_stderr, "Child process unexpectedly missing: %s.\n",
	547	safe_strerror (save_errno));
67ac9759 JK	548	/* Claim it exited with unknown signal. */
	549	ourstatus->kind = TARGET_WAITKIND_SIGNALLED;
	550	ourstatus->value.sig = TARGET_SIGNAL_UNKNOWN;
d3225ea0 SG	551	return -1;
	552	}
	553
	554	if (pid != PIDGET (inferior_pid)) /* Some other process?!? */
	555	continue;
	556
2919ae5a JK	557	/* thread = WIFTID (status);*/
2919ae5a JK	558	thread = status >> 16;
d3225ea0 SG	559
	560	/* Initial thread value can only be acquired via wait, so we have to
	561	resort to this hack. */
	562
	563	if (TIDGET (inferior_pid) == 0)
	564	{
	565	inferior_pid = BUILDPID (inferior_pid, thread);
	566	add_thread (inferior_pid);
	567	}
	568
	569	pid = BUILDPID (pid, thread);
	570
67ac9759 JK	571	store_waitstatus (ourstatus, status);
67ac9759 JK	572
d3225ea0 SG	573	return pid;
	574	}
	575	}
	576
	577	/* Convert a Lynx process ID to a string. Returns the string in a static
	578	buffer. */
	579
	580	char *
	581	lynx_pid_to_str (pid)
	582	int pid;
	583	{
	584	static char buf[40];
	585
	586	sprintf (buf, "process %d thread %d", PIDGET (pid), TIDGET (pid));
	587
	588	return buf;
	589	}
	590
	591	/* Extract the register values out of the core file and store
	592	them where `read_register' will find them.
	593
	594	CORE_REG_SECT points to the register values themselves, read into memory.
	595	CORE_REG_SIZE is the size of that area.
	596	WHICH says which set of registers we are handling (0 = int, 2 = float
	597	on machines where they are discontiguous).
	598	REG_ADDR is the offset from u.u_ar0 to the register values relative to
	599	core_reg_sect. This is used with old-fashioned core files to
	600	locate the registers in a large upage-plus-stack ".reg" section.
	601	Original upage address X is at location core_reg_sect+x+reg_addr.
	602	*/
	603
	604	void
	605	fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr)
	606	char *core_reg_sect;
	607	unsigned core_reg_size;
	608	int which;
	609	unsigned reg_addr;
	610	{
	611	struct st_entry s;
	612	unsigned int regno;
	613
	614	for (regno = 0; regno < NUM_REGS; regno++)
	615	supply_register (regno, core_reg_sect + offsetof (st_t, ec)
	616	+ regmap[regno]);
e90445c9 SG	617
	618	#ifdef SPARC
	619	/* Fetching this register causes all of the I & L regs to be read from the
	620	stack and validated. */
	621
	622	fetch_inferior_registers (I0_REGNUM);
	623	#endif
d3225ea0	624	}