2003-02-01 Andrew Cagney <ac131313@redhat.com>
[deliverable/binutils-gdb.git] / gdb / m32r-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for the Mitsubishi m32r for GDB, the GNU debugger.
1bac305b
AC
2
3 Copyright 1996, 1998, 1999, 2000, 2001, 2003 Free Software
4 Foundation, Inc.
c906108c 5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
JM
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c906108c
SS
22
23#include "defs.h"
24#include "frame.h"
25#include "inferior.h"
c906108c
SS
26#include "target.h"
27#include "value.h"
28#include "bfd.h"
29#include "gdb_string.h"
30#include "gdbcore.h"
31#include "symfile.h"
4e052eda 32#include "regcache.h"
c906108c
SS
33
34/* Function: m32r_use_struct_convention
35 Return nonzero if call_function should allocate stack space for a
36 struct return? */
37int
fba45db2 38m32r_use_struct_convention (int gcc_p, struct type *type)
c906108c
SS
39{
40 return (TYPE_LENGTH (type) > 8);
41}
42
43/* Function: frame_find_saved_regs
44 Return the frame_saved_regs structure for the frame.
45 Doesn't really work for dummy frames, but it does pass back
46 an empty frame_saved_regs, so I guess that's better than total failure */
47
c5aa993b 48void
fba45db2
KB
49m32r_frame_find_saved_regs (struct frame_info *fi,
50 struct frame_saved_regs *regaddr)
c906108c 51{
c5aa993b 52 memcpy (regaddr, &fi->fsr, sizeof (struct frame_saved_regs));
c906108c
SS
53}
54
55/* Turn this on if you want to see just how much instruction decoding
56 if being done, its quite a lot
c5aa993b 57 */
c906108c 58#if 0
c5aa993b
JM
59static void
60dump_insn (char *commnt, CORE_ADDR pc, int insn)
c906108c 61{
c5aa993b
JM
62 printf_filtered (" %s %08x %08x ",
63 commnt, (unsigned int) pc, (unsigned int) insn);
2bf0cb65 64 TARGET_PRINT_INSN (pc, &tm_print_insn_info);
c5aa993b 65 printf_filtered ("\n");
c906108c
SS
66}
67#define insn_debug(args) { printf_filtered args; }
68#else
69#define dump_insn(a,b,c) {}
70#define insn_debug(args) {}
71#endif
72
c5aa993b 73#define DEFAULT_SEARCH_LIMIT 44
c906108c
SS
74
75/* Function: scan_prologue
76 This function decodes the target function prologue to determine
77 1) the size of the stack frame, and 2) which registers are saved on it.
78 It saves the offsets of saved regs in the frame_saved_regs argument,
79 and returns the frame size. */
80
81/*
c5aa993b
JM
82 The sequence it currently generates is:
83
84 if (varargs function) { ddi sp,#n }
85 push registers
86 if (additional stack <= 256) { addi sp,#-stack }
87 else if (additional stack < 65k) { add3 sp,sp,#-stack
88
89 } else if (additional stack) {
90 seth sp,#(stack & 0xffff0000)
91 or3 sp,sp,#(stack & 0x0000ffff)
92 sub sp,r4
93 }
94 if (frame pointer) {
95 mv sp,fp
96 }
c906108c 97
c5aa993b
JM
98 These instructions are scheduled like everything else, so you should stop at
99 the first branch instruction.
100
101 */
c906108c
SS
102
103/* This is required by skip prologue and by m32r_init_extra_frame_info.
104 The results of decoding a prologue should be cached because this
105 thrashing is getting nuts.
106 I am thinking of making a container class with two indexes, name and
107 address. It may be better to extend the symbol table.
c5aa993b 108 */
c906108c 109
c5aa993b 110static void
fba45db2
KB
111decode_prologue (CORE_ADDR start_pc, CORE_ADDR scan_limit, CORE_ADDR *pl_endptr, /* var parameter */
112 unsigned long *framelength, struct frame_info *fi,
113 struct frame_saved_regs *fsr)
c906108c
SS
114{
115 unsigned long framesize;
116 int insn;
117 int op1;
118 int maybe_one_more = 0;
119 CORE_ADDR after_prologue = 0;
120 CORE_ADDR after_stack_adjust = 0;
121 CORE_ADDR current_pc;
122
123
124 framesize = 0;
125 after_prologue = 0;
c5aa993b 126 insn_debug (("rd prolog l(%d)\n", scan_limit - current_pc));
c906108c
SS
127
128 for (current_pc = start_pc; current_pc < scan_limit; current_pc += 2)
129 {
130
131 insn = read_memory_unsigned_integer (current_pc, 2);
c5aa993b
JM
132 dump_insn ("insn-1", current_pc, insn); /* MTZ */
133
134 /* If this is a 32 bit instruction, we dont want to examine its
135 immediate data as though it were an instruction */
c906108c 136 if (current_pc & 0x02)
c5aa993b 137 { /* Clear the parallel execution bit from 16 bit instruction */
c906108c 138 if (maybe_one_more)
c5aa993b
JM
139 { /* The last instruction was a branch, usually terminates
140 the series, but if this is a parallel instruction,
141 it may be a stack framing instruction */
142 if (!(insn & 0x8000))
143 {
144 insn_debug (("Really done"));
145 break; /* nope, we are really done */
c906108c
SS
146 }
147 }
c5aa993b 148 insn &= 0x7fff; /* decode this instruction further */
c906108c
SS
149 }
150 else
151 {
c5aa993b
JM
152 if (maybe_one_more)
153 break; /* This isnt the one more */
c906108c
SS
154 if (insn & 0x8000)
155 {
c5aa993b 156 insn_debug (("32 bit insn\n"));
c906108c 157 if (current_pc == scan_limit)
c5aa993b
JM
158 scan_limit += 2; /* extend the search */
159 current_pc += 2; /* skip the immediate data */
160 if (insn == 0x8faf) /* add3 sp, sp, xxxx */
c906108c 161 /* add 16 bit sign-extended offset */
c5aa993b
JM
162 {
163 insn_debug (("stack increment\n"));
164 framesize += -((short) read_memory_unsigned_integer (current_pc, 2));
c906108c
SS
165 }
166 else
167 {
c5aa993b
JM
168 if (((insn >> 8) == 0xe4) && /* ld24 r4, xxxxxx; sub sp, r4 */
169 read_memory_unsigned_integer (current_pc + 2, 2) == 0x0f24)
170 { /* subtract 24 bit sign-extended negative-offset */
171 dump_insn ("insn-2", current_pc + 2, insn);
c906108c 172 insn = read_memory_unsigned_integer (current_pc - 2, 4);
c5aa993b 173 dump_insn ("insn-3(l4)", current_pc - 2, insn);
c906108c 174 if (insn & 0x00800000) /* sign extend */
c5aa993b 175 insn |= 0xff000000; /* negative */
c906108c 176 else
c5aa993b 177 insn &= 0x00ffffff; /* positive */
c906108c
SS
178 framesize += insn;
179 }
180 }
181 after_prologue = current_pc;
182 continue;
183 }
184 }
c5aa993b
JM
185 op1 = insn & 0xf000; /* isolate just the first nibble */
186
c906108c 187 if ((insn & 0xf0ff) == 0x207f)
c5aa993b 188 { /* st reg, @-sp */
c906108c 189 int regno;
c5aa993b
JM
190 insn_debug (("push\n"));
191#if 0 /* No, PUSH FP is not an indication that we will use a frame pointer. */
192 if (((insn & 0xffff) == 0x2d7f) && fi)
c906108c
SS
193 fi->using_frame_pointer = 1;
194#endif
c5aa993b
JM
195 framesize += 4;
196#if 0
c906108c
SS
197/* Why should we increase the scan limit, just because we did a push?
198 And if there is a reason, surely we would only want to do it if we
199 had already reached the scan limit... */
200 if (current_pc == scan_limit)
201 scan_limit += 2;
202#endif
203 regno = ((insn >> 8) & 0xf);
c5aa993b 204 if (fsr) /* save_regs offset */
c906108c
SS
205 fsr->regs[regno] = framesize;
206 after_prologue = 0;
c5aa993b 207 continue;
c906108c 208 }
c5aa993b 209 if ((insn >> 8) == 0x4f) /* addi sp, xx */
c906108c
SS
210 /* add 8 bit sign-extended offset */
211 {
212 int stack_adjust = (char) (insn & 0xff);
213
214 /* there are probably two of these stack adjustments:
215 1) A negative one in the prologue, and
216 2) A positive one in the epilogue.
217 We are only interested in the first one. */
218
219 if (stack_adjust < 0)
220 {
221 framesize -= stack_adjust;
222 after_prologue = 0;
223 /* A frameless function may have no "mv fp, sp".
c5aa993b 224 In that case, this is the end of the prologue. */
c906108c
SS
225 after_stack_adjust = current_pc + 2;
226 }
227 continue;
228 }
c5aa993b
JM
229 if (insn == 0x1d8f)
230 { /* mv fp, sp */
231 if (fi)
232 fi->using_frame_pointer = 1; /* fp is now valid */
233 insn_debug (("done fp found\n"));
234 after_prologue = current_pc + 2;
235 break; /* end of stack adjustments */
236 }
237 if (insn == 0x7000) /* Nop looks like a branch, continue explicitly */
238 {
239 insn_debug (("nop\n"));
240 after_prologue = current_pc + 2;
241 continue; /* nop occurs between pushes */
c906108c
SS
242 }
243 /* End of prolog if any of these are branch instructions */
244 if ((op1 == 0x7000)
c5aa993b 245 || (op1 == 0xb000)
cff3e48b 246 || (op1 == 0xf000))
c906108c
SS
247 {
248 after_prologue = current_pc;
c5aa993b 249 insn_debug (("Done: branch\n"));
c906108c
SS
250 maybe_one_more = 1;
251 continue;
252 }
253 /* Some of the branch instructions are mixed with other types */
254 if (op1 == 0x1000)
c5aa993b
JM
255 {
256 int subop = insn & 0x0ff0;
c906108c 257 if ((subop == 0x0ec0) || (subop == 0x0fc0))
c5aa993b
JM
258 {
259 insn_debug (("done: jmp\n"));
c906108c
SS
260 after_prologue = current_pc;
261 maybe_one_more = 1;
c5aa993b 262 continue; /* jmp , jl */
c906108c
SS
263 }
264 }
265 }
266
267 if (current_pc >= scan_limit)
268 {
c5aa993b 269 if (pl_endptr)
7a292a7a 270 {
c906108c 271#if 1
7a292a7a
SS
272 if (after_stack_adjust != 0)
273 /* We did not find a "mv fp,sp", but we DID find
274 a stack_adjust. Is it safe to use that as the
275 end of the prologue? I just don't know. */
276 {
277 *pl_endptr = after_stack_adjust;
278 if (framelength)
279 *framelength = framesize;
280 }
281 else
c906108c 282#endif
7a292a7a
SS
283 /* We reached the end of the loop without finding the end
284 of the prologue. No way to win -- we should report failure.
285 The way we do that is to return the original start_pc.
286 GDB will set a breakpoint at the start of the function (etc.) */
287 *pl_endptr = start_pc;
c5aa993b 288 }
c906108c
SS
289 return;
290 }
c5aa993b 291 if (after_prologue == 0)
c906108c
SS
292 after_prologue = current_pc;
293
c5aa993b
JM
294 insn_debug ((" framesize %d, firstline %08x\n", framesize, after_prologue));
295 if (framelength)
c906108c 296 *framelength = framesize;
c5aa993b 297 if (pl_endptr)
c906108c 298 *pl_endptr = after_prologue;
c5aa993b 299} /* decode_prologue */
c906108c
SS
300
301/* Function: skip_prologue
302 Find end of function prologue */
303
304CORE_ADDR
fba45db2 305m32r_skip_prologue (CORE_ADDR pc)
c906108c
SS
306{
307 CORE_ADDR func_addr, func_end;
308 struct symtab_and_line sal;
309
310 /* See what the symbol table says */
311
312 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
313 {
314 sal = find_pc_line (func_addr, 0);
315
316 if (sal.line != 0 && sal.end <= func_end)
317 {
c5aa993b
JM
318
319 insn_debug (("BP after prologue %08x\n", sal.end));
c906108c
SS
320 func_end = sal.end;
321 }
322 else
323 /* Either there's no line info, or the line after the prologue is after
324 the end of the function. In this case, there probably isn't a
325 prologue. */
326 {
c5aa993b
JM
327 insn_debug (("No line info, line(%x) sal_end(%x) funcend(%x)\n",
328 sal.line, sal.end, func_end));
329 func_end = min (func_end, func_addr + DEFAULT_SEARCH_LIMIT);
c906108c
SS
330 }
331 }
c5aa993b 332 else
c906108c
SS
333 func_end = pc + DEFAULT_SEARCH_LIMIT;
334 decode_prologue (pc, func_end, &sal.end, 0, 0, 0);
335 return sal.end;
336}
337
338static unsigned long
fba45db2 339m32r_scan_prologue (struct frame_info *fi, struct frame_saved_regs *fsr)
c906108c
SS
340{
341 struct symtab_and_line sal;
342 CORE_ADDR prologue_start, prologue_end, current_pc;
cff3e48b 343 unsigned long framesize = 0;
c906108c
SS
344
345 /* this code essentially duplicates skip_prologue,
346 but we need the start address below. */
347
348 if (find_pc_partial_function (fi->pc, NULL, &prologue_start, &prologue_end))
349 {
350 sal = find_pc_line (prologue_start, 0);
351
c5aa993b 352 if (sal.line == 0) /* no line info, use current PC */
c906108c
SS
353 if (prologue_start == entry_point_address ())
354 return 0;
355 }
356 else
357 {
358 prologue_start = fi->pc;
c5aa993b
JM
359 prologue_end = prologue_start + 48; /* We're in the boondocks:
360 allow for 16 pushes, an add,
361 and "mv fp,sp" */
c906108c
SS
362 }
363#if 0
364 prologue_end = min (prologue_end, fi->pc);
365#endif
c5aa993b
JM
366 insn_debug (("fipc(%08x) start(%08x) end(%08x)\n",
367 fi->pc, prologue_start, prologue_end));
368 prologue_end = min (prologue_end, prologue_start + DEFAULT_SEARCH_LIMIT);
369 decode_prologue (prologue_start, prologue_end, &prologue_end, &framesize,
370 fi, fsr);
c906108c
SS
371 return framesize;
372}
373
374/* Function: init_extra_frame_info
375 This function actually figures out the frame address for a given pc and
376 sp. This is tricky on the m32r because we sometimes don't use an explicit
377 frame pointer, and the previous stack pointer isn't necessarily recorded
378 on the stack. The only reliable way to get this info is to
379 examine the prologue. */
380
381void
fba45db2 382m32r_init_extra_frame_info (struct frame_info *fi)
c906108c
SS
383{
384 int reg;
385
386 if (fi->next)
387 fi->pc = FRAME_SAVED_PC (fi->next);
388
389 memset (fi->fsr.regs, '\000', sizeof fi->fsr.regs);
390
ae45cd16 391 if (DEPRECATED_PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
c906108c
SS
392 {
393 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
c5aa993b 394 by assuming it's always FP. */
135c175f
AC
395 fi->frame = deprecated_read_register_dummy (fi->pc, fi->frame,
396 SP_REGNUM);
c906108c
SS
397 fi->framesize = 0;
398 return;
399 }
c5aa993b 400 else
c906108c
SS
401 {
402 fi->using_frame_pointer = 0;
403 fi->framesize = m32r_scan_prologue (fi, &fi->fsr);
404
405 if (!fi->next)
406 if (fi->using_frame_pointer)
407 {
408 fi->frame = read_register (FP_REGNUM);
409 }
410 else
411 fi->frame = read_register (SP_REGNUM);
c5aa993b
JM
412 else
413 /* fi->next means this is not the innermost frame */ if (fi->using_frame_pointer)
414 /* we have an FP */
415 if (fi->next->fsr.regs[FP_REGNUM] != 0) /* caller saved our FP */
416 fi->frame = read_memory_integer (fi->next->fsr.regs[FP_REGNUM], 4);
c906108c
SS
417 for (reg = 0; reg < NUM_REGS; reg++)
418 if (fi->fsr.regs[reg] != 0)
419 fi->fsr.regs[reg] = fi->frame + fi->framesize - fi->fsr.regs[reg];
420 }
421}
422
4b33390a 423/* Function: m32r_virtual_frame_pointer
c906108c
SS
424 Return the register that the function uses for a frame pointer,
425 plus any necessary offset to be applied to the register before
426 any frame pointer offsets. */
427
428void
fba45db2 429m32r_virtual_frame_pointer (CORE_ADDR pc, long *reg, long *offset)
c906108c 430{
f6c609c4
AC
431 struct frame_info *fi = deprecated_frame_xmalloc ();
432 struct cleanup *old_chain = make_cleanup (xfree, fi);
c906108c
SS
433
434 /* Set up a dummy frame_info. */
f6c609c4
AC
435 fi->next = NULL;
436 fi->prev = NULL;
437 fi->frame = 0;
438 fi->pc = pc;
c906108c
SS
439
440 /* Analyze the prolog and fill in the extra info. */
f6c609c4 441 m32r_init_extra_frame_info (fi);
c906108c
SS
442
443 /* Results will tell us which type of frame it uses. */
f6c609c4 444 if (fi->using_frame_pointer)
c906108c 445 {
c5aa993b 446 *reg = FP_REGNUM;
c906108c
SS
447 *offset = 0;
448 }
449 else
450 {
c5aa993b 451 *reg = SP_REGNUM;
c906108c
SS
452 *offset = 0;
453 }
f6c609c4 454 do_cleanups (old_chain);
c906108c
SS
455}
456
457/* Function: find_callers_reg
458 Find REGNUM on the stack. Otherwise, it's in an active register. One thing
459 we might want to do here is to check REGNUM against the clobber mask, and
460 somehow flag it as invalid if it isn't saved on the stack somewhere. This
461 would provide a graceful failure mode when trying to get the value of
462 caller-saves registers for an inner frame. */
463
464CORE_ADDR
fba45db2 465m32r_find_callers_reg (struct frame_info *fi, int regnum)
c906108c
SS
466{
467 for (; fi; fi = fi->next)
ae45cd16 468 if (DEPRECATED_PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
135c175f 469 return deprecated_read_register_dummy (fi->pc, fi->frame, regnum);
c906108c 470 else if (fi->fsr.regs[regnum] != 0)
c5aa993b
JM
471 return read_memory_integer (fi->fsr.regs[regnum],
472 REGISTER_RAW_SIZE (regnum));
c906108c
SS
473 return read_register (regnum);
474}
475
a5afb99f
AC
476/* Function: frame_chain Given a GDB frame, determine the address of
477 the calling function's frame. This will be used to create a new
478 GDB frame struct, and then INIT_EXTRA_FRAME_INFO and
479 DEPRECATED_INIT_FRAME_PC will be called for the new frame. For
480 m32r, we save the frame size when we initialize the frame_info. */
c906108c
SS
481
482CORE_ADDR
fba45db2 483m32r_frame_chain (struct frame_info *fi)
c906108c
SS
484{
485 CORE_ADDR fn_start, callers_pc, fp;
486
487 /* is this a dummy frame? */
ae45cd16 488 if (DEPRECATED_PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
c5aa993b 489 return fi->frame; /* dummy frame same as caller's frame */
c906108c
SS
490
491 /* is caller-of-this a dummy frame? */
c5aa993b 492 callers_pc = FRAME_SAVED_PC (fi); /* find out who called us: */
c906108c 493 fp = m32r_find_callers_reg (fi, FP_REGNUM);
ae45cd16 494 if (DEPRECATED_PC_IN_CALL_DUMMY (callers_pc, fp, fp))
c5aa993b 495 return fp; /* dummy frame's frame may bear no relation to ours */
c906108c
SS
496
497 if (find_pc_partial_function (fi->pc, 0, &fn_start, 0))
498 if (fn_start == entry_point_address ())
c5aa993b 499 return 0; /* in _start fn, don't chain further */
c906108c
SS
500 if (fi->framesize == 0)
501 {
d4f3574e
SS
502 printf_filtered ("cannot determine frame size @ %s , pc(%s)\n",
503 paddr (fi->frame),
504 paddr (fi->pc));
c906108c
SS
505 return 0;
506 }
c5aa993b 507 insn_debug (("m32rx frame %08x\n", fi->frame + fi->framesize));
c906108c
SS
508 return fi->frame + fi->framesize;
509}
510
511/* Function: push_return_address (pc)
512 Set up the return address for the inferior function call.
513 Necessary for targets that don't actually execute a JSR/BSR instruction
514 (ie. when using an empty CALL_DUMMY) */
515
516CORE_ADDR
fba45db2 517m32r_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
c906108c
SS
518{
519 write_register (RP_REGNUM, CALL_DUMMY_ADDRESS ());
520 return sp;
521}
522
523
524/* Function: pop_frame
525 Discard from the stack the innermost frame,
526 restoring all saved registers. */
527
528struct frame_info *
fba45db2 529m32r_pop_frame (struct frame_info *frame)
c906108c
SS
530{
531 int regnum;
532
ae45cd16 533 if (DEPRECATED_PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
c906108c
SS
534 generic_pop_dummy_frame ();
535 else
536 {
537 for (regnum = 0; regnum < NUM_REGS; regnum++)
538 if (frame->fsr.regs[regnum] != 0)
c5aa993b 539 write_register (regnum,
c906108c
SS
540 read_memory_integer (frame->fsr.regs[regnum], 4));
541
542 write_register (PC_REGNUM, FRAME_SAVED_PC (frame));
543 write_register (SP_REGNUM, read_register (FP_REGNUM));
544 if (read_register (PSW_REGNUM) & 0x80)
545 write_register (SPU_REGNUM, read_register (SP_REGNUM));
546 else
547 write_register (SPI_REGNUM, read_register (SP_REGNUM));
548 }
549 flush_cached_frames ();
550 return NULL;
551}
552
553/* Function: frame_saved_pc
554 Find the caller of this frame. We do this by seeing if RP_REGNUM is saved
555 in the stack anywhere, otherwise we get it from the registers. */
556
557CORE_ADDR
fba45db2 558m32r_frame_saved_pc (struct frame_info *fi)
c906108c 559{
ae45cd16 560 if (DEPRECATED_PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
135c175f 561 return deprecated_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
c906108c
SS
562 else
563 return m32r_find_callers_reg (fi, RP_REGNUM);
564}
565
566/* Function: push_arguments
567 Setup the function arguments for calling a function in the inferior.
568
569 On the Mitsubishi M32R architecture, there are four registers (R0 to R3)
570 which are dedicated for passing function arguments. Up to the first
571 four arguments (depending on size) may go into these registers.
572 The rest go on the stack.
573
574 Arguments that are smaller than 4 bytes will still take up a whole
575 register or a whole 32-bit word on the stack, and will be
576 right-justified in the register or the stack word. This includes
577 chars, shorts, and small aggregate types.
c5aa993b 578
c906108c
SS
579 Arguments of 8 bytes size are split between two registers, if
580 available. If only one register is available, the argument will
581 be split between the register and the stack. Otherwise it is
582 passed entirely on the stack. Aggregate types with sizes between
583 4 and 8 bytes are passed entirely on the stack, and are left-justified
584 within the double-word (as opposed to aggregates smaller than 4 bytes
585 which are right-justified).
586
587 Aggregates of greater than 8 bytes are first copied onto the stack,
588 and then a pointer to the copy is passed in the place of the normal
589 argument (either in a register if available, or on the stack).
590
591 Functions that must return an aggregate type can return it in the
592 normal return value registers (R0 and R1) if its size is 8 bytes or
593 less. For larger return values, the caller must allocate space for
594 the callee to copy the return value to. A pointer to this space is
595 passed as an implicit first argument, always in R0. */
596
597CORE_ADDR
ea7c478f 598m32r_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
fba45db2 599 unsigned char struct_return, CORE_ADDR struct_addr)
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600{
601 int stack_offset, stack_alloc;
602 int argreg;
603 int argnum;
604 struct type *type;
605 CORE_ADDR regval;
606 char *val;
607 char valbuf[4];
608 int len;
609 int odd_sized_struct;
610
611 /* first force sp to a 4-byte alignment */
612 sp = sp & ~3;
613
c5aa993b 614 argreg = ARG0_REGNUM;
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615 /* The "struct return pointer" pseudo-argument goes in R0 */
616 if (struct_return)
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617 write_register (argreg++, struct_addr);
618
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619 /* Now make sure there's space on the stack */
620 for (argnum = 0, stack_alloc = 0;
621 argnum < nargs; argnum++)
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622 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
623 sp -= stack_alloc; /* make room on stack for args */
624
625
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626 /* Now load as many as possible of the first arguments into
627 registers, and push the rest onto the stack. There are 16 bytes
628 in four registers available. Loop thru args from first to last. */
c5aa993b 629
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630 argreg = ARG0_REGNUM;
631 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
632 {
633 type = VALUE_TYPE (args[argnum]);
c5aa993b
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634 len = TYPE_LENGTH (type);
635 memset (valbuf, 0, sizeof (valbuf));
c906108c 636 if (len < 4)
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637 { /* value gets right-justified in the register or stack word */
638 memcpy (valbuf + (4 - len),
639 (char *) VALUE_CONTENTS (args[argnum]), len);
640 val = valbuf;
641 }
c906108c 642 else
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643 val = (char *) VALUE_CONTENTS (args[argnum]);
644
c906108c 645 if (len > 4 && (len & 3) != 0)
c5aa993b 646 odd_sized_struct = 1; /* such structs go entirely on stack */
c906108c 647 else
c5aa993b 648 odd_sized_struct = 0;
c906108c 649 while (len > 0)
c5aa993b
JM
650 {
651 if (argreg > ARGLAST_REGNUM || odd_sized_struct)
652 { /* must go on the stack */
653 write_memory (sp + stack_offset, val, 4);
654 stack_offset += 4;
655 }
656 /* NOTE WELL!!!!! This is not an "else if" clause!!!
657 That's because some *&^%$ things get passed on the stack
658 AND in the registers! */
659 if (argreg <= ARGLAST_REGNUM)
660 { /* there's room in a register */
661 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
662 write_register (argreg++, regval);
663 }
664 /* Store the value 4 bytes at a time. This means that things
665 larger than 4 bytes may go partly in registers and partly
666 on the stack. */
667 len -= REGISTER_RAW_SIZE (argreg);
668 val += REGISTER_RAW_SIZE (argreg);
669 }
c906108c
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670 }
671 return sp;
672}
673
674/* Function: fix_call_dummy
675 If there is real CALL_DUMMY code (eg. on the stack), this function
676 has the responsability to insert the address of the actual code that
677 is the target of the target function call. */
678
679void
fba45db2 680m32r_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
ea7c478f 681 struct value **args, struct type *type, int gcc_p)
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682{
683 /* ld24 r8, <(imm24) fun> */
684 *(unsigned long *) (dummy) = (fun & 0x00ffffff) | 0xe8000000;
685}
686
c906108c
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687
688/* Function: m32r_write_sp
689 Because SP is really a read-only register that mirrors either SPU or SPI,
690 we must actually write one of those two as well, depending on PSW. */
691
692void
fba45db2 693m32r_write_sp (CORE_ADDR val)
c906108c
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694{
695 unsigned long psw = read_register (PSW_REGNUM);
696
c5aa993b 697 if (psw & 0x80) /* stack mode: user or interrupt */
c906108c
SS
698 write_register (SPU_REGNUM, val);
699 else
700 write_register (SPI_REGNUM, val);
701 write_register (SP_REGNUM, val);
702}
703
704void
fba45db2 705_initialize_m32r_tdep (void)
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706{
707 tm_print_insn = print_insn_m32r;
708}
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