Commit | Line | Data |
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908f682f | 1 | /* Target-dependent code for Motorola 68HC11 & 68HC12 |
78073dd8 AC |
2 | Copyright (C) 1999, 2000 Free Software Foundation, Inc. |
3 | Contributed by Stephane Carrez, stcarrez@worldnet.fr | |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
78073dd8 | 21 | |
82c230c2 SC |
22 | #include "defs.h" |
23 | #include "frame.h" | |
24 | #include "obstack.h" | |
25 | #include "symtab.h" | |
26 | #include "gdbtypes.h" | |
27 | #include "gdbcmd.h" | |
28 | #include "gdbcore.h" | |
29 | #include "gdb_string.h" | |
30 | #include "value.h" | |
31 | #include "inferior.h" | |
32 | #include "dis-asm.h" | |
33 | #include "symfile.h" | |
34 | #include "objfiles.h" | |
35 | #include "arch-utils.h" | |
78073dd8 | 36 | |
82c230c2 SC |
37 | #include "target.h" |
38 | #include "opcode/m68hc11.h" | |
78073dd8 AC |
39 | |
40 | /* Register numbers of various important registers. | |
41 | Note that some of these values are "real" register numbers, | |
42 | and correspond to the general registers of the machine, | |
43 | and some are "phony" register numbers which are too large | |
44 | to be actual register numbers as far as the user is concerned | |
45 | but do serve to get the desired values when passed to read_register. */ | |
46 | ||
82c230c2 SC |
47 | #define HARD_X_REGNUM 0 |
48 | #define HARD_D_REGNUM 1 | |
49 | #define HARD_Y_REGNUM 2 | |
50 | #define HARD_SP_REGNUM 3 | |
51 | #define HARD_PC_REGNUM 4 | |
52 | ||
53 | #define HARD_A_REGNUM 5 | |
54 | #define HARD_B_REGNUM 6 | |
55 | #define HARD_CCR_REGNUM 7 | |
56 | #define M68HC11_LAST_HARD_REG (HARD_CCR_REGNUM) | |
57 | ||
58 | /* Z is replaced by X or Y by gcc during machine reorg. | |
59 | ??? There is no way to get it and even know whether | |
60 | it's in X or Y or in ZS. */ | |
61 | #define SOFT_Z_REGNUM 8 | |
62 | ||
63 | /* Soft registers. These registers are special. There are treated | |
64 | like normal hard registers by gcc and gdb (ie, within dwarf2 info). | |
65 | They are physically located in memory. */ | |
66 | #define SOFT_FP_REGNUM 9 | |
67 | #define SOFT_TMP_REGNUM 10 | |
68 | #define SOFT_ZS_REGNUM 11 | |
69 | #define SOFT_XY_REGNUM 12 | |
f91a8b6b SC |
70 | #define SOFT_UNUSED_REGNUM 13 |
71 | #define SOFT_D1_REGNUM 14 | |
82c230c2 SC |
72 | #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31) |
73 | #define M68HC11_MAX_SOFT_REGS 32 | |
74 | ||
75 | #define M68HC11_NUM_REGS (8) | |
76 | #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5) | |
77 | #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS) | |
78 | ||
79 | #define M68HC11_REG_SIZE (2) | |
80 | ||
908f682f | 81 | struct insn_sequence; |
82c230c2 SC |
82 | struct gdbarch_tdep |
83 | { | |
5d1a66bd SC |
84 | /* Stack pointer correction value. For 68hc11, the stack pointer points |
85 | to the next push location. An offset of 1 must be applied to obtain | |
86 | the address where the last value is saved. For 68hc12, the stack | |
87 | pointer points to the last value pushed. No offset is necessary. */ | |
88 | int stack_correction; | |
908f682f SC |
89 | |
90 | /* Description of instructions in the prologue. */ | |
91 | struct insn_sequence *prologue; | |
82c230c2 SC |
92 | }; |
93 | ||
5d1a66bd SC |
94 | #define M6811_TDEP gdbarch_tdep (current_gdbarch) |
95 | #define STACK_CORRECTION (M6811_TDEP->stack_correction) | |
96 | ||
82c230c2 SC |
97 | struct frame_extra_info |
98 | { | |
99 | int frame_reg; | |
100 | CORE_ADDR return_pc; | |
101 | CORE_ADDR dummy; | |
102 | int frameless; | |
103 | int size; | |
104 | }; | |
78073dd8 | 105 | |
82c230c2 SC |
106 | /* Table of registers for 68HC11. This includes the hard registers |
107 | and the soft registers used by GCC. */ | |
108 | static char * | |
109 | m68hc11_register_names[] = | |
110 | { | |
111 | "x", "d", "y", "sp", "pc", "a", "b", | |
f91a8b6b | 112 | "ccr", "z", "frame","tmp", "zs", "xy", 0, |
82c230c2 SC |
113 | "d1", "d2", "d3", "d4", "d5", "d6", "d7", |
114 | "d8", "d9", "d10", "d11", "d12", "d13", "d14", | |
115 | "d15", "d16", "d17", "d18", "d19", "d20", "d21", | |
116 | "d22", "d23", "d24", "d25", "d26", "d27", "d28", | |
117 | "d29", "d30", "d31", "d32" | |
118 | }; | |
78073dd8 | 119 | |
82c230c2 SC |
120 | struct m68hc11_soft_reg |
121 | { | |
122 | const char *name; | |
123 | CORE_ADDR addr; | |
124 | }; | |
78073dd8 | 125 | |
82c230c2 | 126 | static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS]; |
78073dd8 | 127 | |
82c230c2 | 128 | #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr |
78073dd8 | 129 | |
82c230c2 SC |
130 | static int soft_min_addr; |
131 | static int soft_max_addr; | |
132 | static int soft_reg_initialized = 0; | |
78073dd8 | 133 | |
82c230c2 SC |
134 | /* Look in the symbol table for the address of a pseudo register |
135 | in memory. If we don't find it, pretend the register is not used | |
136 | and not available. */ | |
137 | static void | |
138 | m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name) | |
139 | { | |
140 | struct minimal_symbol *msymbol; | |
78073dd8 | 141 | |
82c230c2 SC |
142 | msymbol = lookup_minimal_symbol (name, NULL, NULL); |
143 | if (msymbol) | |
144 | { | |
145 | reg->addr = SYMBOL_VALUE_ADDRESS (msymbol); | |
146 | reg->name = xstrdup (name); | |
147 | ||
148 | /* Keep track of the address range for soft registers. */ | |
149 | if (reg->addr < (CORE_ADDR) soft_min_addr) | |
150 | soft_min_addr = reg->addr; | |
151 | if (reg->addr > (CORE_ADDR) soft_max_addr) | |
152 | soft_max_addr = reg->addr; | |
153 | } | |
154 | else | |
155 | { | |
156 | reg->name = 0; | |
157 | reg->addr = 0; | |
158 | } | |
159 | } | |
78073dd8 | 160 | |
82c230c2 SC |
161 | /* Initialize the table of soft register addresses according |
162 | to the symbol table. */ | |
163 | static void | |
164 | m68hc11_initialize_register_info (void) | |
165 | { | |
166 | int i; | |
78073dd8 | 167 | |
82c230c2 SC |
168 | if (soft_reg_initialized) |
169 | return; | |
170 | ||
171 | soft_min_addr = INT_MAX; | |
172 | soft_max_addr = 0; | |
173 | for (i = 0; i < M68HC11_ALL_REGS; i++) | |
174 | { | |
175 | soft_regs[i].name = 0; | |
176 | } | |
177 | ||
178 | m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame"); | |
179 | m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp"); | |
180 | m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z"); | |
181 | soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM]; | |
182 | m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy"); | |
78073dd8 | 183 | |
82c230c2 SC |
184 | for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++) |
185 | { | |
186 | char buf[10]; | |
78073dd8 | 187 | |
82c230c2 SC |
188 | sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1); |
189 | m68hc11_get_register_info (&soft_regs[i], buf); | |
190 | } | |
78073dd8 | 191 | |
82c230c2 SC |
192 | if (soft_regs[SOFT_FP_REGNUM].name == 0) |
193 | { | |
194 | warning ("No frame soft register found in the symbol table.\n"); | |
195 | warning ("Stack backtrace will not work.\n"); | |
196 | } | |
197 | soft_reg_initialized = 1; | |
198 | } | |
78073dd8 | 199 | |
82c230c2 SC |
200 | /* Given an address in memory, return the soft register number if |
201 | that address corresponds to a soft register. Returns -1 if not. */ | |
202 | static int | |
203 | m68hc11_which_soft_register (CORE_ADDR addr) | |
204 | { | |
205 | int i; | |
206 | ||
207 | if (addr < soft_min_addr || addr > soft_max_addr) | |
208 | return -1; | |
209 | ||
210 | for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++) | |
211 | { | |
212 | if (soft_regs[i].name && soft_regs[i].addr == addr) | |
213 | return i; | |
214 | } | |
215 | return -1; | |
216 | } | |
78073dd8 | 217 | |
82c230c2 SC |
218 | /* Fetch a pseudo register. The 68hc11 soft registers are treated like |
219 | pseudo registers. They are located in memory. Translate the register | |
220 | fetch into a memory read. */ | |
221 | void | |
222 | m68hc11_fetch_pseudo_register (int regno) | |
223 | { | |
224 | char buf[MAX_REGISTER_RAW_SIZE]; | |
78073dd8 | 225 | |
82c230c2 SC |
226 | m68hc11_initialize_register_info (); |
227 | ||
228 | /* Fetch a soft register: translate into a memory read. */ | |
229 | if (soft_regs[regno].name) | |
230 | { | |
231 | target_read_memory (soft_regs[regno].addr, buf, 2); | |
232 | } | |
233 | else | |
234 | { | |
235 | memset (buf, 0, 2); | |
236 | } | |
237 | supply_register (regno, buf); | |
238 | } | |
78073dd8 | 239 | |
82c230c2 SC |
240 | /* Store a pseudo register. Translate the register store |
241 | into a memory write. */ | |
242 | static void | |
243 | m68hc11_store_pseudo_register (int regno) | |
244 | { | |
245 | m68hc11_initialize_register_info (); | |
78073dd8 | 246 | |
82c230c2 SC |
247 | /* Store a soft register: translate into a memory write. */ |
248 | if (soft_regs[regno].name) | |
249 | { | |
250 | char buf[MAX_REGISTER_RAW_SIZE]; | |
78073dd8 | 251 | |
82c230c2 SC |
252 | read_register_gen (regno, buf); |
253 | target_write_memory (soft_regs[regno].addr, buf, 2); | |
254 | } | |
255 | } | |
78073dd8 | 256 | |
82c230c2 SC |
257 | static char * |
258 | m68hc11_register_name (int reg_nr) | |
78073dd8 | 259 | { |
82c230c2 SC |
260 | if (reg_nr < 0) |
261 | return NULL; | |
262 | if (reg_nr >= M68HC11_ALL_REGS) | |
263 | return NULL; | |
264 | ||
265 | /* If we don't know the address of a soft register, pretend it | |
266 | does not exist. */ | |
267 | if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0) | |
268 | return NULL; | |
269 | return m68hc11_register_names[reg_nr]; | |
270 | } | |
78073dd8 | 271 | |
82c230c2 SC |
272 | static unsigned char * |
273 | m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) | |
78073dd8 | 274 | { |
82c230c2 SC |
275 | static unsigned char breakpoint[] = {0x0}; |
276 | ||
277 | *lenptr = sizeof (breakpoint); | |
278 | return breakpoint; | |
78073dd8 AC |
279 | } |
280 | ||
281 | /* Immediately after a function call, return the saved pc before the frame | |
82c230c2 | 282 | is setup. */ |
78073dd8 | 283 | |
82c230c2 | 284 | static CORE_ADDR |
78073dd8 AC |
285 | m68hc11_saved_pc_after_call (struct frame_info *frame) |
286 | { | |
82c230c2 SC |
287 | CORE_ADDR addr; |
288 | ||
5d1a66bd | 289 | addr = read_register (HARD_SP_REGNUM) + STACK_CORRECTION; |
78073dd8 AC |
290 | addr &= 0x0ffff; |
291 | return read_memory_integer (addr, 2) & 0x0FFFF; | |
292 | } | |
293 | ||
82c230c2 SC |
294 | static CORE_ADDR |
295 | m68hc11_frame_saved_pc (struct frame_info *frame) | |
296 | { | |
297 | return frame->extra_info->return_pc; | |
298 | } | |
299 | ||
300 | static CORE_ADDR | |
301 | m68hc11_frame_args_address (struct frame_info *frame) | |
302 | { | |
908f682f | 303 | return frame->frame + frame->extra_info->size + STACK_CORRECTION + 2; |
82c230c2 SC |
304 | } |
305 | ||
306 | static CORE_ADDR | |
307 | m68hc11_frame_locals_address (struct frame_info *frame) | |
308 | { | |
309 | return frame->frame; | |
310 | } | |
311 | ||
78073dd8 AC |
312 | /* Discard from the stack the innermost frame, restoring all saved |
313 | registers. */ | |
314 | ||
82c230c2 | 315 | static void |
fba45db2 | 316 | m68hc11_pop_frame (void) |
78073dd8 | 317 | { |
82c230c2 SC |
318 | register struct frame_info *frame = get_current_frame (); |
319 | register CORE_ADDR fp, sp; | |
320 | register int regnum; | |
321 | ||
322 | if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame)) | |
323 | generic_pop_dummy_frame (); | |
324 | else | |
325 | { | |
326 | fp = FRAME_FP (frame); | |
327 | FRAME_INIT_SAVED_REGS (frame); | |
328 | ||
329 | /* Copy regs from where they were saved in the frame. */ | |
330 | for (regnum = 0; regnum < M68HC11_ALL_REGS; regnum++) | |
331 | if (frame->saved_regs[regnum]) | |
332 | write_register (regnum, | |
333 | read_memory_integer (frame->saved_regs[regnum], 2)); | |
334 | ||
335 | write_register (HARD_PC_REGNUM, frame->extra_info->return_pc); | |
336 | sp = fp + frame->extra_info->size; | |
337 | write_register (HARD_SP_REGNUM, sp); | |
338 | } | |
339 | flush_cached_frames (); | |
78073dd8 AC |
340 | } |
341 | ||
908f682f SC |
342 | \f |
343 | /* 68HC11 & 68HC12 prologue analysis. | |
344 | ||
345 | */ | |
346 | #define MAX_CODES 12 | |
347 | ||
348 | /* 68HC11 opcodes. */ | |
349 | #undef M6811_OP_PAGE2 | |
350 | #define M6811_OP_PAGE2 (0x18) | |
351 | #define M6811_OP_LDX (0xde) | |
352 | #define M6811_OP_PSHX (0x3c) | |
353 | #define M6811_OP_STS (0x9f) | |
354 | #define M6811_OP_TSX (0x30) | |
355 | #define M6811_OP_XGDX (0x8f) | |
356 | #define M6811_OP_ADDD (0xc3) | |
357 | #define M6811_OP_TXS (0x35) | |
358 | #define M6811_OP_DES (0x34) | |
359 | ||
360 | /* 68HC12 opcodes. */ | |
361 | #define M6812_OP_PAGE2 (0x18) | |
362 | #define M6812_OP_MOVW (0x01) | |
363 | #define M6812_PB_PSHW (0xae) | |
364 | #define M6812_OP_STS (0x7f) | |
365 | #define M6812_OP_LEAS (0x1b) | |
366 | ||
367 | /* Operand extraction. */ | |
368 | #define OP_DIRECT (0x100) /* 8-byte direct addressing. */ | |
369 | #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */ | |
370 | #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */ | |
371 | #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */ | |
372 | ||
373 | /* Identification of the sequence. */ | |
374 | enum m6811_seq_type | |
375 | { | |
376 | P_LAST = 0, | |
377 | P_SAVE_REG, /* Save a register on the stack. */ | |
378 | P_SET_FRAME, /* Setup the frame pointer. */ | |
379 | P_LOCAL_1, /* Allocate 1 byte for locals. */ | |
380 | P_LOCAL_2, /* Allocate 2 bytes for locals. */ | |
381 | P_LOCAL_N /* Allocate N bytes for locals. */ | |
382 | }; | |
383 | ||
384 | struct insn_sequence { | |
385 | enum m6811_seq_type type; | |
386 | unsigned length; | |
387 | unsigned short code[MAX_CODES]; | |
388 | }; | |
389 | ||
390 | /* Sequence of instructions in the 68HC11 function prologue. */ | |
391 | static struct insn_sequence m6811_prologue[] = { | |
392 | /* Sequences to save a soft-register. */ | |
393 | { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT, | |
394 | M6811_OP_PSHX } }, | |
395 | { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT, | |
396 | M6811_OP_PAGE2, M6811_OP_PSHX } }, | |
397 | ||
398 | /* Sequences to allocate local variables. */ | |
399 | { P_LOCAL_N, 7, { M6811_OP_TSX, | |
400 | M6811_OP_XGDX, | |
401 | M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW, | |
402 | M6811_OP_XGDX, | |
403 | M6811_OP_TXS } }, | |
404 | { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX, | |
405 | M6811_OP_PAGE2, M6811_OP_XGDX, | |
406 | M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW, | |
407 | M6811_OP_PAGE2, M6811_OP_XGDX, | |
408 | M6811_OP_PAGE2, M6811_OP_TXS } }, | |
409 | { P_LOCAL_1, 1, { M6811_OP_DES } }, | |
410 | { P_LOCAL_2, 1, { M6811_OP_PSHX } }, | |
411 | { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } }, | |
412 | ||
413 | /* Initialize the frame pointer. */ | |
414 | { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } }, | |
415 | { P_LAST, 0, { 0 } } | |
416 | }; | |
417 | ||
418 | ||
419 | /* Sequence of instructions in the 68HC12 function prologue. */ | |
420 | static struct insn_sequence m6812_prologue[] = { | |
421 | { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW, | |
422 | OP_IMM_HIGH, OP_IMM_LOW } }, | |
423 | { P_SET_FRAME, 3, { M6812_OP_STS, OP_IMM_HIGH, OP_IMM_LOW } }, | |
424 | { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } }, | |
425 | { P_LAST, 0 } | |
426 | }; | |
427 | ||
428 | ||
429 | /* Analyze the sequence of instructions starting at the given address. | |
430 | Returns a pointer to the sequence when it is recognized and | |
431 | the optional value (constant/address) associated with it. | |
432 | Advance the pc for the next sequence. */ | |
433 | static struct insn_sequence * | |
434 | m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR *pc, | |
435 | CORE_ADDR *val) | |
436 | { | |
437 | unsigned char buffer[MAX_CODES]; | |
438 | unsigned bufsize; | |
439 | unsigned j; | |
440 | CORE_ADDR cur_val; | |
441 | short v = 0; | |
442 | ||
443 | bufsize = 0; | |
444 | for (; seq->type != P_LAST; seq++) | |
445 | { | |
446 | cur_val = 0; | |
447 | for (j = 0; j < seq->length; j++) | |
448 | { | |
449 | if (bufsize < j + 1) | |
450 | { | |
451 | buffer[bufsize] = read_memory_unsigned_integer (*pc + bufsize, | |
452 | 1); | |
453 | bufsize++; | |
454 | } | |
455 | /* Continue while we match the opcode. */ | |
456 | if (seq->code[j] == buffer[j]) | |
457 | continue; | |
458 | ||
459 | if ((seq->code[j] & 0xf00) == 0) | |
460 | break; | |
461 | ||
462 | /* Extract a sequence parameter (address or constant). */ | |
463 | switch (seq->code[j]) | |
464 | { | |
465 | case OP_DIRECT: | |
466 | cur_val = (CORE_ADDR) buffer[j]; | |
467 | break; | |
468 | ||
469 | case OP_IMM_HIGH: | |
470 | cur_val = cur_val & 0x0ff; | |
471 | cur_val |= (buffer[j] << 8); | |
472 | break; | |
473 | ||
474 | case OP_IMM_LOW: | |
475 | cur_val &= 0x0ff00; | |
476 | cur_val |= buffer[j]; | |
477 | break; | |
478 | ||
479 | case OP_PBYTE: | |
480 | if ((buffer[j] & 0xE0) == 0x80) | |
481 | { | |
482 | v = buffer[j] & 0x1f; | |
483 | if (v & 0x10) | |
484 | v |= 0xfff0; | |
485 | } | |
486 | else if ((buffer[j] & 0xfe) == 0xf0) | |
487 | { | |
488 | v = read_memory_unsigned_integer (*pc + j + 1, 1); | |
489 | if (buffer[j] & 1) | |
490 | v |= 0xff00; | |
491 | } | |
492 | else if (buffer[j] == 0xf2) | |
493 | { | |
494 | v = read_memory_unsigned_integer (*pc + j + 1, 2); | |
495 | } | |
496 | cur_val = v; | |
497 | break; | |
498 | } | |
499 | } | |
500 | ||
501 | /* We have a full match. */ | |
502 | if (j == seq->length) | |
503 | { | |
504 | *val = cur_val; | |
505 | *pc = *pc + j; | |
506 | return seq; | |
507 | } | |
508 | } | |
509 | return 0; | |
510 | } | |
511 | ||
78073dd8 AC |
512 | /* Analyze the function prologue to find some information |
513 | about the function: | |
514 | - the PC of the first line (for m68hc11_skip_prologue) | |
515 | - the offset of the previous frame saved address (from current frame) | |
516 | - the soft registers which are pushed. */ | |
517 | static void | |
82c230c2 SC |
518 | m68hc11_guess_from_prologue (CORE_ADDR pc, CORE_ADDR fp, |
519 | CORE_ADDR *first_line, | |
520 | int *frame_offset, CORE_ADDR *pushed_regs) | |
78073dd8 | 521 | { |
82c230c2 | 522 | CORE_ADDR save_addr; |
78073dd8 | 523 | CORE_ADDR func_end; |
78073dd8 AC |
524 | int size; |
525 | int found_frame_point; | |
82c230c2 | 526 | int saved_reg; |
78073dd8 | 527 | CORE_ADDR first_pc; |
908f682f SC |
528 | int done = 0; |
529 | struct insn_sequence *seq_table; | |
78073dd8 AC |
530 | |
531 | first_pc = get_pc_function_start (pc); | |
532 | size = 0; | |
533 | ||
82c230c2 | 534 | m68hc11_initialize_register_info (); |
78073dd8 AC |
535 | if (first_pc == 0) |
536 | { | |
537 | *frame_offset = 0; | |
78073dd8 AC |
538 | *first_line = pc; |
539 | return; | |
540 | } | |
541 | ||
908f682f SC |
542 | seq_table = gdbarch_tdep (current_gdbarch)->prologue; |
543 | ||
78073dd8 AC |
544 | /* The 68hc11 stack is as follows: |
545 | ||
546 | ||
547 | | | | |
548 | +-----------+ | |
549 | | | | |
550 | | args | | |
551 | | | | |
552 | +-----------+ | |
553 | | PC-return | | |
554 | +-----------+ | |
555 | | Old frame | | |
556 | +-----------+ | |
557 | | | | |
558 | | Locals | | |
559 | | | | |
560 | +-----------+ <--- current frame | |
561 | | | | |
562 | ||
563 | With most processors (like 68K) the previous frame can be computed | |
564 | easily because it is always at a fixed offset (see link/unlink). | |
565 | That is, locals are accessed with negative offsets, arguments are | |
566 | accessed with positive ones. Since 68hc11 only supports offsets | |
567 | in the range [0..255], the frame is defined at the bottom of | |
568 | locals (see picture). | |
569 | ||
570 | The purpose of the analysis made here is to find out the size | |
571 | of locals in this function. An alternative to this is to use | |
572 | DWARF2 info. This would be better but I don't know how to | |
573 | access dwarf2 debug from this function. | |
574 | ||
575 | Walk from the function entry point to the point where we save | |
576 | the frame. While walking instructions, compute the size of bytes | |
577 | which are pushed. This gives us the index to access the previous | |
578 | frame. | |
579 | ||
580 | We limit the search to 128 bytes so that the algorithm is bounded | |
581 | in case of random and wrong code. We also stop and abort if | |
582 | we find an instruction which is not supposed to appear in the | |
583 | prologue (as generated by gcc 2.95, 2.96). | |
584 | */ | |
585 | pc = first_pc; | |
586 | func_end = pc + 128; | |
78073dd8 | 587 | found_frame_point = 0; |
908f682f SC |
588 | *frame_offset = 0; |
589 | save_addr = fp; | |
590 | while (!done && pc + 2 < func_end) | |
78073dd8 | 591 | { |
908f682f SC |
592 | struct insn_sequence *seq; |
593 | CORE_ADDR val; | |
78073dd8 | 594 | |
908f682f SC |
595 | seq = m68hc11_analyze_instruction (seq_table, &pc, &val); |
596 | if (seq == 0) | |
597 | break; | |
78073dd8 | 598 | |
908f682f | 599 | if (seq->type == P_SAVE_REG) |
78073dd8 | 600 | { |
908f682f SC |
601 | if (found_frame_point) |
602 | { | |
603 | saved_reg = m68hc11_which_soft_register (val); | |
604 | if (saved_reg < 0) | |
605 | break; | |
78073dd8 | 606 | |
908f682f SC |
607 | save_addr -= 2; |
608 | if (pushed_regs) | |
609 | pushed_regs[saved_reg] = save_addr; | |
610 | } | |
611 | else | |
612 | { | |
613 | size += 2; | |
614 | } | |
78073dd8 | 615 | } |
908f682f | 616 | else if (seq->type == P_SET_FRAME) |
78073dd8 AC |
617 | { |
618 | found_frame_point = 1; | |
908f682f | 619 | *frame_offset = size; |
78073dd8 | 620 | } |
908f682f | 621 | else if (seq->type == P_LOCAL_1) |
78073dd8 | 622 | { |
6148eca7 SC |
623 | size += 1; |
624 | } | |
908f682f | 625 | else if (seq->type == P_LOCAL_2) |
78073dd8 | 626 | { |
908f682f | 627 | size += 2; |
78073dd8 | 628 | } |
908f682f | 629 | else if (seq->type == P_LOCAL_N) |
78073dd8 | 630 | { |
908f682f SC |
631 | /* Stack pointer is decremented for the allocation. */ |
632 | if (val & 0x8000) | |
633 | size -= (int) (val) | 0xffff0000; | |
634 | else | |
635 | size -= val; | |
78073dd8 AC |
636 | } |
637 | } | |
78073dd8 AC |
638 | *first_line = pc; |
639 | } | |
640 | ||
82c230c2 | 641 | static CORE_ADDR |
78073dd8 AC |
642 | m68hc11_skip_prologue (CORE_ADDR pc) |
643 | { | |
644 | CORE_ADDR func_addr, func_end; | |
645 | struct symtab_and_line sal; | |
646 | int frame_offset; | |
78073dd8 | 647 | |
82c230c2 SC |
648 | /* If we have line debugging information, then the end of the |
649 | prologue should be the first assembly instruction of the | |
78073dd8 AC |
650 | first source line. */ |
651 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
652 | { | |
653 | sal = find_pc_line (func_addr, 0); | |
654 | if (sal.end && sal.end < func_end) | |
655 | return sal.end; | |
656 | } | |
657 | ||
82c230c2 | 658 | m68hc11_guess_from_prologue (pc, 0, &pc, &frame_offset, 0); |
78073dd8 AC |
659 | return pc; |
660 | } | |
661 | ||
662 | /* Given a GDB frame, determine the address of the calling function's frame. | |
663 | This will be used to create a new GDB frame struct, and then | |
664 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. | |
665 | */ | |
666 | ||
82c230c2 | 667 | static CORE_ADDR |
78073dd8 AC |
668 | m68hc11_frame_chain (struct frame_info *frame) |
669 | { | |
82c230c2 | 670 | CORE_ADDR addr; |
78073dd8 | 671 | |
6148eca7 SC |
672 | if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame)) |
673 | return frame->frame; /* dummy frame same as caller's frame */ | |
674 | ||
82c230c2 SC |
675 | if (frame->extra_info->return_pc == 0 |
676 | || inside_entry_file (frame->extra_info->return_pc)) | |
677 | return (CORE_ADDR) 0; | |
78073dd8 AC |
678 | |
679 | if (frame->frame == 0) | |
680 | { | |
681 | return (CORE_ADDR) 0; | |
682 | } | |
683 | ||
5d1a66bd | 684 | addr = frame->frame + frame->extra_info->size + STACK_CORRECTION - 2; |
78073dd8 AC |
685 | addr = read_memory_unsigned_integer (addr, 2) & 0x0FFFF; |
686 | if (addr == 0) | |
687 | { | |
82c230c2 | 688 | return (CORE_ADDR) 0; |
78073dd8 AC |
689 | } |
690 | ||
691 | return addr; | |
692 | } | |
693 | ||
694 | /* Put here the code to store, into a struct frame_saved_regs, the | |
695 | addresses of the saved registers of frame described by FRAME_INFO. | |
696 | This includes special registers such as pc and fp saved in special | |
697 | ways in the stack frame. sp is even more special: the address we | |
698 | return for it IS the sp for the next frame. */ | |
82c230c2 SC |
699 | static void |
700 | m68hc11_frame_init_saved_regs (struct frame_info *fi) | |
78073dd8 AC |
701 | { |
702 | CORE_ADDR pc; | |
184651e3 SC |
703 | CORE_ADDR addr; |
704 | ||
82c230c2 SC |
705 | if (fi->saved_regs == NULL) |
706 | frame_saved_regs_zalloc (fi); | |
707 | else | |
708 | memset (fi->saved_regs, 0, sizeof (fi->saved_regs)); | |
709 | ||
78073dd8 | 710 | pc = fi->pc; |
82c230c2 SC |
711 | m68hc11_guess_from_prologue (pc, fi->frame, &pc, &fi->extra_info->size, |
712 | fi->saved_regs); | |
713 | ||
5d1a66bd | 714 | addr = fi->frame + fi->extra_info->size + STACK_CORRECTION; |
908f682f SC |
715 | if (soft_regs[SOFT_FP_REGNUM].name) |
716 | fi->saved_regs[SOFT_FP_REGNUM] = addr - 2; | |
184651e3 | 717 | fi->saved_regs[HARD_SP_REGNUM] = addr; |
82c230c2 | 718 | fi->saved_regs[HARD_PC_REGNUM] = fi->saved_regs[HARD_SP_REGNUM]; |
78073dd8 AC |
719 | } |
720 | ||
82c230c2 | 721 | static void |
78073dd8 AC |
722 | m68hc11_init_extra_frame_info (int fromleaf, struct frame_info *fi) |
723 | { | |
82c230c2 | 724 | CORE_ADDR addr; |
78073dd8 | 725 | |
82c230c2 SC |
726 | fi->extra_info = (struct frame_extra_info *) |
727 | frame_obstack_alloc (sizeof (struct frame_extra_info)); | |
728 | ||
729 | if (fi->next) | |
730 | fi->pc = FRAME_SAVED_PC (fi->next); | |
731 | ||
732 | m68hc11_frame_init_saved_regs (fi); | |
78073dd8 AC |
733 | |
734 | if (fromleaf) | |
735 | { | |
82c230c2 | 736 | fi->extra_info->return_pc = m68hc11_saved_pc_after_call (fi); |
78073dd8 AC |
737 | } |
738 | else | |
739 | { | |
5d1a66bd | 740 | addr = fi->frame + fi->extra_info->size + STACK_CORRECTION; |
82c230c2 SC |
741 | addr = read_memory_unsigned_integer (addr, 2) & 0x0ffff; |
742 | fi->extra_info->return_pc = addr; | |
78073dd8 AC |
743 | #if 0 |
744 | printf ("Pc@0x%04x, FR 0x%04x, size %d, read ret @0x%04x -> 0x%04x\n", | |
745 | fi->pc, | |
746 | fi->frame, fi->size, | |
747 | addr & 0x0ffff, | |
748 | fi->return_pc); | |
749 | #endif | |
750 | } | |
751 | } | |
752 | ||
753 | /* Same as 'info reg' but prints the registers in a different way. */ | |
754 | static void | |
755 | show_regs (char *args, int from_tty) | |
756 | { | |
82c230c2 | 757 | int ccr = read_register (HARD_CCR_REGNUM); |
78073dd8 | 758 | int i; |
82c230c2 SC |
759 | int nr; |
760 | ||
78073dd8 | 761 | printf_filtered ("PC=%04x SP=%04x FP=%04x CCR=%02x %c%c%c%c%c%c%c%c\n", |
82c230c2 SC |
762 | (int) read_register (HARD_PC_REGNUM), |
763 | (int) read_register (HARD_SP_REGNUM), | |
764 | (int) read_register (SOFT_FP_REGNUM), | |
78073dd8 AC |
765 | ccr, |
766 | ccr & M6811_S_BIT ? 'S' : '-', | |
767 | ccr & M6811_X_BIT ? 'X' : '-', | |
768 | ccr & M6811_H_BIT ? 'H' : '-', | |
769 | ccr & M6811_I_BIT ? 'I' : '-', | |
770 | ccr & M6811_N_BIT ? 'N' : '-', | |
771 | ccr & M6811_Z_BIT ? 'Z' : '-', | |
772 | ccr & M6811_V_BIT ? 'V' : '-', | |
773 | ccr & M6811_C_BIT ? 'C' : '-'); | |
774 | ||
775 | printf_filtered ("D=%04x IX=%04x IY=%04x\n", | |
82c230c2 SC |
776 | (int) read_register (HARD_D_REGNUM), |
777 | (int) read_register (HARD_X_REGNUM), | |
778 | (int) read_register (HARD_Y_REGNUM)); | |
779 | ||
780 | nr = 0; | |
781 | for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++) | |
78073dd8 | 782 | { |
82c230c2 SC |
783 | /* Skip registers which are not defined in the symbol table. */ |
784 | if (soft_regs[i].name == 0) | |
785 | continue; | |
786 | ||
787 | printf_filtered ("D%d=%04x", | |
788 | i - SOFT_D1_REGNUM + 1, | |
789 | (int) read_register (i)); | |
790 | nr++; | |
791 | if ((nr % 8) == 7) | |
78073dd8 AC |
792 | printf_filtered ("\n"); |
793 | else | |
794 | printf_filtered (" "); | |
795 | } | |
82c230c2 SC |
796 | if (nr && (nr % 8) != 7) |
797 | printf_filtered ("\n"); | |
78073dd8 AC |
798 | } |
799 | ||
22df305e SC |
800 | static CORE_ADDR |
801 | m68hc11_stack_align (CORE_ADDR addr) | |
802 | { | |
803 | return ((addr + 1) & -2); | |
804 | } | |
805 | ||
82c230c2 | 806 | static CORE_ADDR |
78073dd8 AC |
807 | m68hc11_push_arguments (int nargs, |
808 | value_ptr *args, | |
809 | CORE_ADDR sp, | |
810 | int struct_return, | |
811 | CORE_ADDR struct_addr) | |
812 | { | |
82c230c2 SC |
813 | int stack_alloc; |
814 | int argnum; | |
815 | int first_stack_argnum; | |
816 | int stack_offset; | |
817 | struct type *type; | |
818 | char *val; | |
819 | int len; | |
820 | ||
821 | stack_alloc = 0; | |
822 | first_stack_argnum = 0; | |
823 | if (struct_return) | |
824 | { | |
184651e3 SC |
825 | /* The struct is allocated on the stack and gdb used the stack |
826 | pointer for the address of that struct. We must apply the | |
827 | stack offset on the address. */ | |
5d1a66bd | 828 | write_register (HARD_D_REGNUM, struct_addr + STACK_CORRECTION); |
82c230c2 SC |
829 | } |
830 | else if (nargs > 0) | |
831 | { | |
832 | type = VALUE_TYPE (args[0]); | |
833 | len = TYPE_LENGTH (type); | |
834 | ||
835 | /* First argument is passed in D and X registers. */ | |
836 | if (len <= 4) | |
837 | { | |
838 | LONGEST v = extract_unsigned_integer (VALUE_CONTENTS (args[0]), len); | |
839 | first_stack_argnum = 1; | |
840 | write_register (HARD_D_REGNUM, v); | |
841 | if (len > 2) | |
842 | { | |
843 | v >>= 16; | |
844 | write_register (HARD_X_REGNUM, v); | |
845 | } | |
846 | } | |
847 | } | |
848 | for (argnum = first_stack_argnum; argnum < nargs; argnum++) | |
849 | { | |
850 | type = VALUE_TYPE (args[argnum]); | |
22df305e | 851 | stack_alloc += (TYPE_LENGTH (type) + 1) & -2; |
82c230c2 SC |
852 | } |
853 | sp -= stack_alloc; | |
854 | ||
5d1a66bd | 855 | stack_offset = STACK_CORRECTION; |
82c230c2 SC |
856 | for (argnum = first_stack_argnum; argnum < nargs; argnum++) |
857 | { | |
858 | type = VALUE_TYPE (args[argnum]); | |
859 | len = TYPE_LENGTH (type); | |
860 | ||
861 | val = (char*) VALUE_CONTENTS (args[argnum]); | |
862 | write_memory (sp + stack_offset, val, len); | |
863 | stack_offset += len; | |
22df305e SC |
864 | if (len & 1) |
865 | { | |
866 | static char zero = 0; | |
867 | ||
868 | write_memory (sp + stack_offset, &zero, 1); | |
869 | stack_offset++; | |
870 | } | |
82c230c2 SC |
871 | } |
872 | return sp; | |
78073dd8 AC |
873 | } |
874 | ||
875 | ||
82c230c2 SC |
876 | /* Return a location where we can set a breakpoint that will be hit |
877 | when an inferior function call returns. */ | |
78073dd8 | 878 | CORE_ADDR |
fba45db2 | 879 | m68hc11_call_dummy_address (void) |
78073dd8 | 880 | { |
22df305e | 881 | return entry_point_address (); |
78073dd8 AC |
882 | } |
883 | ||
82c230c2 SC |
884 | static struct type * |
885 | m68hc11_register_virtual_type (int reg_nr) | |
886 | { | |
887 | return builtin_type_uint16; | |
888 | } | |
889 | ||
890 | static void | |
891 | m68hc11_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
892 | { | |
184651e3 SC |
893 | /* The struct address computed by gdb is on the stack. |
894 | It uses the stack pointer so we must apply the stack | |
895 | correction offset. */ | |
5d1a66bd | 896 | write_register (HARD_D_REGNUM, addr + STACK_CORRECTION); |
82c230c2 SC |
897 | } |
898 | ||
899 | static void | |
900 | m68hc11_store_return_value (struct type *type, char *valbuf) | |
901 | { | |
22df305e SC |
902 | int len; |
903 | ||
904 | len = TYPE_LENGTH (type); | |
905 | ||
906 | /* First argument is passed in D and X registers. */ | |
907 | if (len <= 4) | |
908 | { | |
909 | LONGEST v = extract_unsigned_integer (valbuf, len); | |
910 | ||
911 | write_register (HARD_D_REGNUM, v); | |
912 | if (len > 2) | |
913 | { | |
914 | v >>= 16; | |
915 | write_register (HARD_X_REGNUM, v); | |
916 | } | |
917 | } | |
918 | else | |
919 | error ("return of value > 4 is not supported."); | |
82c230c2 SC |
920 | } |
921 | ||
922 | ||
923 | /* Given a return value in `regbuf' with a type `type', | |
78073dd8 AC |
924 | extract and copy its value into `valbuf'. */ |
925 | ||
82c230c2 SC |
926 | static void |
927 | m68hc11_extract_return_value (struct type *type, | |
78073dd8 AC |
928 | char *regbuf, |
929 | char *valbuf) | |
930 | { | |
82c230c2 SC |
931 | int len = TYPE_LENGTH (type); |
932 | ||
22df305e | 933 | switch (len) |
82c230c2 | 934 | { |
22df305e SC |
935 | case 1: |
936 | memcpy (valbuf, ®buf[HARD_D_REGNUM * 2 + 1], len); | |
937 | break; | |
938 | ||
939 | case 2: | |
940 | memcpy (valbuf, ®buf[HARD_D_REGNUM * 2], len); | |
941 | break; | |
942 | ||
943 | case 3: | |
944 | memcpy (&valbuf[0], ®buf[HARD_X_REGNUM * 2 + 1], 1); | |
945 | memcpy (&valbuf[1], ®buf[HARD_D_REGNUM * 2], 2); | |
946 | break; | |
947 | ||
948 | case 4: | |
949 | memcpy (&valbuf[0], ®buf[HARD_X_REGNUM * 2], 2); | |
950 | memcpy (&valbuf[2], ®buf[HARD_D_REGNUM * 2], 2); | |
951 | break; | |
952 | ||
953 | default: | |
82c230c2 SC |
954 | error ("bad size for return value"); |
955 | } | |
956 | } | |
957 | ||
958 | /* Should call_function allocate stack space for a struct return? */ | |
959 | static int | |
960 | m68hc11_use_struct_convention (int gcc_p, struct type *type) | |
961 | { | |
22df305e SC |
962 | return (TYPE_CODE (type) == TYPE_CODE_STRUCT |
963 | || TYPE_CODE (type) == TYPE_CODE_UNION | |
964 | || TYPE_LENGTH (type) > 4); | |
82c230c2 SC |
965 | } |
966 | ||
967 | static int | |
968 | m68hc11_return_value_on_stack (struct type *type) | |
969 | { | |
22df305e | 970 | return TYPE_LENGTH (type) > 4; |
82c230c2 SC |
971 | } |
972 | ||
973 | /* Extract from an array REGBUF containing the (raw) register state | |
974 | the address in which a function should return its structure value, | |
975 | as a CORE_ADDR (or an expression that can be used as one). */ | |
976 | static CORE_ADDR | |
977 | m68hc11_extract_struct_value_address (char *regbuf) | |
978 | { | |
979 | return extract_address (®buf[HARD_D_REGNUM * 2], | |
980 | REGISTER_RAW_SIZE (HARD_D_REGNUM)); | |
981 | } | |
982 | ||
983 | /* Function: push_return_address (pc) | |
984 | Set up the return address for the inferior function call. | |
985 | Needed for targets where we don't actually execute a JSR/BSR instruction */ | |
986 | ||
987 | static CORE_ADDR | |
988 | m68hc11_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
989 | { | |
990 | char valbuf[2]; | |
991 | ||
22df305e | 992 | pc = CALL_DUMMY_ADDRESS (); |
82c230c2 SC |
993 | sp -= 2; |
994 | store_unsigned_integer (valbuf, 2, pc); | |
5d1a66bd | 995 | write_memory (sp + STACK_CORRECTION, valbuf, 2); |
82c230c2 SC |
996 | return sp; |
997 | } | |
998 | ||
999 | /* Index within `registers' of the first byte of the space for | |
1000 | register N. */ | |
1001 | static int | |
1002 | m68hc11_register_byte (int reg_nr) | |
1003 | { | |
1004 | return (reg_nr * M68HC11_REG_SIZE); | |
1005 | } | |
1006 | ||
1007 | static int | |
1008 | m68hc11_register_raw_size (int reg_nr) | |
1009 | { | |
1010 | return M68HC11_REG_SIZE; | |
1011 | } | |
1012 | ||
ea3881d9 SC |
1013 | static int |
1014 | gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info) | |
1015 | { | |
1016 | if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11) | |
1017 | return print_insn_m68hc11 (memaddr, info); | |
1018 | else | |
1019 | return print_insn_m68hc12 (memaddr, info); | |
1020 | } | |
1021 | ||
82c230c2 SC |
1022 | static struct gdbarch * |
1023 | m68hc11_gdbarch_init (struct gdbarch_info info, | |
1024 | struct gdbarch_list *arches) | |
1025 | { | |
1026 | static LONGEST m68hc11_call_dummy_words[] = | |
1027 | {0}; | |
1028 | struct gdbarch *gdbarch; | |
1029 | struct gdbarch_tdep *tdep; | |
82c230c2 SC |
1030 | |
1031 | soft_reg_initialized = 0; | |
1032 | ||
1033 | /* try to find a pre-existing architecture */ | |
1034 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
1035 | arches != NULL; | |
1036 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
1037 | { | |
82c230c2 SC |
1038 | return arches->gdbarch; |
1039 | } | |
1040 | ||
1041 | /* Need a new architecture. Fill in a target specific vector. */ | |
1042 | tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); | |
1043 | gdbarch = gdbarch_alloc (&info, tdep); | |
ed99b3d0 | 1044 | |
5d1a66bd SC |
1045 | switch (info.bfd_arch_info->arch) |
1046 | { | |
1047 | case bfd_arch_m68hc11: | |
1048 | tdep->stack_correction = 1; | |
908f682f | 1049 | tdep->prologue = m6811_prologue; |
5d1a66bd | 1050 | break; |
82c230c2 | 1051 | |
5d1a66bd SC |
1052 | case bfd_arch_m68hc12: |
1053 | tdep->stack_correction = 0; | |
908f682f | 1054 | tdep->prologue = m6812_prologue; |
5d1a66bd SC |
1055 | break; |
1056 | ||
1057 | default: | |
1058 | break; | |
1059 | } | |
1060 | ||
82c230c2 SC |
1061 | /* Initially set everything according to the ABI. */ |
1062 | set_gdbarch_short_bit (gdbarch, 16); | |
1063 | set_gdbarch_int_bit (gdbarch, 32); | |
1064 | set_gdbarch_float_bit (gdbarch, 32); | |
1065 | set_gdbarch_double_bit (gdbarch, 64); | |
1066 | set_gdbarch_long_double_bit (gdbarch, 64); | |
1067 | set_gdbarch_long_bit (gdbarch, 32); | |
1068 | set_gdbarch_ptr_bit (gdbarch, 16); | |
1069 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1070 | ||
1071 | /* Set register info. */ | |
1072 | set_gdbarch_fp0_regnum (gdbarch, -1); | |
1073 | set_gdbarch_max_register_raw_size (gdbarch, 2); | |
1074 | set_gdbarch_max_register_virtual_size (gdbarch, 2); | |
1075 | set_gdbarch_register_raw_size (gdbarch, m68hc11_register_raw_size); | |
1076 | set_gdbarch_register_virtual_size (gdbarch, m68hc11_register_raw_size); | |
1077 | set_gdbarch_register_byte (gdbarch, m68hc11_register_byte); | |
1078 | set_gdbarch_frame_init_saved_regs (gdbarch, m68hc11_frame_init_saved_regs); | |
1079 | set_gdbarch_frame_args_skip (gdbarch, 0); | |
1080 | ||
1081 | set_gdbarch_read_pc (gdbarch, generic_target_read_pc); | |
1082 | set_gdbarch_write_pc (gdbarch, generic_target_write_pc); | |
1083 | set_gdbarch_read_fp (gdbarch, generic_target_read_fp); | |
1084 | set_gdbarch_write_fp (gdbarch, generic_target_write_fp); | |
1085 | set_gdbarch_read_sp (gdbarch, generic_target_read_sp); | |
1086 | set_gdbarch_write_sp (gdbarch, generic_target_write_sp); | |
1087 | ||
1088 | set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS); | |
1089 | set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS); | |
1090 | set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM); | |
1091 | set_gdbarch_fp_regnum (gdbarch, SOFT_FP_REGNUM); | |
1092 | set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM); | |
1093 | set_gdbarch_register_name (gdbarch, m68hc11_register_name); | |
1094 | set_gdbarch_register_size (gdbarch, 2); | |
1095 | set_gdbarch_register_bytes (gdbarch, M68HC11_ALL_REGS * 2); | |
1096 | set_gdbarch_register_virtual_type (gdbarch, m68hc11_register_virtual_type); | |
1097 | set_gdbarch_fetch_pseudo_register (gdbarch, m68hc11_fetch_pseudo_register); | |
1098 | set_gdbarch_store_pseudo_register (gdbarch, m68hc11_store_pseudo_register); | |
1099 | ||
1100 | set_gdbarch_use_generic_dummy_frames (gdbarch, 1); | |
1101 | set_gdbarch_call_dummy_length (gdbarch, 0); | |
1102 | set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); | |
1103 | set_gdbarch_call_dummy_address (gdbarch, m68hc11_call_dummy_address); | |
1104 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/ | |
1105 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); | |
1106 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); | |
1107 | set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy); | |
1108 | set_gdbarch_call_dummy_words (gdbarch, m68hc11_call_dummy_words); | |
1109 | set_gdbarch_sizeof_call_dummy_words (gdbarch, | |
1110 | sizeof (m68hc11_call_dummy_words)); | |
1111 | set_gdbarch_call_dummy_p (gdbarch, 1); | |
1112 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); | |
1113 | set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register); | |
1114 | set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy); | |
1115 | set_gdbarch_extract_return_value (gdbarch, m68hc11_extract_return_value); | |
1116 | set_gdbarch_push_arguments (gdbarch, m68hc11_push_arguments); | |
1117 | set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); | |
1118 | set_gdbarch_push_return_address (gdbarch, m68hc11_push_return_address); | |
1119 | set_gdbarch_return_value_on_stack (gdbarch, m68hc11_return_value_on_stack); | |
1120 | ||
1121 | set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return); | |
1122 | set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value); | |
1123 | set_gdbarch_extract_struct_value_address (gdbarch, | |
1124 | m68hc11_extract_struct_value_address); | |
1125 | set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not); | |
1126 | ||
1127 | ||
1128 | set_gdbarch_frame_chain (gdbarch, m68hc11_frame_chain); | |
1129 | set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid); | |
1130 | set_gdbarch_frame_saved_pc (gdbarch, m68hc11_frame_saved_pc); | |
1131 | set_gdbarch_frame_args_address (gdbarch, m68hc11_frame_args_address); | |
1132 | set_gdbarch_frame_locals_address (gdbarch, m68hc11_frame_locals_address); | |
1133 | set_gdbarch_saved_pc_after_call (gdbarch, m68hc11_saved_pc_after_call); | |
1134 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); | |
1135 | ||
1136 | set_gdbarch_frame_chain_valid (gdbarch, func_frame_chain_valid); | |
1137 | set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register); | |
1138 | ||
1139 | set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return); | |
1140 | set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value); | |
1141 | set_gdbarch_extract_struct_value_address | |
1142 | (gdbarch, m68hc11_extract_struct_value_address); | |
1143 | set_gdbarch_use_struct_convention (gdbarch, m68hc11_use_struct_convention); | |
1144 | set_gdbarch_init_extra_frame_info (gdbarch, m68hc11_init_extra_frame_info); | |
1145 | set_gdbarch_pop_frame (gdbarch, m68hc11_pop_frame); | |
1146 | set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue); | |
1147 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1148 | set_gdbarch_decr_pc_after_break (gdbarch, 0); | |
1149 | set_gdbarch_function_start_offset (gdbarch, 0); | |
1150 | set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc); | |
22df305e | 1151 | set_gdbarch_stack_align (gdbarch, m68hc11_stack_align); |
82c230c2 SC |
1152 | |
1153 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); | |
1154 | set_gdbarch_ieee_float (gdbarch, 1); | |
1155 | ||
1156 | return gdbarch; | |
78073dd8 AC |
1157 | } |
1158 | ||
1159 | void | |
fba45db2 | 1160 | _initialize_m68hc11_tdep (void) |
78073dd8 | 1161 | { |
82c230c2 | 1162 | register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init); |
ea3881d9 | 1163 | register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init); |
82c230c2 | 1164 | if (!tm_print_insn) /* Someone may have already set it */ |
ea3881d9 | 1165 | tm_print_insn = gdb_print_insn_m68hc11; |
78073dd8 AC |
1166 | |
1167 | add_com ("regs", class_vars, show_regs, "Print all registers"); | |
1168 | } | |
1169 |