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c906108c SS |
1 | /* Target-machine dependent code for Motorola 88000 series, for GDB. |
2 | Copyright 1988, 1990, 1991, 1994, 1995 Free Software Foundation, Inc. | |
3 | ||
c5aa993b | 4 | This file is part of GDB. |
c906108c | 5 | |
c5aa993b JM |
6 | This program is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
c906108c | 10 | |
c5aa993b JM |
11 | This program is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
c906108c | 15 | |
c5aa993b JM |
16 | You should have received a copy of the GNU General Public License |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
20 | |
21 | #include "defs.h" | |
22 | #include "frame.h" | |
23 | #include "inferior.h" | |
24 | #include "value.h" | |
25 | #include "gdbcore.h" | |
26 | #include "symtab.h" | |
27 | #include "setjmp.h" | |
28 | #include "value.h" | |
29 | ||
30 | /* Size of an instruction */ | |
31 | #define BYTES_PER_88K_INSN 4 | |
32 | ||
33 | void frame_find_saved_regs (); | |
34 | ||
35 | /* Is this target an m88110? Otherwise assume m88100. This has | |
36 | relevance for the ways in which we screw with instruction pointers. */ | |
37 | ||
38 | int target_is_m88110 = 0; | |
39 | ||
40 | /* The m88k kernel aligns all instructions on 4-byte boundaries. The | |
41 | kernel also uses the least significant two bits for its own hocus | |
42 | pocus. When gdb receives an address from the kernel, it needs to | |
43 | preserve those right-most two bits, but gdb also needs to be careful | |
44 | to realize that those two bits are not really a part of the address | |
45 | of an instruction. Shrug. */ | |
46 | ||
47 | CORE_ADDR | |
fba45db2 | 48 | m88k_addr_bits_remove (CORE_ADDR addr) |
c906108c SS |
49 | { |
50 | return ((addr) & ~3); | |
51 | } | |
52 | ||
53 | ||
54 | /* Given a GDB frame, determine the address of the calling function's frame. | |
55 | This will be used to create a new GDB frame struct, and then | |
56 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. | |
57 | ||
58 | For us, the frame address is its stack pointer value, so we look up | |
59 | the function prologue to determine the caller's sp value, and return it. */ | |
60 | ||
61 | CORE_ADDR | |
fba45db2 | 62 | frame_chain (struct frame_info *thisframe) |
c906108c SS |
63 | { |
64 | ||
65 | frame_find_saved_regs (thisframe, (struct frame_saved_regs *) 0); | |
66 | /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not | |
c5aa993b JM |
67 | the ADDRESS, of SP_REGNUM. It also depends on the cache of |
68 | frame_find_saved_regs results. */ | |
c906108c SS |
69 | if (thisframe->fsr->regs[SP_REGNUM]) |
70 | return thisframe->fsr->regs[SP_REGNUM]; | |
71 | else | |
72 | return thisframe->frame; /* Leaf fn -- next frame up has same SP. */ | |
73 | } | |
74 | ||
75 | int | |
fba45db2 | 76 | frameless_function_invocation (struct frame_info *frame) |
c906108c SS |
77 | { |
78 | ||
79 | frame_find_saved_regs (frame, (struct frame_saved_regs *) 0); | |
80 | /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not | |
c5aa993b JM |
81 | the ADDRESS, of SP_REGNUM. It also depends on the cache of |
82 | frame_find_saved_regs results. */ | |
c906108c SS |
83 | if (frame->fsr->regs[SP_REGNUM]) |
84 | return 0; /* Frameful -- return addr saved somewhere */ | |
85 | else | |
86 | return 1; /* Frameless -- no saved return address */ | |
87 | } | |
88 | ||
89 | void | |
fba45db2 | 90 | init_extra_frame_info (int fromleaf, struct frame_info *frame) |
c906108c | 91 | { |
c5aa993b JM |
92 | frame->fsr = 0; /* Not yet allocated */ |
93 | frame->args_pointer = 0; /* Unknown */ | |
c906108c SS |
94 | frame->locals_pointer = 0; /* Unknown */ |
95 | } | |
96 | \f | |
97 | /* Examine an m88k function prologue, recording the addresses at which | |
98 | registers are saved explicitly by the prologue code, and returning | |
99 | the address of the first instruction after the prologue (but not | |
100 | after the instruction at address LIMIT, as explained below). | |
101 | ||
102 | LIMIT places an upper bound on addresses of the instructions to be | |
103 | examined. If the prologue code scan reaches LIMIT, the scan is | |
104 | aborted and LIMIT is returned. This is used, when examining the | |
105 | prologue for the current frame, to keep examine_prologue () from | |
106 | claiming that a given register has been saved when in fact the | |
107 | instruction that saves it has not yet been executed. LIMIT is used | |
108 | at other times to stop the scan when we hit code after the true | |
109 | function prologue (e.g. for the first source line) which might | |
110 | otherwise be mistaken for function prologue. | |
111 | ||
112 | The format of the function prologue matched by this routine is | |
113 | derived from examination of the source to gcc 1.95, particularly | |
114 | the routine output_prologue () in config/out-m88k.c. | |
115 | ||
c5aa993b | 116 | subu r31,r31,n # stack pointer update |
c906108c | 117 | |
c5aa993b | 118 | (st rn,r31,offset)? # save incoming regs |
c906108c SS |
119 | (st.d rn,r31,offset)? |
120 | ||
c5aa993b | 121 | (addu r30,r31,n)? # frame pointer update |
c906108c | 122 | |
c5aa993b | 123 | (pic sequence)? # PIC code prologue |
c906108c | 124 | |
c5aa993b JM |
125 | (or rn,rm,0)? # Move parameters to other regs |
126 | */ | |
c906108c SS |
127 | |
128 | /* Macros for extracting fields from instructions. */ | |
129 | ||
130 | #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos)) | |
131 | #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width)) | |
132 | #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF)) | |
133 | #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF)) | |
134 | #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5) | |
135 | #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF)) | |
136 | ||
137 | /* | |
138 | * prologue_insn_tbl is a table of instructions which may comprise a | |
139 | * function prologue. Associated with each table entry (corresponding | |
140 | * to a single instruction or group of instructions), is an action. | |
141 | * This action is used by examine_prologue (below) to determine | |
142 | * the state of certain machine registers and where the stack frame lives. | |
143 | */ | |
144 | ||
c5aa993b JM |
145 | enum prologue_insn_action |
146 | { | |
c906108c SS |
147 | PIA_SKIP, /* don't care what the instruction does */ |
148 | PIA_NOTE_ST, /* note register stored and where */ | |
149 | PIA_NOTE_STD, /* note pair of registers stored and where */ | |
150 | PIA_NOTE_SP_ADJUSTMENT, /* note stack pointer adjustment */ | |
151 | PIA_NOTE_FP_ASSIGNMENT, /* note frame pointer assignment */ | |
152 | PIA_NOTE_PROLOGUE_END, /* no more prologue */ | |
153 | }; | |
154 | ||
c5aa993b JM |
155 | struct prologue_insns |
156 | { | |
c906108c SS |
157 | unsigned long insn; |
158 | unsigned long mask; | |
159 | enum prologue_insn_action action; | |
c5aa993b | 160 | }; |
c906108c | 161 | |
c5aa993b JM |
162 | struct prologue_insns prologue_insn_tbl[] = |
163 | { | |
c906108c | 164 | /* Various register move instructions */ |
c5aa993b JM |
165 | {0x58000000, 0xf800ffff, PIA_SKIP}, /* or/or.u with immed of 0 */ |
166 | {0xf4005800, 0xfc1fffe0, PIA_SKIP}, /* or rd, r0, rs */ | |
167 | {0xf4005800, 0xfc00ffff, PIA_SKIP}, /* or rd, rs, r0 */ | |
c906108c SS |
168 | |
169 | /* Stack pointer setup: "subu sp, sp, n" where n is a multiple of 8 */ | |
c5aa993b | 170 | {0x67ff0000, 0xffff0007, PIA_NOTE_SP_ADJUSTMENT}, |
c906108c SS |
171 | |
172 | /* Frame pointer assignment: "addu r30, r31, n" */ | |
c5aa993b | 173 | {0x63df0000, 0xffff0000, PIA_NOTE_FP_ASSIGNMENT}, |
c906108c SS |
174 | |
175 | /* Store to stack instructions; either "st rx, sp, n" or "st.d rx, sp, n" */ | |
c5aa993b JM |
176 | {0x241f0000, 0xfc1f0000, PIA_NOTE_ST}, /* st rx, sp, n */ |
177 | {0x201f0000, 0xfc1f0000, PIA_NOTE_STD}, /* st.d rs, sp, n */ | |
c906108c SS |
178 | |
179 | /* Instructions needed for setting up r25 for pic code. */ | |
c5aa993b JM |
180 | {0x5f200000, 0xffff0000, PIA_SKIP}, /* or.u r25, r0, offset_high */ |
181 | {0xcc000002, 0xffffffff, PIA_SKIP}, /* bsr.n Lab */ | |
182 | {0x5b390000, 0xffff0000, PIA_SKIP}, /* or r25, r25, offset_low */ | |
183 | {0xf7396001, 0xffffffff, PIA_SKIP}, /* Lab: addu r25, r25, r1 */ | |
c906108c SS |
184 | |
185 | /* Various branch or jump instructions which have a delay slot -- these | |
186 | do not form part of the prologue, but the instruction in the delay | |
187 | slot might be a store instruction which should be noted. */ | |
c5aa993b JM |
188 | {0xc4000000, 0xe4000000, PIA_NOTE_PROLOGUE_END}, |
189 | /* br.n, bsr.n, bb0.n, or bb1.n */ | |
190 | {0xec000000, 0xfc000000, PIA_NOTE_PROLOGUE_END}, /* bcnd.n */ | |
191 | {0xf400c400, 0xfffff7e0, PIA_NOTE_PROLOGUE_END} /* jmp.n or jsr.n */ | |
c906108c SS |
192 | |
193 | }; | |
194 | ||
195 | ||
196 | /* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or | |
197 | is not the address of a valid instruction, the address of the next | |
198 | instruction beyond ADDR otherwise. *PWORD1 receives the first word | |
199 | of the instruction. */ | |
200 | ||
201 | #define NEXT_PROLOGUE_INSN(addr, lim, pword1) \ | |
202 | (((addr) < (lim)) ? next_insn (addr, pword1) : 0) | |
203 | ||
204 | /* Read the m88k instruction at 'memaddr' and return the address of | |
205 | the next instruction after that, or 0 if 'memaddr' is not the | |
206 | address of a valid instruction. The instruction | |
207 | is stored at 'pword1'. */ | |
208 | ||
209 | CORE_ADDR | |
fba45db2 | 210 | next_insn (CORE_ADDR memaddr, unsigned long *pword1) |
c906108c SS |
211 | { |
212 | *pword1 = read_memory_integer (memaddr, BYTES_PER_88K_INSN); | |
213 | return memaddr + BYTES_PER_88K_INSN; | |
214 | } | |
215 | ||
216 | /* Read a register from frames called by us (or from the hardware regs). */ | |
217 | ||
218 | static int | |
fba45db2 | 219 | read_next_frame_reg (struct frame_info *frame, int regno) |
c906108c | 220 | { |
c5aa993b JM |
221 | for (; frame; frame = frame->next) |
222 | { | |
c906108c SS |
223 | if (regno == SP_REGNUM) |
224 | return FRAME_FP (frame); | |
225 | else if (frame->fsr->regs[regno]) | |
c5aa993b JM |
226 | return read_memory_integer (frame->fsr->regs[regno], 4); |
227 | } | |
228 | return read_register (regno); | |
c906108c SS |
229 | } |
230 | ||
231 | /* Examine the prologue of a function. `ip' points to the first instruction. | |
232 | `limit' is the limit of the prologue (e.g. the addr of the first | |
233 | linenumber, or perhaps the program counter if we're stepping through). | |
234 | `frame_sp' is the stack pointer value in use in this frame. | |
235 | `fsr' is a pointer to a frame_saved_regs structure into which we put | |
236 | info about the registers saved by this frame. | |
237 | `fi' is a struct frame_info pointer; we fill in various fields in it | |
238 | to reflect the offsets of the arg pointer and the locals pointer. */ | |
239 | ||
240 | static CORE_ADDR | |
fba45db2 KB |
241 | examine_prologue (register CORE_ADDR ip, register CORE_ADDR limit, |
242 | CORE_ADDR frame_sp, struct frame_saved_regs *fsr, | |
243 | struct frame_info *fi) | |
c906108c SS |
244 | { |
245 | register CORE_ADDR next_ip; | |
246 | register int src; | |
247 | unsigned int insn; | |
248 | int size, offset; | |
249 | char must_adjust[32]; /* If set, must adjust offsets in fsr */ | |
250 | int sp_offset = -1; /* -1 means not set (valid must be mult of 8) */ | |
251 | int fp_offset = -1; /* -1 means not set */ | |
252 | CORE_ADDR frame_fp; | |
253 | CORE_ADDR prologue_end = 0; | |
254 | ||
255 | memset (must_adjust, '\0', sizeof (must_adjust)); | |
256 | next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn); | |
257 | ||
258 | while (next_ip) | |
259 | { | |
c5aa993b | 260 | struct prologue_insns *pip; |
c906108c | 261 | |
c5aa993b JM |
262 | for (pip = prologue_insn_tbl; (insn & pip->mask) != pip->insn;) |
263 | if (++pip >= prologue_insn_tbl + sizeof prologue_insn_tbl) | |
264 | goto end_of_prologue_found; /* not a prologue insn */ | |
c906108c SS |
265 | |
266 | switch (pip->action) | |
267 | { | |
c5aa993b JM |
268 | case PIA_NOTE_ST: |
269 | case PIA_NOTE_STD: | |
270 | if (sp_offset != -1) | |
271 | { | |
272 | src = ST_SRC (insn); | |
273 | offset = ST_OFFSET (insn); | |
274 | must_adjust[src] = 1; | |
275 | fsr->regs[src++] = offset; /* Will be adjusted later */ | |
276 | if (pip->action == PIA_NOTE_STD && src < 32) | |
277 | { | |
278 | offset += 4; | |
279 | must_adjust[src] = 1; | |
280 | fsr->regs[src++] = offset; | |
281 | } | |
c906108c | 282 | } |
c5aa993b JM |
283 | else |
284 | goto end_of_prologue_found; | |
285 | break; | |
286 | case PIA_NOTE_SP_ADJUSTMENT: | |
287 | if (sp_offset == -1) | |
288 | sp_offset = -SUBU_OFFSET (insn); | |
289 | else | |
290 | goto end_of_prologue_found; | |
291 | break; | |
292 | case PIA_NOTE_FP_ASSIGNMENT: | |
293 | if (fp_offset == -1) | |
294 | fp_offset = ADDU_OFFSET (insn); | |
295 | else | |
296 | goto end_of_prologue_found; | |
297 | break; | |
298 | case PIA_NOTE_PROLOGUE_END: | |
299 | if (!prologue_end) | |
300 | prologue_end = ip; | |
301 | break; | |
302 | case PIA_SKIP: | |
303 | default: | |
304 | /* Do nothing */ | |
305 | break; | |
c906108c SS |
306 | } |
307 | ||
308 | ip = next_ip; | |
309 | next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn); | |
310 | } | |
311 | ||
312 | end_of_prologue_found: | |
313 | ||
c5aa993b JM |
314 | if (prologue_end) |
315 | ip = prologue_end; | |
c906108c SS |
316 | |
317 | /* We're done with the prologue. If we don't care about the stack | |
318 | frame itself, just return. (Note that fsr->regs has been trashed, | |
319 | but the one caller who calls with fi==0 passes a dummy there.) */ | |
320 | ||
321 | if (fi == 0) | |
322 | return ip; | |
323 | ||
324 | /* | |
325 | OK, now we have: | |
326 | ||
c5aa993b JM |
327 | sp_offset original (before any alloca calls) displacement of SP |
328 | (will be negative). | |
c906108c | 329 | |
c5aa993b JM |
330 | fp_offset displacement from original SP to the FP for this frame |
331 | or -1. | |
c906108c | 332 | |
c5aa993b JM |
333 | fsr->regs[0..31] displacement from original SP to the stack |
334 | location where reg[0..31] is stored. | |
c906108c | 335 | |
c5aa993b | 336 | must_adjust[0..31] set if corresponding offset was set. |
c906108c SS |
337 | |
338 | If alloca has been called between the function prologue and the current | |
339 | IP, then the current SP (frame_sp) will not be the original SP as set by | |
340 | the function prologue. If the current SP is not the original SP, then the | |
341 | compiler will have allocated an FP for this frame, fp_offset will be set, | |
342 | and we can use it to calculate the original SP. | |
343 | ||
344 | Then, we figure out where the arguments and locals are, and relocate the | |
345 | offsets in fsr->regs to absolute addresses. */ | |
346 | ||
c5aa993b JM |
347 | if (fp_offset != -1) |
348 | { | |
349 | /* We have a frame pointer, so get it, and base our calc's on it. */ | |
350 | frame_fp = (CORE_ADDR) read_next_frame_reg (fi->next, ACTUAL_FP_REGNUM); | |
351 | frame_sp = frame_fp - fp_offset; | |
352 | } | |
353 | else | |
354 | { | |
355 | /* We have no frame pointer, therefore frame_sp is still the same value | |
356 | as set by prologue. But where is the frame itself? */ | |
357 | if (must_adjust[SRP_REGNUM]) | |
358 | { | |
359 | /* Function header saved SRP (r1), the return address. Frame starts | |
360 | 4 bytes down from where it was saved. */ | |
361 | frame_fp = frame_sp + fsr->regs[SRP_REGNUM] - 4; | |
362 | fi->locals_pointer = frame_fp; | |
363 | } | |
364 | else | |
365 | { | |
366 | /* Function header didn't save SRP (r1), so we are in a leaf fn or | |
367 | are otherwise confused. */ | |
368 | frame_fp = -1; | |
369 | } | |
c906108c | 370 | } |
c906108c SS |
371 | |
372 | /* The locals are relative to the FP (whether it exists as an allocated | |
373 | register, or just as an assumed offset from the SP) */ | |
374 | fi->locals_pointer = frame_fp; | |
375 | ||
376 | /* The arguments are just above the SP as it was before we adjusted it | |
377 | on entry. */ | |
378 | fi->args_pointer = frame_sp - sp_offset; | |
379 | ||
380 | /* Now that we know the SP value used by the prologue, we know where | |
381 | it saved all the registers. */ | |
382 | for (src = 0; src < 32; src++) | |
383 | if (must_adjust[src]) | |
384 | fsr->regs[src] += frame_sp; | |
c5aa993b | 385 | |
c906108c SS |
386 | /* The saved value of the SP is always known. */ |
387 | /* (we hope...) */ | |
c5aa993b JM |
388 | if (fsr->regs[SP_REGNUM] != 0 |
389 | && fsr->regs[SP_REGNUM] != frame_sp - sp_offset) | |
390 | fprintf_unfiltered (gdb_stderr, "Bad saved SP value %x != %x, offset %x!\n", | |
391 | fsr->regs[SP_REGNUM], | |
392 | frame_sp - sp_offset, sp_offset); | |
c906108c SS |
393 | |
394 | fsr->regs[SP_REGNUM] = frame_sp - sp_offset; | |
395 | ||
396 | return (ip); | |
397 | } | |
398 | ||
399 | /* Given an ip value corresponding to the start of a function, | |
400 | return the ip of the first instruction after the function | |
401 | prologue. */ | |
402 | ||
403 | CORE_ADDR | |
b83266a0 | 404 | m88k_skip_prologue (ip) |
c5aa993b | 405 | CORE_ADDR (ip); |
c906108c SS |
406 | { |
407 | struct frame_saved_regs saved_regs_dummy; | |
408 | struct symtab_and_line sal; | |
409 | CORE_ADDR limit; | |
410 | ||
411 | sal = find_pc_line (ip, 0); | |
412 | limit = (sal.end) ? sal.end : 0xffffffff; | |
413 | ||
414 | return (examine_prologue (ip, limit, (CORE_ADDR) 0, &saved_regs_dummy, | |
c5aa993b | 415 | (struct frame_info *) 0)); |
c906108c SS |
416 | } |
417 | ||
418 | /* Put here the code to store, into a struct frame_saved_regs, | |
419 | the addresses of the saved registers of frame described by FRAME_INFO. | |
420 | This includes special registers such as pc and fp saved in special | |
421 | ways in the stack frame. sp is even more special: | |
422 | the address we return for it IS the sp for the next frame. | |
423 | ||
424 | We cache the result of doing this in the frame_obstack, since it is | |
425 | fairly expensive. */ | |
426 | ||
427 | void | |
fba45db2 | 428 | frame_find_saved_regs (struct frame_info *fi, struct frame_saved_regs *fsr) |
c906108c SS |
429 | { |
430 | register struct frame_saved_regs *cache_fsr; | |
431 | CORE_ADDR ip; | |
432 | struct symtab_and_line sal; | |
433 | CORE_ADDR limit; | |
434 | ||
435 | if (!fi->fsr) | |
436 | { | |
437 | cache_fsr = (struct frame_saved_regs *) | |
438 | frame_obstack_alloc (sizeof (struct frame_saved_regs)); | |
439 | memset (cache_fsr, '\0', sizeof (struct frame_saved_regs)); | |
440 | fi->fsr = cache_fsr; | |
441 | ||
442 | /* Find the start and end of the function prologue. If the PC | |
c5aa993b JM |
443 | is in the function prologue, we only consider the part that |
444 | has executed already. In the case where the PC is not in | |
445 | the function prologue, we set limit to two instructions beyond | |
446 | where the prologue ends in case if any of the prologue instructions | |
447 | were moved into a delay slot of a branch instruction. */ | |
448 | ||
c906108c SS |
449 | ip = get_pc_function_start (fi->pc); |
450 | sal = find_pc_line (ip, 0); | |
c5aa993b JM |
451 | limit = (sal.end && sal.end < fi->pc) ? sal.end + 2 * BYTES_PER_88K_INSN |
452 | : fi->pc; | |
c906108c SS |
453 | |
454 | /* This will fill in fields in *fi as well as in cache_fsr. */ | |
455 | #ifdef SIGTRAMP_FRAME_FIXUP | |
456 | if (fi->signal_handler_caller) | |
c5aa993b | 457 | SIGTRAMP_FRAME_FIXUP (fi->frame); |
c906108c SS |
458 | #endif |
459 | examine_prologue (ip, limit, fi->frame, cache_fsr, fi); | |
460 | #ifdef SIGTRAMP_SP_FIXUP | |
461 | if (fi->signal_handler_caller && fi->fsr->regs[SP_REGNUM]) | |
c5aa993b | 462 | SIGTRAMP_SP_FIXUP (fi->fsr->regs[SP_REGNUM]); |
c906108c SS |
463 | #endif |
464 | } | |
465 | ||
466 | if (fsr) | |
467 | *fsr = *fi->fsr; | |
468 | } | |
469 | ||
470 | /* Return the address of the locals block for the frame | |
471 | described by FI. Returns 0 if the address is unknown. | |
472 | NOTE! Frame locals are referred to by negative offsets from the | |
473 | argument pointer, so this is the same as frame_args_address(). */ | |
474 | ||
475 | CORE_ADDR | |
fba45db2 | 476 | frame_locals_address (struct frame_info *fi) |
c906108c SS |
477 | { |
478 | struct frame_saved_regs fsr; | |
479 | ||
c5aa993b | 480 | if (fi->args_pointer) /* Cached value is likely there. */ |
c906108c SS |
481 | return fi->args_pointer; |
482 | ||
483 | /* Nope, generate it. */ | |
484 | ||
485 | get_frame_saved_regs (fi, &fsr); | |
486 | ||
487 | return fi->args_pointer; | |
488 | } | |
489 | ||
490 | /* Return the address of the argument block for the frame | |
491 | described by FI. Returns 0 if the address is unknown. */ | |
492 | ||
493 | CORE_ADDR | |
fba45db2 | 494 | frame_args_address (struct frame_info *fi) |
c906108c SS |
495 | { |
496 | struct frame_saved_regs fsr; | |
497 | ||
498 | if (fi->args_pointer) /* Cached value is likely there. */ | |
499 | return fi->args_pointer; | |
500 | ||
501 | /* Nope, generate it. */ | |
502 | ||
503 | get_frame_saved_regs (fi, &fsr); | |
504 | ||
505 | return fi->args_pointer; | |
506 | } | |
507 | ||
508 | /* Return the saved PC from this frame. | |
509 | ||
510 | If the frame has a memory copy of SRP_REGNUM, use that. If not, | |
511 | just use the register SRP_REGNUM itself. */ | |
512 | ||
513 | CORE_ADDR | |
fba45db2 | 514 | frame_saved_pc (struct frame_info *frame) |
c906108c | 515 | { |
c5aa993b | 516 | return read_next_frame_reg (frame, SRP_REGNUM); |
c906108c SS |
517 | } |
518 | ||
519 | ||
520 | #define DUMMY_FRAME_SIZE 192 | |
521 | ||
522 | static void | |
fba45db2 | 523 | write_word (CORE_ADDR sp, ULONGEST word) |
c906108c SS |
524 | { |
525 | register int len = REGISTER_SIZE; | |
526 | char buffer[MAX_REGISTER_RAW_SIZE]; | |
527 | ||
528 | store_unsigned_integer (buffer, len, word); | |
529 | write_memory (sp, buffer, len); | |
530 | } | |
531 | ||
532 | void | |
fba45db2 | 533 | m88k_push_dummy_frame (void) |
c906108c SS |
534 | { |
535 | register CORE_ADDR sp = read_register (SP_REGNUM); | |
536 | register int rn; | |
537 | int offset; | |
538 | ||
539 | sp -= DUMMY_FRAME_SIZE; /* allocate a bunch of space */ | |
540 | ||
c5aa993b JM |
541 | for (rn = 0, offset = 0; rn <= SP_REGNUM; rn++, offset += 4) |
542 | write_word (sp + offset, read_register (rn)); | |
543 | ||
544 | write_word (sp + offset, read_register (SXIP_REGNUM)); | |
c906108c SS |
545 | offset += 4; |
546 | ||
c5aa993b | 547 | write_word (sp + offset, read_register (SNIP_REGNUM)); |
c906108c SS |
548 | offset += 4; |
549 | ||
c5aa993b | 550 | write_word (sp + offset, read_register (SFIP_REGNUM)); |
c906108c SS |
551 | offset += 4; |
552 | ||
c5aa993b | 553 | write_word (sp + offset, read_register (PSR_REGNUM)); |
c906108c SS |
554 | offset += 4; |
555 | ||
c5aa993b | 556 | write_word (sp + offset, read_register (FPSR_REGNUM)); |
c906108c SS |
557 | offset += 4; |
558 | ||
c5aa993b | 559 | write_word (sp + offset, read_register (FPCR_REGNUM)); |
c906108c SS |
560 | offset += 4; |
561 | ||
562 | write_register (SP_REGNUM, sp); | |
563 | write_register (ACTUAL_FP_REGNUM, sp); | |
564 | } | |
565 | ||
566 | void | |
fba45db2 | 567 | pop_frame (void) |
c906108c SS |
568 | { |
569 | register struct frame_info *frame = get_current_frame (); | |
570 | register CORE_ADDR fp; | |
571 | register int regnum; | |
572 | struct frame_saved_regs fsr; | |
573 | ||
574 | fp = FRAME_FP (frame); | |
575 | get_frame_saved_regs (frame, &fsr); | |
576 | ||
577 | if (PC_IN_CALL_DUMMY (read_pc (), read_register (SP_REGNUM), FRAME_FP (fi))) | |
578 | { | |
579 | /* FIXME: I think get_frame_saved_regs should be handling this so | |
c5aa993b JM |
580 | that we can deal with the saved registers properly (e.g. frame |
581 | 1 is a call dummy, the user types "frame 2" and then "print $ps"). */ | |
c906108c SS |
582 | register CORE_ADDR sp = read_register (ACTUAL_FP_REGNUM); |
583 | int offset; | |
584 | ||
c5aa993b JM |
585 | for (regnum = 0, offset = 0; regnum <= SP_REGNUM; regnum++, offset += 4) |
586 | (void) write_register (regnum, read_memory_integer (sp + offset, 4)); | |
587 | ||
588 | write_register (SXIP_REGNUM, read_memory_integer (sp + offset, 4)); | |
c906108c SS |
589 | offset += 4; |
590 | ||
c5aa993b | 591 | write_register (SNIP_REGNUM, read_memory_integer (sp + offset, 4)); |
c906108c SS |
592 | offset += 4; |
593 | ||
c5aa993b | 594 | write_register (SFIP_REGNUM, read_memory_integer (sp + offset, 4)); |
c906108c SS |
595 | offset += 4; |
596 | ||
c5aa993b | 597 | write_register (PSR_REGNUM, read_memory_integer (sp + offset, 4)); |
c906108c SS |
598 | offset += 4; |
599 | ||
c5aa993b | 600 | write_register (FPSR_REGNUM, read_memory_integer (sp + offset, 4)); |
c906108c SS |
601 | offset += 4; |
602 | ||
c5aa993b | 603 | write_register (FPCR_REGNUM, read_memory_integer (sp + offset, 4)); |
c906108c SS |
604 | offset += 4; |
605 | ||
606 | } | |
c5aa993b | 607 | else |
c906108c | 608 | { |
c5aa993b JM |
609 | for (regnum = FP_REGNUM; regnum > 0; regnum--) |
610 | if (fsr.regs[regnum]) | |
611 | write_register (regnum, | |
612 | read_memory_integer (fsr.regs[regnum], 4)); | |
c906108c SS |
613 | write_pc (frame_saved_pc (frame)); |
614 | } | |
615 | reinit_frame_cache (); | |
616 | } | |
617 | ||
618 | void | |
fba45db2 | 619 | _initialize_m88k_tdep (void) |
c906108c SS |
620 | { |
621 | tm_print_insn = print_insn_m88k; | |
622 | } |