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bf2ca189 MK |
1 | /* Target-dependent code for the Motorola 88000 series. |
2 | ||
32d0add0 | 3 | Copyright (C) 2004-2015 Free Software Foundation, Inc. |
bf2ca189 MK |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
bf2ca189 MK |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
bf2ca189 MK |
19 | |
20 | #include "defs.h" | |
21 | #include "arch-utils.h" | |
22 | #include "dis-asm.h" | |
23 | #include "frame.h" | |
24 | #include "frame-base.h" | |
25 | #include "frame-unwind.h" | |
26 | #include "gdbcore.h" | |
27 | #include "gdbtypes.h" | |
28 | #include "regcache.h" | |
29 | #include "regset.h" | |
30 | #include "symtab.h" | |
31 | #include "trad-frame.h" | |
32 | #include "value.h" | |
33 | ||
bf2ca189 MK |
34 | #include "m88k-tdep.h" |
35 | ||
36 | /* Fetch the instruction at PC. */ | |
37 | ||
38 | static unsigned long | |
e17a4113 | 39 | m88k_fetch_instruction (CORE_ADDR pc, enum bfd_endian byte_order) |
bf2ca189 | 40 | { |
e17a4113 | 41 | return read_memory_unsigned_integer (pc, 4, byte_order); |
bf2ca189 MK |
42 | } |
43 | ||
44 | /* Register information. */ | |
45 | ||
46 | /* Return the name of register REGNUM. */ | |
47 | ||
48 | static const char * | |
d93859e2 | 49 | m88k_register_name (struct gdbarch *gdbarch, int regnum) |
bf2ca189 MK |
50 | { |
51 | static char *register_names[] = | |
52 | { | |
53 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
54 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
55 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", | |
56 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", | |
57 | "epsr", "fpsr", "fpcr", "sxip", "snip", "sfip" | |
58 | }; | |
59 | ||
60 | if (regnum >= 0 && regnum < ARRAY_SIZE (register_names)) | |
61 | return register_names[regnum]; | |
62 | ||
63 | return NULL; | |
64 | } | |
65 | ||
66 | /* Return the GDB type object for the "standard" data type of data in | |
025bb325 | 67 | register REGNUM. */ |
bf2ca189 MK |
68 | |
69 | static struct type * | |
70 | m88k_register_type (struct gdbarch *gdbarch, int regnum) | |
71 | { | |
72 | /* SXIP, SNIP, SFIP and R1 contain code addresses. */ | |
73 | if ((regnum >= M88K_SXIP_REGNUM && regnum <= M88K_SFIP_REGNUM) | |
74 | || regnum == M88K_R1_REGNUM) | |
0dfff4cb | 75 | return builtin_type (gdbarch)->builtin_func_ptr; |
bf2ca189 MK |
76 | |
77 | /* R30 and R31 typically contains data addresses. */ | |
78 | if (regnum == M88K_R30_REGNUM || regnum == M88K_R31_REGNUM) | |
0dfff4cb | 79 | return builtin_type (gdbarch)->builtin_data_ptr; |
bf2ca189 | 80 | |
df4df182 | 81 | return builtin_type (gdbarch)->builtin_int32; |
bf2ca189 MK |
82 | } |
83 | \f | |
84 | ||
85 | static CORE_ADDR | |
24568a2c | 86 | m88k_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr) |
bf2ca189 MK |
87 | { |
88 | /* All instructures are 4-byte aligned. The lower 2 bits of SXIP, | |
89 | SNIP and SFIP are used for special purposes: bit 0 is the | |
90 | exception bit and bit 1 is the valid bit. */ | |
91 | return addr & ~0x3; | |
92 | } | |
93 | ||
94 | /* Use the program counter to determine the contents and size of a | |
95 | breakpoint instruction. Return a pointer to a string of bytes that | |
96 | encode a breakpoint instruction, store the length of the string in | |
97 | *LEN and optionally adjust *PC to point to the correct memory | |
98 | location for inserting the breakpoint. */ | |
99 | ||
8dccaca3 | 100 | static const gdb_byte * |
67d57894 | 101 | m88k_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len) |
bf2ca189 MK |
102 | { |
103 | /* tb 0,r0,511 */ | |
8dccaca3 | 104 | static gdb_byte break_insn[] = { 0xf0, 0x00, 0xd1, 0xff }; |
bf2ca189 MK |
105 | |
106 | *len = sizeof (break_insn); | |
107 | return break_insn; | |
108 | } | |
109 | ||
110 | static CORE_ADDR | |
111 | m88k_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
112 | { | |
113 | CORE_ADDR pc; | |
114 | ||
115 | pc = frame_unwind_register_unsigned (next_frame, M88K_SXIP_REGNUM); | |
24568a2c | 116 | return m88k_addr_bits_remove (gdbarch, pc); |
bf2ca189 MK |
117 | } |
118 | ||
119 | static void | |
61a1198a | 120 | m88k_write_pc (struct regcache *regcache, CORE_ADDR pc) |
bf2ca189 MK |
121 | { |
122 | /* According to the MC88100 RISC Microprocessor User's Manual, | |
123 | section 6.4.3.1.2: | |
124 | ||
125 | "... can be made to return to a particular instruction by placing | |
126 | a valid instruction address in the SNIP and the next sequential | |
127 | instruction address in the SFIP (with V bits set and E bits | |
128 | clear). The rte resumes execution at the instruction pointed to | |
129 | by the SNIP, then the SFIP." | |
130 | ||
131 | The E bit is the least significant bit (bit 0). The V (valid) | |
132 | bit is bit 1. This is why we logical or 2 into the values we are | |
133 | writing below. It turns out that SXIP plays no role when | |
134 | returning from an exception so nothing special has to be done | |
135 | with it. We could even (presumably) give it a totally bogus | |
136 | value. */ | |
137 | ||
61a1198a UW |
138 | regcache_cooked_write_unsigned (regcache, M88K_SXIP_REGNUM, pc); |
139 | regcache_cooked_write_unsigned (regcache, M88K_SNIP_REGNUM, pc | 2); | |
140 | regcache_cooked_write_unsigned (regcache, M88K_SFIP_REGNUM, (pc + 4) | 2); | |
bf2ca189 MK |
141 | } |
142 | \f | |
143 | ||
144 | /* The functions on this page are intended to be used to classify | |
145 | function arguments. */ | |
146 | ||
147 | /* Check whether TYPE is "Integral or Pointer". */ | |
148 | ||
149 | static int | |
150 | m88k_integral_or_pointer_p (const struct type *type) | |
151 | { | |
152 | switch (TYPE_CODE (type)) | |
153 | { | |
154 | case TYPE_CODE_INT: | |
155 | case TYPE_CODE_BOOL: | |
156 | case TYPE_CODE_CHAR: | |
157 | case TYPE_CODE_ENUM: | |
158 | case TYPE_CODE_RANGE: | |
159 | { | |
160 | /* We have byte, half-word, word and extended-word/doubleword | |
161 | integral types. */ | |
162 | int len = TYPE_LENGTH (type); | |
163 | return (len == 1 || len == 2 || len == 4 || len == 8); | |
164 | } | |
165 | return 1; | |
166 | case TYPE_CODE_PTR: | |
167 | case TYPE_CODE_REF: | |
168 | { | |
169 | /* Allow only 32-bit pointers. */ | |
170 | return (TYPE_LENGTH (type) == 4); | |
171 | } | |
172 | return 1; | |
173 | default: | |
174 | break; | |
175 | } | |
176 | ||
177 | return 0; | |
178 | } | |
179 | ||
180 | /* Check whether TYPE is "Floating". */ | |
181 | ||
182 | static int | |
183 | m88k_floating_p (const struct type *type) | |
184 | { | |
185 | switch (TYPE_CODE (type)) | |
186 | { | |
187 | case TYPE_CODE_FLT: | |
188 | { | |
189 | int len = TYPE_LENGTH (type); | |
190 | return (len == 4 || len == 8); | |
191 | } | |
192 | default: | |
193 | break; | |
194 | } | |
195 | ||
196 | return 0; | |
197 | } | |
198 | ||
199 | /* Check whether TYPE is "Structure or Union". */ | |
200 | ||
201 | static int | |
202 | m88k_structure_or_union_p (const struct type *type) | |
203 | { | |
204 | switch (TYPE_CODE (type)) | |
205 | { | |
206 | case TYPE_CODE_STRUCT: | |
207 | case TYPE_CODE_UNION: | |
208 | return 1; | |
209 | default: | |
210 | break; | |
211 | } | |
212 | ||
213 | return 0; | |
214 | } | |
215 | ||
216 | /* Check whether TYPE has 8-byte alignment. */ | |
217 | ||
218 | static int | |
219 | m88k_8_byte_align_p (struct type *type) | |
220 | { | |
221 | if (m88k_structure_or_union_p (type)) | |
222 | { | |
223 | int i; | |
224 | ||
225 | for (i = 0; i < TYPE_NFIELDS (type); i++) | |
226 | { | |
227 | struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i)); | |
228 | ||
229 | if (m88k_8_byte_align_p (subtype)) | |
230 | return 1; | |
231 | } | |
232 | } | |
233 | ||
234 | if (m88k_integral_or_pointer_p (type) || m88k_floating_p (type)) | |
235 | return (TYPE_LENGTH (type) == 8); | |
236 | ||
237 | return 0; | |
238 | } | |
239 | ||
240 | /* Check whether TYPE can be passed in a register. */ | |
241 | ||
242 | static int | |
243 | m88k_in_register_p (struct type *type) | |
244 | { | |
245 | if (m88k_integral_or_pointer_p (type) || m88k_floating_p (type)) | |
246 | return 1; | |
247 | ||
248 | if (m88k_structure_or_union_p (type) && TYPE_LENGTH (type) == 4) | |
249 | return 1; | |
250 | ||
251 | return 0; | |
252 | } | |
253 | ||
254 | static CORE_ADDR | |
255 | m88k_store_arguments (struct regcache *regcache, int nargs, | |
256 | struct value **args, CORE_ADDR sp) | |
257 | { | |
df4df182 | 258 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
bf2ca189 MK |
259 | int num_register_words = 0; |
260 | int num_stack_words = 0; | |
261 | int i; | |
262 | ||
263 | for (i = 0; i < nargs; i++) | |
264 | { | |
4991999e | 265 | struct type *type = value_type (args[i]); |
bf2ca189 MK |
266 | int len = TYPE_LENGTH (type); |
267 | ||
268 | if (m88k_integral_or_pointer_p (type) && len < 4) | |
269 | { | |
df4df182 UW |
270 | args[i] = value_cast (builtin_type (gdbarch)->builtin_int32, |
271 | args[i]); | |
4991999e | 272 | type = value_type (args[i]); |
bf2ca189 MK |
273 | len = TYPE_LENGTH (type); |
274 | } | |
275 | ||
276 | if (m88k_in_register_p (type)) | |
277 | { | |
278 | int num_words = 0; | |
279 | ||
280 | if (num_register_words % 2 == 1 && m88k_8_byte_align_p (type)) | |
281 | num_words++; | |
282 | ||
283 | num_words += ((len + 3) / 4); | |
284 | if (num_register_words + num_words <= 8) | |
285 | { | |
286 | num_register_words += num_words; | |
287 | continue; | |
288 | } | |
289 | ||
290 | /* We've run out of available registers. Pass the argument | |
291 | on the stack. */ | |
292 | } | |
293 | ||
294 | if (num_stack_words % 2 == 1 && m88k_8_byte_align_p (type)) | |
295 | num_stack_words++; | |
296 | ||
297 | num_stack_words += ((len + 3) / 4); | |
298 | } | |
299 | ||
300 | /* Allocate stack space. */ | |
301 | sp = align_down (sp - 32 - num_stack_words * 4, 16); | |
302 | num_stack_words = num_register_words = 0; | |
303 | ||
304 | for (i = 0; i < nargs; i++) | |
305 | { | |
0fd88904 | 306 | const bfd_byte *valbuf = value_contents (args[i]); |
4991999e | 307 | struct type *type = value_type (args[i]); |
bf2ca189 MK |
308 | int len = TYPE_LENGTH (type); |
309 | int stack_word = num_stack_words; | |
310 | ||
311 | if (m88k_in_register_p (type)) | |
312 | { | |
313 | int register_word = num_register_words; | |
314 | ||
315 | if (register_word % 2 == 1 && m88k_8_byte_align_p (type)) | |
316 | register_word++; | |
317 | ||
318 | gdb_assert (len == 4 || len == 8); | |
319 | ||
320 | if (register_word + len / 8 < 8) | |
321 | { | |
322 | int regnum = M88K_R2_REGNUM + register_word; | |
323 | ||
324 | regcache_raw_write (regcache, regnum, valbuf); | |
325 | if (len > 4) | |
326 | regcache_raw_write (regcache, regnum + 1, valbuf + 4); | |
327 | ||
328 | num_register_words = (register_word + len / 4); | |
329 | continue; | |
330 | } | |
331 | } | |
332 | ||
333 | if (stack_word % 2 == -1 && m88k_8_byte_align_p (type)) | |
334 | stack_word++; | |
335 | ||
336 | write_memory (sp + stack_word * 4, valbuf, len); | |
337 | num_stack_words = (stack_word + (len + 3) / 4); | |
338 | } | |
339 | ||
340 | return sp; | |
341 | } | |
342 | ||
343 | static CORE_ADDR | |
7d9b040b | 344 | m88k_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
bf2ca189 MK |
345 | struct regcache *regcache, CORE_ADDR bp_addr, int nargs, |
346 | struct value **args, CORE_ADDR sp, int struct_return, | |
347 | CORE_ADDR struct_addr) | |
348 | { | |
349 | /* Set up the function arguments. */ | |
350 | sp = m88k_store_arguments (regcache, nargs, args, sp); | |
351 | gdb_assert (sp % 16 == 0); | |
352 | ||
353 | /* Store return value address. */ | |
354 | if (struct_return) | |
355 | regcache_raw_write_unsigned (regcache, M88K_R12_REGNUM, struct_addr); | |
356 | ||
357 | /* Store the stack pointer and return address in the appropriate | |
358 | registers. */ | |
359 | regcache_raw_write_unsigned (regcache, M88K_R31_REGNUM, sp); | |
360 | regcache_raw_write_unsigned (regcache, M88K_R1_REGNUM, bp_addr); | |
361 | ||
362 | /* Return the stack pointer. */ | |
363 | return sp; | |
364 | } | |
365 | ||
366 | static struct frame_id | |
ed0c3906 | 367 | m88k_dummy_id (struct gdbarch *arch, struct frame_info *this_frame) |
bf2ca189 MK |
368 | { |
369 | CORE_ADDR sp; | |
370 | ||
ed0c3906 UW |
371 | sp = get_frame_register_unsigned (this_frame, M88K_R31_REGNUM); |
372 | return frame_id_build (sp, get_frame_pc (this_frame)); | |
bf2ca189 MK |
373 | } |
374 | \f | |
375 | ||
376 | /* Determine, for architecture GDBARCH, how a return value of TYPE | |
377 | should be returned. If it is supposed to be returned in registers, | |
378 | and READBUF is non-zero, read the appropriate value from REGCACHE, | |
379 | and copy it into READBUF. If WRITEBUF is non-zero, write the value | |
380 | from WRITEBUF into REGCACHE. */ | |
381 | ||
382 | static enum return_value_convention | |
6a3a010b | 383 | m88k_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 CV |
384 | struct type *type, struct regcache *regcache, |
385 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
bf2ca189 MK |
386 | { |
387 | int len = TYPE_LENGTH (type); | |
8dccaca3 | 388 | gdb_byte buf[8]; |
bf2ca189 MK |
389 | |
390 | if (!m88k_integral_or_pointer_p (type) && !m88k_floating_p (type)) | |
391 | return RETURN_VALUE_STRUCT_CONVENTION; | |
392 | ||
393 | if (readbuf) | |
394 | { | |
395 | /* Read the contents of R2 and (if necessary) R3. */ | |
396 | regcache_cooked_read (regcache, M88K_R2_REGNUM, buf); | |
397 | if (len > 4) | |
398 | { | |
399 | regcache_cooked_read (regcache, M88K_R3_REGNUM, buf + 4); | |
400 | gdb_assert (len == 8); | |
401 | memcpy (readbuf, buf, len); | |
402 | } | |
403 | else | |
404 | { | |
405 | /* Just stripping off any unused bytes should preserve the | |
406 | signed-ness just fine. */ | |
407 | memcpy (readbuf, buf + 4 - len, len); | |
408 | } | |
409 | } | |
410 | ||
411 | if (writebuf) | |
412 | { | |
413 | /* Read the contents to R2 and (if necessary) R3. */ | |
414 | if (len > 4) | |
415 | { | |
416 | gdb_assert (len == 8); | |
417 | memcpy (buf, writebuf, 8); | |
418 | regcache_cooked_write (regcache, M88K_R3_REGNUM, buf + 4); | |
419 | } | |
420 | else | |
421 | { | |
422 | /* ??? Do we need to do any sign-extension here? */ | |
423 | memcpy (buf + 4 - len, writebuf, len); | |
424 | } | |
425 | regcache_cooked_write (regcache, M88K_R2_REGNUM, buf); | |
426 | } | |
427 | ||
428 | return RETURN_VALUE_REGISTER_CONVENTION; | |
429 | } | |
430 | \f | |
431 | /* Default frame unwinder. */ | |
432 | ||
433 | struct m88k_frame_cache | |
434 | { | |
435 | /* Base address. */ | |
436 | CORE_ADDR base; | |
437 | CORE_ADDR pc; | |
438 | ||
439 | int sp_offset; | |
440 | int fp_offset; | |
441 | ||
442 | /* Table of saved registers. */ | |
443 | struct trad_frame_saved_reg *saved_regs; | |
444 | }; | |
445 | ||
446 | /* Prologue analysis. */ | |
447 | ||
448 | /* Macros for extracting fields from instructions. */ | |
449 | ||
450 | #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos)) | |
451 | #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width)) | |
452 | #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF)) | |
453 | #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF)) | |
454 | #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5) | |
455 | #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF)) | |
456 | ||
457 | /* Possible actions to be taken by the prologue analyzer for the | |
458 | instructions it encounters. */ | |
459 | ||
460 | enum m88k_prologue_insn_action | |
461 | { | |
462 | M88K_PIA_SKIP, /* Ignore. */ | |
463 | M88K_PIA_NOTE_ST, /* Note register store. */ | |
464 | M88K_PIA_NOTE_STD, /* Note register pair store. */ | |
465 | M88K_PIA_NOTE_SP_ADJUSTMENT, /* Note stack pointer adjustment. */ | |
466 | M88K_PIA_NOTE_FP_ASSIGNMENT, /* Note frame pointer assignment. */ | |
467 | M88K_PIA_NOTE_BRANCH, /* Note branch. */ | |
468 | M88K_PIA_NOTE_PROLOGUE_END /* Note end of prologue. */ | |
469 | }; | |
470 | ||
471 | /* Table of instructions that may comprise a function prologue. */ | |
472 | ||
473 | struct m88k_prologue_insn | |
474 | { | |
475 | unsigned long insn; | |
476 | unsigned long mask; | |
477 | enum m88k_prologue_insn_action action; | |
478 | }; | |
479 | ||
480 | struct m88k_prologue_insn m88k_prologue_insn_table[] = | |
481 | { | |
482 | /* Various register move instructions. */ | |
483 | { 0x58000000, 0xf800ffff, M88K_PIA_SKIP }, /* or/or.u with immed of 0 */ | |
484 | { 0xf4005800, 0xfc1fffe0, M88K_PIA_SKIP }, /* or rd,r0,rs */ | |
485 | { 0xf4005800, 0xfc00ffff, M88K_PIA_SKIP }, /* or rd,rs,r0 */ | |
486 | ||
487 | /* Various other instructions. */ | |
488 | { 0x58000000, 0xf8000000, M88K_PIA_SKIP }, /* or/or.u */ | |
489 | ||
490 | /* Stack pointer setup: "subu sp,sp,n" where n is a multiple of 8. */ | |
491 | { 0x67ff0000, 0xffff0007, M88K_PIA_NOTE_SP_ADJUSTMENT }, | |
492 | ||
493 | /* Frame pointer assignment: "addu r30,r31,n". */ | |
494 | { 0x63df0000, 0xffff0000, M88K_PIA_NOTE_FP_ASSIGNMENT }, | |
495 | ||
496 | /* Store to stack instructions; either "st rx,sp,n" or "st.d rx,sp,n". */ | |
497 | { 0x241f0000, 0xfc1f0000, M88K_PIA_NOTE_ST }, /* st rx,sp,n */ | |
498 | { 0x201f0000, 0xfc1f0000, M88K_PIA_NOTE_STD }, /* st.d rs,sp,n */ | |
499 | ||
500 | /* Instructions needed for setting up r25 for pic code. */ | |
501 | { 0x5f200000, 0xffff0000, M88K_PIA_SKIP }, /* or.u r25,r0,offset_high */ | |
502 | { 0xcc000002, 0xffffffff, M88K_PIA_SKIP }, /* bsr.n Lab */ | |
503 | { 0x5b390000, 0xffff0000, M88K_PIA_SKIP }, /* or r25,r25,offset_low */ | |
504 | { 0xf7396001, 0xffffffff, M88K_PIA_SKIP }, /* Lab: addu r25,r25,r1 */ | |
505 | ||
506 | /* Various branch or jump instructions which have a delay slot -- | |
507 | these do not form part of the prologue, but the instruction in | |
508 | the delay slot might be a store instruction which should be | |
509 | noted. */ | |
510 | { 0xc4000000, 0xe4000000, M88K_PIA_NOTE_BRANCH }, | |
511 | /* br.n, bsr.n, bb0.n, or bb1.n */ | |
512 | { 0xec000000, 0xfc000000, M88K_PIA_NOTE_BRANCH }, /* bcnd.n */ | |
513 | { 0xf400c400, 0xfffff7e0, M88K_PIA_NOTE_BRANCH }, /* jmp.n or jsr.n */ | |
514 | ||
515 | /* Catch all. Ends prologue analysis. */ | |
516 | { 0x00000000, 0x00000000, M88K_PIA_NOTE_PROLOGUE_END } | |
517 | }; | |
518 | ||
519 | /* Do a full analysis of the function prologue at PC and update CACHE | |
520 | accordingly. Bail out early if LIMIT is reached. Return the | |
521 | address where the analysis stopped. If LIMIT points beyond the | |
522 | function prologue, the return address should be the end of the | |
523 | prologue. */ | |
524 | ||
525 | static CORE_ADDR | |
e17a4113 UW |
526 | m88k_analyze_prologue (struct gdbarch *gdbarch, |
527 | CORE_ADDR pc, CORE_ADDR limit, | |
bf2ca189 MK |
528 | struct m88k_frame_cache *cache) |
529 | { | |
e17a4113 | 530 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
bf2ca189 MK |
531 | CORE_ADDR end = limit; |
532 | ||
533 | /* Provide a dummy cache if necessary. */ | |
534 | if (cache == NULL) | |
535 | { | |
536 | size_t sizeof_saved_regs = | |
537 | (M88K_R31_REGNUM + 1) * sizeof (struct trad_frame_saved_reg); | |
538 | ||
539 | cache = alloca (sizeof (struct m88k_frame_cache)); | |
540 | cache->saved_regs = alloca (sizeof_saved_regs); | |
541 | ||
542 | /* We only initialize the members we care about. */ | |
543 | cache->saved_regs[M88K_R1_REGNUM].addr = -1; | |
544 | cache->fp_offset = -1; | |
545 | } | |
546 | ||
547 | while (pc < limit) | |
548 | { | |
549 | struct m88k_prologue_insn *pi = m88k_prologue_insn_table; | |
e17a4113 | 550 | unsigned long insn = m88k_fetch_instruction (pc, byte_order); |
bf2ca189 MK |
551 | |
552 | while ((insn & pi->mask) != pi->insn) | |
553 | pi++; | |
554 | ||
555 | switch (pi->action) | |
556 | { | |
557 | case M88K_PIA_SKIP: | |
558 | /* If we have a frame pointer, and R1 has been saved, | |
559 | consider this instruction as not being part of the | |
560 | prologue. */ | |
561 | if (cache->fp_offset != -1 | |
562 | && cache->saved_regs[M88K_R1_REGNUM].addr != -1) | |
563 | return min (pc, end); | |
564 | break; | |
565 | ||
566 | case M88K_PIA_NOTE_ST: | |
567 | case M88K_PIA_NOTE_STD: | |
568 | /* If no frame has been allocated, the stores aren't part of | |
569 | the prologue. */ | |
570 | if (cache->sp_offset == 0) | |
571 | return min (pc, end); | |
572 | ||
573 | /* Record location of saved registers. */ | |
574 | { | |
575 | int regnum = ST_SRC (insn) + M88K_R0_REGNUM; | |
576 | ULONGEST offset = ST_OFFSET (insn); | |
577 | ||
578 | cache->saved_regs[regnum].addr = offset; | |
579 | if (pi->action == M88K_PIA_NOTE_STD && regnum < M88K_R31_REGNUM) | |
580 | cache->saved_regs[regnum + 1].addr = offset + 4; | |
581 | } | |
582 | break; | |
583 | ||
584 | case M88K_PIA_NOTE_SP_ADJUSTMENT: | |
585 | /* A second stack pointer adjustment isn't part of the | |
586 | prologue. */ | |
587 | if (cache->sp_offset != 0) | |
588 | return min (pc, end); | |
589 | ||
590 | /* Store stack pointer adjustment. */ | |
591 | cache->sp_offset = -SUBU_OFFSET (insn); | |
592 | break; | |
593 | ||
594 | case M88K_PIA_NOTE_FP_ASSIGNMENT: | |
595 | /* A second frame pointer assignment isn't part of the | |
596 | prologue. */ | |
597 | if (cache->fp_offset != -1) | |
598 | return min (pc, end); | |
599 | ||
600 | /* Record frame pointer assignment. */ | |
601 | cache->fp_offset = ADDU_OFFSET (insn); | |
602 | break; | |
603 | ||
604 | case M88K_PIA_NOTE_BRANCH: | |
605 | /* The branch instruction isn't part of the prologue, but | |
606 | the instruction in the delay slot might be. Limit the | |
607 | prologue analysis to the delay slot and record the branch | |
608 | instruction as the end of the prologue. */ | |
5ca8ca7c | 609 | limit = min (limit, pc + 2 * M88K_INSN_SIZE); |
bf2ca189 MK |
610 | end = pc; |
611 | break; | |
612 | ||
613 | case M88K_PIA_NOTE_PROLOGUE_END: | |
614 | return min (pc, end); | |
615 | } | |
616 | ||
617 | pc += M88K_INSN_SIZE; | |
618 | } | |
619 | ||
620 | return end; | |
621 | } | |
622 | ||
623 | /* An upper limit to the size of the prologue. */ | |
624 | const int m88k_max_prologue_size = 128 * M88K_INSN_SIZE; | |
625 | ||
626 | /* Return the address of first real instruction of the function | |
627 | starting at PC. */ | |
628 | ||
629 | static CORE_ADDR | |
6093d2eb | 630 | m88k_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
bf2ca189 MK |
631 | { |
632 | struct symtab_and_line sal; | |
633 | CORE_ADDR func_start, func_end; | |
634 | ||
635 | /* This is the preferred method, find the end of the prologue by | |
636 | using the debugging information. */ | |
637 | if (find_pc_partial_function (pc, NULL, &func_start, &func_end)) | |
638 | { | |
639 | sal = find_pc_line (func_start, 0); | |
640 | ||
641 | if (sal.end < func_end && pc <= sal.end) | |
642 | return sal.end; | |
643 | } | |
644 | ||
e17a4113 UW |
645 | return m88k_analyze_prologue (gdbarch, pc, pc + m88k_max_prologue_size, |
646 | NULL); | |
bf2ca189 MK |
647 | } |
648 | ||
63807e1d | 649 | static struct m88k_frame_cache * |
ed0c3906 | 650 | m88k_frame_cache (struct frame_info *this_frame, void **this_cache) |
bf2ca189 | 651 | { |
e17a4113 | 652 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
bf2ca189 MK |
653 | struct m88k_frame_cache *cache; |
654 | CORE_ADDR frame_sp; | |
655 | ||
656 | if (*this_cache) | |
657 | return *this_cache; | |
658 | ||
659 | cache = FRAME_OBSTACK_ZALLOC (struct m88k_frame_cache); | |
ed0c3906 | 660 | cache->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
bf2ca189 MK |
661 | cache->fp_offset = -1; |
662 | ||
ed0c3906 | 663 | cache->pc = get_frame_func (this_frame); |
bf2ca189 | 664 | if (cache->pc != 0) |
e17a4113 UW |
665 | m88k_analyze_prologue (gdbarch, cache->pc, get_frame_pc (this_frame), |
666 | cache); | |
bf2ca189 MK |
667 | |
668 | /* Calculate the stack pointer used in the prologue. */ | |
669 | if (cache->fp_offset != -1) | |
670 | { | |
671 | CORE_ADDR fp; | |
672 | ||
ed0c3906 | 673 | fp = get_frame_register_unsigned (this_frame, M88K_R30_REGNUM); |
bf2ca189 MK |
674 | frame_sp = fp - cache->fp_offset; |
675 | } | |
676 | else | |
677 | { | |
678 | /* If we know where the return address is saved, we can take a | |
679 | solid guess at what the frame pointer should be. */ | |
680 | if (cache->saved_regs[M88K_R1_REGNUM].addr != -1) | |
681 | cache->fp_offset = cache->saved_regs[M88K_R1_REGNUM].addr - 4; | |
ed0c3906 | 682 | frame_sp = get_frame_register_unsigned (this_frame, M88K_R31_REGNUM); |
bf2ca189 MK |
683 | } |
684 | ||
685 | /* Now that we know the stack pointer, adjust the location of the | |
686 | saved registers. */ | |
687 | { | |
688 | int regnum; | |
689 | ||
690 | for (regnum = M88K_R0_REGNUM; regnum < M88K_R31_REGNUM; regnum ++) | |
691 | if (cache->saved_regs[regnum].addr != -1) | |
692 | cache->saved_regs[regnum].addr += frame_sp; | |
693 | } | |
694 | ||
695 | /* Calculate the frame's base. */ | |
696 | cache->base = frame_sp - cache->sp_offset; | |
697 | trad_frame_set_value (cache->saved_regs, M88K_R31_REGNUM, cache->base); | |
698 | ||
699 | /* Identify SXIP with the return address in R1. */ | |
700 | cache->saved_regs[M88K_SXIP_REGNUM] = cache->saved_regs[M88K_R1_REGNUM]; | |
701 | ||
702 | *this_cache = cache; | |
703 | return cache; | |
704 | } | |
705 | ||
706 | static void | |
ed0c3906 | 707 | m88k_frame_this_id (struct frame_info *this_frame, void **this_cache, |
bf2ca189 MK |
708 | struct frame_id *this_id) |
709 | { | |
ed0c3906 | 710 | struct m88k_frame_cache *cache = m88k_frame_cache (this_frame, this_cache); |
bf2ca189 MK |
711 | |
712 | /* This marks the outermost frame. */ | |
713 | if (cache->base == 0) | |
714 | return; | |
715 | ||
716 | (*this_id) = frame_id_build (cache->base, cache->pc); | |
717 | } | |
718 | ||
ed0c3906 UW |
719 | static struct value * |
720 | m88k_frame_prev_register (struct frame_info *this_frame, | |
721 | void **this_cache, int regnum) | |
bf2ca189 | 722 | { |
ed0c3906 | 723 | struct m88k_frame_cache *cache = m88k_frame_cache (this_frame, this_cache); |
bf2ca189 MK |
724 | |
725 | if (regnum == M88K_SNIP_REGNUM || regnum == M88K_SFIP_REGNUM) | |
726 | { | |
ed0c3906 UW |
727 | struct value *value; |
728 | CORE_ADDR pc; | |
bf2ca189 | 729 | |
ed0c3906 UW |
730 | value = trad_frame_get_prev_register (this_frame, cache->saved_regs, |
731 | M88K_SXIP_REGNUM); | |
732 | pc = value_as_long (value); | |
733 | release_value (value); | |
734 | value_free (value); | |
bf2ca189 | 735 | |
ed0c3906 UW |
736 | if (regnum == M88K_SFIP_REGNUM) |
737 | pc += 4; | |
bf2ca189 | 738 | |
ed0c3906 | 739 | return frame_unwind_got_constant (this_frame, regnum, pc + 4); |
bf2ca189 MK |
740 | } |
741 | ||
ed0c3906 | 742 | return trad_frame_get_prev_register (this_frame, cache->saved_regs, regnum); |
bf2ca189 MK |
743 | } |
744 | ||
745 | static const struct frame_unwind m88k_frame_unwind = | |
746 | { | |
747 | NORMAL_FRAME, | |
8fbca658 | 748 | default_frame_unwind_stop_reason, |
bf2ca189 | 749 | m88k_frame_this_id, |
ed0c3906 UW |
750 | m88k_frame_prev_register, |
751 | NULL, | |
752 | default_frame_sniffer | |
bf2ca189 | 753 | }; |
bf2ca189 MK |
754 | \f |
755 | ||
756 | static CORE_ADDR | |
ed0c3906 | 757 | m88k_frame_base_address (struct frame_info *this_frame, void **this_cache) |
bf2ca189 | 758 | { |
ed0c3906 | 759 | struct m88k_frame_cache *cache = m88k_frame_cache (this_frame, this_cache); |
bf2ca189 MK |
760 | |
761 | if (cache->fp_offset != -1) | |
762 | return cache->base + cache->sp_offset + cache->fp_offset; | |
763 | ||
764 | return 0; | |
765 | } | |
766 | ||
767 | static const struct frame_base m88k_frame_base = | |
768 | { | |
769 | &m88k_frame_unwind, | |
770 | m88k_frame_base_address, | |
771 | m88k_frame_base_address, | |
772 | m88k_frame_base_address | |
773 | }; | |
774 | \f | |
775 | ||
776 | /* Core file support. */ | |
777 | ||
778 | /* Supply register REGNUM from the buffer specified by GREGS and LEN | |
779 | in the general-purpose register set REGSET to register cache | |
780 | REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */ | |
781 | ||
782 | static void | |
783 | m88k_supply_gregset (const struct regset *regset, | |
784 | struct regcache *regcache, | |
785 | int regnum, const void *gregs, size_t len) | |
786 | { | |
8dccaca3 | 787 | const gdb_byte *regs = gregs; |
bf2ca189 MK |
788 | int i; |
789 | ||
790 | for (i = 0; i < M88K_NUM_REGS; i++) | |
791 | { | |
792 | if (regnum == i || regnum == -1) | |
793 | regcache_raw_supply (regcache, i, regs + i * 4); | |
794 | } | |
795 | } | |
796 | ||
797 | /* Motorola 88000 register set. */ | |
798 | ||
3ca7dae4 | 799 | static const struct regset m88k_gregset = |
bf2ca189 MK |
800 | { |
801 | NULL, | |
802 | m88k_supply_gregset | |
803 | }; | |
804 | ||
b61ddd6e | 805 | /* Iterate over supported core file register note sections. */ |
bf2ca189 | 806 | |
b61ddd6e AA |
807 | static void |
808 | m88k_iterate_over_regset_sections (struct gdbarch *gdbarch, | |
809 | iterate_over_regset_sections_cb *cb, | |
810 | void *cb_data, | |
811 | const struct regcache *regcache) | |
bf2ca189 | 812 | { |
b61ddd6e | 813 | cb (".reg", M88K_NUM_REGS * 4, &m88k_gregset, NULL, cb_data); |
bf2ca189 MK |
814 | } |
815 | \f | |
816 | ||
817 | static struct gdbarch * | |
818 | m88k_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
819 | { | |
820 | struct gdbarch *gdbarch; | |
821 | ||
822 | /* If there is already a candidate, use it. */ | |
823 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
824 | if (arches != NULL) | |
825 | return arches->gdbarch; | |
826 | ||
827 | /* Allocate space for the new architecture. */ | |
828 | gdbarch = gdbarch_alloc (&info, NULL); | |
829 | ||
830 | /* There is no real `long double'. */ | |
831 | set_gdbarch_long_double_bit (gdbarch, 64); | |
8da61cc4 | 832 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double); |
bf2ca189 MK |
833 | |
834 | set_gdbarch_num_regs (gdbarch, M88K_NUM_REGS); | |
835 | set_gdbarch_register_name (gdbarch, m88k_register_name); | |
836 | set_gdbarch_register_type (gdbarch, m88k_register_type); | |
837 | ||
838 | /* Register numbers of various important registers. */ | |
839 | set_gdbarch_sp_regnum (gdbarch, M88K_R31_REGNUM); | |
840 | set_gdbarch_pc_regnum (gdbarch, M88K_SXIP_REGNUM); | |
841 | ||
842 | /* Core file support. */ | |
b61ddd6e AA |
843 | set_gdbarch_iterate_over_regset_sections |
844 | (gdbarch, m88k_iterate_over_regset_sections); | |
bf2ca189 MK |
845 | |
846 | set_gdbarch_print_insn (gdbarch, print_insn_m88k); | |
847 | ||
848 | set_gdbarch_skip_prologue (gdbarch, m88k_skip_prologue); | |
849 | ||
850 | /* Stack grows downward. */ | |
851 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
852 | ||
853 | /* Call dummy code. */ | |
854 | set_gdbarch_push_dummy_call (gdbarch, m88k_push_dummy_call); | |
ed0c3906 | 855 | set_gdbarch_dummy_id (gdbarch, m88k_dummy_id); |
bf2ca189 | 856 | |
025bb325 | 857 | /* Return value info. */ |
bf2ca189 MK |
858 | set_gdbarch_return_value (gdbarch, m88k_return_value); |
859 | ||
860 | set_gdbarch_addr_bits_remove (gdbarch, m88k_addr_bits_remove); | |
861 | set_gdbarch_breakpoint_from_pc (gdbarch, m88k_breakpoint_from_pc); | |
862 | set_gdbarch_unwind_pc (gdbarch, m88k_unwind_pc); | |
863 | set_gdbarch_write_pc (gdbarch, m88k_write_pc); | |
864 | ||
865 | frame_base_set_default (gdbarch, &m88k_frame_base); | |
ed0c3906 | 866 | frame_unwind_append_unwinder (gdbarch, &m88k_frame_unwind); |
bf2ca189 MK |
867 | |
868 | return gdbarch; | |
869 | } | |
870 | \f | |
871 | ||
872 | /* Provide a prototype to silence -Wmissing-prototypes. */ | |
873 | void _initialize_m88k_tdep (void); | |
874 | ||
875 | void | |
876 | _initialize_m88k_tdep (void) | |
877 | { | |
878 | gdbarch_register (bfd_arch_m88k, m88k_gdbarch_init, NULL); | |
879 | } |