use remote-utils facilities for baud_rate
[deliverable/binutils-gdb.git] / gdb / m88k-tdep.c
CommitLineData
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1/* Target-machine dependent code for Motorola 88000 series, for GDB.
2 Copyright (C) 1988, 1990, 1991 Free Software Foundation, Inc.
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3
4This file is part of GDB.
5
99a7de40 6This program is free software; you can redistribute it and/or modify
8aa13b87 7it under the terms of the GNU General Public License as published by
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8the Free Software Foundation; either version 2 of the License, or
9(at your option) any later version.
8aa13b87 10
99a7de40 11This program is distributed in the hope that it will be useful,
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12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
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17along with this program; if not, write to the Free Software
18Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
8aa13b87 19
8aa13b87 20#include "defs.h"
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21#include "frame.h"
22#include "inferior.h"
23#include "value.h"
8aa13b87 24#include "gdbcore.h"
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25
26#include "symtab.h"
27#include "setjmp.h"
28#include "value.h"
29
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30/* Size of an instruction */
31#define BYTES_PER_88K_INSN 4
32
ea3c0839 33void frame_find_saved_regs ();
8aa13b87 34
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35
36/* Given a GDB frame, determine the address of the calling function's frame.
37 This will be used to create a new GDB frame struct, and then
38 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
39
40 For us, the frame address is its stack pointer value, so we look up
41 the function prologue to determine the caller's sp value, and return it. */
42
43FRAME_ADDR
44frame_chain (thisframe)
45 FRAME thisframe;
8aa13b87 46{
8aa13b87 47
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48 frame_find_saved_regs (thisframe, (struct frame_saved_regs *) 0);
49 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
50 the ADDRESS, of SP_REGNUM. It also depends on the cache of
51 frame_find_saved_regs results. */
52 if (thisframe->fsr->regs[SP_REGNUM])
53 return thisframe->fsr->regs[SP_REGNUM];
54 else
55 return thisframe->frame; /* Leaf fn -- next frame up has same SP. */
56}
8aa13b87 57
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58int
59frameless_function_invocation (frame)
60 FRAME frame;
8aa13b87 61{
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62
63 frame_find_saved_regs (frame, (struct frame_saved_regs *) 0);
64 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
65 the ADDRESS, of SP_REGNUM. It also depends on the cache of
66 frame_find_saved_regs results. */
67 if (frame->fsr->regs[SP_REGNUM])
68 return 0; /* Frameful -- return addr saved somewhere */
8aa13b87 69 else
ea3c0839 70 return 1; /* Frameless -- no saved return address */
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71}
72
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73void
74init_extra_frame_info (fromleaf, fi)
75 int fromleaf;
76 struct frame_info *fi;
77{
78 fi->fsr = 0; /* Not yet allocated */
79 fi->args_pointer = 0; /* Unknown */
80 fi->locals_pointer = 0; /* Unknown */
81}
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82\f
83/* Examine an m88k function prologue, recording the addresses at which
84 registers are saved explicitly by the prologue code, and returning
85 the address of the first instruction after the prologue (but not
86 after the instruction at address LIMIT, as explained below).
87
88 LIMIT places an upper bound on addresses of the instructions to be
89 examined. If the prologue code scan reaches LIMIT, the scan is
90 aborted and LIMIT is returned. This is used, when examining the
91 prologue for the current frame, to keep examine_prologue () from
92 claiming that a given register has been saved when in fact the
93 instruction that saves it has not yet been executed. LIMIT is used
94 at other times to stop the scan when we hit code after the true
95 function prologue (e.g. for the first source line) which might
96 otherwise be mistaken for function prologue.
97
98 The format of the function prologue matched by this routine is
99 derived from examination of the source to gcc 1.95, particularly
100 the routine output_prologue () in config/out-m88k.c.
101
102 subu r31,r31,n # stack pointer update
103
104 (st rn,r31,offset)? # save incoming regs
105 (st.d rn,r31,offset)?
106
107 (addu r30,r31,n)? # frame pointer update
108
109 (pic sequence)? # PIC code prologue
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110
111 (or rn,rm,0)? # Move parameters to other regs
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112*/
113
114/* Macros for extracting fields from instructions. */
115
116#define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
117#define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
118
119/* Prologue code that handles position-independent-code setup. */
120
121struct pic_prologue_code {
122 unsigned long insn, mask;
123};
124
125static struct pic_prologue_code pic_prologue_code [] = {
126/* FIXME -- until this is translated to hex, we won't match it... */
127 0xffffffff, 0,
128 /* or r10,r1,0 (if not saved) */
129 /* bsr.n LabN */
130 /* or.u r25,r0,const */
131 /*LabN: or r25,r25,const2 */
132 /* addu r25,r25,1 */
133 /* or r1,r10,0 (if not saved) */
134};
135
136/* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
137 is not the address of a valid instruction, the address of the next
138 instruction beyond ADDR otherwise. *PWORD1 receives the first word
139 of the instruction. PWORD2 is ignored -- a remnant of the original
140 i960 version. */
141
637603f9 142#define NEXT_PROLOGUE_INSN(addr, lim, pword1) \
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143 (((addr) < (lim)) ? next_insn (addr, pword1) : 0)
144
145/* Read the m88k instruction at 'memaddr' and return the address of
146 the next instruction after that, or 0 if 'memaddr' is not the
147 address of a valid instruction. The instruction
148 is stored at 'pword1'. */
8aa13b87 149
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150CORE_ADDR
151next_insn (memaddr, pword1)
152 unsigned long *pword1;
153 CORE_ADDR memaddr;
8aa13b87 154{
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155 unsigned long buf[1];
156
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157 *pword1 = read_memory_integer (memaddr, BYTES_PER_88K_INSN);
158 return memaddr + BYTES_PER_88K_INSN;
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159}
160
ea3c0839 161/* Read a register from frames called by us (or from the hardware regs). */
8aa13b87 162
637603f9 163static int
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164read_next_frame_reg(fi, regno)
165 FRAME fi;
166 int regno;
8aa13b87 167{
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168 for (; fi; fi = fi->next) {
169 if (regno == SP_REGNUM) return fi->frame;
170 else if (fi->fsr->regs[regno])
171 return read_memory_integer(fi->fsr->regs[regno], 4);
172 }
173 return read_register(regno);
8aa13b87 174}
8aa13b87 175
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176/* Examine the prologue of a function. `ip' points to the first instruction.
177 `limit' is the limit of the prologue (e.g. the addr of the first
178 linenumber, or perhaps the program counter if we're stepping through).
179 `frame_sp' is the stack pointer value in use in this frame.
180 `fsr' is a pointer to a frame_saved_regs structure into which we put
181 info about the registers saved by this frame.
182 `fi' is a struct frame_info pointer; we fill in various fields in it
183 to reflect the offsets of the arg pointer and the locals pointer. */
184
185static CORE_ADDR
186examine_prologue (ip, limit, frame_sp, fsr, fi)
187 register CORE_ADDR ip;
188 register CORE_ADDR limit;
189 FRAME_ADDR frame_sp;
190 struct frame_saved_regs *fsr;
191 struct frame_info *fi;
192{
193 register CORE_ADDR next_ip;
194 register int src;
195 register struct pic_prologue_code *pcode;
637603f9 196 unsigned int insn;
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197 int size, offset;
198 char must_adjust[32]; /* If set, must adjust offsets in fsr */
199 int sp_offset = -1; /* -1 means not set (valid must be mult of 8) */
200 int fp_offset = -1; /* -1 means not set */
201 CORE_ADDR frame_fp;
202
4ed97c9a 203 memset (must_adjust, '\0', sizeof (must_adjust));
637603f9 204 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
ea3c0839 205
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206 /* Accept move of incoming registers to other registers, using
207 "or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
208 We don't have to worry about walking into the first lines of code,
209 since the first line number will stop us (assuming we have symbols).
210 What we have actually seen is "or r10,r0,r12". */
211
212#define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
213#define OR_MOVE_MASK 0xF800FFFF
214#define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
215#define OR_REG_MOVE1_MASK 0xFC1FFFE0
216#define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
217#define OR_REG_MOVE2_MASK 0xFC00FFFF
218 while (next_ip &&
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219 ((insn & OR_MOVE_MASK) == OR_MOVE_INSN ||
220 (insn & OR_REG_MOVE1_MASK) == OR_REG_MOVE1_INSN ||
221 (insn & OR_REG_MOVE2_MASK) == OR_REG_MOVE2_INSN
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222 )
223 )
224 {
225 /* We don't care what moves to where. The result of the moves
226 has already been reflected in what the compiler tells us is the
227 location of these parameters. */
228 ip = next_ip;
637603f9 229 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
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230 }
231
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232 /* Accept an optional "subu sp,sp,n" to set up the stack pointer. */
233
234#define SUBU_SP_INSN 0x67ff0000
235#define SUBU_SP_MASK 0xffff0007 /* Note offset must be mult. of 8 */
236#define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
237 if (next_ip &&
637603f9 238 ((insn & SUBU_SP_MASK) == SUBU_SP_INSN)) /* subu r31, r31, N */
ea3c0839 239 {
637603f9 240 sp_offset = -SUBU_OFFSET (insn);
ea3c0839 241 ip = next_ip;
637603f9 242 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
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243 }
244
245 /* The function must start with a stack-pointer adjustment, or
246 we don't know WHAT'S going on... */
247 if (sp_offset == -1)
248 return ip;
249
250 /* Accept zero or more instances of "st rx,sp,n" or "st.d rx,sp,n".
251 This may cause us to mistake the copying of a register
252 parameter to the frame for the saving of a callee-saved
253 register, but that can't be helped, since with the
254 "-fcall-saved" flag, any register can be made callee-saved.
255 This probably doesn't matter, since the ``saved'' caller's values of
256 non-callee-saved registers are not relevant anyway. */
257
258#define STD_STACK_INSN 0x201f0000
259#define STD_STACK_MASK 0xfc1f0000
260#define ST_STACK_INSN 0x241f0000
261#define ST_STACK_MASK 0xfc1f0000
262#define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
263#define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
264
265 while (next_ip)
266 {
637603f9 267 if ((insn & ST_STACK_MASK) == ST_STACK_INSN)
ea3c0839 268 size = 1;
637603f9 269 else if ((insn & STD_STACK_MASK) == STD_STACK_INSN)
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270 size = 2;
271 else
272 break;
273
637603f9
RP
274 src = ST_SRC (insn);
275 offset = ST_OFFSET (insn);
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276 while (size--)
277 {
278 must_adjust[src] = 1;
279 fsr->regs[src++] = offset; /* Will be adjusted later */
280 offset += 4;
281 }
282 ip = next_ip;
637603f9 283 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
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284 }
285
286 /* Accept an optional "addu r30,r31,n" to set up the frame pointer. */
287
288#define ADDU_FP_INSN 0x63df0000
289#define ADDU_FP_MASK 0xffff0000
290#define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
291 if (next_ip &&
637603f9 292 ((insn & ADDU_FP_MASK) == ADDU_FP_INSN)) /* addu r30, r31, N */
ea3c0839 293 {
637603f9 294 fp_offset = ADDU_OFFSET (insn);
ea3c0839 295 ip = next_ip;
637603f9 296 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
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297 }
298
299 /* Accept the PIC prologue code if present. */
300
301 pcode = pic_prologue_code;
302 size = sizeof (pic_prologue_code) / sizeof (*pic_prologue_code);
303 /* If return addr is saved, we don't use first or last insn of PICstuff. */
304 if (fsr->regs[SRP_REGNUM]) {
305 pcode++;
306 size-=2;
307 }
308
637603f9 309 while (size-- && next_ip && (pcode->insn == (pcode->mask & insn)))
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310 {
311 pcode++;
312 ip = next_ip;
637603f9 313 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
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314 }
315
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316 /* Accept moves of parameter registers to other registers, using
317 "or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
318 We don't have to worry about walking into the first lines of code,
319 since the first line number will stop us (assuming we have symbols).
320 What gcc actually seems to produce is "or rd,r0,rs". */
321
322#define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
323#define OR_MOVE_MASK 0xF800FFFF
324#define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
325#define OR_REG_MOVE1_MASK 0xFC1FFFE0
326#define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
327#define OR_REG_MOVE2_MASK 0xFC00FFFF
328 while (next_ip &&
637603f9
RP
329 ((insn & OR_MOVE_MASK) == OR_MOVE_INSN ||
330 (insn & OR_REG_MOVE1_MASK) == OR_REG_MOVE1_INSN ||
331 (insn & OR_REG_MOVE2_MASK) == OR_REG_MOVE2_INSN
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332 )
333 )
334 {
335 /* We don't care what moves to where. The result of the moves
336 has already been reflected in what the compiler tells us is the
337 location of these parameters. */
338 ip = next_ip;
637603f9 339 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
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340 }
341
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342 /* We're done with the prologue. If we don't care about the stack
343 frame itself, just return. (Note that fsr->regs has been trashed,
344 but the one caller who calls with fi==0 passes a dummy there.) */
345
346 if (fi == 0)
347 return ip;
348
637603f9
RP
349 /*
350 OK, now we have:
351
352 sp_offset original (before any alloca calls) displacement of SP
353 (will be negative).
354
355 fp_offset displacement from original SP to the FP for this frame
356 or -1.
357
358 fsr->regs[0..31] displacement from original SP to the stack
359 location where reg[0..31] is stored.
360
361 must_adjust[0..31] set if corresponding offset was set.
ea3c0839 362
637603f9
RP
363 If alloca has been called between the function prologue and the current
364 IP, then the current SP (frame_sp) will not be the original SP as set by
365 the function prologue. If the current SP is not the original SP, then the
366 compiler will have allocated an FP for this frame, fp_offset will be set,
367 and we can use it to calculate the original SP.
ea3c0839 368
637603f9
RP
369 Then, we figure out where the arguments and locals are, and relocate the
370 offsets in fsr->regs to absolute addresses. */
ea3c0839
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371
372 if (fp_offset != -1) {
373 /* We have a frame pointer, so get it, and base our calc's on it. */
637603f9 374 frame_fp = (CORE_ADDR) read_next_frame_reg (fi->next, ACTUAL_FP_REGNUM);
ea3c0839
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375 frame_sp = frame_fp - fp_offset;
376 } else {
377 /* We have no frame pointer, therefore frame_sp is still the same value
378 as set by prologue. But where is the frame itself? */
379 if (must_adjust[SRP_REGNUM]) {
380 /* Function header saved SRP (r1), the return address. Frame starts
381 4 bytes down from where it was saved. */
382 frame_fp = frame_sp + fsr->regs[SRP_REGNUM] - 4;
383 fi->locals_pointer = frame_fp;
384 } else {
385 /* Function header didn't save SRP (r1), so we are in a leaf fn or
386 are otherwise confused. */
387 frame_fp = -1;
388 }
389 }
390
391 /* The locals are relative to the FP (whether it exists as an allocated
392 register, or just as an assumed offset from the SP) */
393 fi->locals_pointer = frame_fp;
394
395 /* The arguments are just above the SP as it was before we adjusted it
396 on entry. */
397 fi->args_pointer = frame_sp - sp_offset;
398
399 /* Now that we know the SP value used by the prologue, we know where
400 it saved all the registers. */
401 for (src = 0; src < 32; src++)
402 if (must_adjust[src])
403 fsr->regs[src] += frame_sp;
404
405 /* The saved value of the SP is always known. */
406 /* (we hope...) */
407 if (fsr->regs[SP_REGNUM] != 0
408 && fsr->regs[SP_REGNUM] != frame_sp - sp_offset)
409 fprintf(stderr, "Bad saved SP value %x != %x, offset %x!\n",
410 fsr->regs[SP_REGNUM],
411 frame_sp - sp_offset, sp_offset);
412
413 fsr->regs[SP_REGNUM] = frame_sp - sp_offset;
8aa13b87 414
ea3c0839
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415 return (ip);
416}
8aa13b87 417
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418/* Given an ip value corresponding to the start of a function,
419 return the ip of the first instruction after the function
420 prologue. */
8aa13b87
JK
421
422CORE_ADDR
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423skip_prologue (ip)
424 CORE_ADDR (ip);
8aa13b87 425{
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426 struct frame_saved_regs saved_regs_dummy;
427 struct symtab_and_line sal;
428 CORE_ADDR limit;
8aa13b87 429
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430 sal = find_pc_line (ip, 0);
431 limit = (sal.end) ? sal.end : 0xffffffff;
432
433 return (examine_prologue (ip, limit, (FRAME_ADDR) 0, &saved_regs_dummy,
434 (struct frame_info *)0 ));
435}
436
437/* Put here the code to store, into a struct frame_saved_regs,
438 the addresses of the saved registers of frame described by FRAME_INFO.
439 This includes special registers such as pc and fp saved in special
440 ways in the stack frame. sp is even more special:
441 the address we return for it IS the sp for the next frame.
442
443 We cache the result of doing this in the frame_cache_obstack, since
444 it is fairly expensive. */
445
446void
447frame_find_saved_regs (fi, fsr)
448 struct frame_info *fi;
449 struct frame_saved_regs *fsr;
450{
451 register CORE_ADDR next_addr;
452 register CORE_ADDR *saved_regs;
453 register int regnum;
454 register struct frame_saved_regs *cache_fsr;
455 extern struct obstack frame_cache_obstack;
456 CORE_ADDR ip;
457 struct symtab_and_line sal;
458 CORE_ADDR limit;
459
460 if (!fi->fsr)
8aa13b87 461 {
ea3c0839
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462 cache_fsr = (struct frame_saved_regs *)
463 obstack_alloc (&frame_cache_obstack,
464 sizeof (struct frame_saved_regs));
4ed97c9a 465 memset (cache_fsr, '\0', sizeof (struct frame_saved_regs));
ea3c0839
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466 fi->fsr = cache_fsr;
467
468 /* Find the start and end of the function prologue. If the PC
469 is in the function prologue, we only consider the part that
470 has executed already. */
471
472 ip = get_pc_function_start (fi->pc);
473 sal = find_pc_line (ip, 0);
474 limit = (sal.end && sal.end < fi->pc) ? sal.end: fi->pc;
475
476 /* This will fill in fields in *fi as well as in cache_fsr. */
477 examine_prologue (ip, limit, fi->frame, cache_fsr, fi);
8aa13b87
JK
478 }
479
ea3c0839
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480 if (fsr)
481 *fsr = *fi->fsr;
482}
483
484/* Return the address of the locals block for the frame
485 described by FI. Returns 0 if the address is unknown.
486 NOTE! Frame locals are referred to by negative offsets from the
487 argument pointer, so this is the same as frame_args_address(). */
488
489CORE_ADDR
490frame_locals_address (fi)
491 struct frame_info *fi;
492{
493 register FRAME frame;
494 struct frame_saved_regs fsr;
495 CORE_ADDR ap;
496
497 if (fi->args_pointer) /* Cached value is likely there. */
498 return fi->args_pointer;
499
500 /* Nope, generate it. */
501
502 get_frame_saved_regs (fi, &fsr);
503
504 return fi->args_pointer;
505}
506
507/* Return the address of the argument block for the frame
508 described by FI. Returns 0 if the address is unknown. */
509
510CORE_ADDR
511frame_args_address (fi)
512 struct frame_info *fi;
513{
514 register FRAME frame;
515 struct frame_saved_regs fsr;
516 CORE_ADDR ap;
517
518 if (fi->args_pointer) /* Cached value is likely there. */
519 return fi->args_pointer;
520
521 /* Nope, generate it. */
522
523 get_frame_saved_regs (fi, &fsr);
524
525 return fi->args_pointer;
526}
527
528/* Return the saved PC from this frame.
529
530 If the frame has a memory copy of SRP_REGNUM, use that. If not,
531 just use the register SRP_REGNUM itself. */
532
533CORE_ADDR
534frame_saved_pc (frame)
535 FRAME frame;
536{
537 return read_next_frame_reg(frame, SRP_REGNUM);
8aa13b87
JK
538}
539
ea3c0839 540
ef98d5ac
JG
541static int
542pushed_size (prev_words, v)
543 int prev_words;
544 struct value *v;
545{
546 switch (TYPE_CODE (VALUE_TYPE (v)))
547 {
548 case TYPE_CODE_VOID: /* Void type (values zero length) */
549
550 return 0; /* That was easy! */
551
552 case TYPE_CODE_PTR: /* Pointer type */
553 case TYPE_CODE_ENUM: /* Enumeration type */
554 case TYPE_CODE_INT: /* Integer type */
555 case TYPE_CODE_REF: /* C++ Reference types */
85f0a848 556 case TYPE_CODE_ARRAY: /* Array type, lower & upper bounds */
ef98d5ac
JG
557
558 return 1;
559
560 case TYPE_CODE_FLT: /* Floating type */
561
562 if (TYPE_LENGTH (VALUE_TYPE (v)) == 4)
563 return 1;
564 else
565 /* Assume that it must be a double. */
566 if (prev_words & 1) /* at an odd-word boundary */
567 return 3; /* round to 8-byte boundary */
568 else
569 return 2;
570
571 case TYPE_CODE_STRUCT: /* C struct or Pascal record */
572 case TYPE_CODE_UNION: /* C union or Pascal variant part */
573
574 return (((TYPE_LENGTH (VALUE_TYPE (v)) + 3) / 4) * 4);
575
576 case TYPE_CODE_FUNC: /* Function type */
577 case TYPE_CODE_SET: /* Pascal sets */
578 case TYPE_CODE_RANGE: /* Range (integers within bounds) */
c4413e2c 579 case TYPE_CODE_STRING: /* String type */
ef98d5ac
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580 case TYPE_CODE_MEMBER: /* Member type */
581 case TYPE_CODE_METHOD: /* Method type */
582 /* Don't know how to pass these yet. */
583
584 case TYPE_CODE_UNDEF: /* Not used; catches errors */
585 default:
586 abort ();
587 }
588}
589
590static void
591store_parm_word (address, val)
592 CORE_ADDR address;
593 int val;
594{
2a770cac 595 write_memory (address, (char *)&val, 4);
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596}
597
598static int
599store_parm (prev_words, left_parm_addr, v)
600 unsigned int prev_words;
601 CORE_ADDR left_parm_addr;
602 struct value *v;
603{
604 CORE_ADDR start = left_parm_addr + (prev_words * 4);
605 int *val_addr = (int *)VALUE_CONTENTS(v);
606
607 switch (TYPE_CODE (VALUE_TYPE (v)))
608 {
609 case TYPE_CODE_VOID: /* Void type (values zero length) */
610
611 return 0;
612
613 case TYPE_CODE_PTR: /* Pointer type */
614 case TYPE_CODE_ENUM: /* Enumeration type */
615 case TYPE_CODE_INT: /* Integer type */
85f0a848 616 case TYPE_CODE_ARRAY: /* Array type, lower & upper bounds */
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617 case TYPE_CODE_REF: /* C++ Reference types */
618
619 store_parm_word (start, *val_addr);
620 return 1;
621
622 case TYPE_CODE_FLT: /* Floating type */
623
624 if (TYPE_LENGTH (VALUE_TYPE (v)) == 4)
625 {
626 store_parm_word (start, *val_addr);
627 return 1;
628 }
629 else
630 {
631 store_parm_word (start + ((prev_words & 1) * 4), val_addr[0]);
632 store_parm_word (start + ((prev_words & 1) * 4) + 4, val_addr[1]);
633 return 2 + (prev_words & 1);
634 }
635
636 case TYPE_CODE_STRUCT: /* C struct or Pascal record */
637 case TYPE_CODE_UNION: /* C union or Pascal variant part */
638
639 {
640 unsigned int words = (((TYPE_LENGTH (VALUE_TYPE (v)) + 3) / 4) * 4);
641 unsigned int word;
642
643 for (word = 0; word < words; word++)
644 store_parm_word (start + (word * 4), val_addr[word]);
645 return words;
646 }
647
648 default:
649 abort ();
650 }
651}
8aa13b87 652
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653 /* This routine sets up all of the parameter values needed to make a pseudo
654 call. The name "push_parameters" is a misnomer on some archs,
655 because (on the m88k) most parameters generally end up being passed in
656 registers rather than on the stack. In this routine however, we do
657 end up storing *all* parameter values onto the stack (even if we will
658 realize later that some of these stores were unnecessary). */
659
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660#define FIRST_PARM_REGNUM 2
661
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662void
663push_parameters (return_type, struct_conv, nargs, args)
664 struct type *return_type;
665 int struct_conv;
666 int nargs;
667 value *args;
ea3c0839 668{
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669 int parm_num;
670 unsigned int p_words = 0;
671 CORE_ADDR left_parm_addr;
672
673 /* Start out by creating a space for the return value (if need be). We
674 only need to do this if the return value is a struct or union. If we
675 do make a space for a struct or union return value, then we must also
676 arrange for the base address of that space to go into r12, which is the
677 standard place to pass the address of the return value area to the
678 callee. Note that only structs and unions are returned in this fashion.
679 Ints, enums, pointers, and floats are returned into r2. Doubles are
680 returned into the register pair {r2,r3}. Note also that the space
681 reserved for a struct or union return value only has to be word aligned
682 (not double-word) but it is double-word aligned here anyway (just in
683 case that becomes important someday). */
684
685 switch (TYPE_CODE (return_type))
686 {
687 case TYPE_CODE_STRUCT:
688 case TYPE_CODE_UNION:
689 {
690 int return_bytes = ((TYPE_LENGTH (return_type) + 7) / 8) * 8;
691 CORE_ADDR rv_addr;
692
693 rv_addr = read_register (SP_REGNUM) - return_bytes;
694
695 write_register (SP_REGNUM, rv_addr); /* push space onto the stack */
696 write_register (SRA_REGNUM, rv_addr);/* set return value register */
697 }
698 }
699
700 /* Here we make a pre-pass on the whole parameter list to figure out exactly
701 how many words worth of stuff we are going to pass. */
702
703 for (p_words = 0, parm_num = 0; parm_num < nargs; parm_num++)
704 p_words += pushed_size (p_words, value_arg_coerce (args[parm_num]));
705
706 /* Now, check to see if we have to round up the number of parameter words
707 to get up to the next 8-bytes boundary. This may be necessary because
708 of the software convention to always keep the stack aligned on an 8-byte
709 boundary. */
710
711 if (p_words & 1)
712 p_words++; /* round to 8-byte boundary */
713
714 /* Now figure out the absolute address of the leftmost parameter, and update
715 the stack pointer to point at that address. */
716
717 left_parm_addr = read_register (SP_REGNUM) - (p_words * 4);
718 write_register (SP_REGNUM, left_parm_addr);
719
720 /* Now we can go through all of the parameters (in left-to-right order)
721 and write them to their parameter stack slots. Note that we are not
722 really "pushing" the parameter values. The stack space for these values
723 was already allocated above. Now we are just filling it up. */
724
725 for (p_words = 0, parm_num = 0; parm_num < nargs; parm_num++)
726 p_words +=
727 store_parm (p_words, left_parm_addr, value_arg_coerce (args[parm_num]));
728
729 /* Now that we are all done storing the parameter values into the stack, we
730 must go back and load up the parameter registers with the values from the
731 corresponding stack slots. Note that in the two cases of (a) gaps in the
732 parameter word sequence causes by (otherwise) misaligned doubles, and (b)
733 slots correcponding to structs or unions, the work we do here in loading
734 some parameter registers may be unnecessary, but who cares? */
735
736 for (p_words = 0; p_words < 8; p_words++)
737 {
738 write_register (FIRST_PARM_REGNUM + p_words,
739 read_memory_integer (left_parm_addr + (p_words * 4), 4));
740 }
741}
742
743void
744pop_frame ()
745{
746 error ("Feature not implemented for the m88k yet.");
747 return;
748}
749
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750void
751collect_returned_value (rval, value_type, struct_return, nargs, args)
752 value *rval;
753 struct type *value_type;
754 int struct_return;
755 int nargs;
756 value *args;
757{
758 char retbuf[REGISTER_BYTES];
759
ade40d31 760 memcpy (retbuf, registers, REGISTER_BYTES);
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761 *rval = value_being_returned (value_type, retbuf, struct_return);
762 return;
763}
8aa13b87
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764
765#if 0
766/* Now handled in a machine independent way with CALL_DUMMY_LOCATION. */
767 /* Stuff a breakpoint instruction onto the stack (or elsewhere if the stack
768 is not a good place for it). Return the address at which the instruction
769 got stuffed, or zero if we were unable to stuff it anywhere. */
770
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771CORE_ADDR
772push_breakpoint ()
773{
774 static char breakpoint_insn[] = BREAKPOINT;
775 extern CORE_ADDR text_end; /* of inferior */
776 static char readback_buffer[] = BREAKPOINT;
777 int i;
8aa13b87 778
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779 /* With a little bit of luck, we can just stash the breakpoint instruction
780 in the word just beyond the end of normal text space. For systems on
781 which the hardware will not allow us to execute out of the stack segment,
782 we have to hope that we *are* at least allowed to effectively extend the
783 text segment by one word. If the actual end of user's the text segment
784 happens to fall right at a page boundary this trick may fail. Note that
785 we check for this by reading after writing, and comparing in order to
786 be sure that the write worked. */
8aa13b87 787
ea3c0839 788 write_memory (text_end, &breakpoint_insn, 4);
8aa13b87 789
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790 /* Fill the readback buffer with some garbage which is certain to be
791 unequal to the breakpoint insn. That way we can tell if the
792 following read doesn't actually succeed. */
8aa13b87 793
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794 for (i = 0; i < sizeof (readback_buffer); i++)
795 readback_buffer[i] = ~ readback_buffer[i]; /* Invert the bits */
796
797 /* Now check that the breakpoint insn was successfully installed. */
8aa13b87 798
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799 read_memory (text_end, readback_buffer, sizeof (readback_buffer));
800 for (i = 0; i < sizeof (readback_buffer); i++)
801 if (readback_buffer[i] != breakpoint_insn[i])
802 return 0; /* Failed to install! */
803
804 return text_end;
8aa13b87 805}
ea3c0839 806#endif
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