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bf2ca189 MK |
1 | /* Target-dependent code for the Motorola 88000 series. |
2 | ||
61baf725 | 3 | Copyright (C) 2004-2017 Free Software Foundation, Inc. |
bf2ca189 MK |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
bf2ca189 MK |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
bf2ca189 MK |
19 | |
20 | #include "defs.h" | |
21 | #include "arch-utils.h" | |
22 | #include "dis-asm.h" | |
23 | #include "frame.h" | |
24 | #include "frame-base.h" | |
25 | #include "frame-unwind.h" | |
26 | #include "gdbcore.h" | |
27 | #include "gdbtypes.h" | |
28 | #include "regcache.h" | |
29 | #include "regset.h" | |
30 | #include "symtab.h" | |
31 | #include "trad-frame.h" | |
32 | #include "value.h" | |
325fac50 | 33 | #include <algorithm> |
bf2ca189 | 34 | |
bf2ca189 MK |
35 | #include "m88k-tdep.h" |
36 | ||
37 | /* Fetch the instruction at PC. */ | |
38 | ||
39 | static unsigned long | |
e17a4113 | 40 | m88k_fetch_instruction (CORE_ADDR pc, enum bfd_endian byte_order) |
bf2ca189 | 41 | { |
e17a4113 | 42 | return read_memory_unsigned_integer (pc, 4, byte_order); |
bf2ca189 MK |
43 | } |
44 | ||
45 | /* Register information. */ | |
46 | ||
47 | /* Return the name of register REGNUM. */ | |
48 | ||
49 | static const char * | |
d93859e2 | 50 | m88k_register_name (struct gdbarch *gdbarch, int regnum) |
bf2ca189 MK |
51 | { |
52 | static char *register_names[] = | |
53 | { | |
54 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
55 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
56 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", | |
57 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", | |
58 | "epsr", "fpsr", "fpcr", "sxip", "snip", "sfip" | |
59 | }; | |
60 | ||
61 | if (regnum >= 0 && regnum < ARRAY_SIZE (register_names)) | |
62 | return register_names[regnum]; | |
63 | ||
64 | return NULL; | |
65 | } | |
66 | ||
67 | /* Return the GDB type object for the "standard" data type of data in | |
025bb325 | 68 | register REGNUM. */ |
bf2ca189 MK |
69 | |
70 | static struct type * | |
71 | m88k_register_type (struct gdbarch *gdbarch, int regnum) | |
72 | { | |
73 | /* SXIP, SNIP, SFIP and R1 contain code addresses. */ | |
74 | if ((regnum >= M88K_SXIP_REGNUM && regnum <= M88K_SFIP_REGNUM) | |
75 | || regnum == M88K_R1_REGNUM) | |
0dfff4cb | 76 | return builtin_type (gdbarch)->builtin_func_ptr; |
bf2ca189 MK |
77 | |
78 | /* R30 and R31 typically contains data addresses. */ | |
79 | if (regnum == M88K_R30_REGNUM || regnum == M88K_R31_REGNUM) | |
0dfff4cb | 80 | return builtin_type (gdbarch)->builtin_data_ptr; |
bf2ca189 | 81 | |
df4df182 | 82 | return builtin_type (gdbarch)->builtin_int32; |
bf2ca189 MK |
83 | } |
84 | \f | |
85 | ||
86 | static CORE_ADDR | |
24568a2c | 87 | m88k_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr) |
bf2ca189 MK |
88 | { |
89 | /* All instructures are 4-byte aligned. The lower 2 bits of SXIP, | |
90 | SNIP and SFIP are used for special purposes: bit 0 is the | |
91 | exception bit and bit 1 is the valid bit. */ | |
92 | return addr & ~0x3; | |
93 | } | |
94 | ||
95 | /* Use the program counter to determine the contents and size of a | |
96 | breakpoint instruction. Return a pointer to a string of bytes that | |
97 | encode a breakpoint instruction, store the length of the string in | |
98 | *LEN and optionally adjust *PC to point to the correct memory | |
99 | location for inserting the breakpoint. */ | |
bf2ca189 | 100 | |
598cc9dc | 101 | /* tb 0,r0,511 */ |
04180708 | 102 | constexpr gdb_byte m88k_break_insn[] = { 0xf0, 0x00, 0xd1, 0xff }; |
598cc9dc | 103 | |
04180708 | 104 | typedef BP_MANIPULATION (m88k_break_insn) m88k_breakpoint; |
bf2ca189 MK |
105 | |
106 | static CORE_ADDR | |
107 | m88k_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
108 | { | |
109 | CORE_ADDR pc; | |
110 | ||
111 | pc = frame_unwind_register_unsigned (next_frame, M88K_SXIP_REGNUM); | |
24568a2c | 112 | return m88k_addr_bits_remove (gdbarch, pc); |
bf2ca189 MK |
113 | } |
114 | ||
115 | static void | |
61a1198a | 116 | m88k_write_pc (struct regcache *regcache, CORE_ADDR pc) |
bf2ca189 MK |
117 | { |
118 | /* According to the MC88100 RISC Microprocessor User's Manual, | |
119 | section 6.4.3.1.2: | |
120 | ||
121 | "... can be made to return to a particular instruction by placing | |
122 | a valid instruction address in the SNIP and the next sequential | |
123 | instruction address in the SFIP (with V bits set and E bits | |
124 | clear). The rte resumes execution at the instruction pointed to | |
125 | by the SNIP, then the SFIP." | |
126 | ||
127 | The E bit is the least significant bit (bit 0). The V (valid) | |
128 | bit is bit 1. This is why we logical or 2 into the values we are | |
129 | writing below. It turns out that SXIP plays no role when | |
130 | returning from an exception so nothing special has to be done | |
131 | with it. We could even (presumably) give it a totally bogus | |
132 | value. */ | |
133 | ||
61a1198a UW |
134 | regcache_cooked_write_unsigned (regcache, M88K_SXIP_REGNUM, pc); |
135 | regcache_cooked_write_unsigned (regcache, M88K_SNIP_REGNUM, pc | 2); | |
136 | regcache_cooked_write_unsigned (regcache, M88K_SFIP_REGNUM, (pc + 4) | 2); | |
bf2ca189 MK |
137 | } |
138 | \f | |
139 | ||
140 | /* The functions on this page are intended to be used to classify | |
141 | function arguments. */ | |
142 | ||
143 | /* Check whether TYPE is "Integral or Pointer". */ | |
144 | ||
145 | static int | |
146 | m88k_integral_or_pointer_p (const struct type *type) | |
147 | { | |
148 | switch (TYPE_CODE (type)) | |
149 | { | |
150 | case TYPE_CODE_INT: | |
151 | case TYPE_CODE_BOOL: | |
152 | case TYPE_CODE_CHAR: | |
153 | case TYPE_CODE_ENUM: | |
154 | case TYPE_CODE_RANGE: | |
155 | { | |
156 | /* We have byte, half-word, word and extended-word/doubleword | |
157 | integral types. */ | |
158 | int len = TYPE_LENGTH (type); | |
159 | return (len == 1 || len == 2 || len == 4 || len == 8); | |
160 | } | |
161 | return 1; | |
162 | case TYPE_CODE_PTR: | |
163 | case TYPE_CODE_REF: | |
164 | { | |
165 | /* Allow only 32-bit pointers. */ | |
166 | return (TYPE_LENGTH (type) == 4); | |
167 | } | |
168 | return 1; | |
169 | default: | |
170 | break; | |
171 | } | |
172 | ||
173 | return 0; | |
174 | } | |
175 | ||
176 | /* Check whether TYPE is "Floating". */ | |
177 | ||
178 | static int | |
179 | m88k_floating_p (const struct type *type) | |
180 | { | |
181 | switch (TYPE_CODE (type)) | |
182 | { | |
183 | case TYPE_CODE_FLT: | |
184 | { | |
185 | int len = TYPE_LENGTH (type); | |
186 | return (len == 4 || len == 8); | |
187 | } | |
188 | default: | |
189 | break; | |
190 | } | |
191 | ||
192 | return 0; | |
193 | } | |
194 | ||
195 | /* Check whether TYPE is "Structure or Union". */ | |
196 | ||
197 | static int | |
198 | m88k_structure_or_union_p (const struct type *type) | |
199 | { | |
200 | switch (TYPE_CODE (type)) | |
201 | { | |
202 | case TYPE_CODE_STRUCT: | |
203 | case TYPE_CODE_UNION: | |
204 | return 1; | |
205 | default: | |
206 | break; | |
207 | } | |
208 | ||
209 | return 0; | |
210 | } | |
211 | ||
212 | /* Check whether TYPE has 8-byte alignment. */ | |
213 | ||
214 | static int | |
215 | m88k_8_byte_align_p (struct type *type) | |
216 | { | |
217 | if (m88k_structure_or_union_p (type)) | |
218 | { | |
219 | int i; | |
220 | ||
221 | for (i = 0; i < TYPE_NFIELDS (type); i++) | |
222 | { | |
223 | struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i)); | |
224 | ||
225 | if (m88k_8_byte_align_p (subtype)) | |
226 | return 1; | |
227 | } | |
228 | } | |
229 | ||
230 | if (m88k_integral_or_pointer_p (type) || m88k_floating_p (type)) | |
231 | return (TYPE_LENGTH (type) == 8); | |
232 | ||
233 | return 0; | |
234 | } | |
235 | ||
236 | /* Check whether TYPE can be passed in a register. */ | |
237 | ||
238 | static int | |
239 | m88k_in_register_p (struct type *type) | |
240 | { | |
241 | if (m88k_integral_or_pointer_p (type) || m88k_floating_p (type)) | |
242 | return 1; | |
243 | ||
244 | if (m88k_structure_or_union_p (type) && TYPE_LENGTH (type) == 4) | |
245 | return 1; | |
246 | ||
247 | return 0; | |
248 | } | |
249 | ||
250 | static CORE_ADDR | |
251 | m88k_store_arguments (struct regcache *regcache, int nargs, | |
252 | struct value **args, CORE_ADDR sp) | |
253 | { | |
df4df182 | 254 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
bf2ca189 MK |
255 | int num_register_words = 0; |
256 | int num_stack_words = 0; | |
257 | int i; | |
258 | ||
259 | for (i = 0; i < nargs; i++) | |
260 | { | |
4991999e | 261 | struct type *type = value_type (args[i]); |
bf2ca189 MK |
262 | int len = TYPE_LENGTH (type); |
263 | ||
264 | if (m88k_integral_or_pointer_p (type) && len < 4) | |
265 | { | |
df4df182 UW |
266 | args[i] = value_cast (builtin_type (gdbarch)->builtin_int32, |
267 | args[i]); | |
4991999e | 268 | type = value_type (args[i]); |
bf2ca189 MK |
269 | len = TYPE_LENGTH (type); |
270 | } | |
271 | ||
272 | if (m88k_in_register_p (type)) | |
273 | { | |
274 | int num_words = 0; | |
275 | ||
276 | if (num_register_words % 2 == 1 && m88k_8_byte_align_p (type)) | |
277 | num_words++; | |
278 | ||
279 | num_words += ((len + 3) / 4); | |
280 | if (num_register_words + num_words <= 8) | |
281 | { | |
282 | num_register_words += num_words; | |
283 | continue; | |
284 | } | |
285 | ||
286 | /* We've run out of available registers. Pass the argument | |
287 | on the stack. */ | |
288 | } | |
289 | ||
290 | if (num_stack_words % 2 == 1 && m88k_8_byte_align_p (type)) | |
291 | num_stack_words++; | |
292 | ||
293 | num_stack_words += ((len + 3) / 4); | |
294 | } | |
295 | ||
296 | /* Allocate stack space. */ | |
297 | sp = align_down (sp - 32 - num_stack_words * 4, 16); | |
298 | num_stack_words = num_register_words = 0; | |
299 | ||
300 | for (i = 0; i < nargs; i++) | |
301 | { | |
0fd88904 | 302 | const bfd_byte *valbuf = value_contents (args[i]); |
4991999e | 303 | struct type *type = value_type (args[i]); |
bf2ca189 MK |
304 | int len = TYPE_LENGTH (type); |
305 | int stack_word = num_stack_words; | |
306 | ||
307 | if (m88k_in_register_p (type)) | |
308 | { | |
309 | int register_word = num_register_words; | |
310 | ||
311 | if (register_word % 2 == 1 && m88k_8_byte_align_p (type)) | |
312 | register_word++; | |
313 | ||
314 | gdb_assert (len == 4 || len == 8); | |
315 | ||
316 | if (register_word + len / 8 < 8) | |
317 | { | |
318 | int regnum = M88K_R2_REGNUM + register_word; | |
319 | ||
320 | regcache_raw_write (regcache, regnum, valbuf); | |
321 | if (len > 4) | |
322 | regcache_raw_write (regcache, regnum + 1, valbuf + 4); | |
323 | ||
324 | num_register_words = (register_word + len / 4); | |
325 | continue; | |
326 | } | |
327 | } | |
328 | ||
329 | if (stack_word % 2 == -1 && m88k_8_byte_align_p (type)) | |
330 | stack_word++; | |
331 | ||
332 | write_memory (sp + stack_word * 4, valbuf, len); | |
333 | num_stack_words = (stack_word + (len + 3) / 4); | |
334 | } | |
335 | ||
336 | return sp; | |
337 | } | |
338 | ||
339 | static CORE_ADDR | |
7d9b040b | 340 | m88k_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
bf2ca189 MK |
341 | struct regcache *regcache, CORE_ADDR bp_addr, int nargs, |
342 | struct value **args, CORE_ADDR sp, int struct_return, | |
343 | CORE_ADDR struct_addr) | |
344 | { | |
345 | /* Set up the function arguments. */ | |
346 | sp = m88k_store_arguments (regcache, nargs, args, sp); | |
347 | gdb_assert (sp % 16 == 0); | |
348 | ||
349 | /* Store return value address. */ | |
350 | if (struct_return) | |
351 | regcache_raw_write_unsigned (regcache, M88K_R12_REGNUM, struct_addr); | |
352 | ||
353 | /* Store the stack pointer and return address in the appropriate | |
354 | registers. */ | |
355 | regcache_raw_write_unsigned (regcache, M88K_R31_REGNUM, sp); | |
356 | regcache_raw_write_unsigned (regcache, M88K_R1_REGNUM, bp_addr); | |
357 | ||
358 | /* Return the stack pointer. */ | |
359 | return sp; | |
360 | } | |
361 | ||
362 | static struct frame_id | |
ed0c3906 | 363 | m88k_dummy_id (struct gdbarch *arch, struct frame_info *this_frame) |
bf2ca189 MK |
364 | { |
365 | CORE_ADDR sp; | |
366 | ||
ed0c3906 UW |
367 | sp = get_frame_register_unsigned (this_frame, M88K_R31_REGNUM); |
368 | return frame_id_build (sp, get_frame_pc (this_frame)); | |
bf2ca189 MK |
369 | } |
370 | \f | |
371 | ||
372 | /* Determine, for architecture GDBARCH, how a return value of TYPE | |
373 | should be returned. If it is supposed to be returned in registers, | |
374 | and READBUF is non-zero, read the appropriate value from REGCACHE, | |
375 | and copy it into READBUF. If WRITEBUF is non-zero, write the value | |
376 | from WRITEBUF into REGCACHE. */ | |
377 | ||
378 | static enum return_value_convention | |
6a3a010b | 379 | m88k_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 CV |
380 | struct type *type, struct regcache *regcache, |
381 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
bf2ca189 MK |
382 | { |
383 | int len = TYPE_LENGTH (type); | |
8dccaca3 | 384 | gdb_byte buf[8]; |
bf2ca189 MK |
385 | |
386 | if (!m88k_integral_or_pointer_p (type) && !m88k_floating_p (type)) | |
387 | return RETURN_VALUE_STRUCT_CONVENTION; | |
388 | ||
389 | if (readbuf) | |
390 | { | |
391 | /* Read the contents of R2 and (if necessary) R3. */ | |
392 | regcache_cooked_read (regcache, M88K_R2_REGNUM, buf); | |
393 | if (len > 4) | |
394 | { | |
395 | regcache_cooked_read (regcache, M88K_R3_REGNUM, buf + 4); | |
396 | gdb_assert (len == 8); | |
397 | memcpy (readbuf, buf, len); | |
398 | } | |
399 | else | |
400 | { | |
401 | /* Just stripping off any unused bytes should preserve the | |
402 | signed-ness just fine. */ | |
403 | memcpy (readbuf, buf + 4 - len, len); | |
404 | } | |
405 | } | |
406 | ||
407 | if (writebuf) | |
408 | { | |
409 | /* Read the contents to R2 and (if necessary) R3. */ | |
410 | if (len > 4) | |
411 | { | |
412 | gdb_assert (len == 8); | |
413 | memcpy (buf, writebuf, 8); | |
414 | regcache_cooked_write (regcache, M88K_R3_REGNUM, buf + 4); | |
415 | } | |
416 | else | |
417 | { | |
418 | /* ??? Do we need to do any sign-extension here? */ | |
419 | memcpy (buf + 4 - len, writebuf, len); | |
420 | } | |
421 | regcache_cooked_write (regcache, M88K_R2_REGNUM, buf); | |
422 | } | |
423 | ||
424 | return RETURN_VALUE_REGISTER_CONVENTION; | |
425 | } | |
426 | \f | |
427 | /* Default frame unwinder. */ | |
428 | ||
429 | struct m88k_frame_cache | |
430 | { | |
431 | /* Base address. */ | |
432 | CORE_ADDR base; | |
433 | CORE_ADDR pc; | |
434 | ||
435 | int sp_offset; | |
436 | int fp_offset; | |
437 | ||
438 | /* Table of saved registers. */ | |
439 | struct trad_frame_saved_reg *saved_regs; | |
440 | }; | |
441 | ||
442 | /* Prologue analysis. */ | |
443 | ||
444 | /* Macros for extracting fields from instructions. */ | |
445 | ||
446 | #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos)) | |
447 | #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width)) | |
448 | #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF)) | |
449 | #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF)) | |
450 | #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5) | |
451 | #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF)) | |
452 | ||
453 | /* Possible actions to be taken by the prologue analyzer for the | |
454 | instructions it encounters. */ | |
455 | ||
456 | enum m88k_prologue_insn_action | |
457 | { | |
458 | M88K_PIA_SKIP, /* Ignore. */ | |
459 | M88K_PIA_NOTE_ST, /* Note register store. */ | |
460 | M88K_PIA_NOTE_STD, /* Note register pair store. */ | |
461 | M88K_PIA_NOTE_SP_ADJUSTMENT, /* Note stack pointer adjustment. */ | |
462 | M88K_PIA_NOTE_FP_ASSIGNMENT, /* Note frame pointer assignment. */ | |
463 | M88K_PIA_NOTE_BRANCH, /* Note branch. */ | |
464 | M88K_PIA_NOTE_PROLOGUE_END /* Note end of prologue. */ | |
465 | }; | |
466 | ||
467 | /* Table of instructions that may comprise a function prologue. */ | |
468 | ||
469 | struct m88k_prologue_insn | |
470 | { | |
471 | unsigned long insn; | |
472 | unsigned long mask; | |
473 | enum m88k_prologue_insn_action action; | |
474 | }; | |
475 | ||
476 | struct m88k_prologue_insn m88k_prologue_insn_table[] = | |
477 | { | |
478 | /* Various register move instructions. */ | |
479 | { 0x58000000, 0xf800ffff, M88K_PIA_SKIP }, /* or/or.u with immed of 0 */ | |
480 | { 0xf4005800, 0xfc1fffe0, M88K_PIA_SKIP }, /* or rd,r0,rs */ | |
481 | { 0xf4005800, 0xfc00ffff, M88K_PIA_SKIP }, /* or rd,rs,r0 */ | |
482 | ||
483 | /* Various other instructions. */ | |
484 | { 0x58000000, 0xf8000000, M88K_PIA_SKIP }, /* or/or.u */ | |
485 | ||
486 | /* Stack pointer setup: "subu sp,sp,n" where n is a multiple of 8. */ | |
487 | { 0x67ff0000, 0xffff0007, M88K_PIA_NOTE_SP_ADJUSTMENT }, | |
488 | ||
489 | /* Frame pointer assignment: "addu r30,r31,n". */ | |
490 | { 0x63df0000, 0xffff0000, M88K_PIA_NOTE_FP_ASSIGNMENT }, | |
491 | ||
492 | /* Store to stack instructions; either "st rx,sp,n" or "st.d rx,sp,n". */ | |
493 | { 0x241f0000, 0xfc1f0000, M88K_PIA_NOTE_ST }, /* st rx,sp,n */ | |
494 | { 0x201f0000, 0xfc1f0000, M88K_PIA_NOTE_STD }, /* st.d rs,sp,n */ | |
495 | ||
496 | /* Instructions needed for setting up r25 for pic code. */ | |
497 | { 0x5f200000, 0xffff0000, M88K_PIA_SKIP }, /* or.u r25,r0,offset_high */ | |
498 | { 0xcc000002, 0xffffffff, M88K_PIA_SKIP }, /* bsr.n Lab */ | |
499 | { 0x5b390000, 0xffff0000, M88K_PIA_SKIP }, /* or r25,r25,offset_low */ | |
500 | { 0xf7396001, 0xffffffff, M88K_PIA_SKIP }, /* Lab: addu r25,r25,r1 */ | |
501 | ||
502 | /* Various branch or jump instructions which have a delay slot -- | |
503 | these do not form part of the prologue, but the instruction in | |
504 | the delay slot might be a store instruction which should be | |
505 | noted. */ | |
506 | { 0xc4000000, 0xe4000000, M88K_PIA_NOTE_BRANCH }, | |
507 | /* br.n, bsr.n, bb0.n, or bb1.n */ | |
508 | { 0xec000000, 0xfc000000, M88K_PIA_NOTE_BRANCH }, /* bcnd.n */ | |
509 | { 0xf400c400, 0xfffff7e0, M88K_PIA_NOTE_BRANCH }, /* jmp.n or jsr.n */ | |
510 | ||
511 | /* Catch all. Ends prologue analysis. */ | |
512 | { 0x00000000, 0x00000000, M88K_PIA_NOTE_PROLOGUE_END } | |
513 | }; | |
514 | ||
515 | /* Do a full analysis of the function prologue at PC and update CACHE | |
516 | accordingly. Bail out early if LIMIT is reached. Return the | |
517 | address where the analysis stopped. If LIMIT points beyond the | |
518 | function prologue, the return address should be the end of the | |
519 | prologue. */ | |
520 | ||
521 | static CORE_ADDR | |
e17a4113 UW |
522 | m88k_analyze_prologue (struct gdbarch *gdbarch, |
523 | CORE_ADDR pc, CORE_ADDR limit, | |
bf2ca189 MK |
524 | struct m88k_frame_cache *cache) |
525 | { | |
e17a4113 | 526 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
bf2ca189 MK |
527 | CORE_ADDR end = limit; |
528 | ||
529 | /* Provide a dummy cache if necessary. */ | |
530 | if (cache == NULL) | |
531 | { | |
8d749320 | 532 | cache = XALLOCA (struct m88k_frame_cache); |
f5cdf498 SM |
533 | cache->saved_regs = |
534 | XALLOCAVEC (struct trad_frame_saved_reg, M88K_R31_REGNUM + 1); | |
bf2ca189 MK |
535 | |
536 | /* We only initialize the members we care about. */ | |
537 | cache->saved_regs[M88K_R1_REGNUM].addr = -1; | |
538 | cache->fp_offset = -1; | |
539 | } | |
540 | ||
541 | while (pc < limit) | |
542 | { | |
543 | struct m88k_prologue_insn *pi = m88k_prologue_insn_table; | |
e17a4113 | 544 | unsigned long insn = m88k_fetch_instruction (pc, byte_order); |
bf2ca189 MK |
545 | |
546 | while ((insn & pi->mask) != pi->insn) | |
547 | pi++; | |
548 | ||
549 | switch (pi->action) | |
550 | { | |
551 | case M88K_PIA_SKIP: | |
552 | /* If we have a frame pointer, and R1 has been saved, | |
553 | consider this instruction as not being part of the | |
554 | prologue. */ | |
555 | if (cache->fp_offset != -1 | |
556 | && cache->saved_regs[M88K_R1_REGNUM].addr != -1) | |
325fac50 | 557 | return std::min (pc, end); |
bf2ca189 MK |
558 | break; |
559 | ||
560 | case M88K_PIA_NOTE_ST: | |
561 | case M88K_PIA_NOTE_STD: | |
562 | /* If no frame has been allocated, the stores aren't part of | |
563 | the prologue. */ | |
564 | if (cache->sp_offset == 0) | |
325fac50 | 565 | return std::min (pc, end); |
bf2ca189 MK |
566 | |
567 | /* Record location of saved registers. */ | |
568 | { | |
569 | int regnum = ST_SRC (insn) + M88K_R0_REGNUM; | |
570 | ULONGEST offset = ST_OFFSET (insn); | |
571 | ||
572 | cache->saved_regs[regnum].addr = offset; | |
573 | if (pi->action == M88K_PIA_NOTE_STD && regnum < M88K_R31_REGNUM) | |
574 | cache->saved_regs[regnum + 1].addr = offset + 4; | |
575 | } | |
576 | break; | |
577 | ||
578 | case M88K_PIA_NOTE_SP_ADJUSTMENT: | |
579 | /* A second stack pointer adjustment isn't part of the | |
580 | prologue. */ | |
581 | if (cache->sp_offset != 0) | |
325fac50 | 582 | return std::min (pc, end); |
bf2ca189 MK |
583 | |
584 | /* Store stack pointer adjustment. */ | |
585 | cache->sp_offset = -SUBU_OFFSET (insn); | |
586 | break; | |
587 | ||
588 | case M88K_PIA_NOTE_FP_ASSIGNMENT: | |
589 | /* A second frame pointer assignment isn't part of the | |
590 | prologue. */ | |
591 | if (cache->fp_offset != -1) | |
325fac50 | 592 | return std::min (pc, end); |
bf2ca189 MK |
593 | |
594 | /* Record frame pointer assignment. */ | |
595 | cache->fp_offset = ADDU_OFFSET (insn); | |
596 | break; | |
597 | ||
598 | case M88K_PIA_NOTE_BRANCH: | |
599 | /* The branch instruction isn't part of the prologue, but | |
600 | the instruction in the delay slot might be. Limit the | |
601 | prologue analysis to the delay slot and record the branch | |
602 | instruction as the end of the prologue. */ | |
325fac50 | 603 | limit = std::min (limit, pc + 2 * M88K_INSN_SIZE); |
bf2ca189 MK |
604 | end = pc; |
605 | break; | |
606 | ||
607 | case M88K_PIA_NOTE_PROLOGUE_END: | |
325fac50 | 608 | return std::min (pc, end); |
bf2ca189 MK |
609 | } |
610 | ||
611 | pc += M88K_INSN_SIZE; | |
612 | } | |
613 | ||
614 | return end; | |
615 | } | |
616 | ||
617 | /* An upper limit to the size of the prologue. */ | |
618 | const int m88k_max_prologue_size = 128 * M88K_INSN_SIZE; | |
619 | ||
620 | /* Return the address of first real instruction of the function | |
621 | starting at PC. */ | |
622 | ||
623 | static CORE_ADDR | |
6093d2eb | 624 | m88k_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
bf2ca189 MK |
625 | { |
626 | struct symtab_and_line sal; | |
627 | CORE_ADDR func_start, func_end; | |
628 | ||
629 | /* This is the preferred method, find the end of the prologue by | |
630 | using the debugging information. */ | |
631 | if (find_pc_partial_function (pc, NULL, &func_start, &func_end)) | |
632 | { | |
633 | sal = find_pc_line (func_start, 0); | |
634 | ||
635 | if (sal.end < func_end && pc <= sal.end) | |
636 | return sal.end; | |
637 | } | |
638 | ||
e17a4113 UW |
639 | return m88k_analyze_prologue (gdbarch, pc, pc + m88k_max_prologue_size, |
640 | NULL); | |
bf2ca189 MK |
641 | } |
642 | ||
63807e1d | 643 | static struct m88k_frame_cache * |
ed0c3906 | 644 | m88k_frame_cache (struct frame_info *this_frame, void **this_cache) |
bf2ca189 | 645 | { |
e17a4113 | 646 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
bf2ca189 MK |
647 | struct m88k_frame_cache *cache; |
648 | CORE_ADDR frame_sp; | |
649 | ||
650 | if (*this_cache) | |
9a3c8263 | 651 | return (struct m88k_frame_cache *) *this_cache; |
bf2ca189 MK |
652 | |
653 | cache = FRAME_OBSTACK_ZALLOC (struct m88k_frame_cache); | |
ed0c3906 | 654 | cache->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
bf2ca189 MK |
655 | cache->fp_offset = -1; |
656 | ||
ed0c3906 | 657 | cache->pc = get_frame_func (this_frame); |
bf2ca189 | 658 | if (cache->pc != 0) |
e17a4113 UW |
659 | m88k_analyze_prologue (gdbarch, cache->pc, get_frame_pc (this_frame), |
660 | cache); | |
bf2ca189 MK |
661 | |
662 | /* Calculate the stack pointer used in the prologue. */ | |
663 | if (cache->fp_offset != -1) | |
664 | { | |
665 | CORE_ADDR fp; | |
666 | ||
ed0c3906 | 667 | fp = get_frame_register_unsigned (this_frame, M88K_R30_REGNUM); |
bf2ca189 MK |
668 | frame_sp = fp - cache->fp_offset; |
669 | } | |
670 | else | |
671 | { | |
672 | /* If we know where the return address is saved, we can take a | |
673 | solid guess at what the frame pointer should be. */ | |
674 | if (cache->saved_regs[M88K_R1_REGNUM].addr != -1) | |
675 | cache->fp_offset = cache->saved_regs[M88K_R1_REGNUM].addr - 4; | |
ed0c3906 | 676 | frame_sp = get_frame_register_unsigned (this_frame, M88K_R31_REGNUM); |
bf2ca189 MK |
677 | } |
678 | ||
679 | /* Now that we know the stack pointer, adjust the location of the | |
680 | saved registers. */ | |
681 | { | |
682 | int regnum; | |
683 | ||
684 | for (regnum = M88K_R0_REGNUM; regnum < M88K_R31_REGNUM; regnum ++) | |
685 | if (cache->saved_regs[regnum].addr != -1) | |
686 | cache->saved_regs[regnum].addr += frame_sp; | |
687 | } | |
688 | ||
689 | /* Calculate the frame's base. */ | |
690 | cache->base = frame_sp - cache->sp_offset; | |
691 | trad_frame_set_value (cache->saved_regs, M88K_R31_REGNUM, cache->base); | |
692 | ||
693 | /* Identify SXIP with the return address in R1. */ | |
694 | cache->saved_regs[M88K_SXIP_REGNUM] = cache->saved_regs[M88K_R1_REGNUM]; | |
695 | ||
696 | *this_cache = cache; | |
697 | return cache; | |
698 | } | |
699 | ||
700 | static void | |
ed0c3906 | 701 | m88k_frame_this_id (struct frame_info *this_frame, void **this_cache, |
bf2ca189 MK |
702 | struct frame_id *this_id) |
703 | { | |
ed0c3906 | 704 | struct m88k_frame_cache *cache = m88k_frame_cache (this_frame, this_cache); |
bf2ca189 MK |
705 | |
706 | /* This marks the outermost frame. */ | |
707 | if (cache->base == 0) | |
708 | return; | |
709 | ||
710 | (*this_id) = frame_id_build (cache->base, cache->pc); | |
711 | } | |
712 | ||
ed0c3906 UW |
713 | static struct value * |
714 | m88k_frame_prev_register (struct frame_info *this_frame, | |
715 | void **this_cache, int regnum) | |
bf2ca189 | 716 | { |
ed0c3906 | 717 | struct m88k_frame_cache *cache = m88k_frame_cache (this_frame, this_cache); |
bf2ca189 MK |
718 | |
719 | if (regnum == M88K_SNIP_REGNUM || regnum == M88K_SFIP_REGNUM) | |
720 | { | |
ed0c3906 UW |
721 | struct value *value; |
722 | CORE_ADDR pc; | |
bf2ca189 | 723 | |
ed0c3906 UW |
724 | value = trad_frame_get_prev_register (this_frame, cache->saved_regs, |
725 | M88K_SXIP_REGNUM); | |
726 | pc = value_as_long (value); | |
727 | release_value (value); | |
728 | value_free (value); | |
bf2ca189 | 729 | |
ed0c3906 UW |
730 | if (regnum == M88K_SFIP_REGNUM) |
731 | pc += 4; | |
bf2ca189 | 732 | |
ed0c3906 | 733 | return frame_unwind_got_constant (this_frame, regnum, pc + 4); |
bf2ca189 MK |
734 | } |
735 | ||
ed0c3906 | 736 | return trad_frame_get_prev_register (this_frame, cache->saved_regs, regnum); |
bf2ca189 MK |
737 | } |
738 | ||
739 | static const struct frame_unwind m88k_frame_unwind = | |
740 | { | |
741 | NORMAL_FRAME, | |
8fbca658 | 742 | default_frame_unwind_stop_reason, |
bf2ca189 | 743 | m88k_frame_this_id, |
ed0c3906 UW |
744 | m88k_frame_prev_register, |
745 | NULL, | |
746 | default_frame_sniffer | |
bf2ca189 | 747 | }; |
bf2ca189 MK |
748 | \f |
749 | ||
750 | static CORE_ADDR | |
ed0c3906 | 751 | m88k_frame_base_address (struct frame_info *this_frame, void **this_cache) |
bf2ca189 | 752 | { |
ed0c3906 | 753 | struct m88k_frame_cache *cache = m88k_frame_cache (this_frame, this_cache); |
bf2ca189 MK |
754 | |
755 | if (cache->fp_offset != -1) | |
756 | return cache->base + cache->sp_offset + cache->fp_offset; | |
757 | ||
758 | return 0; | |
759 | } | |
760 | ||
761 | static const struct frame_base m88k_frame_base = | |
762 | { | |
763 | &m88k_frame_unwind, | |
764 | m88k_frame_base_address, | |
765 | m88k_frame_base_address, | |
766 | m88k_frame_base_address | |
767 | }; | |
768 | \f | |
769 | ||
770 | /* Core file support. */ | |
771 | ||
772 | /* Supply register REGNUM from the buffer specified by GREGS and LEN | |
773 | in the general-purpose register set REGSET to register cache | |
774 | REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */ | |
775 | ||
776 | static void | |
777 | m88k_supply_gregset (const struct regset *regset, | |
778 | struct regcache *regcache, | |
779 | int regnum, const void *gregs, size_t len) | |
780 | { | |
9a3c8263 | 781 | const gdb_byte *regs = (const gdb_byte *) gregs; |
bf2ca189 MK |
782 | int i; |
783 | ||
784 | for (i = 0; i < M88K_NUM_REGS; i++) | |
785 | { | |
786 | if (regnum == i || regnum == -1) | |
787 | regcache_raw_supply (regcache, i, regs + i * 4); | |
788 | } | |
789 | } | |
790 | ||
791 | /* Motorola 88000 register set. */ | |
792 | ||
3ca7dae4 | 793 | static const struct regset m88k_gregset = |
bf2ca189 MK |
794 | { |
795 | NULL, | |
796 | m88k_supply_gregset | |
797 | }; | |
798 | ||
b61ddd6e | 799 | /* Iterate over supported core file register note sections. */ |
bf2ca189 | 800 | |
b61ddd6e AA |
801 | static void |
802 | m88k_iterate_over_regset_sections (struct gdbarch *gdbarch, | |
803 | iterate_over_regset_sections_cb *cb, | |
804 | void *cb_data, | |
805 | const struct regcache *regcache) | |
bf2ca189 | 806 | { |
b61ddd6e | 807 | cb (".reg", M88K_NUM_REGS * 4, &m88k_gregset, NULL, cb_data); |
bf2ca189 MK |
808 | } |
809 | \f | |
810 | ||
811 | static struct gdbarch * | |
812 | m88k_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
813 | { | |
814 | struct gdbarch *gdbarch; | |
815 | ||
816 | /* If there is already a candidate, use it. */ | |
817 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
818 | if (arches != NULL) | |
819 | return arches->gdbarch; | |
820 | ||
821 | /* Allocate space for the new architecture. */ | |
822 | gdbarch = gdbarch_alloc (&info, NULL); | |
823 | ||
824 | /* There is no real `long double'. */ | |
825 | set_gdbarch_long_double_bit (gdbarch, 64); | |
8da61cc4 | 826 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double); |
bf2ca189 MK |
827 | |
828 | set_gdbarch_num_regs (gdbarch, M88K_NUM_REGS); | |
829 | set_gdbarch_register_name (gdbarch, m88k_register_name); | |
830 | set_gdbarch_register_type (gdbarch, m88k_register_type); | |
831 | ||
832 | /* Register numbers of various important registers. */ | |
833 | set_gdbarch_sp_regnum (gdbarch, M88K_R31_REGNUM); | |
834 | set_gdbarch_pc_regnum (gdbarch, M88K_SXIP_REGNUM); | |
835 | ||
836 | /* Core file support. */ | |
b61ddd6e AA |
837 | set_gdbarch_iterate_over_regset_sections |
838 | (gdbarch, m88k_iterate_over_regset_sections); | |
bf2ca189 MK |
839 | |
840 | set_gdbarch_print_insn (gdbarch, print_insn_m88k); | |
841 | ||
842 | set_gdbarch_skip_prologue (gdbarch, m88k_skip_prologue); | |
843 | ||
844 | /* Stack grows downward. */ | |
845 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
846 | ||
847 | /* Call dummy code. */ | |
848 | set_gdbarch_push_dummy_call (gdbarch, m88k_push_dummy_call); | |
ed0c3906 | 849 | set_gdbarch_dummy_id (gdbarch, m88k_dummy_id); |
bf2ca189 | 850 | |
025bb325 | 851 | /* Return value info. */ |
bf2ca189 MK |
852 | set_gdbarch_return_value (gdbarch, m88k_return_value); |
853 | ||
854 | set_gdbarch_addr_bits_remove (gdbarch, m88k_addr_bits_remove); | |
04180708 YQ |
855 | set_gdbarch_breakpoint_kind_from_pc (gdbarch, m88k_breakpoint::kind_from_pc); |
856 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, m88k_breakpoint::bp_from_kind); | |
bf2ca189 MK |
857 | set_gdbarch_unwind_pc (gdbarch, m88k_unwind_pc); |
858 | set_gdbarch_write_pc (gdbarch, m88k_write_pc); | |
859 | ||
860 | frame_base_set_default (gdbarch, &m88k_frame_base); | |
ed0c3906 | 861 | frame_unwind_append_unwinder (gdbarch, &m88k_frame_unwind); |
bf2ca189 MK |
862 | |
863 | return gdbarch; | |
864 | } | |
865 | \f | |
866 | ||
867 | /* Provide a prototype to silence -Wmissing-prototypes. */ | |
868 | void _initialize_m88k_tdep (void); | |
869 | ||
870 | void | |
871 | _initialize_m88k_tdep (void) | |
872 | { | |
873 | gdbarch_register (bfd_arch_m88k, m88k_gdbarch_init, NULL); | |
874 | } |