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96baa820 | 1 | /* Target-machine dependent code for Motorola MCore for GDB, the GNU debugger |
51603483 | 2 | Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
96baa820 JM |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
19 | ||
20 | #include "defs.h" | |
21 | #include "frame.h" | |
22 | #include "symtab.h" | |
23 | #include "value.h" | |
24 | #include "gdbcmd.h" | |
4e052eda | 25 | #include "regcache.h" |
58841d58 AC |
26 | #include "symfile.h" |
27 | #include "gdbcore.h" | |
28 | #include "inferior.h" | |
4e0d9804 | 29 | #include "arch-utils.h" |
9bbe19fb | 30 | #include "gdb_string.h" |
92bf2b80 | 31 | #include "disasm.h" |
a89aa300 | 32 | #include "dis-asm.h" |
96baa820 | 33 | |
a78f21af AC |
34 | static CORE_ADDR mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, |
35 | int skip_prologue); | |
96baa820 JM |
36 | static int get_insn (CORE_ADDR pc); |
37 | ||
96baa820 JM |
38 | #ifdef MCORE_DEBUG |
39 | int mcore_debug = 0; | |
40 | #endif | |
41 | ||
96baa820 | 42 | |
4cfe2084 GS |
43 | /* All registers are 4 bytes long. */ |
44 | #define MCORE_REG_SIZE 4 | |
45 | #define MCORE_NUM_REGS 65 | |
96baa820 | 46 | |
efdc1108 GS |
47 | /* Some useful register numbers. */ |
48 | #define PR_REGNUM 15 | |
49 | #define FIRST_ARGREG 2 | |
50 | #define LAST_ARGREG 7 | |
51 | #define RETVAL_REGNUM 2 | |
52 | ||
4cfe2084 | 53 | |
96baa820 JM |
54 | /* Additional info that we use for managing frames */ |
55 | struct frame_extra_info | |
56 | { | |
57 | /* A generic status word */ | |
58 | int status; | |
59 | ||
60 | /* Size of this frame */ | |
61 | int framesize; | |
62 | ||
63 | /* The register that is acting as a frame pointer, if | |
64 | it is being used. This is undefined if status | |
65 | does not contain the flag MY_FRAME_IN_FP. */ | |
66 | int fp_regnum; | |
67 | }; | |
68 | ||
69 | /* frame_extra_info status flags */ | |
70 | ||
71 | /* The base of the current frame is actually in the stack pointer. | |
72 | This happens when there is no frame pointer (MCore ABI does not | |
73 | require a frame pointer) or when we're stopped in the prologue or | |
74 | epilogue itself. In these cases, mcore_analyze_prologue will need | |
75 | to update fi->frame before returning or analyzing the register | |
76 | save instructions. */ | |
77 | #define MY_FRAME_IN_SP 0x1 | |
78 | ||
79 | /* The base of the current frame is in a frame pointer register. | |
80 | This register is noted in frame_extra_info->fp_regnum. | |
81 | ||
8e1a459b | 82 | Note that the existence of an FP might also indicate that the |
96baa820 JM |
83 | function has called alloca. */ |
84 | #define MY_FRAME_IN_FP 0x2 | |
85 | ||
86 | /* This flag is set to indicate that this frame is the top-most | |
87 | frame. This tells frame chain not to bother trying to unwind | |
88 | beyond this frame. */ | |
89 | #define NO_MORE_FRAMES 0x4 | |
90 | ||
91 | /* Instruction macros used for analyzing the prologue */ | |
92 | #define IS_SUBI0(x) (((x) & 0xfe0f) == 0x2400) /* subi r0,oimm5 */ | |
93 | #define IS_STM(x) (((x) & 0xfff0) == 0x0070) /* stm rf-r15,r0 */ | |
94 | #define IS_STWx0(x) (((x) & 0xf00f) == 0x9000) /* stw rz,(r0,disp) */ | |
95 | #define IS_STWxy(x) (((x) & 0xf000) == 0x9000) /* stw rx,(ry,disp) */ | |
96 | #define IS_MOVx0(x) (((x) & 0xfff0) == 0x1200) /* mov rn,r0 */ | |
97 | #define IS_LRW1(x) (((x) & 0xff00) == 0x7100) /* lrw r1,literal */ | |
98 | #define IS_MOVI1(x) (((x) & 0xf80f) == 0x6001) /* movi r1,imm7 */ | |
99 | #define IS_BGENI1(x) (((x) & 0xfe0f) == 0x3201) /* bgeni r1,imm5 */ | |
100 | #define IS_BMASKI1(x) (((x) & 0xfe0f) == 0x2C01) /* bmaski r1,imm5 */ | |
101 | #define IS_ADDI1(x) (((x) & 0xfe0f) == 0x2001) /* addi r1,oimm5 */ | |
102 | #define IS_SUBI1(x) (((x) & 0xfe0f) == 0x2401) /* subi r1,oimm5 */ | |
103 | #define IS_RSUBI1(x) (((x) & 0xfe0f) == 0x2801) /* rsubi r1,imm5 */ | |
104 | #define IS_NOT1(x) (((x) & 0xffff) == 0x01f1) /* not r1 */ | |
105 | #define IS_ROTLI1(x) (((x) & 0xfe0f) == 0x3801) /* rotli r1,imm5 */ | |
106 | #define IS_BSETI1(x) (((x) & 0xfe0f) == 0x3401) /* bseti r1,imm5 */ | |
107 | #define IS_BCLRI1(x) (((x) & 0xfe0f) == 0x3001) /* bclri r1,imm5 */ | |
108 | #define IS_IXH1(x) (((x) & 0xffff) == 0x1d11) /* ixh r1,r1 */ | |
109 | #define IS_IXW1(x) (((x) & 0xffff) == 0x1511) /* ixw r1,r1 */ | |
110 | #define IS_SUB01(x) (((x) & 0xffff) == 0x0510) /* subu r0,r1 */ | |
111 | #define IS_RTS(x) (((x) & 0xffff) == 0x00cf) /* jmp r15 */ | |
112 | ||
113 | #define IS_R1_ADJUSTER(x) \ | |
114 | (IS_ADDI1(x) || IS_SUBI1(x) || IS_ROTLI1(x) || IS_BSETI1(x) \ | |
115 | || IS_BCLRI1(x) || IS_RSUBI1(x) || IS_NOT1(x) \ | |
116 | || IS_IXH1(x) || IS_IXW1(x)) | |
117 | \f | |
118 | ||
119 | #ifdef MCORE_DEBUG | |
120 | static void | |
121 | mcore_dump_insn (char *commnt, CORE_ADDR pc, int insn) | |
122 | { | |
123 | if (mcore_debug) | |
124 | { | |
125 | printf_filtered ("MCORE: %s %08x %08x ", | |
126 | commnt, (unsigned int) pc, (unsigned int) insn); | |
92bf2b80 | 127 | gdb_print_insn (pc, gdb_stdout); |
96baa820 JM |
128 | printf_filtered ("\n"); |
129 | } | |
130 | } | |
131 | #define mcore_insn_debug(args) { if (mcore_debug) printf_filtered args; } | |
132 | #else /* !MCORE_DEBUG */ | |
133 | #define mcore_dump_insn(a,b,c) {} | |
134 | #define mcore_insn_debug(args) {} | |
135 | #endif | |
136 | ||
4cfe2084 GS |
137 | |
138 | static struct type * | |
139 | mcore_register_virtual_type (int regnum) | |
140 | { | |
141 | if (regnum < 0 || regnum >= MCORE_NUM_REGS) | |
142 | internal_error (__FILE__, __LINE__, | |
143 | "mcore_register_virtual_type: illegal register number %d", | |
144 | regnum); | |
145 | else | |
146 | return builtin_type_int; | |
147 | } | |
148 | ||
149 | static int | |
150 | mcore_register_byte (int regnum) | |
151 | { | |
152 | if (regnum < 0 || regnum >= MCORE_NUM_REGS) | |
153 | internal_error (__FILE__, __LINE__, | |
154 | "mcore_register_byte: illegal register number %d", | |
155 | regnum); | |
156 | else | |
157 | return (regnum * MCORE_REG_SIZE); | |
158 | } | |
159 | ||
160 | static int | |
161 | mcore_register_size (int regnum) | |
162 | { | |
163 | ||
164 | if (regnum < 0 || regnum >= MCORE_NUM_REGS) | |
165 | internal_error (__FILE__, __LINE__, | |
166 | "mcore_register_size: illegal register number %d", | |
167 | regnum); | |
168 | else | |
169 | return MCORE_REG_SIZE; | |
170 | } | |
171 | ||
172 | /* The registers of the Motorola MCore processors */ | |
173 | ||
174 | static const char * | |
175 | mcore_register_name (int regnum) | |
176 | { | |
177 | ||
178 | static char *register_names[] = { | |
179 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
180 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
181 | "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7", | |
182 | "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15", | |
183 | "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1", | |
184 | "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15", | |
185 | "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23", | |
186 | "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31", | |
187 | "pc" | |
188 | }; | |
189 | ||
190 | if (regnum < 0 || | |
191 | regnum >= sizeof (register_names) / sizeof (register_names[0])) | |
192 | internal_error (__FILE__, __LINE__, | |
193 | "mcore_register_name: illegal register number %d", | |
194 | regnum); | |
195 | else | |
196 | return register_names[regnum]; | |
197 | } | |
198 | ||
96baa820 JM |
199 | /* Given the address at which to insert a breakpoint (BP_ADDR), |
200 | what will that breakpoint be? | |
201 | ||
202 | For MCore, we have a breakpoint instruction. Since all MCore | |
203 | instructions are 16 bits, this is all we need, regardless of | |
204 | address. bpkt = 0x0000 */ | |
205 | ||
e14e6e9c | 206 | static const unsigned char * |
96baa820 JM |
207 | mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size) |
208 | { | |
209 | static char breakpoint[] = | |
210 | {0x00, 0x00}; | |
211 | *bp_size = 2; | |
212 | return breakpoint; | |
213 | } | |
214 | ||
4e0d9804 GS |
215 | static CORE_ADDR |
216 | mcore_saved_pc_after_call (struct frame_info *frame) | |
217 | { | |
218 | return read_register (PR_REGNUM); | |
219 | } | |
220 | ||
221 | /* This is currently handled by init_extra_frame_info. */ | |
222 | static void | |
223 | mcore_frame_init_saved_regs (struct frame_info *frame) | |
224 | { | |
225 | ||
226 | } | |
227 | ||
228 | /* This is currently handled by mcore_push_arguments */ | |
229 | static void | |
230 | mcore_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
231 | { | |
232 | ||
233 | } | |
234 | ||
efdc1108 GS |
235 | static int |
236 | mcore_reg_struct_has_addr (int gcc_p, struct type *type) | |
237 | { | |
238 | return 0; | |
239 | } | |
240 | ||
241 | ||
96baa820 JM |
242 | /* Helper function for several routines below. This funtion simply |
243 | sets up a fake, aka dummy, frame (not a _call_ dummy frame) that | |
244 | we can analyze with mcore_analyze_prologue. */ | |
245 | ||
246 | static struct frame_info * | |
247 | analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame) | |
248 | { | |
213cc0ad AC |
249 | struct cleanup *old_chain = make_cleanup (null_cleanup, NULL); |
250 | struct frame_info *dummy | |
251 | = deprecated_frame_xmalloc_with_cleanup (SIZEOF_FRAME_SAVED_REGS, | |
252 | sizeof (struct frame_extra_info)); | |
50abf9e5 | 253 | deprecated_update_frame_pc_hack (dummy, pc); |
8ccd593b | 254 | deprecated_update_frame_base_hack (dummy, frame); |
da50a4b7 AC |
255 | get_frame_extra_info (dummy)->status = 0; |
256 | get_frame_extra_info (dummy)->framesize = 0; | |
96baa820 | 257 | mcore_analyze_prologue (dummy, 0, 0); |
213cc0ad | 258 | do_cleanups (old_chain); |
96baa820 JM |
259 | return dummy; |
260 | } | |
261 | ||
0fb34c3a | 262 | /* Function prologues on the Motorola MCore processors consist of: |
96baa820 JM |
263 | |
264 | - adjustments to the stack pointer (r1 used as scratch register) | |
265 | - store word/multiples that use r0 as the base address | |
266 | - making a copy of r0 into another register (a "frame" pointer) | |
267 | ||
268 | Note that the MCore really doesn't have a real frame pointer. | |
269 | Instead, the compiler may copy the SP into a register (usually | |
270 | r8) to act as an arg pointer. For our target-dependent purposes, | |
271 | the frame info's "frame" member will be the beginning of the | |
272 | frame. The SP could, in fact, point below this. | |
273 | ||
274 | The prologue ends when an instruction fails to meet either of | |
275 | the first two criteria or when an FP is made. We make a special | |
276 | exception for gcc. When compiling unoptimized code, gcc will | |
277 | setup stack slots. We need to make sure that we skip the filling | |
278 | of these stack slots as much as possible. This is only done | |
279 | when SKIP_PROLOGUE is set, so that it does not mess up | |
280 | backtraces. */ | |
281 | ||
282 | /* Analyze the prologue of frame FI to determine where registers are saved, | |
283 | the end of the prologue, etc. Return the address of the first line | |
284 | of "real" code (i.e., the end of the prologue). */ | |
285 | ||
286 | static CORE_ADDR | |
287 | mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue) | |
288 | { | |
289 | CORE_ADDR func_addr, func_end, addr, stop; | |
290 | CORE_ADDR stack_size; | |
291 | int insn, rn; | |
93d56215 AC |
292 | int status; |
293 | int fp_regnum = 0; /* dummy, valid when (flags & MY_FRAME_IN_FP) */ | |
294 | int flags; | |
96baa820 JM |
295 | int framesize; |
296 | int register_offsets[NUM_REGS]; | |
297 | char *name; | |
298 | ||
299 | /* If provided, use the PC in the frame to look up the | |
300 | start of this function. */ | |
50abf9e5 | 301 | pc = (fi == NULL ? pc : get_frame_pc (fi)); |
96baa820 JM |
302 | |
303 | /* Find the start of this function. */ | |
304 | status = find_pc_partial_function (pc, &name, &func_addr, &func_end); | |
305 | ||
306 | /* If the start of this function could not be found or if the debbuger | |
307 | is stopped at the first instruction of the prologue, do nothing. */ | |
308 | if (status == 0) | |
309 | return pc; | |
310 | ||
311 | /* If the debugger is entry function, give up. */ | |
312 | if (func_addr == entry_point_address ()) | |
313 | { | |
314 | if (fi != NULL) | |
da50a4b7 | 315 | get_frame_extra_info (fi)->status |= NO_MORE_FRAMES; |
96baa820 JM |
316 | return pc; |
317 | } | |
318 | ||
319 | /* At the start of a function, our frame is in the stack pointer. */ | |
320 | flags = MY_FRAME_IN_SP; | |
321 | ||
322 | /* Start decoding the prologue. We start by checking two special cases: | |
323 | ||
324 | 1. We're about to return | |
325 | 2. We're at the first insn of the prologue. | |
326 | ||
327 | If we're about to return, our frame has already been deallocated. | |
328 | If we are stopped at the first instruction of a prologue, | |
329 | then our frame has not yet been set up. */ | |
330 | ||
331 | /* Get the first insn from memory (all MCore instructions are 16 bits) */ | |
332 | mcore_insn_debug (("MCORE: starting prologue decoding\n")); | |
333 | insn = get_insn (pc); | |
334 | mcore_dump_insn ("got 1: ", pc, insn); | |
335 | ||
336 | /* Check for return. */ | |
337 | if (fi != NULL && IS_RTS (insn)) | |
338 | { | |
339 | mcore_insn_debug (("MCORE: got jmp r15")); | |
11c02a10 | 340 | if (get_next_frame (fi) == NULL) |
8ccd593b | 341 | deprecated_update_frame_base_hack (fi, read_sp ()); |
50abf9e5 | 342 | return get_frame_pc (fi); |
96baa820 JM |
343 | } |
344 | ||
345 | /* Check for first insn of prologue */ | |
50abf9e5 | 346 | if (fi != NULL && get_frame_pc (fi) == func_addr) |
96baa820 | 347 | { |
11c02a10 | 348 | if (get_next_frame (fi) == NULL) |
8ccd593b | 349 | deprecated_update_frame_base_hack (fi, read_sp ()); |
50abf9e5 | 350 | return get_frame_pc (fi); |
96baa820 JM |
351 | } |
352 | ||
353 | /* Figure out where to stop scanning */ | |
50abf9e5 | 354 | stop = (fi ? get_frame_pc (fi) : func_end); |
96baa820 JM |
355 | |
356 | /* Don't walk off the end of the function */ | |
357 | stop = (stop > func_end ? func_end : stop); | |
358 | ||
359 | /* REGISTER_OFFSETS will contain offsets, from the top of the frame | |
360 | (NOT the frame pointer), for the various saved registers or -1 | |
361 | if the register is not saved. */ | |
362 | for (rn = 0; rn < NUM_REGS; rn++) | |
363 | register_offsets[rn] = -1; | |
364 | ||
365 | /* Analyze the prologue. Things we determine from analyzing the | |
366 | prologue include: | |
367 | * the size of the frame | |
368 | * where saved registers are located (and which are saved) | |
369 | * FP used? */ | |
370 | mcore_insn_debug (("MCORE: Scanning prologue: func_addr=0x%x, stop=0x%x\n", | |
371 | (unsigned int) func_addr, (unsigned int) stop)); | |
372 | ||
373 | framesize = 0; | |
374 | for (addr = func_addr; addr < stop; addr += 2) | |
375 | { | |
376 | /* Get next insn */ | |
377 | insn = get_insn (addr); | |
378 | mcore_dump_insn ("got 2: ", addr, insn); | |
379 | ||
380 | if (IS_SUBI0 (insn)) | |
381 | { | |
382 | int offset = 1 + ((insn >> 4) & 0x1f); | |
8e1a459b | 383 | mcore_insn_debug (("MCORE: got subi r0,%d; continuing\n", offset)); |
96baa820 JM |
384 | framesize += offset; |
385 | continue; | |
386 | } | |
387 | else if (IS_STM (insn)) | |
388 | { | |
389 | /* Spill register(s) */ | |
390 | int offset; | |
391 | int start_register; | |
392 | ||
393 | /* BIG WARNING! The MCore ABI does not restrict functions | |
394 | to taking only one stack allocation. Therefore, when | |
395 | we save a register, we record the offset of where it was | |
396 | saved relative to the current framesize. This will | |
397 | then give an offset from the SP upon entry to our | |
398 | function. Remember, framesize is NOT constant until | |
399 | we're done scanning the prologue. */ | |
400 | start_register = (insn & 0xf); | |
401 | mcore_insn_debug (("MCORE: got stm r%d-r15,(r0)\n", start_register)); | |
402 | ||
403 | for (rn = start_register, offset = 0; rn <= 15; rn++, offset += 4) | |
404 | { | |
405 | register_offsets[rn] = framesize - offset; | |
406 | mcore_insn_debug (("MCORE: r%d saved at 0x%x (offset %d)\n", rn, | |
407 | register_offsets[rn], offset)); | |
408 | } | |
409 | mcore_insn_debug (("MCORE: continuing\n")); | |
410 | continue; | |
411 | } | |
412 | else if (IS_STWx0 (insn)) | |
413 | { | |
414 | /* Spill register: see note for IS_STM above. */ | |
415 | int imm; | |
416 | ||
417 | rn = (insn >> 8) & 0xf; | |
418 | imm = (insn >> 4) & 0xf; | |
419 | register_offsets[rn] = framesize - (imm << 2); | |
420 | mcore_insn_debug (("MCORE: r%d saved at offset 0x%x\n", rn, register_offsets[rn])); | |
421 | mcore_insn_debug (("MCORE: continuing\n")); | |
422 | continue; | |
423 | } | |
424 | else if (IS_MOVx0 (insn)) | |
425 | { | |
426 | /* We have a frame pointer, so this prologue is over. Note | |
427 | the register which is acting as the frame pointer. */ | |
428 | flags |= MY_FRAME_IN_FP; | |
429 | flags &= ~MY_FRAME_IN_SP; | |
430 | fp_regnum = insn & 0xf; | |
431 | mcore_insn_debug (("MCORE: Found a frame pointer: r%d\n", fp_regnum)); | |
432 | ||
433 | /* If we found an FP, we're at the end of the prologue. */ | |
434 | mcore_insn_debug (("MCORE: end of prologue\n")); | |
435 | if (skip_prologue) | |
436 | continue; | |
437 | ||
438 | /* If we're decoding prologue, stop here. */ | |
439 | addr += 2; | |
440 | break; | |
441 | } | |
442 | else if (IS_STWxy (insn) && (flags & MY_FRAME_IN_FP) && ((insn & 0xf) == fp_regnum)) | |
443 | { | |
444 | /* Special case. Skip over stack slot allocs, too. */ | |
445 | mcore_insn_debug (("MCORE: push arg onto stack.\n")); | |
446 | continue; | |
447 | } | |
448 | else if (IS_LRW1 (insn) || IS_MOVI1 (insn) | |
449 | || IS_BGENI1 (insn) || IS_BMASKI1 (insn)) | |
450 | { | |
451 | int adjust = 0; | |
452 | int offset = 0; | |
453 | int insn2; | |
454 | ||
455 | mcore_insn_debug (("MCORE: looking at large frame\n")); | |
456 | if (IS_LRW1 (insn)) | |
457 | { | |
458 | adjust = | |
459 | read_memory_integer ((addr + 2 + ((insn & 0xff) << 2)) & 0xfffffffc, 4); | |
460 | } | |
461 | else if (IS_MOVI1 (insn)) | |
462 | adjust = (insn >> 4) & 0x7f; | |
463 | else if (IS_BGENI1 (insn)) | |
464 | adjust = 1 << ((insn >> 4) & 0x1f); | |
465 | else /* IS_BMASKI (insn) */ | |
466 | adjust = (1 << (adjust >> 4) & 0x1f) - 1; | |
467 | ||
468 | mcore_insn_debug (("MCORE: base framesize=0x%x\n", adjust)); | |
469 | ||
470 | /* May have zero or more insns which modify r1 */ | |
471 | mcore_insn_debug (("MCORE: looking for r1 adjusters...\n")); | |
472 | offset = 2; | |
473 | insn2 = get_insn (addr + offset); | |
474 | while (IS_R1_ADJUSTER (insn2)) | |
475 | { | |
476 | int imm; | |
477 | ||
478 | imm = (insn2 >> 4) & 0x1f; | |
479 | mcore_dump_insn ("got 3: ", addr + offset, insn); | |
480 | if (IS_ADDI1 (insn2)) | |
481 | { | |
482 | adjust += (imm + 1); | |
483 | mcore_insn_debug (("MCORE: addi r1,%d\n", imm + 1)); | |
484 | } | |
485 | else if (IS_SUBI1 (insn2)) | |
486 | { | |
487 | adjust -= (imm + 1); | |
488 | mcore_insn_debug (("MCORE: subi r1,%d\n", imm + 1)); | |
489 | } | |
490 | else if (IS_RSUBI1 (insn2)) | |
491 | { | |
492 | adjust = imm - adjust; | |
493 | mcore_insn_debug (("MCORE: rsubi r1,%d\n", imm + 1)); | |
494 | } | |
495 | else if (IS_NOT1 (insn2)) | |
496 | { | |
497 | adjust = ~adjust; | |
498 | mcore_insn_debug (("MCORE: not r1\n")); | |
499 | } | |
500 | else if (IS_ROTLI1 (insn2)) | |
501 | { | |
502 | adjust <<= imm; | |
503 | mcore_insn_debug (("MCORE: rotli r1,%d\n", imm + 1)); | |
504 | } | |
505 | else if (IS_BSETI1 (insn2)) | |
506 | { | |
507 | adjust |= (1 << imm); | |
508 | mcore_insn_debug (("MCORE: bseti r1,%d\n", imm)); | |
509 | } | |
510 | else if (IS_BCLRI1 (insn2)) | |
511 | { | |
512 | adjust &= ~(1 << imm); | |
513 | mcore_insn_debug (("MCORE: bclri r1,%d\n", imm)); | |
514 | } | |
515 | else if (IS_IXH1 (insn2)) | |
516 | { | |
517 | adjust *= 3; | |
518 | mcore_insn_debug (("MCORE: ix.h r1,r1\n")); | |
519 | } | |
520 | else if (IS_IXW1 (insn2)) | |
521 | { | |
522 | adjust *= 5; | |
523 | mcore_insn_debug (("MCORE: ix.w r1,r1\n")); | |
524 | } | |
525 | ||
526 | offset += 2; | |
527 | insn2 = get_insn (addr + offset); | |
528 | }; | |
529 | ||
530 | mcore_insn_debug (("MCORE: done looking for r1 adjusters\n")); | |
531 | ||
532 | /* If the next insn adjusts the stack pointer, we keep everything; | |
533 | if not, we scrap it and we've found the end of the prologue. */ | |
534 | if (IS_SUB01 (insn2)) | |
535 | { | |
536 | addr += offset; | |
537 | framesize += adjust; | |
538 | mcore_insn_debug (("MCORE: found stack adjustment of 0x%x bytes.\n", adjust)); | |
539 | mcore_insn_debug (("MCORE: skipping to new address 0x%x\n", addr)); | |
540 | mcore_insn_debug (("MCORE: continuing\n")); | |
541 | continue; | |
542 | } | |
543 | ||
544 | /* None of these instructions are prologue, so don't touch | |
545 | anything. */ | |
546 | mcore_insn_debug (("MCORE: no subu r1,r0, NOT altering framesize.\n")); | |
547 | break; | |
548 | } | |
549 | ||
550 | /* This is not a prologue insn, so stop here. */ | |
551 | mcore_insn_debug (("MCORE: insn is not a prologue insn -- ending scan\n")); | |
552 | break; | |
553 | } | |
554 | ||
555 | mcore_insn_debug (("MCORE: done analyzing prologue\n")); | |
556 | mcore_insn_debug (("MCORE: prologue end = 0x%x\n", addr)); | |
557 | ||
558 | /* Save everything we have learned about this frame into FI. */ | |
559 | if (fi != NULL) | |
560 | { | |
da50a4b7 AC |
561 | get_frame_extra_info (fi)->framesize = framesize; |
562 | get_frame_extra_info (fi)->fp_regnum = fp_regnum; | |
563 | get_frame_extra_info (fi)->status = flags; | |
96baa820 JM |
564 | |
565 | /* Fix the frame pointer. When gcc uses r8 as a frame pointer, | |
566 | it is really an arg ptr. We adjust fi->frame to be a "real" | |
567 | frame pointer. */ | |
11c02a10 | 568 | if (get_next_frame (fi) == NULL) |
96baa820 | 569 | { |
da50a4b7 | 570 | if (get_frame_extra_info (fi)->status & MY_FRAME_IN_SP) |
8ccd593b | 571 | deprecated_update_frame_base_hack (fi, read_sp () + framesize); |
96baa820 | 572 | else |
8ccd593b | 573 | deprecated_update_frame_base_hack (fi, read_register (fp_regnum) + framesize); |
96baa820 JM |
574 | } |
575 | ||
576 | /* Note where saved registers are stored. The offsets in REGISTER_OFFSETS | |
577 | are computed relative to the top of the frame. */ | |
578 | for (rn = 0; rn < NUM_REGS; rn++) | |
579 | { | |
580 | if (register_offsets[rn] >= 0) | |
581 | { | |
1b1d3794 | 582 | deprecated_get_frame_saved_regs (fi)[rn] = get_frame_base (fi) - register_offsets[rn]; |
96baa820 JM |
583 | mcore_insn_debug (("Saved register %s stored at 0x%08x, value=0x%08x\n", |
584 | mcore_register_names[rn], fi->saved_regs[rn], | |
585 | read_memory_integer (fi->saved_regs[rn], 4))); | |
586 | } | |
587 | } | |
588 | } | |
589 | ||
590 | /* Return addr of first non-prologue insn. */ | |
591 | return addr; | |
592 | } | |
593 | ||
a5afb99f AC |
594 | /* Given a GDB frame, determine the address of the calling function's |
595 | frame. This will be used to create a new GDB frame struct, and | |
e9582e71 AC |
596 | then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC |
597 | will be called for the new frame. */ | |
96baa820 | 598 | |
e14e6e9c | 599 | static CORE_ADDR |
96baa820 JM |
600 | mcore_frame_chain (struct frame_info * fi) |
601 | { | |
602 | struct frame_info *dummy; | |
603 | CORE_ADDR callers_addr; | |
604 | ||
605 | /* Analyze the prologue of this function. */ | |
da50a4b7 | 606 | if (get_frame_extra_info (fi)->status == 0) |
96baa820 JM |
607 | mcore_analyze_prologue (fi, 0, 0); |
608 | ||
609 | /* If mcore_analyze_prologue set NO_MORE_FRAMES, quit now. */ | |
da50a4b7 | 610 | if (get_frame_extra_info (fi)->status & NO_MORE_FRAMES) |
96baa820 JM |
611 | return 0; |
612 | ||
613 | /* Now that we've analyzed our prologue, we can start to ask | |
614 | for information about our caller. The easiest way to do | |
615 | this is to analyze our caller's prologue. | |
616 | ||
617 | If our caller has a frame pointer, then we need to find | |
618 | the value of that register upon entry to our frame. | |
619 | This value is either in fi->saved_regs[rn] if it's saved, | |
620 | or it's still in a register. | |
621 | ||
622 | If our caller does not have a frame pointer, then his frame base | |
623 | is <our base> + -<caller's frame size>. */ | |
8bedc050 | 624 | dummy = analyze_dummy_frame (DEPRECATED_FRAME_SAVED_PC (fi), get_frame_base (fi)); |
96baa820 | 625 | |
da50a4b7 | 626 | if (get_frame_extra_info (dummy)->status & MY_FRAME_IN_FP) |
96baa820 | 627 | { |
da50a4b7 | 628 | int fp = get_frame_extra_info (dummy)->fp_regnum; |
96baa820 JM |
629 | |
630 | /* Our caller has a frame pointer. */ | |
1b1d3794 | 631 | if (deprecated_get_frame_saved_regs (fi)[fp] != 0) |
96baa820 JM |
632 | { |
633 | /* The "FP" was saved on the stack. Don't forget to adjust | |
634 | the "FP" with the framesize to get a real FP. */ | |
1b1d3794 | 635 | callers_addr = read_memory_integer (deprecated_get_frame_saved_regs (fi)[fp], |
b1e29e33 | 636 | DEPRECATED_REGISTER_SIZE) |
da50a4b7 | 637 | + get_frame_extra_info (dummy)->framesize; |
96baa820 JM |
638 | } |
639 | else | |
640 | { | |
641 | /* It's still in the register. Don't forget to adjust | |
642 | the "FP" with the framesize to get a real FP. */ | |
da50a4b7 | 643 | callers_addr = read_register (fp) + get_frame_extra_info (dummy)->framesize; |
96baa820 JM |
644 | } |
645 | } | |
646 | else | |
647 | { | |
648 | /* Our caller does not have a frame pointer. */ | |
da50a4b7 | 649 | callers_addr = get_frame_base (fi) + get_frame_extra_info (dummy)->framesize; |
96baa820 JM |
650 | } |
651 | ||
652 | return callers_addr; | |
653 | } | |
654 | ||
655 | /* Skip the prologue of the function at PC. */ | |
656 | ||
e14e6e9c | 657 | static CORE_ADDR |
96baa820 JM |
658 | mcore_skip_prologue (CORE_ADDR pc) |
659 | { | |
660 | CORE_ADDR func_addr, func_end; | |
661 | struct symtab_and_line sal; | |
662 | ||
663 | /* If we have line debugging information, then the end of the | |
7e73cedf | 664 | prologue should be the first assembly instruction of the first |
96baa820 JM |
665 | source line */ |
666 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
667 | { | |
668 | sal = find_pc_line (func_addr, 0); | |
669 | if (sal.end && sal.end < func_end) | |
670 | return sal.end; | |
671 | } | |
672 | ||
673 | return mcore_analyze_prologue (NULL, pc, 1); | |
674 | } | |
675 | ||
676 | /* Return the address at which function arguments are offset. */ | |
e14e6e9c | 677 | static CORE_ADDR |
96baa820 JM |
678 | mcore_frame_args_address (struct frame_info * fi) |
679 | { | |
da50a4b7 | 680 | return get_frame_base (fi) - get_frame_extra_info (fi)->framesize; |
96baa820 JM |
681 | } |
682 | ||
e14e6e9c | 683 | static CORE_ADDR |
96baa820 JM |
684 | mcore_frame_locals_address (struct frame_info * fi) |
685 | { | |
da50a4b7 | 686 | return get_frame_base (fi) - get_frame_extra_info (fi)->framesize; |
96baa820 JM |
687 | } |
688 | ||
689 | /* Return the frame pointer in use at address PC. */ | |
690 | ||
a78f21af | 691 | static void |
e0441cf0 | 692 | mcore_virtual_frame_pointer (CORE_ADDR pc, int *reg, LONGEST *offset) |
96baa820 JM |
693 | { |
694 | struct frame_info *dummy = analyze_dummy_frame (pc, 0); | |
da50a4b7 | 695 | if (get_frame_extra_info (dummy)->status & MY_FRAME_IN_SP) |
96baa820 JM |
696 | { |
697 | *reg = SP_REGNUM; | |
698 | *offset = 0; | |
699 | } | |
700 | else | |
701 | { | |
da50a4b7 | 702 | *reg = get_frame_extra_info (dummy)->fp_regnum; |
96baa820 JM |
703 | *offset = 0; |
704 | } | |
705 | } | |
706 | ||
707 | /* Find the value of register REGNUM in frame FI. */ | |
708 | ||
e14e6e9c | 709 | static CORE_ADDR |
96baa820 JM |
710 | mcore_find_callers_reg (struct frame_info *fi, int regnum) |
711 | { | |
11c02a10 | 712 | for (; fi != NULL; fi = get_next_frame (fi)) |
96baa820 | 713 | { |
1e2330ba AC |
714 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi), |
715 | get_frame_base (fi))) | |
716 | return deprecated_read_register_dummy (get_frame_pc (fi), | |
717 | get_frame_base (fi), regnum); | |
1b1d3794 AC |
718 | else if (deprecated_get_frame_saved_regs (fi)[regnum] != 0) |
719 | return read_memory_integer (deprecated_get_frame_saved_regs (fi)[regnum], | |
b1e29e33 | 720 | DEPRECATED_REGISTER_SIZE); |
96baa820 JM |
721 | } |
722 | ||
723 | return read_register (regnum); | |
724 | } | |
725 | ||
726 | /* Find the saved pc in frame FI. */ | |
727 | ||
e14e6e9c | 728 | static CORE_ADDR |
96baa820 JM |
729 | mcore_frame_saved_pc (struct frame_info * fi) |
730 | { | |
731 | ||
1e2330ba AC |
732 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi), |
733 | get_frame_base (fi))) | |
734 | return deprecated_read_register_dummy (get_frame_pc (fi), | |
735 | get_frame_base (fi), PC_REGNUM); | |
96baa820 JM |
736 | else |
737 | return mcore_find_callers_reg (fi, PR_REGNUM); | |
738 | } | |
739 | \f | |
740 | /* INFERIOR FUNCTION CALLS */ | |
741 | ||
742 | /* This routine gets called when either the user uses the "return" | |
743 | command, or the call dummy breakpoint gets hit. */ | |
744 | ||
a78f21af | 745 | static void |
5ae5f592 | 746 | mcore_pop_frame (void) |
96baa820 JM |
747 | { |
748 | int rn; | |
4e0d9804 | 749 | struct frame_info *fi = get_current_frame (); |
96baa820 | 750 | |
1e2330ba AC |
751 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi), |
752 | get_frame_base (fi))) | |
96baa820 JM |
753 | generic_pop_dummy_frame (); |
754 | else | |
755 | { | |
756 | /* Write out the PC we saved. */ | |
8bedc050 | 757 | write_register (PC_REGNUM, DEPRECATED_FRAME_SAVED_PC (fi)); |
96baa820 JM |
758 | |
759 | /* Restore any saved registers. */ | |
760 | for (rn = 0; rn < NUM_REGS; rn++) | |
761 | { | |
1b1d3794 | 762 | if (deprecated_get_frame_saved_regs (fi)[rn] != 0) |
96baa820 JM |
763 | { |
764 | ULONGEST value; | |
765 | ||
1b1d3794 | 766 | value = read_memory_unsigned_integer (deprecated_get_frame_saved_regs (fi)[rn], |
b1e29e33 | 767 | DEPRECATED_REGISTER_SIZE); |
96baa820 JM |
768 | write_register (rn, value); |
769 | } | |
770 | } | |
771 | ||
772 | /* Actually cut back the stack. */ | |
c193f6ac | 773 | write_register (SP_REGNUM, get_frame_base (fi)); |
96baa820 JM |
774 | } |
775 | ||
776 | /* Finally, throw away any cached frame information. */ | |
777 | flush_cached_frames (); | |
778 | } | |
779 | ||
780 | /* Setup arguments and PR for a call to the target. First six arguments | |
781 | go in FIRST_ARGREG -> LAST_ARGREG, subsequent args go on to the stack. | |
782 | ||
b1e29e33 AC |
783 | - Types with lengths greater than DEPRECATED_REGISTER_SIZE may not |
784 | be split between registers and the stack, and they must start in an | |
785 | even-numbered register. Subsequent args will go onto the stack. | |
96baa820 JM |
786 | |
787 | * Structs may be split between registers and stack, left-aligned. | |
788 | ||
789 | * If the function returns a struct which will not fit into registers (it's | |
790 | more than eight bytes), we must allocate for that, too. Gdb will tell | |
791 | us where this buffer is (STRUCT_ADDR), and we simply place it into | |
792 | FIRST_ARGREG, since the MCORE treats struct returns (of less than eight | |
793 | bytes) as hidden first arguments. */ | |
794 | ||
e14e6e9c | 795 | static CORE_ADDR |
ea7c478f | 796 | mcore_push_arguments (int nargs, struct value **args, CORE_ADDR sp, |
4e0d9804 | 797 | int struct_return, CORE_ADDR struct_addr) |
96baa820 JM |
798 | { |
799 | int argreg; | |
800 | int argnum; | |
801 | struct stack_arg | |
802 | { | |
803 | int len; | |
804 | char *val; | |
805 | } | |
806 | *stack_args; | |
807 | int nstack_args = 0; | |
808 | ||
809 | stack_args = (struct stack_arg *) alloca (nargs * sizeof (struct stack_arg)); | |
810 | ||
811 | argreg = FIRST_ARGREG; | |
812 | ||
813 | /* Align the stack. This is mostly a nop, but not always. It will be needed | |
814 | if we call a function which has argument overflow. */ | |
815 | sp &= ~3; | |
816 | ||
817 | /* If this function returns a struct which does not fit in the | |
818 | return registers, we must pass a buffer to the function | |
819 | which it can use to save the return value. */ | |
820 | if (struct_return) | |
821 | write_register (argreg++, struct_addr); | |
822 | ||
823 | /* FIXME: what about unions? */ | |
824 | for (argnum = 0; argnum < nargs; argnum++) | |
825 | { | |
826 | char *val = (char *) VALUE_CONTENTS (args[argnum]); | |
827 | int len = TYPE_LENGTH (VALUE_TYPE (args[argnum])); | |
828 | struct type *type = VALUE_TYPE (args[argnum]); | |
829 | int olen; | |
830 | ||
831 | mcore_insn_debug (("MCORE PUSH: argreg=%d; len=%d; %s\n", | |
832 | argreg, len, TYPE_CODE (type) == TYPE_CODE_STRUCT ? "struct" : "not struct")); | |
833 | /* Arguments larger than a register must start in an even | |
834 | numbered register. */ | |
835 | olen = len; | |
836 | ||
b1e29e33 | 837 | if (TYPE_CODE (type) != TYPE_CODE_STRUCT && len > DEPRECATED_REGISTER_SIZE && argreg % 2) |
96baa820 | 838 | { |
b1e29e33 | 839 | mcore_insn_debug (("MCORE PUSH: %d > DEPRECATED_REGISTER_SIZE: and %s is not even\n", |
96baa820 JM |
840 | len, mcore_register_names[argreg])); |
841 | argreg++; | |
842 | } | |
843 | ||
b1e29e33 | 844 | if ((argreg <= LAST_ARGREG && len <= (LAST_ARGREG - argreg + 1) * DEPRECATED_REGISTER_SIZE) |
96baa820 JM |
845 | || (TYPE_CODE (type) == TYPE_CODE_STRUCT)) |
846 | { | |
847 | /* Something that will fit entirely into registers (or a struct | |
848 | which may be split between registers and stack). */ | |
849 | mcore_insn_debug (("MCORE PUSH: arg %d going into regs\n", argnum)); | |
850 | ||
b1e29e33 | 851 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT && olen < DEPRECATED_REGISTER_SIZE) |
96baa820 JM |
852 | { |
853 | /* Small structs must be right aligned within the register, | |
854 | the most significant bits are undefined. */ | |
855 | write_register (argreg, extract_unsigned_integer (val, len)); | |
856 | argreg++; | |
857 | len = 0; | |
858 | } | |
859 | ||
860 | while (len > 0 && argreg <= LAST_ARGREG) | |
861 | { | |
b1e29e33 | 862 | write_register (argreg, extract_unsigned_integer (val, DEPRECATED_REGISTER_SIZE)); |
96baa820 | 863 | argreg++; |
b1e29e33 AC |
864 | val += DEPRECATED_REGISTER_SIZE; |
865 | len -= DEPRECATED_REGISTER_SIZE; | |
96baa820 JM |
866 | } |
867 | ||
868 | /* Any remainder for the stack is noted below... */ | |
869 | } | |
870 | else if (TYPE_CODE (VALUE_TYPE (args[argnum])) != TYPE_CODE_STRUCT | |
b1e29e33 | 871 | && len > DEPRECATED_REGISTER_SIZE) |
96baa820 JM |
872 | { |
873 | /* All subsequent args go onto the stack. */ | |
874 | mcore_insn_debug (("MCORE PUSH: does not fit into regs, going onto stack\n")); | |
875 | argnum = LAST_ARGREG + 1; | |
876 | } | |
877 | ||
878 | if (len > 0) | |
879 | { | |
880 | /* Note that this must be saved onto the stack */ | |
881 | mcore_insn_debug (("MCORE PUSH: adding arg %d to stack\n", argnum)); | |
882 | stack_args[nstack_args].val = val; | |
883 | stack_args[nstack_args].len = len; | |
884 | nstack_args++; | |
885 | } | |
886 | ||
887 | } | |
888 | ||
889 | /* We're done with registers and stack allocation. Now do the actual | |
890 | stack pushes. */ | |
891 | while (nstack_args--) | |
892 | { | |
893 | sp -= stack_args[nstack_args].len; | |
894 | write_memory (sp, stack_args[nstack_args].val, stack_args[nstack_args].len); | |
895 | } | |
896 | ||
897 | /* Return adjusted stack pointer. */ | |
898 | return sp; | |
899 | } | |
900 | ||
88a82a65 AC |
901 | /* Store the return address for the call dummy. For MCore, we've opted |
902 | to use generic call dummies, so we simply store the entry-point | |
903 | address into the PR register (r15). */ | |
96baa820 | 904 | |
e14e6e9c | 905 | static CORE_ADDR |
96baa820 JM |
906 | mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp) |
907 | { | |
88a82a65 | 908 | write_register (PR_REGNUM, entry_point_address ()); |
96baa820 JM |
909 | return sp; |
910 | } | |
911 | ||
912 | /* Setting/getting return values from functions. | |
913 | ||
914 | The Motorola MCore processors use r2/r3 to return anything | |
915 | not larger than 32 bits. Everything else goes into a caller- | |
916 | supplied buffer, which is passed in via a hidden first | |
917 | argument. | |
918 | ||
919 | For gdb, this leaves us two routes, based on what | |
920 | USE_STRUCT_CONVENTION (mcore_use_struct_convention) returns. | |
921 | If this macro returns 1, gdb will call STORE_STRUCT_RETURN and | |
922 | EXTRACT_STRUCT_VALUE_ADDRESS. | |
923 | ||
924 | If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE | |
925 | and EXTRACT_RETURN_VALUE to store/fetch the functions return value. */ | |
926 | ||
927 | /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of | |
928 | EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc | |
929 | and TYPE is the type (which is known to be struct, union or array). */ | |
930 | ||
e14e6e9c | 931 | static int |
96baa820 JM |
932 | mcore_use_struct_convention (int gcc_p, struct type *type) |
933 | { | |
934 | return (TYPE_LENGTH (type) > 8); | |
935 | } | |
936 | ||
937 | /* Where is the return value saved? For MCore, a pointer to | |
938 | this buffer was passed as a hidden first argument, so | |
939 | just return that address. */ | |
940 | ||
e14e6e9c | 941 | static CORE_ADDR |
96baa820 JM |
942 | mcore_extract_struct_value_address (char *regbuf) |
943 | { | |
62700349 | 944 | return extract_unsigned_integer (regbuf + DEPRECATED_REGISTER_BYTE (FIRST_ARGREG), DEPRECATED_REGISTER_SIZE); |
96baa820 JM |
945 | } |
946 | ||
947 | /* Given a function which returns a value of type TYPE, extract the | |
948 | the function's return value and place the result into VALBUF. | |
949 | REGBUF is the register contents of the target. */ | |
950 | ||
e14e6e9c | 951 | static void |
96baa820 JM |
952 | mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf) |
953 | { | |
954 | /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */ | |
955 | /* Only getting the first byte! if len = 1, we need the last byte of | |
956 | the register, not the first. */ | |
62700349 | 957 | memcpy (valbuf, regbuf + DEPRECATED_REGISTER_BYTE (RETVAL_REGNUM) + |
96baa820 JM |
958 | (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0), TYPE_LENGTH (type)); |
959 | } | |
960 | ||
961 | /* Store the return value in VALBUF (of type TYPE) where the caller | |
962 | expects to see it. | |
963 | ||
964 | Values less than 32 bits are stored in r2, right justified and | |
965 | sign or zero extended. | |
966 | ||
967 | Values between 32 and 64 bits are stored in r2 (most | |
968 | significant word) and r3 (least significant word, left justified). | |
969 | Note that this includes structures of less than eight bytes, too. */ | |
970 | ||
e14e6e9c | 971 | static void |
96baa820 JM |
972 | mcore_store_return_value (struct type *type, char *valbuf) |
973 | { | |
974 | int value_size; | |
975 | int return_size; | |
976 | int offset; | |
977 | char *zeros; | |
978 | ||
979 | value_size = TYPE_LENGTH (type); | |
980 | ||
981 | /* Return value fits into registers. */ | |
b1e29e33 | 982 | return_size = (value_size + DEPRECATED_REGISTER_SIZE - 1) & ~(DEPRECATED_REGISTER_SIZE - 1); |
62700349 | 983 | offset = DEPRECATED_REGISTER_BYTE (RETVAL_REGNUM) + (return_size - value_size); |
96baa820 JM |
984 | zeros = alloca (return_size); |
985 | memset (zeros, 0, return_size); | |
986 | ||
62700349 | 987 | deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (RETVAL_REGNUM), zeros, |
73937e03 AC |
988 | return_size); |
989 | deprecated_write_register_bytes (offset, valbuf, value_size); | |
96baa820 JM |
990 | } |
991 | ||
992 | /* Initialize our target-dependent "stuff" for this newly created frame. | |
993 | ||
994 | This includes allocating space for saved registers and analyzing | |
995 | the prologue of this frame. */ | |
996 | ||
e14e6e9c | 997 | static void |
4e0d9804 | 998 | mcore_init_extra_frame_info (int fromleaf, struct frame_info *fi) |
96baa820 | 999 | { |
11c02a10 | 1000 | if (fi && get_next_frame (fi)) |
8bedc050 | 1001 | deprecated_update_frame_pc_hack (fi, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi))); |
96baa820 JM |
1002 | |
1003 | frame_saved_regs_zalloc (fi); | |
1004 | ||
a00a19e9 | 1005 | frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info)); |
da50a4b7 AC |
1006 | get_frame_extra_info (fi)->status = 0; |
1007 | get_frame_extra_info (fi)->framesize = 0; | |
96baa820 | 1008 | |
1e2330ba AC |
1009 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi), |
1010 | get_frame_base (fi))) | |
96baa820 | 1011 | { |
04714b91 AC |
1012 | /* We need to setup fi->frame here because call_function_by_hand |
1013 | gets it wrong by assuming it's always FP. */ | |
1e2330ba | 1014 | deprecated_update_frame_base_hack (fi, deprecated_read_register_dummy (get_frame_pc (fi), get_frame_base (fi), SP_REGNUM)); |
96baa820 JM |
1015 | } |
1016 | else | |
1017 | mcore_analyze_prologue (fi, 0, 0); | |
1018 | } | |
1019 | ||
1020 | /* Get an insturction from memory. */ | |
1021 | ||
1022 | static int | |
1023 | get_insn (CORE_ADDR pc) | |
1024 | { | |
1025 | char buf[4]; | |
1026 | int status = read_memory_nobpt (pc, buf, 2); | |
1027 | if (status != 0) | |
1028 | return 0; | |
1029 | ||
1030 | return extract_unsigned_integer (buf, 2); | |
1031 | } | |
1032 | ||
4cfe2084 GS |
1033 | static struct gdbarch * |
1034 | mcore_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1035 | { | |
1036 | static LONGEST call_dummy_words[7] = { }; | |
1037 | struct gdbarch_tdep *tdep = NULL; | |
1038 | struct gdbarch *gdbarch; | |
1039 | ||
1040 | /* find a candidate among the list of pre-declared architectures. */ | |
1041 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1042 | if (arches != NULL) | |
1043 | return (arches->gdbarch); | |
1044 | ||
1045 | gdbarch = gdbarch_alloc (&info, 0); | |
1046 | ||
a5afb99f AC |
1047 | /* NOTE: cagney/2002-12-06: This can be deleted when this arch is |
1048 | ready to unwind the PC first (see frame.c:get_prev_frame()). */ | |
0968aa8c | 1049 | set_gdbarch_deprecated_init_frame_pc (gdbarch, deprecated_init_frame_pc_default); |
a5afb99f | 1050 | |
4e0d9804 GS |
1051 | /* Registers: */ |
1052 | ||
4cfe2084 | 1053 | /* All registers are 32 bits */ |
b1e29e33 | 1054 | set_gdbarch_deprecated_register_size (gdbarch, MCORE_REG_SIZE); |
a0ed5532 AC |
1055 | set_gdbarch_deprecated_max_register_raw_size (gdbarch, MCORE_REG_SIZE); |
1056 | set_gdbarch_deprecated_max_register_virtual_size (gdbarch, MCORE_REG_SIZE); | |
4cfe2084 | 1057 | set_gdbarch_register_name (gdbarch, mcore_register_name); |
9c04cab7 AC |
1058 | set_gdbarch_deprecated_register_virtual_type (gdbarch, mcore_register_virtual_type); |
1059 | set_gdbarch_deprecated_register_virtual_size (gdbarch, mcore_register_size); | |
1060 | set_gdbarch_deprecated_register_raw_size (gdbarch, mcore_register_size); | |
1061 | set_gdbarch_deprecated_register_byte (gdbarch, mcore_register_byte); | |
b8b527c5 | 1062 | set_gdbarch_deprecated_register_bytes (gdbarch, MCORE_REG_SIZE * MCORE_NUM_REGS); |
4e0d9804 GS |
1063 | set_gdbarch_num_regs (gdbarch, MCORE_NUM_REGS); |
1064 | set_gdbarch_pc_regnum (gdbarch, 64); | |
1065 | set_gdbarch_sp_regnum (gdbarch, 0); | |
0ba6dca9 | 1066 | set_gdbarch_deprecated_fp_regnum (gdbarch, 0); |
4e0d9804 GS |
1067 | |
1068 | /* Call Dummies: */ | |
4cfe2084 | 1069 | |
b1e29e33 AC |
1070 | set_gdbarch_deprecated_call_dummy_words (gdbarch, call_dummy_words); |
1071 | set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, 0); | |
a59fe496 | 1072 | set_gdbarch_deprecated_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos); |
6913c89a | 1073 | set_gdbarch_deprecated_saved_pc_after_call (gdbarch, mcore_saved_pc_after_call); |
4e0d9804 GS |
1074 | set_gdbarch_function_start_offset (gdbarch, 0); |
1075 | set_gdbarch_decr_pc_after_break (gdbarch, 0); | |
1076 | set_gdbarch_breakpoint_from_pc (gdbarch, mcore_breakpoint_from_pc); | |
28f617b3 | 1077 | set_gdbarch_deprecated_push_return_address (gdbarch, mcore_push_return_address); |
b81774d8 | 1078 | set_gdbarch_deprecated_push_arguments (gdbarch, mcore_push_arguments); |
4e0d9804 GS |
1079 | |
1080 | /* Frames: */ | |
1081 | ||
e9582e71 | 1082 | set_gdbarch_deprecated_init_extra_frame_info (gdbarch, mcore_init_extra_frame_info); |
618ce49f | 1083 | set_gdbarch_deprecated_frame_chain (gdbarch, mcore_frame_chain); |
f30ee0bc | 1084 | set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, mcore_frame_init_saved_regs); |
8bedc050 | 1085 | set_gdbarch_deprecated_frame_saved_pc (gdbarch, mcore_frame_saved_pc); |
ebba8386 | 1086 | set_gdbarch_deprecated_store_return_value (gdbarch, mcore_store_return_value); |
4e0d9804 GS |
1087 | set_gdbarch_deprecated_extract_return_value (gdbarch, |
1088 | mcore_extract_return_value); | |
4183d812 | 1089 | set_gdbarch_deprecated_store_struct_return (gdbarch, mcore_store_struct_return); |
4e0d9804 GS |
1090 | set_gdbarch_deprecated_extract_struct_value_address (gdbarch, |
1091 | mcore_extract_struct_value_address); | |
1092 | set_gdbarch_skip_prologue (gdbarch, mcore_skip_prologue); | |
1093 | set_gdbarch_frame_args_skip (gdbarch, 0); | |
42efa47a AC |
1094 | set_gdbarch_deprecated_frame_args_address (gdbarch, mcore_frame_args_address); |
1095 | set_gdbarch_deprecated_frame_locals_address (gdbarch, mcore_frame_locals_address); | |
749b82f6 | 1096 | set_gdbarch_deprecated_pop_frame (gdbarch, mcore_pop_frame); |
efdc1108 | 1097 | set_gdbarch_virtual_frame_pointer (gdbarch, mcore_virtual_frame_pointer); |
4e0d9804 GS |
1098 | |
1099 | /* Misc.: */ | |
1100 | ||
1101 | /* Stack grows down. */ | |
1102 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
efdc1108 GS |
1103 | set_gdbarch_use_struct_convention (gdbarch, mcore_use_struct_convention); |
1104 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); | |
1105 | /* MCore will never pass a sturcture by reference. It will always be split | |
1106 | between registers and stack. */ | |
2110b94f MK |
1107 | set_gdbarch_deprecated_reg_struct_has_addr |
1108 | (gdbarch, mcore_reg_struct_has_addr); | |
4cfe2084 | 1109 | |
6c0e89ed | 1110 | /* Should be using push_dummy_call. */ |
b46e02f6 | 1111 | set_gdbarch_deprecated_dummy_write_sp (gdbarch, deprecated_write_sp); |
6c0e89ed | 1112 | |
36482093 AC |
1113 | set_gdbarch_print_insn (gdbarch, print_insn_mcore); |
1114 | ||
4cfe2084 GS |
1115 | return gdbarch; |
1116 | } | |
1117 | ||
1118 | static void | |
1119 | mcore_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file) | |
1120 | { | |
1121 | ||
1122 | } | |
1123 | ||
a78f21af AC |
1124 | extern initialize_file_ftype _initialize_mcore_tdep; /* -Wmissing-prototypes */ |
1125 | ||
96baa820 | 1126 | void |
fba45db2 | 1127 | _initialize_mcore_tdep (void) |
96baa820 | 1128 | { |
4cfe2084 | 1129 | gdbarch_register (bfd_arch_mcore, mcore_gdbarch_init, mcore_dump_tdep); |
96baa820 JM |
1130 | |
1131 | #ifdef MCORE_DEBUG | |
1132 | add_show_from_set (add_set_cmd ("mcoredebug", no_class, | |
1133 | var_boolean, (char *) &mcore_debug, | |
1134 | "Set mcore debugging.\n", &setlist), | |
1135 | &showlist); | |
1136 | #endif | |
1137 | } |