Commit | Line | Data |
---|---|---|
96baa820 | 1 | /* Target-machine dependent code for Motorola MCore for GDB, the GNU debugger |
b6ba6518 | 2 | Copyright 1999, 2000, 2001 Free Software Foundation, Inc. |
96baa820 JM |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
19 | ||
20 | #include "defs.h" | |
21 | #include "frame.h" | |
22 | #include "symtab.h" | |
23 | #include "value.h" | |
24 | #include "gdbcmd.h" | |
4e052eda | 25 | #include "regcache.h" |
58841d58 AC |
26 | #include "symfile.h" |
27 | #include "gdbcore.h" | |
28 | #include "inferior.h" | |
96baa820 JM |
29 | |
30 | /* Functions declared and used only in this file */ | |
31 | ||
32 | static CORE_ADDR mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue); | |
33 | ||
34 | static struct frame_info *analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame); | |
35 | ||
36 | static int get_insn (CORE_ADDR pc); | |
37 | ||
38 | /* Functions exported from this file */ | |
39 | ||
40 | int mcore_use_struct_convention (int gcc_p, struct type *type); | |
41 | ||
42 | void _initialize_mcore (void); | |
43 | ||
44 | void mcore_init_extra_frame_info (struct frame_info *fi); | |
45 | ||
46 | CORE_ADDR mcore_frame_saved_pc (struct frame_info *fi); | |
47 | ||
48 | CORE_ADDR mcore_find_callers_reg (struct frame_info *fi, int regnum); | |
49 | ||
50 | CORE_ADDR mcore_frame_args_address (struct frame_info *fi); | |
51 | ||
52 | CORE_ADDR mcore_frame_locals_address (struct frame_info *fi); | |
53 | ||
96baa820 JM |
54 | CORE_ADDR mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp); |
55 | ||
ea7c478f | 56 | CORE_ADDR mcore_push_arguments (int nargs, struct value ** args, CORE_ADDR sp, |
96baa820 JM |
57 | unsigned char struct_return, CORE_ADDR struct_addr); |
58 | ||
59 | void mcore_pop_frame (struct frame_info *fi); | |
60 | ||
61 | CORE_ADDR mcore_skip_prologue (CORE_ADDR pc); | |
62 | ||
63 | CORE_ADDR mcore_frame_chain (struct frame_info *fi); | |
64 | ||
f4f9705a | 65 | const unsigned char *mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size); |
96baa820 JM |
66 | |
67 | int mcore_use_struct_convention (int gcc_p, struct type *type); | |
68 | ||
69 | void mcore_store_return_value (struct type *type, char *valbuf); | |
70 | ||
71 | CORE_ADDR mcore_extract_struct_value_address (char *regbuf); | |
72 | ||
73 | void mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf); | |
74 | ||
75 | #ifdef MCORE_DEBUG | |
76 | int mcore_debug = 0; | |
77 | #endif | |
78 | ||
96baa820 | 79 | |
4cfe2084 GS |
80 | /* All registers are 4 bytes long. */ |
81 | #define MCORE_REG_SIZE 4 | |
82 | #define MCORE_NUM_REGS 65 | |
96baa820 | 83 | |
4cfe2084 | 84 | |
96baa820 JM |
85 | /* Additional info that we use for managing frames */ |
86 | struct frame_extra_info | |
87 | { | |
88 | /* A generic status word */ | |
89 | int status; | |
90 | ||
91 | /* Size of this frame */ | |
92 | int framesize; | |
93 | ||
94 | /* The register that is acting as a frame pointer, if | |
95 | it is being used. This is undefined if status | |
96 | does not contain the flag MY_FRAME_IN_FP. */ | |
97 | int fp_regnum; | |
98 | }; | |
99 | ||
100 | /* frame_extra_info status flags */ | |
101 | ||
102 | /* The base of the current frame is actually in the stack pointer. | |
103 | This happens when there is no frame pointer (MCore ABI does not | |
104 | require a frame pointer) or when we're stopped in the prologue or | |
105 | epilogue itself. In these cases, mcore_analyze_prologue will need | |
106 | to update fi->frame before returning or analyzing the register | |
107 | save instructions. */ | |
108 | #define MY_FRAME_IN_SP 0x1 | |
109 | ||
110 | /* The base of the current frame is in a frame pointer register. | |
111 | This register is noted in frame_extra_info->fp_regnum. | |
112 | ||
8e1a459b | 113 | Note that the existence of an FP might also indicate that the |
96baa820 JM |
114 | function has called alloca. */ |
115 | #define MY_FRAME_IN_FP 0x2 | |
116 | ||
117 | /* This flag is set to indicate that this frame is the top-most | |
118 | frame. This tells frame chain not to bother trying to unwind | |
119 | beyond this frame. */ | |
120 | #define NO_MORE_FRAMES 0x4 | |
121 | ||
122 | /* Instruction macros used for analyzing the prologue */ | |
123 | #define IS_SUBI0(x) (((x) & 0xfe0f) == 0x2400) /* subi r0,oimm5 */ | |
124 | #define IS_STM(x) (((x) & 0xfff0) == 0x0070) /* stm rf-r15,r0 */ | |
125 | #define IS_STWx0(x) (((x) & 0xf00f) == 0x9000) /* stw rz,(r0,disp) */ | |
126 | #define IS_STWxy(x) (((x) & 0xf000) == 0x9000) /* stw rx,(ry,disp) */ | |
127 | #define IS_MOVx0(x) (((x) & 0xfff0) == 0x1200) /* mov rn,r0 */ | |
128 | #define IS_LRW1(x) (((x) & 0xff00) == 0x7100) /* lrw r1,literal */ | |
129 | #define IS_MOVI1(x) (((x) & 0xf80f) == 0x6001) /* movi r1,imm7 */ | |
130 | #define IS_BGENI1(x) (((x) & 0xfe0f) == 0x3201) /* bgeni r1,imm5 */ | |
131 | #define IS_BMASKI1(x) (((x) & 0xfe0f) == 0x2C01) /* bmaski r1,imm5 */ | |
132 | #define IS_ADDI1(x) (((x) & 0xfe0f) == 0x2001) /* addi r1,oimm5 */ | |
133 | #define IS_SUBI1(x) (((x) & 0xfe0f) == 0x2401) /* subi r1,oimm5 */ | |
134 | #define IS_RSUBI1(x) (((x) & 0xfe0f) == 0x2801) /* rsubi r1,imm5 */ | |
135 | #define IS_NOT1(x) (((x) & 0xffff) == 0x01f1) /* not r1 */ | |
136 | #define IS_ROTLI1(x) (((x) & 0xfe0f) == 0x3801) /* rotli r1,imm5 */ | |
137 | #define IS_BSETI1(x) (((x) & 0xfe0f) == 0x3401) /* bseti r1,imm5 */ | |
138 | #define IS_BCLRI1(x) (((x) & 0xfe0f) == 0x3001) /* bclri r1,imm5 */ | |
139 | #define IS_IXH1(x) (((x) & 0xffff) == 0x1d11) /* ixh r1,r1 */ | |
140 | #define IS_IXW1(x) (((x) & 0xffff) == 0x1511) /* ixw r1,r1 */ | |
141 | #define IS_SUB01(x) (((x) & 0xffff) == 0x0510) /* subu r0,r1 */ | |
142 | #define IS_RTS(x) (((x) & 0xffff) == 0x00cf) /* jmp r15 */ | |
143 | ||
144 | #define IS_R1_ADJUSTER(x) \ | |
145 | (IS_ADDI1(x) || IS_SUBI1(x) || IS_ROTLI1(x) || IS_BSETI1(x) \ | |
146 | || IS_BCLRI1(x) || IS_RSUBI1(x) || IS_NOT1(x) \ | |
147 | || IS_IXH1(x) || IS_IXW1(x)) | |
148 | \f | |
149 | ||
150 | #ifdef MCORE_DEBUG | |
151 | static void | |
152 | mcore_dump_insn (char *commnt, CORE_ADDR pc, int insn) | |
153 | { | |
154 | if (mcore_debug) | |
155 | { | |
156 | printf_filtered ("MCORE: %s %08x %08x ", | |
157 | commnt, (unsigned int) pc, (unsigned int) insn); | |
2bf0cb65 | 158 | TARGET_PRINT_INSN (pc, &tm_print_insn_info); |
96baa820 JM |
159 | printf_filtered ("\n"); |
160 | } | |
161 | } | |
162 | #define mcore_insn_debug(args) { if (mcore_debug) printf_filtered args; } | |
163 | #else /* !MCORE_DEBUG */ | |
164 | #define mcore_dump_insn(a,b,c) {} | |
165 | #define mcore_insn_debug(args) {} | |
166 | #endif | |
167 | ||
4cfe2084 GS |
168 | |
169 | static struct type * | |
170 | mcore_register_virtual_type (int regnum) | |
171 | { | |
172 | if (regnum < 0 || regnum >= MCORE_NUM_REGS) | |
173 | internal_error (__FILE__, __LINE__, | |
174 | "mcore_register_virtual_type: illegal register number %d", | |
175 | regnum); | |
176 | else | |
177 | return builtin_type_int; | |
178 | } | |
179 | ||
180 | static int | |
181 | mcore_register_byte (int regnum) | |
182 | { | |
183 | if (regnum < 0 || regnum >= MCORE_NUM_REGS) | |
184 | internal_error (__FILE__, __LINE__, | |
185 | "mcore_register_byte: illegal register number %d", | |
186 | regnum); | |
187 | else | |
188 | return (regnum * MCORE_REG_SIZE); | |
189 | } | |
190 | ||
191 | static int | |
192 | mcore_register_size (int regnum) | |
193 | { | |
194 | ||
195 | if (regnum < 0 || regnum >= MCORE_NUM_REGS) | |
196 | internal_error (__FILE__, __LINE__, | |
197 | "mcore_register_size: illegal register number %d", | |
198 | regnum); | |
199 | else | |
200 | return MCORE_REG_SIZE; | |
201 | } | |
202 | ||
203 | /* The registers of the Motorola MCore processors */ | |
204 | ||
205 | static const char * | |
206 | mcore_register_name (int regnum) | |
207 | { | |
208 | ||
209 | static char *register_names[] = { | |
210 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
211 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
212 | "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7", | |
213 | "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15", | |
214 | "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1", | |
215 | "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15", | |
216 | "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23", | |
217 | "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31", | |
218 | "pc" | |
219 | }; | |
220 | ||
221 | if (regnum < 0 || | |
222 | regnum >= sizeof (register_names) / sizeof (register_names[0])) | |
223 | internal_error (__FILE__, __LINE__, | |
224 | "mcore_register_name: illegal register number %d", | |
225 | regnum); | |
226 | else | |
227 | return register_names[regnum]; | |
228 | } | |
229 | ||
96baa820 JM |
230 | /* Given the address at which to insert a breakpoint (BP_ADDR), |
231 | what will that breakpoint be? | |
232 | ||
233 | For MCore, we have a breakpoint instruction. Since all MCore | |
234 | instructions are 16 bits, this is all we need, regardless of | |
235 | address. bpkt = 0x0000 */ | |
236 | ||
f4f9705a | 237 | const unsigned char * |
96baa820 JM |
238 | mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size) |
239 | { | |
240 | static char breakpoint[] = | |
241 | {0x00, 0x00}; | |
242 | *bp_size = 2; | |
243 | return breakpoint; | |
244 | } | |
245 | ||
246 | /* Helper function for several routines below. This funtion simply | |
247 | sets up a fake, aka dummy, frame (not a _call_ dummy frame) that | |
248 | we can analyze with mcore_analyze_prologue. */ | |
249 | ||
250 | static struct frame_info * | |
251 | analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame) | |
252 | { | |
253 | static struct frame_info *dummy = NULL; | |
254 | ||
255 | if (dummy == NULL) | |
256 | { | |
257 | dummy = (struct frame_info *) xmalloc (sizeof (struct frame_info)); | |
258 | dummy->saved_regs = (CORE_ADDR *) xmalloc (SIZEOF_FRAME_SAVED_REGS); | |
259 | dummy->extra_info = | |
260 | (struct frame_extra_info *) xmalloc (sizeof (struct frame_extra_info)); | |
261 | } | |
262 | ||
263 | dummy->next = NULL; | |
264 | dummy->prev = NULL; | |
265 | dummy->pc = pc; | |
266 | dummy->frame = frame; | |
267 | dummy->extra_info->status = 0; | |
268 | dummy->extra_info->framesize = 0; | |
269 | memset (dummy->saved_regs, '\000', SIZEOF_FRAME_SAVED_REGS); | |
270 | mcore_analyze_prologue (dummy, 0, 0); | |
271 | return dummy; | |
272 | } | |
273 | ||
0fb34c3a | 274 | /* Function prologues on the Motorola MCore processors consist of: |
96baa820 JM |
275 | |
276 | - adjustments to the stack pointer (r1 used as scratch register) | |
277 | - store word/multiples that use r0 as the base address | |
278 | - making a copy of r0 into another register (a "frame" pointer) | |
279 | ||
280 | Note that the MCore really doesn't have a real frame pointer. | |
281 | Instead, the compiler may copy the SP into a register (usually | |
282 | r8) to act as an arg pointer. For our target-dependent purposes, | |
283 | the frame info's "frame" member will be the beginning of the | |
284 | frame. The SP could, in fact, point below this. | |
285 | ||
286 | The prologue ends when an instruction fails to meet either of | |
287 | the first two criteria or when an FP is made. We make a special | |
288 | exception for gcc. When compiling unoptimized code, gcc will | |
289 | setup stack slots. We need to make sure that we skip the filling | |
290 | of these stack slots as much as possible. This is only done | |
291 | when SKIP_PROLOGUE is set, so that it does not mess up | |
292 | backtraces. */ | |
293 | ||
294 | /* Analyze the prologue of frame FI to determine where registers are saved, | |
295 | the end of the prologue, etc. Return the address of the first line | |
296 | of "real" code (i.e., the end of the prologue). */ | |
297 | ||
298 | static CORE_ADDR | |
299 | mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue) | |
300 | { | |
301 | CORE_ADDR func_addr, func_end, addr, stop; | |
302 | CORE_ADDR stack_size; | |
303 | int insn, rn; | |
93d56215 AC |
304 | int status; |
305 | int fp_regnum = 0; /* dummy, valid when (flags & MY_FRAME_IN_FP) */ | |
306 | int flags; | |
96baa820 JM |
307 | int framesize; |
308 | int register_offsets[NUM_REGS]; | |
309 | char *name; | |
310 | ||
311 | /* If provided, use the PC in the frame to look up the | |
312 | start of this function. */ | |
313 | pc = (fi == NULL ? pc : fi->pc); | |
314 | ||
315 | /* Find the start of this function. */ | |
316 | status = find_pc_partial_function (pc, &name, &func_addr, &func_end); | |
317 | ||
318 | /* If the start of this function could not be found or if the debbuger | |
319 | is stopped at the first instruction of the prologue, do nothing. */ | |
320 | if (status == 0) | |
321 | return pc; | |
322 | ||
323 | /* If the debugger is entry function, give up. */ | |
324 | if (func_addr == entry_point_address ()) | |
325 | { | |
326 | if (fi != NULL) | |
327 | fi->extra_info->status |= NO_MORE_FRAMES; | |
328 | return pc; | |
329 | } | |
330 | ||
331 | /* At the start of a function, our frame is in the stack pointer. */ | |
332 | flags = MY_FRAME_IN_SP; | |
333 | ||
334 | /* Start decoding the prologue. We start by checking two special cases: | |
335 | ||
336 | 1. We're about to return | |
337 | 2. We're at the first insn of the prologue. | |
338 | ||
339 | If we're about to return, our frame has already been deallocated. | |
340 | If we are stopped at the first instruction of a prologue, | |
341 | then our frame has not yet been set up. */ | |
342 | ||
343 | /* Get the first insn from memory (all MCore instructions are 16 bits) */ | |
344 | mcore_insn_debug (("MCORE: starting prologue decoding\n")); | |
345 | insn = get_insn (pc); | |
346 | mcore_dump_insn ("got 1: ", pc, insn); | |
347 | ||
348 | /* Check for return. */ | |
349 | if (fi != NULL && IS_RTS (insn)) | |
350 | { | |
351 | mcore_insn_debug (("MCORE: got jmp r15")); | |
352 | if (fi->next == NULL) | |
353 | fi->frame = read_sp (); | |
354 | return fi->pc; | |
355 | } | |
356 | ||
357 | /* Check for first insn of prologue */ | |
358 | if (fi != NULL && fi->pc == func_addr) | |
359 | { | |
360 | if (fi->next == NULL) | |
361 | fi->frame = read_sp (); | |
362 | return fi->pc; | |
363 | } | |
364 | ||
365 | /* Figure out where to stop scanning */ | |
366 | stop = (fi ? fi->pc : func_end); | |
367 | ||
368 | /* Don't walk off the end of the function */ | |
369 | stop = (stop > func_end ? func_end : stop); | |
370 | ||
371 | /* REGISTER_OFFSETS will contain offsets, from the top of the frame | |
372 | (NOT the frame pointer), for the various saved registers or -1 | |
373 | if the register is not saved. */ | |
374 | for (rn = 0; rn < NUM_REGS; rn++) | |
375 | register_offsets[rn] = -1; | |
376 | ||
377 | /* Analyze the prologue. Things we determine from analyzing the | |
378 | prologue include: | |
379 | * the size of the frame | |
380 | * where saved registers are located (and which are saved) | |
381 | * FP used? */ | |
382 | mcore_insn_debug (("MCORE: Scanning prologue: func_addr=0x%x, stop=0x%x\n", | |
383 | (unsigned int) func_addr, (unsigned int) stop)); | |
384 | ||
385 | framesize = 0; | |
386 | for (addr = func_addr; addr < stop; addr += 2) | |
387 | { | |
388 | /* Get next insn */ | |
389 | insn = get_insn (addr); | |
390 | mcore_dump_insn ("got 2: ", addr, insn); | |
391 | ||
392 | if (IS_SUBI0 (insn)) | |
393 | { | |
394 | int offset = 1 + ((insn >> 4) & 0x1f); | |
8e1a459b | 395 | mcore_insn_debug (("MCORE: got subi r0,%d; continuing\n", offset)); |
96baa820 JM |
396 | framesize += offset; |
397 | continue; | |
398 | } | |
399 | else if (IS_STM (insn)) | |
400 | { | |
401 | /* Spill register(s) */ | |
402 | int offset; | |
403 | int start_register; | |
404 | ||
405 | /* BIG WARNING! The MCore ABI does not restrict functions | |
406 | to taking only one stack allocation. Therefore, when | |
407 | we save a register, we record the offset of where it was | |
408 | saved relative to the current framesize. This will | |
409 | then give an offset from the SP upon entry to our | |
410 | function. Remember, framesize is NOT constant until | |
411 | we're done scanning the prologue. */ | |
412 | start_register = (insn & 0xf); | |
413 | mcore_insn_debug (("MCORE: got stm r%d-r15,(r0)\n", start_register)); | |
414 | ||
415 | for (rn = start_register, offset = 0; rn <= 15; rn++, offset += 4) | |
416 | { | |
417 | register_offsets[rn] = framesize - offset; | |
418 | mcore_insn_debug (("MCORE: r%d saved at 0x%x (offset %d)\n", rn, | |
419 | register_offsets[rn], offset)); | |
420 | } | |
421 | mcore_insn_debug (("MCORE: continuing\n")); | |
422 | continue; | |
423 | } | |
424 | else if (IS_STWx0 (insn)) | |
425 | { | |
426 | /* Spill register: see note for IS_STM above. */ | |
427 | int imm; | |
428 | ||
429 | rn = (insn >> 8) & 0xf; | |
430 | imm = (insn >> 4) & 0xf; | |
431 | register_offsets[rn] = framesize - (imm << 2); | |
432 | mcore_insn_debug (("MCORE: r%d saved at offset 0x%x\n", rn, register_offsets[rn])); | |
433 | mcore_insn_debug (("MCORE: continuing\n")); | |
434 | continue; | |
435 | } | |
436 | else if (IS_MOVx0 (insn)) | |
437 | { | |
438 | /* We have a frame pointer, so this prologue is over. Note | |
439 | the register which is acting as the frame pointer. */ | |
440 | flags |= MY_FRAME_IN_FP; | |
441 | flags &= ~MY_FRAME_IN_SP; | |
442 | fp_regnum = insn & 0xf; | |
443 | mcore_insn_debug (("MCORE: Found a frame pointer: r%d\n", fp_regnum)); | |
444 | ||
445 | /* If we found an FP, we're at the end of the prologue. */ | |
446 | mcore_insn_debug (("MCORE: end of prologue\n")); | |
447 | if (skip_prologue) | |
448 | continue; | |
449 | ||
450 | /* If we're decoding prologue, stop here. */ | |
451 | addr += 2; | |
452 | break; | |
453 | } | |
454 | else if (IS_STWxy (insn) && (flags & MY_FRAME_IN_FP) && ((insn & 0xf) == fp_regnum)) | |
455 | { | |
456 | /* Special case. Skip over stack slot allocs, too. */ | |
457 | mcore_insn_debug (("MCORE: push arg onto stack.\n")); | |
458 | continue; | |
459 | } | |
460 | else if (IS_LRW1 (insn) || IS_MOVI1 (insn) | |
461 | || IS_BGENI1 (insn) || IS_BMASKI1 (insn)) | |
462 | { | |
463 | int adjust = 0; | |
464 | int offset = 0; | |
465 | int insn2; | |
466 | ||
467 | mcore_insn_debug (("MCORE: looking at large frame\n")); | |
468 | if (IS_LRW1 (insn)) | |
469 | { | |
470 | adjust = | |
471 | read_memory_integer ((addr + 2 + ((insn & 0xff) << 2)) & 0xfffffffc, 4); | |
472 | } | |
473 | else if (IS_MOVI1 (insn)) | |
474 | adjust = (insn >> 4) & 0x7f; | |
475 | else if (IS_BGENI1 (insn)) | |
476 | adjust = 1 << ((insn >> 4) & 0x1f); | |
477 | else /* IS_BMASKI (insn) */ | |
478 | adjust = (1 << (adjust >> 4) & 0x1f) - 1; | |
479 | ||
480 | mcore_insn_debug (("MCORE: base framesize=0x%x\n", adjust)); | |
481 | ||
482 | /* May have zero or more insns which modify r1 */ | |
483 | mcore_insn_debug (("MCORE: looking for r1 adjusters...\n")); | |
484 | offset = 2; | |
485 | insn2 = get_insn (addr + offset); | |
486 | while (IS_R1_ADJUSTER (insn2)) | |
487 | { | |
488 | int imm; | |
489 | ||
490 | imm = (insn2 >> 4) & 0x1f; | |
491 | mcore_dump_insn ("got 3: ", addr + offset, insn); | |
492 | if (IS_ADDI1 (insn2)) | |
493 | { | |
494 | adjust += (imm + 1); | |
495 | mcore_insn_debug (("MCORE: addi r1,%d\n", imm + 1)); | |
496 | } | |
497 | else if (IS_SUBI1 (insn2)) | |
498 | { | |
499 | adjust -= (imm + 1); | |
500 | mcore_insn_debug (("MCORE: subi r1,%d\n", imm + 1)); | |
501 | } | |
502 | else if (IS_RSUBI1 (insn2)) | |
503 | { | |
504 | adjust = imm - adjust; | |
505 | mcore_insn_debug (("MCORE: rsubi r1,%d\n", imm + 1)); | |
506 | } | |
507 | else if (IS_NOT1 (insn2)) | |
508 | { | |
509 | adjust = ~adjust; | |
510 | mcore_insn_debug (("MCORE: not r1\n")); | |
511 | } | |
512 | else if (IS_ROTLI1 (insn2)) | |
513 | { | |
514 | adjust <<= imm; | |
515 | mcore_insn_debug (("MCORE: rotli r1,%d\n", imm + 1)); | |
516 | } | |
517 | else if (IS_BSETI1 (insn2)) | |
518 | { | |
519 | adjust |= (1 << imm); | |
520 | mcore_insn_debug (("MCORE: bseti r1,%d\n", imm)); | |
521 | } | |
522 | else if (IS_BCLRI1 (insn2)) | |
523 | { | |
524 | adjust &= ~(1 << imm); | |
525 | mcore_insn_debug (("MCORE: bclri r1,%d\n", imm)); | |
526 | } | |
527 | else if (IS_IXH1 (insn2)) | |
528 | { | |
529 | adjust *= 3; | |
530 | mcore_insn_debug (("MCORE: ix.h r1,r1\n")); | |
531 | } | |
532 | else if (IS_IXW1 (insn2)) | |
533 | { | |
534 | adjust *= 5; | |
535 | mcore_insn_debug (("MCORE: ix.w r1,r1\n")); | |
536 | } | |
537 | ||
538 | offset += 2; | |
539 | insn2 = get_insn (addr + offset); | |
540 | }; | |
541 | ||
542 | mcore_insn_debug (("MCORE: done looking for r1 adjusters\n")); | |
543 | ||
544 | /* If the next insn adjusts the stack pointer, we keep everything; | |
545 | if not, we scrap it and we've found the end of the prologue. */ | |
546 | if (IS_SUB01 (insn2)) | |
547 | { | |
548 | addr += offset; | |
549 | framesize += adjust; | |
550 | mcore_insn_debug (("MCORE: found stack adjustment of 0x%x bytes.\n", adjust)); | |
551 | mcore_insn_debug (("MCORE: skipping to new address 0x%x\n", addr)); | |
552 | mcore_insn_debug (("MCORE: continuing\n")); | |
553 | continue; | |
554 | } | |
555 | ||
556 | /* None of these instructions are prologue, so don't touch | |
557 | anything. */ | |
558 | mcore_insn_debug (("MCORE: no subu r1,r0, NOT altering framesize.\n")); | |
559 | break; | |
560 | } | |
561 | ||
562 | /* This is not a prologue insn, so stop here. */ | |
563 | mcore_insn_debug (("MCORE: insn is not a prologue insn -- ending scan\n")); | |
564 | break; | |
565 | } | |
566 | ||
567 | mcore_insn_debug (("MCORE: done analyzing prologue\n")); | |
568 | mcore_insn_debug (("MCORE: prologue end = 0x%x\n", addr)); | |
569 | ||
570 | /* Save everything we have learned about this frame into FI. */ | |
571 | if (fi != NULL) | |
572 | { | |
573 | fi->extra_info->framesize = framesize; | |
574 | fi->extra_info->fp_regnum = fp_regnum; | |
575 | fi->extra_info->status = flags; | |
576 | ||
577 | /* Fix the frame pointer. When gcc uses r8 as a frame pointer, | |
578 | it is really an arg ptr. We adjust fi->frame to be a "real" | |
579 | frame pointer. */ | |
580 | if (fi->next == NULL) | |
581 | { | |
582 | if (fi->extra_info->status & MY_FRAME_IN_SP) | |
583 | fi->frame = read_sp () + framesize; | |
584 | else | |
585 | fi->frame = read_register (fp_regnum) + framesize; | |
586 | } | |
587 | ||
588 | /* Note where saved registers are stored. The offsets in REGISTER_OFFSETS | |
589 | are computed relative to the top of the frame. */ | |
590 | for (rn = 0; rn < NUM_REGS; rn++) | |
591 | { | |
592 | if (register_offsets[rn] >= 0) | |
593 | { | |
594 | fi->saved_regs[rn] = fi->frame - register_offsets[rn]; | |
595 | mcore_insn_debug (("Saved register %s stored at 0x%08x, value=0x%08x\n", | |
596 | mcore_register_names[rn], fi->saved_regs[rn], | |
597 | read_memory_integer (fi->saved_regs[rn], 4))); | |
598 | } | |
599 | } | |
600 | } | |
601 | ||
602 | /* Return addr of first non-prologue insn. */ | |
603 | return addr; | |
604 | } | |
605 | ||
606 | /* Given a GDB frame, determine the address of the calling function's frame. | |
607 | This will be used to create a new GDB frame struct, and then | |
608 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. */ | |
609 | ||
610 | CORE_ADDR | |
611 | mcore_frame_chain (struct frame_info * fi) | |
612 | { | |
613 | struct frame_info *dummy; | |
614 | CORE_ADDR callers_addr; | |
615 | ||
616 | /* Analyze the prologue of this function. */ | |
617 | if (fi->extra_info->status == 0) | |
618 | mcore_analyze_prologue (fi, 0, 0); | |
619 | ||
620 | /* If mcore_analyze_prologue set NO_MORE_FRAMES, quit now. */ | |
621 | if (fi->extra_info->status & NO_MORE_FRAMES) | |
622 | return 0; | |
623 | ||
624 | /* Now that we've analyzed our prologue, we can start to ask | |
625 | for information about our caller. The easiest way to do | |
626 | this is to analyze our caller's prologue. | |
627 | ||
628 | If our caller has a frame pointer, then we need to find | |
629 | the value of that register upon entry to our frame. | |
630 | This value is either in fi->saved_regs[rn] if it's saved, | |
631 | or it's still in a register. | |
632 | ||
633 | If our caller does not have a frame pointer, then his frame base | |
634 | is <our base> + -<caller's frame size>. */ | |
635 | dummy = analyze_dummy_frame (FRAME_SAVED_PC (fi), fi->frame); | |
636 | ||
637 | if (dummy->extra_info->status & MY_FRAME_IN_FP) | |
638 | { | |
639 | int fp = dummy->extra_info->fp_regnum; | |
640 | ||
641 | /* Our caller has a frame pointer. */ | |
642 | if (fi->saved_regs[fp] != 0) | |
643 | { | |
644 | /* The "FP" was saved on the stack. Don't forget to adjust | |
645 | the "FP" with the framesize to get a real FP. */ | |
646 | callers_addr = read_memory_integer (fi->saved_regs[fp], REGISTER_SIZE) | |
647 | + dummy->extra_info->framesize; | |
648 | } | |
649 | else | |
650 | { | |
651 | /* It's still in the register. Don't forget to adjust | |
652 | the "FP" with the framesize to get a real FP. */ | |
653 | callers_addr = read_register (fp) + dummy->extra_info->framesize; | |
654 | } | |
655 | } | |
656 | else | |
657 | { | |
658 | /* Our caller does not have a frame pointer. */ | |
659 | callers_addr = fi->frame + dummy->extra_info->framesize; | |
660 | } | |
661 | ||
662 | return callers_addr; | |
663 | } | |
664 | ||
665 | /* Skip the prologue of the function at PC. */ | |
666 | ||
667 | CORE_ADDR | |
668 | mcore_skip_prologue (CORE_ADDR pc) | |
669 | { | |
670 | CORE_ADDR func_addr, func_end; | |
671 | struct symtab_and_line sal; | |
672 | ||
673 | /* If we have line debugging information, then the end of the | |
7e73cedf | 674 | prologue should be the first assembly instruction of the first |
96baa820 JM |
675 | source line */ |
676 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
677 | { | |
678 | sal = find_pc_line (func_addr, 0); | |
679 | if (sal.end && sal.end < func_end) | |
680 | return sal.end; | |
681 | } | |
682 | ||
683 | return mcore_analyze_prologue (NULL, pc, 1); | |
684 | } | |
685 | ||
686 | /* Return the address at which function arguments are offset. */ | |
687 | CORE_ADDR | |
688 | mcore_frame_args_address (struct frame_info * fi) | |
689 | { | |
690 | return fi->frame - fi->extra_info->framesize; | |
691 | } | |
692 | ||
693 | CORE_ADDR | |
694 | mcore_frame_locals_address (struct frame_info * fi) | |
695 | { | |
696 | return fi->frame - fi->extra_info->framesize; | |
697 | } | |
698 | ||
699 | /* Return the frame pointer in use at address PC. */ | |
700 | ||
701 | void | |
e0441cf0 | 702 | mcore_virtual_frame_pointer (CORE_ADDR pc, int *reg, LONGEST *offset) |
96baa820 JM |
703 | { |
704 | struct frame_info *dummy = analyze_dummy_frame (pc, 0); | |
705 | if (dummy->extra_info->status & MY_FRAME_IN_SP) | |
706 | { | |
707 | *reg = SP_REGNUM; | |
708 | *offset = 0; | |
709 | } | |
710 | else | |
711 | { | |
712 | *reg = dummy->extra_info->fp_regnum; | |
713 | *offset = 0; | |
714 | } | |
715 | } | |
716 | ||
717 | /* Find the value of register REGNUM in frame FI. */ | |
718 | ||
719 | CORE_ADDR | |
720 | mcore_find_callers_reg (struct frame_info *fi, int regnum) | |
721 | { | |
722 | for (; fi != NULL; fi = fi->next) | |
723 | { | |
724 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) | |
725 | return generic_read_register_dummy (fi->pc, fi->frame, regnum); | |
726 | else if (fi->saved_regs[regnum] != 0) | |
727 | return read_memory_integer (fi->saved_regs[regnum], | |
728 | REGISTER_SIZE); | |
729 | } | |
730 | ||
731 | return read_register (regnum); | |
732 | } | |
733 | ||
734 | /* Find the saved pc in frame FI. */ | |
735 | ||
736 | CORE_ADDR | |
737 | mcore_frame_saved_pc (struct frame_info * fi) | |
738 | { | |
739 | ||
740 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) | |
741 | return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM); | |
742 | else | |
743 | return mcore_find_callers_reg (fi, PR_REGNUM); | |
744 | } | |
745 | \f | |
746 | /* INFERIOR FUNCTION CALLS */ | |
747 | ||
748 | /* This routine gets called when either the user uses the "return" | |
749 | command, or the call dummy breakpoint gets hit. */ | |
750 | ||
751 | void | |
752 | mcore_pop_frame (struct frame_info *fi) | |
753 | { | |
754 | int rn; | |
755 | ||
756 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) | |
757 | generic_pop_dummy_frame (); | |
758 | else | |
759 | { | |
760 | /* Write out the PC we saved. */ | |
761 | write_register (PC_REGNUM, FRAME_SAVED_PC (fi)); | |
762 | ||
763 | /* Restore any saved registers. */ | |
764 | for (rn = 0; rn < NUM_REGS; rn++) | |
765 | { | |
766 | if (fi->saved_regs[rn] != 0) | |
767 | { | |
768 | ULONGEST value; | |
769 | ||
770 | value = read_memory_unsigned_integer (fi->saved_regs[rn], | |
771 | REGISTER_SIZE); | |
772 | write_register (rn, value); | |
773 | } | |
774 | } | |
775 | ||
776 | /* Actually cut back the stack. */ | |
777 | write_register (SP_REGNUM, FRAME_FP (fi)); | |
778 | } | |
779 | ||
780 | /* Finally, throw away any cached frame information. */ | |
781 | flush_cached_frames (); | |
782 | } | |
783 | ||
784 | /* Setup arguments and PR for a call to the target. First six arguments | |
785 | go in FIRST_ARGREG -> LAST_ARGREG, subsequent args go on to the stack. | |
786 | ||
787 | * Types with lengths greater than REGISTER_SIZE may not be split | |
788 | between registers and the stack, and they must start in an even-numbered | |
789 | register. Subsequent args will go onto the stack. | |
790 | ||
791 | * Structs may be split between registers and stack, left-aligned. | |
792 | ||
793 | * If the function returns a struct which will not fit into registers (it's | |
794 | more than eight bytes), we must allocate for that, too. Gdb will tell | |
795 | us where this buffer is (STRUCT_ADDR), and we simply place it into | |
796 | FIRST_ARGREG, since the MCORE treats struct returns (of less than eight | |
797 | bytes) as hidden first arguments. */ | |
798 | ||
799 | CORE_ADDR | |
ea7c478f | 800 | mcore_push_arguments (int nargs, struct value **args, CORE_ADDR sp, |
96baa820 JM |
801 | unsigned char struct_return, CORE_ADDR struct_addr) |
802 | { | |
803 | int argreg; | |
804 | int argnum; | |
805 | struct stack_arg | |
806 | { | |
807 | int len; | |
808 | char *val; | |
809 | } | |
810 | *stack_args; | |
811 | int nstack_args = 0; | |
812 | ||
813 | stack_args = (struct stack_arg *) alloca (nargs * sizeof (struct stack_arg)); | |
814 | ||
815 | argreg = FIRST_ARGREG; | |
816 | ||
817 | /* Align the stack. This is mostly a nop, but not always. It will be needed | |
818 | if we call a function which has argument overflow. */ | |
819 | sp &= ~3; | |
820 | ||
821 | /* If this function returns a struct which does not fit in the | |
822 | return registers, we must pass a buffer to the function | |
823 | which it can use to save the return value. */ | |
824 | if (struct_return) | |
825 | write_register (argreg++, struct_addr); | |
826 | ||
827 | /* FIXME: what about unions? */ | |
828 | for (argnum = 0; argnum < nargs; argnum++) | |
829 | { | |
830 | char *val = (char *) VALUE_CONTENTS (args[argnum]); | |
831 | int len = TYPE_LENGTH (VALUE_TYPE (args[argnum])); | |
832 | struct type *type = VALUE_TYPE (args[argnum]); | |
833 | int olen; | |
834 | ||
835 | mcore_insn_debug (("MCORE PUSH: argreg=%d; len=%d; %s\n", | |
836 | argreg, len, TYPE_CODE (type) == TYPE_CODE_STRUCT ? "struct" : "not struct")); | |
837 | /* Arguments larger than a register must start in an even | |
838 | numbered register. */ | |
839 | olen = len; | |
840 | ||
841 | if (TYPE_CODE (type) != TYPE_CODE_STRUCT && len > REGISTER_SIZE && argreg % 2) | |
842 | { | |
843 | mcore_insn_debug (("MCORE PUSH: %d > REGISTER_SIZE: and %s is not even\n", | |
844 | len, mcore_register_names[argreg])); | |
845 | argreg++; | |
846 | } | |
847 | ||
848 | if ((argreg <= LAST_ARGREG && len <= (LAST_ARGREG - argreg + 1) * REGISTER_SIZE) | |
849 | || (TYPE_CODE (type) == TYPE_CODE_STRUCT)) | |
850 | { | |
851 | /* Something that will fit entirely into registers (or a struct | |
852 | which may be split between registers and stack). */ | |
853 | mcore_insn_debug (("MCORE PUSH: arg %d going into regs\n", argnum)); | |
854 | ||
855 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT && olen < REGISTER_SIZE) | |
856 | { | |
857 | /* Small structs must be right aligned within the register, | |
858 | the most significant bits are undefined. */ | |
859 | write_register (argreg, extract_unsigned_integer (val, len)); | |
860 | argreg++; | |
861 | len = 0; | |
862 | } | |
863 | ||
864 | while (len > 0 && argreg <= LAST_ARGREG) | |
865 | { | |
866 | write_register (argreg, extract_unsigned_integer (val, REGISTER_SIZE)); | |
867 | argreg++; | |
868 | val += REGISTER_SIZE; | |
869 | len -= REGISTER_SIZE; | |
870 | } | |
871 | ||
872 | /* Any remainder for the stack is noted below... */ | |
873 | } | |
874 | else if (TYPE_CODE (VALUE_TYPE (args[argnum])) != TYPE_CODE_STRUCT | |
875 | && len > REGISTER_SIZE) | |
876 | { | |
877 | /* All subsequent args go onto the stack. */ | |
878 | mcore_insn_debug (("MCORE PUSH: does not fit into regs, going onto stack\n")); | |
879 | argnum = LAST_ARGREG + 1; | |
880 | } | |
881 | ||
882 | if (len > 0) | |
883 | { | |
884 | /* Note that this must be saved onto the stack */ | |
885 | mcore_insn_debug (("MCORE PUSH: adding arg %d to stack\n", argnum)); | |
886 | stack_args[nstack_args].val = val; | |
887 | stack_args[nstack_args].len = len; | |
888 | nstack_args++; | |
889 | } | |
890 | ||
891 | } | |
892 | ||
893 | /* We're done with registers and stack allocation. Now do the actual | |
894 | stack pushes. */ | |
895 | while (nstack_args--) | |
896 | { | |
897 | sp -= stack_args[nstack_args].len; | |
898 | write_memory (sp, stack_args[nstack_args].val, stack_args[nstack_args].len); | |
899 | } | |
900 | ||
901 | /* Return adjusted stack pointer. */ | |
902 | return sp; | |
903 | } | |
904 | ||
905 | /* Store the return address for the call dummy. For MCore, we've | |
906 | opted to use generic call dummies, so we simply store the | |
907 | CALL_DUMMY_ADDRESS into the PR register (r15). */ | |
908 | ||
909 | CORE_ADDR | |
910 | mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
911 | { | |
912 | write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ()); | |
913 | return sp; | |
914 | } | |
915 | ||
916 | /* Setting/getting return values from functions. | |
917 | ||
918 | The Motorola MCore processors use r2/r3 to return anything | |
919 | not larger than 32 bits. Everything else goes into a caller- | |
920 | supplied buffer, which is passed in via a hidden first | |
921 | argument. | |
922 | ||
923 | For gdb, this leaves us two routes, based on what | |
924 | USE_STRUCT_CONVENTION (mcore_use_struct_convention) returns. | |
925 | If this macro returns 1, gdb will call STORE_STRUCT_RETURN and | |
926 | EXTRACT_STRUCT_VALUE_ADDRESS. | |
927 | ||
928 | If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE | |
929 | and EXTRACT_RETURN_VALUE to store/fetch the functions return value. */ | |
930 | ||
931 | /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of | |
932 | EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc | |
933 | and TYPE is the type (which is known to be struct, union or array). */ | |
934 | ||
935 | int | |
936 | mcore_use_struct_convention (int gcc_p, struct type *type) | |
937 | { | |
938 | return (TYPE_LENGTH (type) > 8); | |
939 | } | |
940 | ||
941 | /* Where is the return value saved? For MCore, a pointer to | |
942 | this buffer was passed as a hidden first argument, so | |
943 | just return that address. */ | |
944 | ||
945 | CORE_ADDR | |
946 | mcore_extract_struct_value_address (char *regbuf) | |
947 | { | |
948 | return extract_address (regbuf + REGISTER_BYTE (FIRST_ARGREG), REGISTER_SIZE); | |
949 | } | |
950 | ||
951 | /* Given a function which returns a value of type TYPE, extract the | |
952 | the function's return value and place the result into VALBUF. | |
953 | REGBUF is the register contents of the target. */ | |
954 | ||
955 | void | |
956 | mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf) | |
957 | { | |
958 | /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */ | |
959 | /* Only getting the first byte! if len = 1, we need the last byte of | |
960 | the register, not the first. */ | |
961 | memcpy (valbuf, regbuf + REGISTER_BYTE (RETVAL_REGNUM) + | |
962 | (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0), TYPE_LENGTH (type)); | |
963 | } | |
964 | ||
965 | /* Store the return value in VALBUF (of type TYPE) where the caller | |
966 | expects to see it. | |
967 | ||
968 | Values less than 32 bits are stored in r2, right justified and | |
969 | sign or zero extended. | |
970 | ||
971 | Values between 32 and 64 bits are stored in r2 (most | |
972 | significant word) and r3 (least significant word, left justified). | |
973 | Note that this includes structures of less than eight bytes, too. */ | |
974 | ||
975 | void | |
976 | mcore_store_return_value (struct type *type, char *valbuf) | |
977 | { | |
978 | int value_size; | |
979 | int return_size; | |
980 | int offset; | |
981 | char *zeros; | |
982 | ||
983 | value_size = TYPE_LENGTH (type); | |
984 | ||
985 | /* Return value fits into registers. */ | |
986 | return_size = (value_size + REGISTER_SIZE - 1) & ~(REGISTER_SIZE - 1); | |
987 | offset = REGISTER_BYTE (RETVAL_REGNUM) + (return_size - value_size); | |
988 | zeros = alloca (return_size); | |
989 | memset (zeros, 0, return_size); | |
990 | ||
991 | write_register_bytes (REGISTER_BYTE (RETVAL_REGNUM), zeros, return_size); | |
992 | write_register_bytes (offset, valbuf, value_size); | |
993 | } | |
994 | ||
995 | /* Initialize our target-dependent "stuff" for this newly created frame. | |
996 | ||
997 | This includes allocating space for saved registers and analyzing | |
998 | the prologue of this frame. */ | |
999 | ||
1000 | void | |
1001 | mcore_init_extra_frame_info (struct frame_info *fi) | |
1002 | { | |
1003 | if (fi->next) | |
1004 | fi->pc = FRAME_SAVED_PC (fi->next); | |
1005 | ||
1006 | frame_saved_regs_zalloc (fi); | |
1007 | ||
1008 | fi->extra_info = (struct frame_extra_info *) | |
1009 | frame_obstack_alloc (sizeof (struct frame_extra_info)); | |
1010 | fi->extra_info->status = 0; | |
1011 | fi->extra_info->framesize = 0; | |
1012 | ||
1013 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) | |
1014 | { | |
1015 | /* We need to setup fi->frame here because run_stack_dummy gets it wrong | |
1016 | by assuming it's always FP. */ | |
1017 | fi->frame = generic_read_register_dummy (fi->pc, fi->frame, SP_REGNUM); | |
1018 | } | |
1019 | else | |
1020 | mcore_analyze_prologue (fi, 0, 0); | |
1021 | } | |
1022 | ||
1023 | /* Get an insturction from memory. */ | |
1024 | ||
1025 | static int | |
1026 | get_insn (CORE_ADDR pc) | |
1027 | { | |
1028 | char buf[4]; | |
1029 | int status = read_memory_nobpt (pc, buf, 2); | |
1030 | if (status != 0) | |
1031 | return 0; | |
1032 | ||
1033 | return extract_unsigned_integer (buf, 2); | |
1034 | } | |
1035 | ||
4cfe2084 GS |
1036 | static struct gdbarch * |
1037 | mcore_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1038 | { | |
1039 | static LONGEST call_dummy_words[7] = { }; | |
1040 | struct gdbarch_tdep *tdep = NULL; | |
1041 | struct gdbarch *gdbarch; | |
1042 | ||
1043 | /* find a candidate among the list of pre-declared architectures. */ | |
1044 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1045 | if (arches != NULL) | |
1046 | return (arches->gdbarch); | |
1047 | ||
1048 | gdbarch = gdbarch_alloc (&info, 0); | |
1049 | ||
1050 | /* All registers are 32 bits */ | |
1051 | set_gdbarch_register_size (gdbarch, MCORE_REG_SIZE); | |
1052 | set_gdbarch_max_register_raw_size (gdbarch, MCORE_REG_SIZE); | |
1053 | set_gdbarch_max_register_virtual_size (gdbarch, MCORE_REG_SIZE); | |
1054 | ||
1055 | set_gdbarch_register_name (gdbarch, mcore_register_name); | |
1056 | set_gdbarch_register_virtual_type (gdbarch, mcore_register_virtual_type); | |
1057 | set_gdbarch_register_virtual_size (gdbarch, mcore_register_size); | |
1058 | set_gdbarch_register_raw_size (gdbarch, mcore_register_size); | |
1059 | set_gdbarch_register_byte (gdbarch, mcore_register_byte); | |
1060 | ||
1061 | set_gdbarch_call_dummy_p (gdbarch, 1); | |
1062 | set_gdbarch_use_generic_dummy_frames (gdbarch, 1); | |
1063 | set_gdbarch_call_dummy_words (gdbarch, call_dummy_words); | |
1064 | set_gdbarch_sizeof_call_dummy_words (gdbarch, 0); | |
1065 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); | |
1066 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); | |
1067 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); | |
1068 | set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); | |
1069 | set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy); | |
1070 | set_gdbarch_call_dummy_address (gdbarch, entry_point_address); | |
1071 | set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos); | |
1072 | set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy); | |
1073 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); | |
1074 | ||
1075 | return gdbarch; | |
1076 | } | |
1077 | ||
1078 | static void | |
1079 | mcore_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file) | |
1080 | { | |
1081 | ||
1082 | } | |
1083 | ||
96baa820 | 1084 | void |
fba45db2 | 1085 | _initialize_mcore_tdep (void) |
96baa820 JM |
1086 | { |
1087 | extern int print_insn_mcore (bfd_vma, disassemble_info *); | |
4cfe2084 | 1088 | gdbarch_register (bfd_arch_mcore, mcore_gdbarch_init, mcore_dump_tdep); |
96baa820 JM |
1089 | tm_print_insn = print_insn_mcore; |
1090 | ||
1091 | #ifdef MCORE_DEBUG | |
1092 | add_show_from_set (add_set_cmd ("mcoredebug", no_class, | |
1093 | var_boolean, (char *) &mcore_debug, | |
1094 | "Set mcore debugging.\n", &setlist), | |
1095 | &showlist); | |
1096 | #endif | |
1097 | } |