* elf32-i386.c (allocate_dynrelocs): For undef weak syms with
[deliverable/binutils-gdb.git] / gdb / mcore-tdep.c
CommitLineData
96baa820 1/* Target-machine dependent code for Motorola MCore for GDB, the GNU debugger
51603483 2 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
96baa820
JM
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20#include "defs.h"
21#include "frame.h"
22#include "symtab.h"
23#include "value.h"
24#include "gdbcmd.h"
4e052eda 25#include "regcache.h"
58841d58
AC
26#include "symfile.h"
27#include "gdbcore.h"
28#include "inferior.h"
4e0d9804 29#include "arch-utils.h"
9bbe19fb 30#include "gdb_string.h"
92bf2b80 31#include "disasm.h"
96baa820
JM
32
33/* Functions declared and used only in this file */
34
35static CORE_ADDR mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue);
36
37static struct frame_info *analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame);
38
39static int get_insn (CORE_ADDR pc);
40
41/* Functions exported from this file */
42
43int mcore_use_struct_convention (int gcc_p, struct type *type);
44
45void _initialize_mcore (void);
46
4e0d9804 47void mcore_init_extra_frame_info (int fromleaf, struct frame_info *fi);
96baa820
JM
48
49CORE_ADDR mcore_frame_saved_pc (struct frame_info *fi);
50
51CORE_ADDR mcore_find_callers_reg (struct frame_info *fi, int regnum);
52
53CORE_ADDR mcore_frame_args_address (struct frame_info *fi);
54
55CORE_ADDR mcore_frame_locals_address (struct frame_info *fi);
56
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JM
57CORE_ADDR mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp);
58
ea7c478f 59CORE_ADDR mcore_push_arguments (int nargs, struct value ** args, CORE_ADDR sp,
4e0d9804 60 int struct_return, CORE_ADDR struct_addr);
96baa820 61
4e0d9804 62void mcore_pop_frame ();
96baa820
JM
63
64CORE_ADDR mcore_skip_prologue (CORE_ADDR pc);
65
66CORE_ADDR mcore_frame_chain (struct frame_info *fi);
67
f4f9705a 68const unsigned char *mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size);
96baa820
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69
70int mcore_use_struct_convention (int gcc_p, struct type *type);
71
72void mcore_store_return_value (struct type *type, char *valbuf);
73
74CORE_ADDR mcore_extract_struct_value_address (char *regbuf);
75
76void mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf);
77
78#ifdef MCORE_DEBUG
79int mcore_debug = 0;
80#endif
81
96baa820 82
4cfe2084
GS
83/* All registers are 4 bytes long. */
84#define MCORE_REG_SIZE 4
85#define MCORE_NUM_REGS 65
96baa820 86
efdc1108
GS
87/* Some useful register numbers. */
88#define PR_REGNUM 15
89#define FIRST_ARGREG 2
90#define LAST_ARGREG 7
91#define RETVAL_REGNUM 2
92
4cfe2084 93
96baa820
JM
94/* Additional info that we use for managing frames */
95struct frame_extra_info
96 {
97 /* A generic status word */
98 int status;
99
100 /* Size of this frame */
101 int framesize;
102
103 /* The register that is acting as a frame pointer, if
104 it is being used. This is undefined if status
105 does not contain the flag MY_FRAME_IN_FP. */
106 int fp_regnum;
107 };
108
109/* frame_extra_info status flags */
110
111/* The base of the current frame is actually in the stack pointer.
112 This happens when there is no frame pointer (MCore ABI does not
113 require a frame pointer) or when we're stopped in the prologue or
114 epilogue itself. In these cases, mcore_analyze_prologue will need
115 to update fi->frame before returning or analyzing the register
116 save instructions. */
117#define MY_FRAME_IN_SP 0x1
118
119/* The base of the current frame is in a frame pointer register.
120 This register is noted in frame_extra_info->fp_regnum.
121
8e1a459b 122 Note that the existence of an FP might also indicate that the
96baa820
JM
123 function has called alloca. */
124#define MY_FRAME_IN_FP 0x2
125
126/* This flag is set to indicate that this frame is the top-most
127 frame. This tells frame chain not to bother trying to unwind
128 beyond this frame. */
129#define NO_MORE_FRAMES 0x4
130
131/* Instruction macros used for analyzing the prologue */
132#define IS_SUBI0(x) (((x) & 0xfe0f) == 0x2400) /* subi r0,oimm5 */
133#define IS_STM(x) (((x) & 0xfff0) == 0x0070) /* stm rf-r15,r0 */
134#define IS_STWx0(x) (((x) & 0xf00f) == 0x9000) /* stw rz,(r0,disp) */
135#define IS_STWxy(x) (((x) & 0xf000) == 0x9000) /* stw rx,(ry,disp) */
136#define IS_MOVx0(x) (((x) & 0xfff0) == 0x1200) /* mov rn,r0 */
137#define IS_LRW1(x) (((x) & 0xff00) == 0x7100) /* lrw r1,literal */
138#define IS_MOVI1(x) (((x) & 0xf80f) == 0x6001) /* movi r1,imm7 */
139#define IS_BGENI1(x) (((x) & 0xfe0f) == 0x3201) /* bgeni r1,imm5 */
140#define IS_BMASKI1(x) (((x) & 0xfe0f) == 0x2C01) /* bmaski r1,imm5 */
141#define IS_ADDI1(x) (((x) & 0xfe0f) == 0x2001) /* addi r1,oimm5 */
142#define IS_SUBI1(x) (((x) & 0xfe0f) == 0x2401) /* subi r1,oimm5 */
143#define IS_RSUBI1(x) (((x) & 0xfe0f) == 0x2801) /* rsubi r1,imm5 */
144#define IS_NOT1(x) (((x) & 0xffff) == 0x01f1) /* not r1 */
145#define IS_ROTLI1(x) (((x) & 0xfe0f) == 0x3801) /* rotli r1,imm5 */
146#define IS_BSETI1(x) (((x) & 0xfe0f) == 0x3401) /* bseti r1,imm5 */
147#define IS_BCLRI1(x) (((x) & 0xfe0f) == 0x3001) /* bclri r1,imm5 */
148#define IS_IXH1(x) (((x) & 0xffff) == 0x1d11) /* ixh r1,r1 */
149#define IS_IXW1(x) (((x) & 0xffff) == 0x1511) /* ixw r1,r1 */
150#define IS_SUB01(x) (((x) & 0xffff) == 0x0510) /* subu r0,r1 */
151#define IS_RTS(x) (((x) & 0xffff) == 0x00cf) /* jmp r15 */
152
153#define IS_R1_ADJUSTER(x) \
154 (IS_ADDI1(x) || IS_SUBI1(x) || IS_ROTLI1(x) || IS_BSETI1(x) \
155 || IS_BCLRI1(x) || IS_RSUBI1(x) || IS_NOT1(x) \
156 || IS_IXH1(x) || IS_IXW1(x))
157\f
158
159#ifdef MCORE_DEBUG
160static void
161mcore_dump_insn (char *commnt, CORE_ADDR pc, int insn)
162{
163 if (mcore_debug)
164 {
165 printf_filtered ("MCORE: %s %08x %08x ",
166 commnt, (unsigned int) pc, (unsigned int) insn);
92bf2b80 167 gdb_print_insn (pc, gdb_stdout);
96baa820
JM
168 printf_filtered ("\n");
169 }
170}
171#define mcore_insn_debug(args) { if (mcore_debug) printf_filtered args; }
172#else /* !MCORE_DEBUG */
173#define mcore_dump_insn(a,b,c) {}
174#define mcore_insn_debug(args) {}
175#endif
176
4cfe2084
GS
177
178static struct type *
179mcore_register_virtual_type (int regnum)
180{
181 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
182 internal_error (__FILE__, __LINE__,
183 "mcore_register_virtual_type: illegal register number %d",
184 regnum);
185 else
186 return builtin_type_int;
187}
188
189static int
190mcore_register_byte (int regnum)
191{
192 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
193 internal_error (__FILE__, __LINE__,
194 "mcore_register_byte: illegal register number %d",
195 regnum);
196 else
197 return (regnum * MCORE_REG_SIZE);
198}
199
200static int
201mcore_register_size (int regnum)
202{
203
204 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
205 internal_error (__FILE__, __LINE__,
206 "mcore_register_size: illegal register number %d",
207 regnum);
208 else
209 return MCORE_REG_SIZE;
210}
211
212/* The registers of the Motorola MCore processors */
213
214static const char *
215mcore_register_name (int regnum)
216{
217
218 static char *register_names[] = {
219 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
220 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
221 "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7",
222 "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
223 "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
224 "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15",
225 "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
226 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
227 "pc"
228 };
229
230 if (regnum < 0 ||
231 regnum >= sizeof (register_names) / sizeof (register_names[0]))
232 internal_error (__FILE__, __LINE__,
233 "mcore_register_name: illegal register number %d",
234 regnum);
235 else
236 return register_names[regnum];
237}
238
96baa820
JM
239/* Given the address at which to insert a breakpoint (BP_ADDR),
240 what will that breakpoint be?
241
242 For MCore, we have a breakpoint instruction. Since all MCore
243 instructions are 16 bits, this is all we need, regardless of
244 address. bpkt = 0x0000 */
245
f4f9705a 246const unsigned char *
96baa820
JM
247mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size)
248{
249 static char breakpoint[] =
250 {0x00, 0x00};
251 *bp_size = 2;
252 return breakpoint;
253}
254
4e0d9804
GS
255static CORE_ADDR
256mcore_saved_pc_after_call (struct frame_info *frame)
257{
258 return read_register (PR_REGNUM);
259}
260
261/* This is currently handled by init_extra_frame_info. */
262static void
263mcore_frame_init_saved_regs (struct frame_info *frame)
264{
265
266}
267
268/* This is currently handled by mcore_push_arguments */
269static void
270mcore_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
271{
272
273}
274
efdc1108
GS
275static int
276mcore_reg_struct_has_addr (int gcc_p, struct type *type)
277{
278 return 0;
279}
280
281
96baa820
JM
282/* Helper function for several routines below. This funtion simply
283 sets up a fake, aka dummy, frame (not a _call_ dummy frame) that
284 we can analyze with mcore_analyze_prologue. */
285
286static struct frame_info *
287analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame)
288{
289 static struct frame_info *dummy = NULL;
290
291 if (dummy == NULL)
292 {
a00a19e9 293 struct frame_extra_info *extra_info;
7b5849cc 294 CORE_ADDR *saved_regs;
f6c609c4 295 dummy = deprecated_frame_xmalloc ();
7b5849cc
AC
296 saved_regs = (CORE_ADDR *) xmalloc (SIZEOF_FRAME_SAVED_REGS);
297 deprecated_set_frame_saved_regs_hack (dummy, saved_regs);
a00a19e9
AC
298 extra_info = XMALLOC (struct frame_extra_info);
299 deprecated_set_frame_extra_info_hack (dummy, extra_info);
96baa820
JM
300 }
301
483d36b2
AC
302 deprecated_set_frame_next_hack (dummy, NULL);
303 deprecated_set_frame_prev_hack (dummy, NULL);
50abf9e5 304 deprecated_update_frame_pc_hack (dummy, pc);
8ccd593b 305 deprecated_update_frame_base_hack (dummy, frame);
da50a4b7
AC
306 get_frame_extra_info (dummy)->status = 0;
307 get_frame_extra_info (dummy)->framesize = 0;
b2fb4676 308 memset (get_frame_saved_regs (dummy), '\000', SIZEOF_FRAME_SAVED_REGS);
96baa820
JM
309 mcore_analyze_prologue (dummy, 0, 0);
310 return dummy;
311}
312
0fb34c3a 313/* Function prologues on the Motorola MCore processors consist of:
96baa820
JM
314
315 - adjustments to the stack pointer (r1 used as scratch register)
316 - store word/multiples that use r0 as the base address
317 - making a copy of r0 into another register (a "frame" pointer)
318
319 Note that the MCore really doesn't have a real frame pointer.
320 Instead, the compiler may copy the SP into a register (usually
321 r8) to act as an arg pointer. For our target-dependent purposes,
322 the frame info's "frame" member will be the beginning of the
323 frame. The SP could, in fact, point below this.
324
325 The prologue ends when an instruction fails to meet either of
326 the first two criteria or when an FP is made. We make a special
327 exception for gcc. When compiling unoptimized code, gcc will
328 setup stack slots. We need to make sure that we skip the filling
329 of these stack slots as much as possible. This is only done
330 when SKIP_PROLOGUE is set, so that it does not mess up
331 backtraces. */
332
333/* Analyze the prologue of frame FI to determine where registers are saved,
334 the end of the prologue, etc. Return the address of the first line
335 of "real" code (i.e., the end of the prologue). */
336
337static CORE_ADDR
338mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue)
339{
340 CORE_ADDR func_addr, func_end, addr, stop;
341 CORE_ADDR stack_size;
342 int insn, rn;
93d56215
AC
343 int status;
344 int fp_regnum = 0; /* dummy, valid when (flags & MY_FRAME_IN_FP) */
345 int flags;
96baa820
JM
346 int framesize;
347 int register_offsets[NUM_REGS];
348 char *name;
349
350 /* If provided, use the PC in the frame to look up the
351 start of this function. */
50abf9e5 352 pc = (fi == NULL ? pc : get_frame_pc (fi));
96baa820
JM
353
354 /* Find the start of this function. */
355 status = find_pc_partial_function (pc, &name, &func_addr, &func_end);
356
357 /* If the start of this function could not be found or if the debbuger
358 is stopped at the first instruction of the prologue, do nothing. */
359 if (status == 0)
360 return pc;
361
362 /* If the debugger is entry function, give up. */
363 if (func_addr == entry_point_address ())
364 {
365 if (fi != NULL)
da50a4b7 366 get_frame_extra_info (fi)->status |= NO_MORE_FRAMES;
96baa820
JM
367 return pc;
368 }
369
370 /* At the start of a function, our frame is in the stack pointer. */
371 flags = MY_FRAME_IN_SP;
372
373 /* Start decoding the prologue. We start by checking two special cases:
374
375 1. We're about to return
376 2. We're at the first insn of the prologue.
377
378 If we're about to return, our frame has already been deallocated.
379 If we are stopped at the first instruction of a prologue,
380 then our frame has not yet been set up. */
381
382 /* Get the first insn from memory (all MCore instructions are 16 bits) */
383 mcore_insn_debug (("MCORE: starting prologue decoding\n"));
384 insn = get_insn (pc);
385 mcore_dump_insn ("got 1: ", pc, insn);
386
387 /* Check for return. */
388 if (fi != NULL && IS_RTS (insn))
389 {
390 mcore_insn_debug (("MCORE: got jmp r15"));
11c02a10 391 if (get_next_frame (fi) == NULL)
8ccd593b 392 deprecated_update_frame_base_hack (fi, read_sp ());
50abf9e5 393 return get_frame_pc (fi);
96baa820
JM
394 }
395
396 /* Check for first insn of prologue */
50abf9e5 397 if (fi != NULL && get_frame_pc (fi) == func_addr)
96baa820 398 {
11c02a10 399 if (get_next_frame (fi) == NULL)
8ccd593b 400 deprecated_update_frame_base_hack (fi, read_sp ());
50abf9e5 401 return get_frame_pc (fi);
96baa820
JM
402 }
403
404 /* Figure out where to stop scanning */
50abf9e5 405 stop = (fi ? get_frame_pc (fi) : func_end);
96baa820
JM
406
407 /* Don't walk off the end of the function */
408 stop = (stop > func_end ? func_end : stop);
409
410 /* REGISTER_OFFSETS will contain offsets, from the top of the frame
411 (NOT the frame pointer), for the various saved registers or -1
412 if the register is not saved. */
413 for (rn = 0; rn < NUM_REGS; rn++)
414 register_offsets[rn] = -1;
415
416 /* Analyze the prologue. Things we determine from analyzing the
417 prologue include:
418 * the size of the frame
419 * where saved registers are located (and which are saved)
420 * FP used? */
421 mcore_insn_debug (("MCORE: Scanning prologue: func_addr=0x%x, stop=0x%x\n",
422 (unsigned int) func_addr, (unsigned int) stop));
423
424 framesize = 0;
425 for (addr = func_addr; addr < stop; addr += 2)
426 {
427 /* Get next insn */
428 insn = get_insn (addr);
429 mcore_dump_insn ("got 2: ", addr, insn);
430
431 if (IS_SUBI0 (insn))
432 {
433 int offset = 1 + ((insn >> 4) & 0x1f);
8e1a459b 434 mcore_insn_debug (("MCORE: got subi r0,%d; continuing\n", offset));
96baa820
JM
435 framesize += offset;
436 continue;
437 }
438 else if (IS_STM (insn))
439 {
440 /* Spill register(s) */
441 int offset;
442 int start_register;
443
444 /* BIG WARNING! The MCore ABI does not restrict functions
445 to taking only one stack allocation. Therefore, when
446 we save a register, we record the offset of where it was
447 saved relative to the current framesize. This will
448 then give an offset from the SP upon entry to our
449 function. Remember, framesize is NOT constant until
450 we're done scanning the prologue. */
451 start_register = (insn & 0xf);
452 mcore_insn_debug (("MCORE: got stm r%d-r15,(r0)\n", start_register));
453
454 for (rn = start_register, offset = 0; rn <= 15; rn++, offset += 4)
455 {
456 register_offsets[rn] = framesize - offset;
457 mcore_insn_debug (("MCORE: r%d saved at 0x%x (offset %d)\n", rn,
458 register_offsets[rn], offset));
459 }
460 mcore_insn_debug (("MCORE: continuing\n"));
461 continue;
462 }
463 else if (IS_STWx0 (insn))
464 {
465 /* Spill register: see note for IS_STM above. */
466 int imm;
467
468 rn = (insn >> 8) & 0xf;
469 imm = (insn >> 4) & 0xf;
470 register_offsets[rn] = framesize - (imm << 2);
471 mcore_insn_debug (("MCORE: r%d saved at offset 0x%x\n", rn, register_offsets[rn]));
472 mcore_insn_debug (("MCORE: continuing\n"));
473 continue;
474 }
475 else if (IS_MOVx0 (insn))
476 {
477 /* We have a frame pointer, so this prologue is over. Note
478 the register which is acting as the frame pointer. */
479 flags |= MY_FRAME_IN_FP;
480 flags &= ~MY_FRAME_IN_SP;
481 fp_regnum = insn & 0xf;
482 mcore_insn_debug (("MCORE: Found a frame pointer: r%d\n", fp_regnum));
483
484 /* If we found an FP, we're at the end of the prologue. */
485 mcore_insn_debug (("MCORE: end of prologue\n"));
486 if (skip_prologue)
487 continue;
488
489 /* If we're decoding prologue, stop here. */
490 addr += 2;
491 break;
492 }
493 else if (IS_STWxy (insn) && (flags & MY_FRAME_IN_FP) && ((insn & 0xf) == fp_regnum))
494 {
495 /* Special case. Skip over stack slot allocs, too. */
496 mcore_insn_debug (("MCORE: push arg onto stack.\n"));
497 continue;
498 }
499 else if (IS_LRW1 (insn) || IS_MOVI1 (insn)
500 || IS_BGENI1 (insn) || IS_BMASKI1 (insn))
501 {
502 int adjust = 0;
503 int offset = 0;
504 int insn2;
505
506 mcore_insn_debug (("MCORE: looking at large frame\n"));
507 if (IS_LRW1 (insn))
508 {
509 adjust =
510 read_memory_integer ((addr + 2 + ((insn & 0xff) << 2)) & 0xfffffffc, 4);
511 }
512 else if (IS_MOVI1 (insn))
513 adjust = (insn >> 4) & 0x7f;
514 else if (IS_BGENI1 (insn))
515 adjust = 1 << ((insn >> 4) & 0x1f);
516 else /* IS_BMASKI (insn) */
517 adjust = (1 << (adjust >> 4) & 0x1f) - 1;
518
519 mcore_insn_debug (("MCORE: base framesize=0x%x\n", adjust));
520
521 /* May have zero or more insns which modify r1 */
522 mcore_insn_debug (("MCORE: looking for r1 adjusters...\n"));
523 offset = 2;
524 insn2 = get_insn (addr + offset);
525 while (IS_R1_ADJUSTER (insn2))
526 {
527 int imm;
528
529 imm = (insn2 >> 4) & 0x1f;
530 mcore_dump_insn ("got 3: ", addr + offset, insn);
531 if (IS_ADDI1 (insn2))
532 {
533 adjust += (imm + 1);
534 mcore_insn_debug (("MCORE: addi r1,%d\n", imm + 1));
535 }
536 else if (IS_SUBI1 (insn2))
537 {
538 adjust -= (imm + 1);
539 mcore_insn_debug (("MCORE: subi r1,%d\n", imm + 1));
540 }
541 else if (IS_RSUBI1 (insn2))
542 {
543 adjust = imm - adjust;
544 mcore_insn_debug (("MCORE: rsubi r1,%d\n", imm + 1));
545 }
546 else if (IS_NOT1 (insn2))
547 {
548 adjust = ~adjust;
549 mcore_insn_debug (("MCORE: not r1\n"));
550 }
551 else if (IS_ROTLI1 (insn2))
552 {
553 adjust <<= imm;
554 mcore_insn_debug (("MCORE: rotli r1,%d\n", imm + 1));
555 }
556 else if (IS_BSETI1 (insn2))
557 {
558 adjust |= (1 << imm);
559 mcore_insn_debug (("MCORE: bseti r1,%d\n", imm));
560 }
561 else if (IS_BCLRI1 (insn2))
562 {
563 adjust &= ~(1 << imm);
564 mcore_insn_debug (("MCORE: bclri r1,%d\n", imm));
565 }
566 else if (IS_IXH1 (insn2))
567 {
568 adjust *= 3;
569 mcore_insn_debug (("MCORE: ix.h r1,r1\n"));
570 }
571 else if (IS_IXW1 (insn2))
572 {
573 adjust *= 5;
574 mcore_insn_debug (("MCORE: ix.w r1,r1\n"));
575 }
576
577 offset += 2;
578 insn2 = get_insn (addr + offset);
579 };
580
581 mcore_insn_debug (("MCORE: done looking for r1 adjusters\n"));
582
583 /* If the next insn adjusts the stack pointer, we keep everything;
584 if not, we scrap it and we've found the end of the prologue. */
585 if (IS_SUB01 (insn2))
586 {
587 addr += offset;
588 framesize += adjust;
589 mcore_insn_debug (("MCORE: found stack adjustment of 0x%x bytes.\n", adjust));
590 mcore_insn_debug (("MCORE: skipping to new address 0x%x\n", addr));
591 mcore_insn_debug (("MCORE: continuing\n"));
592 continue;
593 }
594
595 /* None of these instructions are prologue, so don't touch
596 anything. */
597 mcore_insn_debug (("MCORE: no subu r1,r0, NOT altering framesize.\n"));
598 break;
599 }
600
601 /* This is not a prologue insn, so stop here. */
602 mcore_insn_debug (("MCORE: insn is not a prologue insn -- ending scan\n"));
603 break;
604 }
605
606 mcore_insn_debug (("MCORE: done analyzing prologue\n"));
607 mcore_insn_debug (("MCORE: prologue end = 0x%x\n", addr));
608
609 /* Save everything we have learned about this frame into FI. */
610 if (fi != NULL)
611 {
da50a4b7
AC
612 get_frame_extra_info (fi)->framesize = framesize;
613 get_frame_extra_info (fi)->fp_regnum = fp_regnum;
614 get_frame_extra_info (fi)->status = flags;
96baa820
JM
615
616 /* Fix the frame pointer. When gcc uses r8 as a frame pointer,
617 it is really an arg ptr. We adjust fi->frame to be a "real"
618 frame pointer. */
11c02a10 619 if (get_next_frame (fi) == NULL)
96baa820 620 {
da50a4b7 621 if (get_frame_extra_info (fi)->status & MY_FRAME_IN_SP)
8ccd593b 622 deprecated_update_frame_base_hack (fi, read_sp () + framesize);
96baa820 623 else
8ccd593b 624 deprecated_update_frame_base_hack (fi, read_register (fp_regnum) + framesize);
96baa820
JM
625 }
626
627 /* Note where saved registers are stored. The offsets in REGISTER_OFFSETS
628 are computed relative to the top of the frame. */
629 for (rn = 0; rn < NUM_REGS; rn++)
630 {
631 if (register_offsets[rn] >= 0)
632 {
1e2330ba 633 get_frame_saved_regs (fi)[rn] = get_frame_base (fi) - register_offsets[rn];
96baa820
JM
634 mcore_insn_debug (("Saved register %s stored at 0x%08x, value=0x%08x\n",
635 mcore_register_names[rn], fi->saved_regs[rn],
636 read_memory_integer (fi->saved_regs[rn], 4)));
637 }
638 }
639 }
640
641 /* Return addr of first non-prologue insn. */
642 return addr;
643}
644
a5afb99f
AC
645/* Given a GDB frame, determine the address of the calling function's
646 frame. This will be used to create a new GDB frame struct, and
e9582e71
AC
647 then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC
648 will be called for the new frame. */
96baa820
JM
649
650CORE_ADDR
651mcore_frame_chain (struct frame_info * fi)
652{
653 struct frame_info *dummy;
654 CORE_ADDR callers_addr;
655
656 /* Analyze the prologue of this function. */
da50a4b7 657 if (get_frame_extra_info (fi)->status == 0)
96baa820
JM
658 mcore_analyze_prologue (fi, 0, 0);
659
660 /* If mcore_analyze_prologue set NO_MORE_FRAMES, quit now. */
da50a4b7 661 if (get_frame_extra_info (fi)->status & NO_MORE_FRAMES)
96baa820
JM
662 return 0;
663
664 /* Now that we've analyzed our prologue, we can start to ask
665 for information about our caller. The easiest way to do
666 this is to analyze our caller's prologue.
667
668 If our caller has a frame pointer, then we need to find
669 the value of that register upon entry to our frame.
670 This value is either in fi->saved_regs[rn] if it's saved,
671 or it's still in a register.
672
673 If our caller does not have a frame pointer, then his frame base
674 is <our base> + -<caller's frame size>. */
8bedc050 675 dummy = analyze_dummy_frame (DEPRECATED_FRAME_SAVED_PC (fi), get_frame_base (fi));
96baa820 676
da50a4b7 677 if (get_frame_extra_info (dummy)->status & MY_FRAME_IN_FP)
96baa820 678 {
da50a4b7 679 int fp = get_frame_extra_info (dummy)->fp_regnum;
96baa820
JM
680
681 /* Our caller has a frame pointer. */
b2fb4676 682 if (get_frame_saved_regs (fi)[fp] != 0)
96baa820
JM
683 {
684 /* The "FP" was saved on the stack. Don't forget to adjust
685 the "FP" with the framesize to get a real FP. */
b2fb4676 686 callers_addr = read_memory_integer (get_frame_saved_regs (fi)[fp], REGISTER_SIZE)
da50a4b7 687 + get_frame_extra_info (dummy)->framesize;
96baa820
JM
688 }
689 else
690 {
691 /* It's still in the register. Don't forget to adjust
692 the "FP" with the framesize to get a real FP. */
da50a4b7 693 callers_addr = read_register (fp) + get_frame_extra_info (dummy)->framesize;
96baa820
JM
694 }
695 }
696 else
697 {
698 /* Our caller does not have a frame pointer. */
da50a4b7 699 callers_addr = get_frame_base (fi) + get_frame_extra_info (dummy)->framesize;
96baa820
JM
700 }
701
702 return callers_addr;
703}
704
705/* Skip the prologue of the function at PC. */
706
707CORE_ADDR
708mcore_skip_prologue (CORE_ADDR pc)
709{
710 CORE_ADDR func_addr, func_end;
711 struct symtab_and_line sal;
712
713 /* If we have line debugging information, then the end of the
7e73cedf 714 prologue should be the first assembly instruction of the first
96baa820
JM
715 source line */
716 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
717 {
718 sal = find_pc_line (func_addr, 0);
719 if (sal.end && sal.end < func_end)
720 return sal.end;
721 }
722
723 return mcore_analyze_prologue (NULL, pc, 1);
724}
725
726/* Return the address at which function arguments are offset. */
727CORE_ADDR
728mcore_frame_args_address (struct frame_info * fi)
729{
da50a4b7 730 return get_frame_base (fi) - get_frame_extra_info (fi)->framesize;
96baa820
JM
731}
732
733CORE_ADDR
734mcore_frame_locals_address (struct frame_info * fi)
735{
da50a4b7 736 return get_frame_base (fi) - get_frame_extra_info (fi)->framesize;
96baa820
JM
737}
738
739/* Return the frame pointer in use at address PC. */
740
741void
e0441cf0 742mcore_virtual_frame_pointer (CORE_ADDR pc, int *reg, LONGEST *offset)
96baa820
JM
743{
744 struct frame_info *dummy = analyze_dummy_frame (pc, 0);
da50a4b7 745 if (get_frame_extra_info (dummy)->status & MY_FRAME_IN_SP)
96baa820
JM
746 {
747 *reg = SP_REGNUM;
748 *offset = 0;
749 }
750 else
751 {
da50a4b7 752 *reg = get_frame_extra_info (dummy)->fp_regnum;
96baa820
JM
753 *offset = 0;
754 }
755}
756
757/* Find the value of register REGNUM in frame FI. */
758
759CORE_ADDR
760mcore_find_callers_reg (struct frame_info *fi, int regnum)
761{
11c02a10 762 for (; fi != NULL; fi = get_next_frame (fi))
96baa820 763 {
1e2330ba
AC
764 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi),
765 get_frame_base (fi)))
766 return deprecated_read_register_dummy (get_frame_pc (fi),
767 get_frame_base (fi), regnum);
b2fb4676
AC
768 else if (get_frame_saved_regs (fi)[regnum] != 0)
769 return read_memory_integer (get_frame_saved_regs (fi)[regnum],
96baa820
JM
770 REGISTER_SIZE);
771 }
772
773 return read_register (regnum);
774}
775
776/* Find the saved pc in frame FI. */
777
778CORE_ADDR
779mcore_frame_saved_pc (struct frame_info * fi)
780{
781
1e2330ba
AC
782 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi),
783 get_frame_base (fi)))
784 return deprecated_read_register_dummy (get_frame_pc (fi),
785 get_frame_base (fi), PC_REGNUM);
96baa820
JM
786 else
787 return mcore_find_callers_reg (fi, PR_REGNUM);
788}
789\f
790/* INFERIOR FUNCTION CALLS */
791
792/* This routine gets called when either the user uses the "return"
793 command, or the call dummy breakpoint gets hit. */
794
795void
5ae5f592 796mcore_pop_frame (void)
96baa820
JM
797{
798 int rn;
4e0d9804 799 struct frame_info *fi = get_current_frame ();
96baa820 800
1e2330ba
AC
801 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi),
802 get_frame_base (fi)))
96baa820
JM
803 generic_pop_dummy_frame ();
804 else
805 {
806 /* Write out the PC we saved. */
8bedc050 807 write_register (PC_REGNUM, DEPRECATED_FRAME_SAVED_PC (fi));
96baa820
JM
808
809 /* Restore any saved registers. */
810 for (rn = 0; rn < NUM_REGS; rn++)
811 {
b2fb4676 812 if (get_frame_saved_regs (fi)[rn] != 0)
96baa820
JM
813 {
814 ULONGEST value;
815
b2fb4676 816 value = read_memory_unsigned_integer (get_frame_saved_regs (fi)[rn],
96baa820
JM
817 REGISTER_SIZE);
818 write_register (rn, value);
819 }
820 }
821
822 /* Actually cut back the stack. */
c193f6ac 823 write_register (SP_REGNUM, get_frame_base (fi));
96baa820
JM
824 }
825
826 /* Finally, throw away any cached frame information. */
827 flush_cached_frames ();
828}
829
830/* Setup arguments and PR for a call to the target. First six arguments
831 go in FIRST_ARGREG -> LAST_ARGREG, subsequent args go on to the stack.
832
833 * Types with lengths greater than REGISTER_SIZE may not be split
834 between registers and the stack, and they must start in an even-numbered
835 register. Subsequent args will go onto the stack.
836
837 * Structs may be split between registers and stack, left-aligned.
838
839 * If the function returns a struct which will not fit into registers (it's
840 more than eight bytes), we must allocate for that, too. Gdb will tell
841 us where this buffer is (STRUCT_ADDR), and we simply place it into
842 FIRST_ARGREG, since the MCORE treats struct returns (of less than eight
843 bytes) as hidden first arguments. */
844
845CORE_ADDR
ea7c478f 846mcore_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
4e0d9804 847 int struct_return, CORE_ADDR struct_addr)
96baa820
JM
848{
849 int argreg;
850 int argnum;
851 struct stack_arg
852 {
853 int len;
854 char *val;
855 }
856 *stack_args;
857 int nstack_args = 0;
858
859 stack_args = (struct stack_arg *) alloca (nargs * sizeof (struct stack_arg));
860
861 argreg = FIRST_ARGREG;
862
863 /* Align the stack. This is mostly a nop, but not always. It will be needed
864 if we call a function which has argument overflow. */
865 sp &= ~3;
866
867 /* If this function returns a struct which does not fit in the
868 return registers, we must pass a buffer to the function
869 which it can use to save the return value. */
870 if (struct_return)
871 write_register (argreg++, struct_addr);
872
873 /* FIXME: what about unions? */
874 for (argnum = 0; argnum < nargs; argnum++)
875 {
876 char *val = (char *) VALUE_CONTENTS (args[argnum]);
877 int len = TYPE_LENGTH (VALUE_TYPE (args[argnum]));
878 struct type *type = VALUE_TYPE (args[argnum]);
879 int olen;
880
881 mcore_insn_debug (("MCORE PUSH: argreg=%d; len=%d; %s\n",
882 argreg, len, TYPE_CODE (type) == TYPE_CODE_STRUCT ? "struct" : "not struct"));
883 /* Arguments larger than a register must start in an even
884 numbered register. */
885 olen = len;
886
887 if (TYPE_CODE (type) != TYPE_CODE_STRUCT && len > REGISTER_SIZE && argreg % 2)
888 {
889 mcore_insn_debug (("MCORE PUSH: %d > REGISTER_SIZE: and %s is not even\n",
890 len, mcore_register_names[argreg]));
891 argreg++;
892 }
893
894 if ((argreg <= LAST_ARGREG && len <= (LAST_ARGREG - argreg + 1) * REGISTER_SIZE)
895 || (TYPE_CODE (type) == TYPE_CODE_STRUCT))
896 {
897 /* Something that will fit entirely into registers (or a struct
898 which may be split between registers and stack). */
899 mcore_insn_debug (("MCORE PUSH: arg %d going into regs\n", argnum));
900
901 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && olen < REGISTER_SIZE)
902 {
903 /* Small structs must be right aligned within the register,
904 the most significant bits are undefined. */
905 write_register (argreg, extract_unsigned_integer (val, len));
906 argreg++;
907 len = 0;
908 }
909
910 while (len > 0 && argreg <= LAST_ARGREG)
911 {
912 write_register (argreg, extract_unsigned_integer (val, REGISTER_SIZE));
913 argreg++;
914 val += REGISTER_SIZE;
915 len -= REGISTER_SIZE;
916 }
917
918 /* Any remainder for the stack is noted below... */
919 }
920 else if (TYPE_CODE (VALUE_TYPE (args[argnum])) != TYPE_CODE_STRUCT
921 && len > REGISTER_SIZE)
922 {
923 /* All subsequent args go onto the stack. */
924 mcore_insn_debug (("MCORE PUSH: does not fit into regs, going onto stack\n"));
925 argnum = LAST_ARGREG + 1;
926 }
927
928 if (len > 0)
929 {
930 /* Note that this must be saved onto the stack */
931 mcore_insn_debug (("MCORE PUSH: adding arg %d to stack\n", argnum));
932 stack_args[nstack_args].val = val;
933 stack_args[nstack_args].len = len;
934 nstack_args++;
935 }
936
937 }
938
939 /* We're done with registers and stack allocation. Now do the actual
940 stack pushes. */
941 while (nstack_args--)
942 {
943 sp -= stack_args[nstack_args].len;
944 write_memory (sp, stack_args[nstack_args].val, stack_args[nstack_args].len);
945 }
946
947 /* Return adjusted stack pointer. */
948 return sp;
949}
950
951/* Store the return address for the call dummy. For MCore, we've
952 opted to use generic call dummies, so we simply store the
953 CALL_DUMMY_ADDRESS into the PR register (r15). */
954
955CORE_ADDR
956mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
957{
958 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
959 return sp;
960}
961
962/* Setting/getting return values from functions.
963
964 The Motorola MCore processors use r2/r3 to return anything
965 not larger than 32 bits. Everything else goes into a caller-
966 supplied buffer, which is passed in via a hidden first
967 argument.
968
969 For gdb, this leaves us two routes, based on what
970 USE_STRUCT_CONVENTION (mcore_use_struct_convention) returns.
971 If this macro returns 1, gdb will call STORE_STRUCT_RETURN and
972 EXTRACT_STRUCT_VALUE_ADDRESS.
973
974 If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
975 and EXTRACT_RETURN_VALUE to store/fetch the functions return value. */
976
977/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
978 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
979 and TYPE is the type (which is known to be struct, union or array). */
980
981int
982mcore_use_struct_convention (int gcc_p, struct type *type)
983{
984 return (TYPE_LENGTH (type) > 8);
985}
986
987/* Where is the return value saved? For MCore, a pointer to
988 this buffer was passed as a hidden first argument, so
989 just return that address. */
990
991CORE_ADDR
992mcore_extract_struct_value_address (char *regbuf)
993{
994 return extract_address (regbuf + REGISTER_BYTE (FIRST_ARGREG), REGISTER_SIZE);
995}
996
997/* Given a function which returns a value of type TYPE, extract the
998 the function's return value and place the result into VALBUF.
999 REGBUF is the register contents of the target. */
1000
1001void
1002mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1003{
1004 /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */
1005 /* Only getting the first byte! if len = 1, we need the last byte of
1006 the register, not the first. */
1007 memcpy (valbuf, regbuf + REGISTER_BYTE (RETVAL_REGNUM) +
1008 (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0), TYPE_LENGTH (type));
1009}
1010
1011/* Store the return value in VALBUF (of type TYPE) where the caller
1012 expects to see it.
1013
1014 Values less than 32 bits are stored in r2, right justified and
1015 sign or zero extended.
1016
1017 Values between 32 and 64 bits are stored in r2 (most
1018 significant word) and r3 (least significant word, left justified).
1019 Note that this includes structures of less than eight bytes, too. */
1020
1021void
1022mcore_store_return_value (struct type *type, char *valbuf)
1023{
1024 int value_size;
1025 int return_size;
1026 int offset;
1027 char *zeros;
1028
1029 value_size = TYPE_LENGTH (type);
1030
1031 /* Return value fits into registers. */
1032 return_size = (value_size + REGISTER_SIZE - 1) & ~(REGISTER_SIZE - 1);
1033 offset = REGISTER_BYTE (RETVAL_REGNUM) + (return_size - value_size);
1034 zeros = alloca (return_size);
1035 memset (zeros, 0, return_size);
1036
73937e03
AC
1037 deprecated_write_register_bytes (REGISTER_BYTE (RETVAL_REGNUM), zeros,
1038 return_size);
1039 deprecated_write_register_bytes (offset, valbuf, value_size);
96baa820
JM
1040}
1041
1042/* Initialize our target-dependent "stuff" for this newly created frame.
1043
1044 This includes allocating space for saved registers and analyzing
1045 the prologue of this frame. */
1046
1047void
4e0d9804 1048mcore_init_extra_frame_info (int fromleaf, struct frame_info *fi)
96baa820 1049{
11c02a10 1050 if (fi && get_next_frame (fi))
8bedc050 1051 deprecated_update_frame_pc_hack (fi, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi)));
96baa820
JM
1052
1053 frame_saved_regs_zalloc (fi);
1054
a00a19e9 1055 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
da50a4b7
AC
1056 get_frame_extra_info (fi)->status = 0;
1057 get_frame_extra_info (fi)->framesize = 0;
96baa820 1058
1e2330ba
AC
1059 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi),
1060 get_frame_base (fi)))
96baa820 1061 {
04714b91
AC
1062 /* We need to setup fi->frame here because call_function_by_hand
1063 gets it wrong by assuming it's always FP. */
1e2330ba 1064 deprecated_update_frame_base_hack (fi, deprecated_read_register_dummy (get_frame_pc (fi), get_frame_base (fi), SP_REGNUM));
96baa820
JM
1065 }
1066 else
1067 mcore_analyze_prologue (fi, 0, 0);
1068}
1069
1070/* Get an insturction from memory. */
1071
1072static int
1073get_insn (CORE_ADDR pc)
1074{
1075 char buf[4];
1076 int status = read_memory_nobpt (pc, buf, 2);
1077 if (status != 0)
1078 return 0;
1079
1080 return extract_unsigned_integer (buf, 2);
1081}
1082
4cfe2084
GS
1083static struct gdbarch *
1084mcore_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1085{
1086 static LONGEST call_dummy_words[7] = { };
1087 struct gdbarch_tdep *tdep = NULL;
1088 struct gdbarch *gdbarch;
1089
1090 /* find a candidate among the list of pre-declared architectures. */
1091 arches = gdbarch_list_lookup_by_info (arches, &info);
1092 if (arches != NULL)
1093 return (arches->gdbarch);
1094
1095 gdbarch = gdbarch_alloc (&info, 0);
1096
a5afb99f
AC
1097 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1098 ready to unwind the PC first (see frame.c:get_prev_frame()). */
1099 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
1100
4e0d9804
GS
1101 /* Registers: */
1102
4cfe2084
GS
1103 /* All registers are 32 bits */
1104 set_gdbarch_register_size (gdbarch, MCORE_REG_SIZE);
a0ed5532
AC
1105 set_gdbarch_deprecated_max_register_raw_size (gdbarch, MCORE_REG_SIZE);
1106 set_gdbarch_deprecated_max_register_virtual_size (gdbarch, MCORE_REG_SIZE);
4cfe2084
GS
1107 set_gdbarch_register_name (gdbarch, mcore_register_name);
1108 set_gdbarch_register_virtual_type (gdbarch, mcore_register_virtual_type);
1109 set_gdbarch_register_virtual_size (gdbarch, mcore_register_size);
1110 set_gdbarch_register_raw_size (gdbarch, mcore_register_size);
1111 set_gdbarch_register_byte (gdbarch, mcore_register_byte);
4e0d9804
GS
1112 set_gdbarch_register_bytes (gdbarch, MCORE_REG_SIZE * MCORE_NUM_REGS);
1113 set_gdbarch_num_regs (gdbarch, MCORE_NUM_REGS);
1114 set_gdbarch_pc_regnum (gdbarch, 64);
1115 set_gdbarch_sp_regnum (gdbarch, 0);
0ba6dca9 1116 set_gdbarch_deprecated_fp_regnum (gdbarch, 0);
4e0d9804
GS
1117
1118 /* Call Dummies: */
4cfe2084 1119
4cfe2084
GS
1120 set_gdbarch_call_dummy_words (gdbarch, call_dummy_words);
1121 set_gdbarch_sizeof_call_dummy_words (gdbarch, 0);
4cfe2084 1122 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
6913c89a 1123 set_gdbarch_deprecated_saved_pc_after_call (gdbarch, mcore_saved_pc_after_call);
4e0d9804
GS
1124 set_gdbarch_function_start_offset (gdbarch, 0);
1125 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1126 set_gdbarch_breakpoint_from_pc (gdbarch, mcore_breakpoint_from_pc);
28f617b3 1127 set_gdbarch_deprecated_push_return_address (gdbarch, mcore_push_return_address);
b81774d8 1128 set_gdbarch_deprecated_push_arguments (gdbarch, mcore_push_arguments);
4e0d9804
GS
1129
1130 /* Frames: */
1131
e9582e71 1132 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, mcore_init_extra_frame_info);
618ce49f 1133 set_gdbarch_deprecated_frame_chain (gdbarch, mcore_frame_chain);
f30ee0bc 1134 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, mcore_frame_init_saved_regs);
8bedc050 1135 set_gdbarch_deprecated_frame_saved_pc (gdbarch, mcore_frame_saved_pc);
ebba8386 1136 set_gdbarch_deprecated_store_return_value (gdbarch, mcore_store_return_value);
4e0d9804
GS
1137 set_gdbarch_deprecated_extract_return_value (gdbarch,
1138 mcore_extract_return_value);
4183d812 1139 set_gdbarch_deprecated_store_struct_return (gdbarch, mcore_store_struct_return);
4e0d9804
GS
1140 set_gdbarch_deprecated_extract_struct_value_address (gdbarch,
1141 mcore_extract_struct_value_address);
1142 set_gdbarch_skip_prologue (gdbarch, mcore_skip_prologue);
1143 set_gdbarch_frame_args_skip (gdbarch, 0);
1144 set_gdbarch_frame_args_address (gdbarch, mcore_frame_args_address);
1145 set_gdbarch_frame_locals_address (gdbarch, mcore_frame_locals_address);
1146 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
749b82f6 1147 set_gdbarch_deprecated_pop_frame (gdbarch, mcore_pop_frame);
efdc1108 1148 set_gdbarch_virtual_frame_pointer (gdbarch, mcore_virtual_frame_pointer);
4e0d9804
GS
1149
1150 /* Misc.: */
1151
1152 /* Stack grows down. */
1153 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
efdc1108
GS
1154 set_gdbarch_use_struct_convention (gdbarch, mcore_use_struct_convention);
1155 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1156 /* MCore will never pass a sturcture by reference. It will always be split
1157 between registers and stack. */
1158 set_gdbarch_reg_struct_has_addr (gdbarch, mcore_reg_struct_has_addr);
4cfe2084 1159
6c0e89ed
AC
1160 /* Should be using push_dummy_call. */
1161 set_gdbarch_deprecated_dummy_write_sp (gdbarch, generic_target_write_sp);
1162
4cfe2084
GS
1163 return gdbarch;
1164}
1165
1166static void
1167mcore_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
1168{
1169
1170}
1171
96baa820 1172void
fba45db2 1173_initialize_mcore_tdep (void)
96baa820
JM
1174{
1175 extern int print_insn_mcore (bfd_vma, disassemble_info *);
4cfe2084 1176 gdbarch_register (bfd_arch_mcore, mcore_gdbarch_init, mcore_dump_tdep);
d7a27068 1177 deprecated_tm_print_insn = print_insn_mcore;
96baa820
JM
1178
1179#ifdef MCORE_DEBUG
1180 add_show_from_set (add_set_cmd ("mcoredebug", no_class,
1181 var_boolean, (char *) &mcore_debug,
1182 "Set mcore debugging.\n", &setlist),
1183 &showlist);
1184#endif
1185}
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