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96baa820 | 1 | /* Target-machine dependent code for Motorola MCore for GDB, the GNU debugger |
51603483 | 2 | Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
96baa820 JM |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
19 | ||
20 | #include "defs.h" | |
21 | #include "frame.h" | |
22 | #include "symtab.h" | |
23 | #include "value.h" | |
24 | #include "gdbcmd.h" | |
4e052eda | 25 | #include "regcache.h" |
58841d58 AC |
26 | #include "symfile.h" |
27 | #include "gdbcore.h" | |
28 | #include "inferior.h" | |
4e0d9804 | 29 | #include "arch-utils.h" |
9bbe19fb | 30 | #include "gdb_string.h" |
96baa820 JM |
31 | |
32 | /* Functions declared and used only in this file */ | |
33 | ||
34 | static CORE_ADDR mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue); | |
35 | ||
36 | static struct frame_info *analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame); | |
37 | ||
38 | static int get_insn (CORE_ADDR pc); | |
39 | ||
40 | /* Functions exported from this file */ | |
41 | ||
42 | int mcore_use_struct_convention (int gcc_p, struct type *type); | |
43 | ||
44 | void _initialize_mcore (void); | |
45 | ||
4e0d9804 | 46 | void mcore_init_extra_frame_info (int fromleaf, struct frame_info *fi); |
96baa820 JM |
47 | |
48 | CORE_ADDR mcore_frame_saved_pc (struct frame_info *fi); | |
49 | ||
50 | CORE_ADDR mcore_find_callers_reg (struct frame_info *fi, int regnum); | |
51 | ||
52 | CORE_ADDR mcore_frame_args_address (struct frame_info *fi); | |
53 | ||
54 | CORE_ADDR mcore_frame_locals_address (struct frame_info *fi); | |
55 | ||
96baa820 JM |
56 | CORE_ADDR mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp); |
57 | ||
ea7c478f | 58 | CORE_ADDR mcore_push_arguments (int nargs, struct value ** args, CORE_ADDR sp, |
4e0d9804 | 59 | int struct_return, CORE_ADDR struct_addr); |
96baa820 | 60 | |
4e0d9804 | 61 | void mcore_pop_frame (); |
96baa820 JM |
62 | |
63 | CORE_ADDR mcore_skip_prologue (CORE_ADDR pc); | |
64 | ||
65 | CORE_ADDR mcore_frame_chain (struct frame_info *fi); | |
66 | ||
f4f9705a | 67 | const unsigned char *mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size); |
96baa820 JM |
68 | |
69 | int mcore_use_struct_convention (int gcc_p, struct type *type); | |
70 | ||
71 | void mcore_store_return_value (struct type *type, char *valbuf); | |
72 | ||
73 | CORE_ADDR mcore_extract_struct_value_address (char *regbuf); | |
74 | ||
75 | void mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf); | |
76 | ||
77 | #ifdef MCORE_DEBUG | |
78 | int mcore_debug = 0; | |
79 | #endif | |
80 | ||
96baa820 | 81 | |
4cfe2084 GS |
82 | /* All registers are 4 bytes long. */ |
83 | #define MCORE_REG_SIZE 4 | |
84 | #define MCORE_NUM_REGS 65 | |
96baa820 | 85 | |
efdc1108 GS |
86 | /* Some useful register numbers. */ |
87 | #define PR_REGNUM 15 | |
88 | #define FIRST_ARGREG 2 | |
89 | #define LAST_ARGREG 7 | |
90 | #define RETVAL_REGNUM 2 | |
91 | ||
4cfe2084 | 92 | |
96baa820 JM |
93 | /* Additional info that we use for managing frames */ |
94 | struct frame_extra_info | |
95 | { | |
96 | /* A generic status word */ | |
97 | int status; | |
98 | ||
99 | /* Size of this frame */ | |
100 | int framesize; | |
101 | ||
102 | /* The register that is acting as a frame pointer, if | |
103 | it is being used. This is undefined if status | |
104 | does not contain the flag MY_FRAME_IN_FP. */ | |
105 | int fp_regnum; | |
106 | }; | |
107 | ||
108 | /* frame_extra_info status flags */ | |
109 | ||
110 | /* The base of the current frame is actually in the stack pointer. | |
111 | This happens when there is no frame pointer (MCore ABI does not | |
112 | require a frame pointer) or when we're stopped in the prologue or | |
113 | epilogue itself. In these cases, mcore_analyze_prologue will need | |
114 | to update fi->frame before returning or analyzing the register | |
115 | save instructions. */ | |
116 | #define MY_FRAME_IN_SP 0x1 | |
117 | ||
118 | /* The base of the current frame is in a frame pointer register. | |
119 | This register is noted in frame_extra_info->fp_regnum. | |
120 | ||
8e1a459b | 121 | Note that the existence of an FP might also indicate that the |
96baa820 JM |
122 | function has called alloca. */ |
123 | #define MY_FRAME_IN_FP 0x2 | |
124 | ||
125 | /* This flag is set to indicate that this frame is the top-most | |
126 | frame. This tells frame chain not to bother trying to unwind | |
127 | beyond this frame. */ | |
128 | #define NO_MORE_FRAMES 0x4 | |
129 | ||
130 | /* Instruction macros used for analyzing the prologue */ | |
131 | #define IS_SUBI0(x) (((x) & 0xfe0f) == 0x2400) /* subi r0,oimm5 */ | |
132 | #define IS_STM(x) (((x) & 0xfff0) == 0x0070) /* stm rf-r15,r0 */ | |
133 | #define IS_STWx0(x) (((x) & 0xf00f) == 0x9000) /* stw rz,(r0,disp) */ | |
134 | #define IS_STWxy(x) (((x) & 0xf000) == 0x9000) /* stw rx,(ry,disp) */ | |
135 | #define IS_MOVx0(x) (((x) & 0xfff0) == 0x1200) /* mov rn,r0 */ | |
136 | #define IS_LRW1(x) (((x) & 0xff00) == 0x7100) /* lrw r1,literal */ | |
137 | #define IS_MOVI1(x) (((x) & 0xf80f) == 0x6001) /* movi r1,imm7 */ | |
138 | #define IS_BGENI1(x) (((x) & 0xfe0f) == 0x3201) /* bgeni r1,imm5 */ | |
139 | #define IS_BMASKI1(x) (((x) & 0xfe0f) == 0x2C01) /* bmaski r1,imm5 */ | |
140 | #define IS_ADDI1(x) (((x) & 0xfe0f) == 0x2001) /* addi r1,oimm5 */ | |
141 | #define IS_SUBI1(x) (((x) & 0xfe0f) == 0x2401) /* subi r1,oimm5 */ | |
142 | #define IS_RSUBI1(x) (((x) & 0xfe0f) == 0x2801) /* rsubi r1,imm5 */ | |
143 | #define IS_NOT1(x) (((x) & 0xffff) == 0x01f1) /* not r1 */ | |
144 | #define IS_ROTLI1(x) (((x) & 0xfe0f) == 0x3801) /* rotli r1,imm5 */ | |
145 | #define IS_BSETI1(x) (((x) & 0xfe0f) == 0x3401) /* bseti r1,imm5 */ | |
146 | #define IS_BCLRI1(x) (((x) & 0xfe0f) == 0x3001) /* bclri r1,imm5 */ | |
147 | #define IS_IXH1(x) (((x) & 0xffff) == 0x1d11) /* ixh r1,r1 */ | |
148 | #define IS_IXW1(x) (((x) & 0xffff) == 0x1511) /* ixw r1,r1 */ | |
149 | #define IS_SUB01(x) (((x) & 0xffff) == 0x0510) /* subu r0,r1 */ | |
150 | #define IS_RTS(x) (((x) & 0xffff) == 0x00cf) /* jmp r15 */ | |
151 | ||
152 | #define IS_R1_ADJUSTER(x) \ | |
153 | (IS_ADDI1(x) || IS_SUBI1(x) || IS_ROTLI1(x) || IS_BSETI1(x) \ | |
154 | || IS_BCLRI1(x) || IS_RSUBI1(x) || IS_NOT1(x) \ | |
155 | || IS_IXH1(x) || IS_IXW1(x)) | |
156 | \f | |
157 | ||
158 | #ifdef MCORE_DEBUG | |
159 | static void | |
160 | mcore_dump_insn (char *commnt, CORE_ADDR pc, int insn) | |
161 | { | |
162 | if (mcore_debug) | |
163 | { | |
164 | printf_filtered ("MCORE: %s %08x %08x ", | |
165 | commnt, (unsigned int) pc, (unsigned int) insn); | |
2bf0cb65 | 166 | TARGET_PRINT_INSN (pc, &tm_print_insn_info); |
96baa820 JM |
167 | printf_filtered ("\n"); |
168 | } | |
169 | } | |
170 | #define mcore_insn_debug(args) { if (mcore_debug) printf_filtered args; } | |
171 | #else /* !MCORE_DEBUG */ | |
172 | #define mcore_dump_insn(a,b,c) {} | |
173 | #define mcore_insn_debug(args) {} | |
174 | #endif | |
175 | ||
4cfe2084 GS |
176 | |
177 | static struct type * | |
178 | mcore_register_virtual_type (int regnum) | |
179 | { | |
180 | if (regnum < 0 || regnum >= MCORE_NUM_REGS) | |
181 | internal_error (__FILE__, __LINE__, | |
182 | "mcore_register_virtual_type: illegal register number %d", | |
183 | regnum); | |
184 | else | |
185 | return builtin_type_int; | |
186 | } | |
187 | ||
188 | static int | |
189 | mcore_register_byte (int regnum) | |
190 | { | |
191 | if (regnum < 0 || regnum >= MCORE_NUM_REGS) | |
192 | internal_error (__FILE__, __LINE__, | |
193 | "mcore_register_byte: illegal register number %d", | |
194 | regnum); | |
195 | else | |
196 | return (regnum * MCORE_REG_SIZE); | |
197 | } | |
198 | ||
199 | static int | |
200 | mcore_register_size (int regnum) | |
201 | { | |
202 | ||
203 | if (regnum < 0 || regnum >= MCORE_NUM_REGS) | |
204 | internal_error (__FILE__, __LINE__, | |
205 | "mcore_register_size: illegal register number %d", | |
206 | regnum); | |
207 | else | |
208 | return MCORE_REG_SIZE; | |
209 | } | |
210 | ||
211 | /* The registers of the Motorola MCore processors */ | |
212 | ||
213 | static const char * | |
214 | mcore_register_name (int regnum) | |
215 | { | |
216 | ||
217 | static char *register_names[] = { | |
218 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
219 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
220 | "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7", | |
221 | "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15", | |
222 | "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1", | |
223 | "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15", | |
224 | "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23", | |
225 | "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31", | |
226 | "pc" | |
227 | }; | |
228 | ||
229 | if (regnum < 0 || | |
230 | regnum >= sizeof (register_names) / sizeof (register_names[0])) | |
231 | internal_error (__FILE__, __LINE__, | |
232 | "mcore_register_name: illegal register number %d", | |
233 | regnum); | |
234 | else | |
235 | return register_names[regnum]; | |
236 | } | |
237 | ||
96baa820 JM |
238 | /* Given the address at which to insert a breakpoint (BP_ADDR), |
239 | what will that breakpoint be? | |
240 | ||
241 | For MCore, we have a breakpoint instruction. Since all MCore | |
242 | instructions are 16 bits, this is all we need, regardless of | |
243 | address. bpkt = 0x0000 */ | |
244 | ||
f4f9705a | 245 | const unsigned char * |
96baa820 JM |
246 | mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size) |
247 | { | |
248 | static char breakpoint[] = | |
249 | {0x00, 0x00}; | |
250 | *bp_size = 2; | |
251 | return breakpoint; | |
252 | } | |
253 | ||
4e0d9804 GS |
254 | static CORE_ADDR |
255 | mcore_saved_pc_after_call (struct frame_info *frame) | |
256 | { | |
257 | return read_register (PR_REGNUM); | |
258 | } | |
259 | ||
260 | /* This is currently handled by init_extra_frame_info. */ | |
261 | static void | |
262 | mcore_frame_init_saved_regs (struct frame_info *frame) | |
263 | { | |
264 | ||
265 | } | |
266 | ||
267 | /* This is currently handled by mcore_push_arguments */ | |
268 | static void | |
269 | mcore_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
270 | { | |
271 | ||
272 | } | |
273 | ||
efdc1108 GS |
274 | static int |
275 | mcore_reg_struct_has_addr (int gcc_p, struct type *type) | |
276 | { | |
277 | return 0; | |
278 | } | |
279 | ||
280 | ||
96baa820 JM |
281 | /* Helper function for several routines below. This funtion simply |
282 | sets up a fake, aka dummy, frame (not a _call_ dummy frame) that | |
283 | we can analyze with mcore_analyze_prologue. */ | |
284 | ||
285 | static struct frame_info * | |
286 | analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame) | |
287 | { | |
288 | static struct frame_info *dummy = NULL; | |
289 | ||
290 | if (dummy == NULL) | |
291 | { | |
a00a19e9 | 292 | struct frame_extra_info *extra_info; |
7b5849cc | 293 | CORE_ADDR *saved_regs; |
f6c609c4 | 294 | dummy = deprecated_frame_xmalloc (); |
7b5849cc AC |
295 | saved_regs = (CORE_ADDR *) xmalloc (SIZEOF_FRAME_SAVED_REGS); |
296 | deprecated_set_frame_saved_regs_hack (dummy, saved_regs); | |
a00a19e9 AC |
297 | extra_info = XMALLOC (struct frame_extra_info); |
298 | deprecated_set_frame_extra_info_hack (dummy, extra_info); | |
96baa820 JM |
299 | } |
300 | ||
483d36b2 AC |
301 | deprecated_set_frame_next_hack (dummy, NULL); |
302 | deprecated_set_frame_prev_hack (dummy, NULL); | |
50abf9e5 | 303 | deprecated_update_frame_pc_hack (dummy, pc); |
8ccd593b | 304 | deprecated_update_frame_base_hack (dummy, frame); |
da50a4b7 AC |
305 | get_frame_extra_info (dummy)->status = 0; |
306 | get_frame_extra_info (dummy)->framesize = 0; | |
b2fb4676 | 307 | memset (get_frame_saved_regs (dummy), '\000', SIZEOF_FRAME_SAVED_REGS); |
96baa820 JM |
308 | mcore_analyze_prologue (dummy, 0, 0); |
309 | return dummy; | |
310 | } | |
311 | ||
0fb34c3a | 312 | /* Function prologues on the Motorola MCore processors consist of: |
96baa820 JM |
313 | |
314 | - adjustments to the stack pointer (r1 used as scratch register) | |
315 | - store word/multiples that use r0 as the base address | |
316 | - making a copy of r0 into another register (a "frame" pointer) | |
317 | ||
318 | Note that the MCore really doesn't have a real frame pointer. | |
319 | Instead, the compiler may copy the SP into a register (usually | |
320 | r8) to act as an arg pointer. For our target-dependent purposes, | |
321 | the frame info's "frame" member will be the beginning of the | |
322 | frame. The SP could, in fact, point below this. | |
323 | ||
324 | The prologue ends when an instruction fails to meet either of | |
325 | the first two criteria or when an FP is made. We make a special | |
326 | exception for gcc. When compiling unoptimized code, gcc will | |
327 | setup stack slots. We need to make sure that we skip the filling | |
328 | of these stack slots as much as possible. This is only done | |
329 | when SKIP_PROLOGUE is set, so that it does not mess up | |
330 | backtraces. */ | |
331 | ||
332 | /* Analyze the prologue of frame FI to determine where registers are saved, | |
333 | the end of the prologue, etc. Return the address of the first line | |
334 | of "real" code (i.e., the end of the prologue). */ | |
335 | ||
336 | static CORE_ADDR | |
337 | mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue) | |
338 | { | |
339 | CORE_ADDR func_addr, func_end, addr, stop; | |
340 | CORE_ADDR stack_size; | |
341 | int insn, rn; | |
93d56215 AC |
342 | int status; |
343 | int fp_regnum = 0; /* dummy, valid when (flags & MY_FRAME_IN_FP) */ | |
344 | int flags; | |
96baa820 JM |
345 | int framesize; |
346 | int register_offsets[NUM_REGS]; | |
347 | char *name; | |
348 | ||
349 | /* If provided, use the PC in the frame to look up the | |
350 | start of this function. */ | |
50abf9e5 | 351 | pc = (fi == NULL ? pc : get_frame_pc (fi)); |
96baa820 JM |
352 | |
353 | /* Find the start of this function. */ | |
354 | status = find_pc_partial_function (pc, &name, &func_addr, &func_end); | |
355 | ||
356 | /* If the start of this function could not be found or if the debbuger | |
357 | is stopped at the first instruction of the prologue, do nothing. */ | |
358 | if (status == 0) | |
359 | return pc; | |
360 | ||
361 | /* If the debugger is entry function, give up. */ | |
362 | if (func_addr == entry_point_address ()) | |
363 | { | |
364 | if (fi != NULL) | |
da50a4b7 | 365 | get_frame_extra_info (fi)->status |= NO_MORE_FRAMES; |
96baa820 JM |
366 | return pc; |
367 | } | |
368 | ||
369 | /* At the start of a function, our frame is in the stack pointer. */ | |
370 | flags = MY_FRAME_IN_SP; | |
371 | ||
372 | /* Start decoding the prologue. We start by checking two special cases: | |
373 | ||
374 | 1. We're about to return | |
375 | 2. We're at the first insn of the prologue. | |
376 | ||
377 | If we're about to return, our frame has already been deallocated. | |
378 | If we are stopped at the first instruction of a prologue, | |
379 | then our frame has not yet been set up. */ | |
380 | ||
381 | /* Get the first insn from memory (all MCore instructions are 16 bits) */ | |
382 | mcore_insn_debug (("MCORE: starting prologue decoding\n")); | |
383 | insn = get_insn (pc); | |
384 | mcore_dump_insn ("got 1: ", pc, insn); | |
385 | ||
386 | /* Check for return. */ | |
387 | if (fi != NULL && IS_RTS (insn)) | |
388 | { | |
389 | mcore_insn_debug (("MCORE: got jmp r15")); | |
11c02a10 | 390 | if (get_next_frame (fi) == NULL) |
8ccd593b | 391 | deprecated_update_frame_base_hack (fi, read_sp ()); |
50abf9e5 | 392 | return get_frame_pc (fi); |
96baa820 JM |
393 | } |
394 | ||
395 | /* Check for first insn of prologue */ | |
50abf9e5 | 396 | if (fi != NULL && get_frame_pc (fi) == func_addr) |
96baa820 | 397 | { |
11c02a10 | 398 | if (get_next_frame (fi) == NULL) |
8ccd593b | 399 | deprecated_update_frame_base_hack (fi, read_sp ()); |
50abf9e5 | 400 | return get_frame_pc (fi); |
96baa820 JM |
401 | } |
402 | ||
403 | /* Figure out where to stop scanning */ | |
50abf9e5 | 404 | stop = (fi ? get_frame_pc (fi) : func_end); |
96baa820 JM |
405 | |
406 | /* Don't walk off the end of the function */ | |
407 | stop = (stop > func_end ? func_end : stop); | |
408 | ||
409 | /* REGISTER_OFFSETS will contain offsets, from the top of the frame | |
410 | (NOT the frame pointer), for the various saved registers or -1 | |
411 | if the register is not saved. */ | |
412 | for (rn = 0; rn < NUM_REGS; rn++) | |
413 | register_offsets[rn] = -1; | |
414 | ||
415 | /* Analyze the prologue. Things we determine from analyzing the | |
416 | prologue include: | |
417 | * the size of the frame | |
418 | * where saved registers are located (and which are saved) | |
419 | * FP used? */ | |
420 | mcore_insn_debug (("MCORE: Scanning prologue: func_addr=0x%x, stop=0x%x\n", | |
421 | (unsigned int) func_addr, (unsigned int) stop)); | |
422 | ||
423 | framesize = 0; | |
424 | for (addr = func_addr; addr < stop; addr += 2) | |
425 | { | |
426 | /* Get next insn */ | |
427 | insn = get_insn (addr); | |
428 | mcore_dump_insn ("got 2: ", addr, insn); | |
429 | ||
430 | if (IS_SUBI0 (insn)) | |
431 | { | |
432 | int offset = 1 + ((insn >> 4) & 0x1f); | |
8e1a459b | 433 | mcore_insn_debug (("MCORE: got subi r0,%d; continuing\n", offset)); |
96baa820 JM |
434 | framesize += offset; |
435 | continue; | |
436 | } | |
437 | else if (IS_STM (insn)) | |
438 | { | |
439 | /* Spill register(s) */ | |
440 | int offset; | |
441 | int start_register; | |
442 | ||
443 | /* BIG WARNING! The MCore ABI does not restrict functions | |
444 | to taking only one stack allocation. Therefore, when | |
445 | we save a register, we record the offset of where it was | |
446 | saved relative to the current framesize. This will | |
447 | then give an offset from the SP upon entry to our | |
448 | function. Remember, framesize is NOT constant until | |
449 | we're done scanning the prologue. */ | |
450 | start_register = (insn & 0xf); | |
451 | mcore_insn_debug (("MCORE: got stm r%d-r15,(r0)\n", start_register)); | |
452 | ||
453 | for (rn = start_register, offset = 0; rn <= 15; rn++, offset += 4) | |
454 | { | |
455 | register_offsets[rn] = framesize - offset; | |
456 | mcore_insn_debug (("MCORE: r%d saved at 0x%x (offset %d)\n", rn, | |
457 | register_offsets[rn], offset)); | |
458 | } | |
459 | mcore_insn_debug (("MCORE: continuing\n")); | |
460 | continue; | |
461 | } | |
462 | else if (IS_STWx0 (insn)) | |
463 | { | |
464 | /* Spill register: see note for IS_STM above. */ | |
465 | int imm; | |
466 | ||
467 | rn = (insn >> 8) & 0xf; | |
468 | imm = (insn >> 4) & 0xf; | |
469 | register_offsets[rn] = framesize - (imm << 2); | |
470 | mcore_insn_debug (("MCORE: r%d saved at offset 0x%x\n", rn, register_offsets[rn])); | |
471 | mcore_insn_debug (("MCORE: continuing\n")); | |
472 | continue; | |
473 | } | |
474 | else if (IS_MOVx0 (insn)) | |
475 | { | |
476 | /* We have a frame pointer, so this prologue is over. Note | |
477 | the register which is acting as the frame pointer. */ | |
478 | flags |= MY_FRAME_IN_FP; | |
479 | flags &= ~MY_FRAME_IN_SP; | |
480 | fp_regnum = insn & 0xf; | |
481 | mcore_insn_debug (("MCORE: Found a frame pointer: r%d\n", fp_regnum)); | |
482 | ||
483 | /* If we found an FP, we're at the end of the prologue. */ | |
484 | mcore_insn_debug (("MCORE: end of prologue\n")); | |
485 | if (skip_prologue) | |
486 | continue; | |
487 | ||
488 | /* If we're decoding prologue, stop here. */ | |
489 | addr += 2; | |
490 | break; | |
491 | } | |
492 | else if (IS_STWxy (insn) && (flags & MY_FRAME_IN_FP) && ((insn & 0xf) == fp_regnum)) | |
493 | { | |
494 | /* Special case. Skip over stack slot allocs, too. */ | |
495 | mcore_insn_debug (("MCORE: push arg onto stack.\n")); | |
496 | continue; | |
497 | } | |
498 | else if (IS_LRW1 (insn) || IS_MOVI1 (insn) | |
499 | || IS_BGENI1 (insn) || IS_BMASKI1 (insn)) | |
500 | { | |
501 | int adjust = 0; | |
502 | int offset = 0; | |
503 | int insn2; | |
504 | ||
505 | mcore_insn_debug (("MCORE: looking at large frame\n")); | |
506 | if (IS_LRW1 (insn)) | |
507 | { | |
508 | adjust = | |
509 | read_memory_integer ((addr + 2 + ((insn & 0xff) << 2)) & 0xfffffffc, 4); | |
510 | } | |
511 | else if (IS_MOVI1 (insn)) | |
512 | adjust = (insn >> 4) & 0x7f; | |
513 | else if (IS_BGENI1 (insn)) | |
514 | adjust = 1 << ((insn >> 4) & 0x1f); | |
515 | else /* IS_BMASKI (insn) */ | |
516 | adjust = (1 << (adjust >> 4) & 0x1f) - 1; | |
517 | ||
518 | mcore_insn_debug (("MCORE: base framesize=0x%x\n", adjust)); | |
519 | ||
520 | /* May have zero or more insns which modify r1 */ | |
521 | mcore_insn_debug (("MCORE: looking for r1 adjusters...\n")); | |
522 | offset = 2; | |
523 | insn2 = get_insn (addr + offset); | |
524 | while (IS_R1_ADJUSTER (insn2)) | |
525 | { | |
526 | int imm; | |
527 | ||
528 | imm = (insn2 >> 4) & 0x1f; | |
529 | mcore_dump_insn ("got 3: ", addr + offset, insn); | |
530 | if (IS_ADDI1 (insn2)) | |
531 | { | |
532 | adjust += (imm + 1); | |
533 | mcore_insn_debug (("MCORE: addi r1,%d\n", imm + 1)); | |
534 | } | |
535 | else if (IS_SUBI1 (insn2)) | |
536 | { | |
537 | adjust -= (imm + 1); | |
538 | mcore_insn_debug (("MCORE: subi r1,%d\n", imm + 1)); | |
539 | } | |
540 | else if (IS_RSUBI1 (insn2)) | |
541 | { | |
542 | adjust = imm - adjust; | |
543 | mcore_insn_debug (("MCORE: rsubi r1,%d\n", imm + 1)); | |
544 | } | |
545 | else if (IS_NOT1 (insn2)) | |
546 | { | |
547 | adjust = ~adjust; | |
548 | mcore_insn_debug (("MCORE: not r1\n")); | |
549 | } | |
550 | else if (IS_ROTLI1 (insn2)) | |
551 | { | |
552 | adjust <<= imm; | |
553 | mcore_insn_debug (("MCORE: rotli r1,%d\n", imm + 1)); | |
554 | } | |
555 | else if (IS_BSETI1 (insn2)) | |
556 | { | |
557 | adjust |= (1 << imm); | |
558 | mcore_insn_debug (("MCORE: bseti r1,%d\n", imm)); | |
559 | } | |
560 | else if (IS_BCLRI1 (insn2)) | |
561 | { | |
562 | adjust &= ~(1 << imm); | |
563 | mcore_insn_debug (("MCORE: bclri r1,%d\n", imm)); | |
564 | } | |
565 | else if (IS_IXH1 (insn2)) | |
566 | { | |
567 | adjust *= 3; | |
568 | mcore_insn_debug (("MCORE: ix.h r1,r1\n")); | |
569 | } | |
570 | else if (IS_IXW1 (insn2)) | |
571 | { | |
572 | adjust *= 5; | |
573 | mcore_insn_debug (("MCORE: ix.w r1,r1\n")); | |
574 | } | |
575 | ||
576 | offset += 2; | |
577 | insn2 = get_insn (addr + offset); | |
578 | }; | |
579 | ||
580 | mcore_insn_debug (("MCORE: done looking for r1 adjusters\n")); | |
581 | ||
582 | /* If the next insn adjusts the stack pointer, we keep everything; | |
583 | if not, we scrap it and we've found the end of the prologue. */ | |
584 | if (IS_SUB01 (insn2)) | |
585 | { | |
586 | addr += offset; | |
587 | framesize += adjust; | |
588 | mcore_insn_debug (("MCORE: found stack adjustment of 0x%x bytes.\n", adjust)); | |
589 | mcore_insn_debug (("MCORE: skipping to new address 0x%x\n", addr)); | |
590 | mcore_insn_debug (("MCORE: continuing\n")); | |
591 | continue; | |
592 | } | |
593 | ||
594 | /* None of these instructions are prologue, so don't touch | |
595 | anything. */ | |
596 | mcore_insn_debug (("MCORE: no subu r1,r0, NOT altering framesize.\n")); | |
597 | break; | |
598 | } | |
599 | ||
600 | /* This is not a prologue insn, so stop here. */ | |
601 | mcore_insn_debug (("MCORE: insn is not a prologue insn -- ending scan\n")); | |
602 | break; | |
603 | } | |
604 | ||
605 | mcore_insn_debug (("MCORE: done analyzing prologue\n")); | |
606 | mcore_insn_debug (("MCORE: prologue end = 0x%x\n", addr)); | |
607 | ||
608 | /* Save everything we have learned about this frame into FI. */ | |
609 | if (fi != NULL) | |
610 | { | |
da50a4b7 AC |
611 | get_frame_extra_info (fi)->framesize = framesize; |
612 | get_frame_extra_info (fi)->fp_regnum = fp_regnum; | |
613 | get_frame_extra_info (fi)->status = flags; | |
96baa820 JM |
614 | |
615 | /* Fix the frame pointer. When gcc uses r8 as a frame pointer, | |
616 | it is really an arg ptr. We adjust fi->frame to be a "real" | |
617 | frame pointer. */ | |
11c02a10 | 618 | if (get_next_frame (fi) == NULL) |
96baa820 | 619 | { |
da50a4b7 | 620 | if (get_frame_extra_info (fi)->status & MY_FRAME_IN_SP) |
8ccd593b | 621 | deprecated_update_frame_base_hack (fi, read_sp () + framesize); |
96baa820 | 622 | else |
8ccd593b | 623 | deprecated_update_frame_base_hack (fi, read_register (fp_regnum) + framesize); |
96baa820 JM |
624 | } |
625 | ||
626 | /* Note where saved registers are stored. The offsets in REGISTER_OFFSETS | |
627 | are computed relative to the top of the frame. */ | |
628 | for (rn = 0; rn < NUM_REGS; rn++) | |
629 | { | |
630 | if (register_offsets[rn] >= 0) | |
631 | { | |
1e2330ba | 632 | get_frame_saved_regs (fi)[rn] = get_frame_base (fi) - register_offsets[rn]; |
96baa820 JM |
633 | mcore_insn_debug (("Saved register %s stored at 0x%08x, value=0x%08x\n", |
634 | mcore_register_names[rn], fi->saved_regs[rn], | |
635 | read_memory_integer (fi->saved_regs[rn], 4))); | |
636 | } | |
637 | } | |
638 | } | |
639 | ||
640 | /* Return addr of first non-prologue insn. */ | |
641 | return addr; | |
642 | } | |
643 | ||
a5afb99f AC |
644 | /* Given a GDB frame, determine the address of the calling function's |
645 | frame. This will be used to create a new GDB frame struct, and | |
e9582e71 AC |
646 | then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC |
647 | will be called for the new frame. */ | |
96baa820 JM |
648 | |
649 | CORE_ADDR | |
650 | mcore_frame_chain (struct frame_info * fi) | |
651 | { | |
652 | struct frame_info *dummy; | |
653 | CORE_ADDR callers_addr; | |
654 | ||
655 | /* Analyze the prologue of this function. */ | |
da50a4b7 | 656 | if (get_frame_extra_info (fi)->status == 0) |
96baa820 JM |
657 | mcore_analyze_prologue (fi, 0, 0); |
658 | ||
659 | /* If mcore_analyze_prologue set NO_MORE_FRAMES, quit now. */ | |
da50a4b7 | 660 | if (get_frame_extra_info (fi)->status & NO_MORE_FRAMES) |
96baa820 JM |
661 | return 0; |
662 | ||
663 | /* Now that we've analyzed our prologue, we can start to ask | |
664 | for information about our caller. The easiest way to do | |
665 | this is to analyze our caller's prologue. | |
666 | ||
667 | If our caller has a frame pointer, then we need to find | |
668 | the value of that register upon entry to our frame. | |
669 | This value is either in fi->saved_regs[rn] if it's saved, | |
670 | or it's still in a register. | |
671 | ||
672 | If our caller does not have a frame pointer, then his frame base | |
673 | is <our base> + -<caller's frame size>. */ | |
8bedc050 | 674 | dummy = analyze_dummy_frame (DEPRECATED_FRAME_SAVED_PC (fi), get_frame_base (fi)); |
96baa820 | 675 | |
da50a4b7 | 676 | if (get_frame_extra_info (dummy)->status & MY_FRAME_IN_FP) |
96baa820 | 677 | { |
da50a4b7 | 678 | int fp = get_frame_extra_info (dummy)->fp_regnum; |
96baa820 JM |
679 | |
680 | /* Our caller has a frame pointer. */ | |
b2fb4676 | 681 | if (get_frame_saved_regs (fi)[fp] != 0) |
96baa820 JM |
682 | { |
683 | /* The "FP" was saved on the stack. Don't forget to adjust | |
684 | the "FP" with the framesize to get a real FP. */ | |
b2fb4676 | 685 | callers_addr = read_memory_integer (get_frame_saved_regs (fi)[fp], REGISTER_SIZE) |
da50a4b7 | 686 | + get_frame_extra_info (dummy)->framesize; |
96baa820 JM |
687 | } |
688 | else | |
689 | { | |
690 | /* It's still in the register. Don't forget to adjust | |
691 | the "FP" with the framesize to get a real FP. */ | |
da50a4b7 | 692 | callers_addr = read_register (fp) + get_frame_extra_info (dummy)->framesize; |
96baa820 JM |
693 | } |
694 | } | |
695 | else | |
696 | { | |
697 | /* Our caller does not have a frame pointer. */ | |
da50a4b7 | 698 | callers_addr = get_frame_base (fi) + get_frame_extra_info (dummy)->framesize; |
96baa820 JM |
699 | } |
700 | ||
701 | return callers_addr; | |
702 | } | |
703 | ||
704 | /* Skip the prologue of the function at PC. */ | |
705 | ||
706 | CORE_ADDR | |
707 | mcore_skip_prologue (CORE_ADDR pc) | |
708 | { | |
709 | CORE_ADDR func_addr, func_end; | |
710 | struct symtab_and_line sal; | |
711 | ||
712 | /* If we have line debugging information, then the end of the | |
7e73cedf | 713 | prologue should be the first assembly instruction of the first |
96baa820 JM |
714 | source line */ |
715 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
716 | { | |
717 | sal = find_pc_line (func_addr, 0); | |
718 | if (sal.end && sal.end < func_end) | |
719 | return sal.end; | |
720 | } | |
721 | ||
722 | return mcore_analyze_prologue (NULL, pc, 1); | |
723 | } | |
724 | ||
725 | /* Return the address at which function arguments are offset. */ | |
726 | CORE_ADDR | |
727 | mcore_frame_args_address (struct frame_info * fi) | |
728 | { | |
da50a4b7 | 729 | return get_frame_base (fi) - get_frame_extra_info (fi)->framesize; |
96baa820 JM |
730 | } |
731 | ||
732 | CORE_ADDR | |
733 | mcore_frame_locals_address (struct frame_info * fi) | |
734 | { | |
da50a4b7 | 735 | return get_frame_base (fi) - get_frame_extra_info (fi)->framesize; |
96baa820 JM |
736 | } |
737 | ||
738 | /* Return the frame pointer in use at address PC. */ | |
739 | ||
740 | void | |
e0441cf0 | 741 | mcore_virtual_frame_pointer (CORE_ADDR pc, int *reg, LONGEST *offset) |
96baa820 JM |
742 | { |
743 | struct frame_info *dummy = analyze_dummy_frame (pc, 0); | |
da50a4b7 | 744 | if (get_frame_extra_info (dummy)->status & MY_FRAME_IN_SP) |
96baa820 JM |
745 | { |
746 | *reg = SP_REGNUM; | |
747 | *offset = 0; | |
748 | } | |
749 | else | |
750 | { | |
da50a4b7 | 751 | *reg = get_frame_extra_info (dummy)->fp_regnum; |
96baa820 JM |
752 | *offset = 0; |
753 | } | |
754 | } | |
755 | ||
756 | /* Find the value of register REGNUM in frame FI. */ | |
757 | ||
758 | CORE_ADDR | |
759 | mcore_find_callers_reg (struct frame_info *fi, int regnum) | |
760 | { | |
11c02a10 | 761 | for (; fi != NULL; fi = get_next_frame (fi)) |
96baa820 | 762 | { |
1e2330ba AC |
763 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi), |
764 | get_frame_base (fi))) | |
765 | return deprecated_read_register_dummy (get_frame_pc (fi), | |
766 | get_frame_base (fi), regnum); | |
b2fb4676 AC |
767 | else if (get_frame_saved_regs (fi)[regnum] != 0) |
768 | return read_memory_integer (get_frame_saved_regs (fi)[regnum], | |
96baa820 JM |
769 | REGISTER_SIZE); |
770 | } | |
771 | ||
772 | return read_register (regnum); | |
773 | } | |
774 | ||
775 | /* Find the saved pc in frame FI. */ | |
776 | ||
777 | CORE_ADDR | |
778 | mcore_frame_saved_pc (struct frame_info * fi) | |
779 | { | |
780 | ||
1e2330ba AC |
781 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi), |
782 | get_frame_base (fi))) | |
783 | return deprecated_read_register_dummy (get_frame_pc (fi), | |
784 | get_frame_base (fi), PC_REGNUM); | |
96baa820 JM |
785 | else |
786 | return mcore_find_callers_reg (fi, PR_REGNUM); | |
787 | } | |
788 | \f | |
789 | /* INFERIOR FUNCTION CALLS */ | |
790 | ||
791 | /* This routine gets called when either the user uses the "return" | |
792 | command, or the call dummy breakpoint gets hit. */ | |
793 | ||
794 | void | |
5ae5f592 | 795 | mcore_pop_frame (void) |
96baa820 JM |
796 | { |
797 | int rn; | |
4e0d9804 | 798 | struct frame_info *fi = get_current_frame (); |
96baa820 | 799 | |
1e2330ba AC |
800 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi), |
801 | get_frame_base (fi))) | |
96baa820 JM |
802 | generic_pop_dummy_frame (); |
803 | else | |
804 | { | |
805 | /* Write out the PC we saved. */ | |
8bedc050 | 806 | write_register (PC_REGNUM, DEPRECATED_FRAME_SAVED_PC (fi)); |
96baa820 JM |
807 | |
808 | /* Restore any saved registers. */ | |
809 | for (rn = 0; rn < NUM_REGS; rn++) | |
810 | { | |
b2fb4676 | 811 | if (get_frame_saved_regs (fi)[rn] != 0) |
96baa820 JM |
812 | { |
813 | ULONGEST value; | |
814 | ||
b2fb4676 | 815 | value = read_memory_unsigned_integer (get_frame_saved_regs (fi)[rn], |
96baa820 JM |
816 | REGISTER_SIZE); |
817 | write_register (rn, value); | |
818 | } | |
819 | } | |
820 | ||
821 | /* Actually cut back the stack. */ | |
c193f6ac | 822 | write_register (SP_REGNUM, get_frame_base (fi)); |
96baa820 JM |
823 | } |
824 | ||
825 | /* Finally, throw away any cached frame information. */ | |
826 | flush_cached_frames (); | |
827 | } | |
828 | ||
829 | /* Setup arguments and PR for a call to the target. First six arguments | |
830 | go in FIRST_ARGREG -> LAST_ARGREG, subsequent args go on to the stack. | |
831 | ||
832 | * Types with lengths greater than REGISTER_SIZE may not be split | |
833 | between registers and the stack, and they must start in an even-numbered | |
834 | register. Subsequent args will go onto the stack. | |
835 | ||
836 | * Structs may be split between registers and stack, left-aligned. | |
837 | ||
838 | * If the function returns a struct which will not fit into registers (it's | |
839 | more than eight bytes), we must allocate for that, too. Gdb will tell | |
840 | us where this buffer is (STRUCT_ADDR), and we simply place it into | |
841 | FIRST_ARGREG, since the MCORE treats struct returns (of less than eight | |
842 | bytes) as hidden first arguments. */ | |
843 | ||
844 | CORE_ADDR | |
ea7c478f | 845 | mcore_push_arguments (int nargs, struct value **args, CORE_ADDR sp, |
4e0d9804 | 846 | int struct_return, CORE_ADDR struct_addr) |
96baa820 JM |
847 | { |
848 | int argreg; | |
849 | int argnum; | |
850 | struct stack_arg | |
851 | { | |
852 | int len; | |
853 | char *val; | |
854 | } | |
855 | *stack_args; | |
856 | int nstack_args = 0; | |
857 | ||
858 | stack_args = (struct stack_arg *) alloca (nargs * sizeof (struct stack_arg)); | |
859 | ||
860 | argreg = FIRST_ARGREG; | |
861 | ||
862 | /* Align the stack. This is mostly a nop, but not always. It will be needed | |
863 | if we call a function which has argument overflow. */ | |
864 | sp &= ~3; | |
865 | ||
866 | /* If this function returns a struct which does not fit in the | |
867 | return registers, we must pass a buffer to the function | |
868 | which it can use to save the return value. */ | |
869 | if (struct_return) | |
870 | write_register (argreg++, struct_addr); | |
871 | ||
872 | /* FIXME: what about unions? */ | |
873 | for (argnum = 0; argnum < nargs; argnum++) | |
874 | { | |
875 | char *val = (char *) VALUE_CONTENTS (args[argnum]); | |
876 | int len = TYPE_LENGTH (VALUE_TYPE (args[argnum])); | |
877 | struct type *type = VALUE_TYPE (args[argnum]); | |
878 | int olen; | |
879 | ||
880 | mcore_insn_debug (("MCORE PUSH: argreg=%d; len=%d; %s\n", | |
881 | argreg, len, TYPE_CODE (type) == TYPE_CODE_STRUCT ? "struct" : "not struct")); | |
882 | /* Arguments larger than a register must start in an even | |
883 | numbered register. */ | |
884 | olen = len; | |
885 | ||
886 | if (TYPE_CODE (type) != TYPE_CODE_STRUCT && len > REGISTER_SIZE && argreg % 2) | |
887 | { | |
888 | mcore_insn_debug (("MCORE PUSH: %d > REGISTER_SIZE: and %s is not even\n", | |
889 | len, mcore_register_names[argreg])); | |
890 | argreg++; | |
891 | } | |
892 | ||
893 | if ((argreg <= LAST_ARGREG && len <= (LAST_ARGREG - argreg + 1) * REGISTER_SIZE) | |
894 | || (TYPE_CODE (type) == TYPE_CODE_STRUCT)) | |
895 | { | |
896 | /* Something that will fit entirely into registers (or a struct | |
897 | which may be split between registers and stack). */ | |
898 | mcore_insn_debug (("MCORE PUSH: arg %d going into regs\n", argnum)); | |
899 | ||
900 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT && olen < REGISTER_SIZE) | |
901 | { | |
902 | /* Small structs must be right aligned within the register, | |
903 | the most significant bits are undefined. */ | |
904 | write_register (argreg, extract_unsigned_integer (val, len)); | |
905 | argreg++; | |
906 | len = 0; | |
907 | } | |
908 | ||
909 | while (len > 0 && argreg <= LAST_ARGREG) | |
910 | { | |
911 | write_register (argreg, extract_unsigned_integer (val, REGISTER_SIZE)); | |
912 | argreg++; | |
913 | val += REGISTER_SIZE; | |
914 | len -= REGISTER_SIZE; | |
915 | } | |
916 | ||
917 | /* Any remainder for the stack is noted below... */ | |
918 | } | |
919 | else if (TYPE_CODE (VALUE_TYPE (args[argnum])) != TYPE_CODE_STRUCT | |
920 | && len > REGISTER_SIZE) | |
921 | { | |
922 | /* All subsequent args go onto the stack. */ | |
923 | mcore_insn_debug (("MCORE PUSH: does not fit into regs, going onto stack\n")); | |
924 | argnum = LAST_ARGREG + 1; | |
925 | } | |
926 | ||
927 | if (len > 0) | |
928 | { | |
929 | /* Note that this must be saved onto the stack */ | |
930 | mcore_insn_debug (("MCORE PUSH: adding arg %d to stack\n", argnum)); | |
931 | stack_args[nstack_args].val = val; | |
932 | stack_args[nstack_args].len = len; | |
933 | nstack_args++; | |
934 | } | |
935 | ||
936 | } | |
937 | ||
938 | /* We're done with registers and stack allocation. Now do the actual | |
939 | stack pushes. */ | |
940 | while (nstack_args--) | |
941 | { | |
942 | sp -= stack_args[nstack_args].len; | |
943 | write_memory (sp, stack_args[nstack_args].val, stack_args[nstack_args].len); | |
944 | } | |
945 | ||
946 | /* Return adjusted stack pointer. */ | |
947 | return sp; | |
948 | } | |
949 | ||
950 | /* Store the return address for the call dummy. For MCore, we've | |
951 | opted to use generic call dummies, so we simply store the | |
952 | CALL_DUMMY_ADDRESS into the PR register (r15). */ | |
953 | ||
954 | CORE_ADDR | |
955 | mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
956 | { | |
957 | write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ()); | |
958 | return sp; | |
959 | } | |
960 | ||
961 | /* Setting/getting return values from functions. | |
962 | ||
963 | The Motorola MCore processors use r2/r3 to return anything | |
964 | not larger than 32 bits. Everything else goes into a caller- | |
965 | supplied buffer, which is passed in via a hidden first | |
966 | argument. | |
967 | ||
968 | For gdb, this leaves us two routes, based on what | |
969 | USE_STRUCT_CONVENTION (mcore_use_struct_convention) returns. | |
970 | If this macro returns 1, gdb will call STORE_STRUCT_RETURN and | |
971 | EXTRACT_STRUCT_VALUE_ADDRESS. | |
972 | ||
973 | If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE | |
974 | and EXTRACT_RETURN_VALUE to store/fetch the functions return value. */ | |
975 | ||
976 | /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of | |
977 | EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc | |
978 | and TYPE is the type (which is known to be struct, union or array). */ | |
979 | ||
980 | int | |
981 | mcore_use_struct_convention (int gcc_p, struct type *type) | |
982 | { | |
983 | return (TYPE_LENGTH (type) > 8); | |
984 | } | |
985 | ||
986 | /* Where is the return value saved? For MCore, a pointer to | |
987 | this buffer was passed as a hidden first argument, so | |
988 | just return that address. */ | |
989 | ||
990 | CORE_ADDR | |
991 | mcore_extract_struct_value_address (char *regbuf) | |
992 | { | |
993 | return extract_address (regbuf + REGISTER_BYTE (FIRST_ARGREG), REGISTER_SIZE); | |
994 | } | |
995 | ||
996 | /* Given a function which returns a value of type TYPE, extract the | |
997 | the function's return value and place the result into VALBUF. | |
998 | REGBUF is the register contents of the target. */ | |
999 | ||
1000 | void | |
1001 | mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf) | |
1002 | { | |
1003 | /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */ | |
1004 | /* Only getting the first byte! if len = 1, we need the last byte of | |
1005 | the register, not the first. */ | |
1006 | memcpy (valbuf, regbuf + REGISTER_BYTE (RETVAL_REGNUM) + | |
1007 | (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0), TYPE_LENGTH (type)); | |
1008 | } | |
1009 | ||
1010 | /* Store the return value in VALBUF (of type TYPE) where the caller | |
1011 | expects to see it. | |
1012 | ||
1013 | Values less than 32 bits are stored in r2, right justified and | |
1014 | sign or zero extended. | |
1015 | ||
1016 | Values between 32 and 64 bits are stored in r2 (most | |
1017 | significant word) and r3 (least significant word, left justified). | |
1018 | Note that this includes structures of less than eight bytes, too. */ | |
1019 | ||
1020 | void | |
1021 | mcore_store_return_value (struct type *type, char *valbuf) | |
1022 | { | |
1023 | int value_size; | |
1024 | int return_size; | |
1025 | int offset; | |
1026 | char *zeros; | |
1027 | ||
1028 | value_size = TYPE_LENGTH (type); | |
1029 | ||
1030 | /* Return value fits into registers. */ | |
1031 | return_size = (value_size + REGISTER_SIZE - 1) & ~(REGISTER_SIZE - 1); | |
1032 | offset = REGISTER_BYTE (RETVAL_REGNUM) + (return_size - value_size); | |
1033 | zeros = alloca (return_size); | |
1034 | memset (zeros, 0, return_size); | |
1035 | ||
73937e03 AC |
1036 | deprecated_write_register_bytes (REGISTER_BYTE (RETVAL_REGNUM), zeros, |
1037 | return_size); | |
1038 | deprecated_write_register_bytes (offset, valbuf, value_size); | |
96baa820 JM |
1039 | } |
1040 | ||
1041 | /* Initialize our target-dependent "stuff" for this newly created frame. | |
1042 | ||
1043 | This includes allocating space for saved registers and analyzing | |
1044 | the prologue of this frame. */ | |
1045 | ||
1046 | void | |
4e0d9804 | 1047 | mcore_init_extra_frame_info (int fromleaf, struct frame_info *fi) |
96baa820 | 1048 | { |
11c02a10 | 1049 | if (fi && get_next_frame (fi)) |
8bedc050 | 1050 | deprecated_update_frame_pc_hack (fi, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi))); |
96baa820 JM |
1051 | |
1052 | frame_saved_regs_zalloc (fi); | |
1053 | ||
a00a19e9 | 1054 | frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info)); |
da50a4b7 AC |
1055 | get_frame_extra_info (fi)->status = 0; |
1056 | get_frame_extra_info (fi)->framesize = 0; | |
96baa820 | 1057 | |
1e2330ba AC |
1058 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi), |
1059 | get_frame_base (fi))) | |
96baa820 JM |
1060 | { |
1061 | /* We need to setup fi->frame here because run_stack_dummy gets it wrong | |
1062 | by assuming it's always FP. */ | |
1e2330ba | 1063 | deprecated_update_frame_base_hack (fi, deprecated_read_register_dummy (get_frame_pc (fi), get_frame_base (fi), SP_REGNUM)); |
96baa820 JM |
1064 | } |
1065 | else | |
1066 | mcore_analyze_prologue (fi, 0, 0); | |
1067 | } | |
1068 | ||
1069 | /* Get an insturction from memory. */ | |
1070 | ||
1071 | static int | |
1072 | get_insn (CORE_ADDR pc) | |
1073 | { | |
1074 | char buf[4]; | |
1075 | int status = read_memory_nobpt (pc, buf, 2); | |
1076 | if (status != 0) | |
1077 | return 0; | |
1078 | ||
1079 | return extract_unsigned_integer (buf, 2); | |
1080 | } | |
1081 | ||
4cfe2084 GS |
1082 | static struct gdbarch * |
1083 | mcore_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1084 | { | |
1085 | static LONGEST call_dummy_words[7] = { }; | |
1086 | struct gdbarch_tdep *tdep = NULL; | |
1087 | struct gdbarch *gdbarch; | |
1088 | ||
1089 | /* find a candidate among the list of pre-declared architectures. */ | |
1090 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1091 | if (arches != NULL) | |
1092 | return (arches->gdbarch); | |
1093 | ||
1094 | gdbarch = gdbarch_alloc (&info, 0); | |
1095 | ||
a5afb99f AC |
1096 | /* NOTE: cagney/2002-12-06: This can be deleted when this arch is |
1097 | ready to unwind the PC first (see frame.c:get_prev_frame()). */ | |
1098 | set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default); | |
1099 | ||
4e0d9804 GS |
1100 | /* Registers: */ |
1101 | ||
4cfe2084 GS |
1102 | /* All registers are 32 bits */ |
1103 | set_gdbarch_register_size (gdbarch, MCORE_REG_SIZE); | |
a0ed5532 AC |
1104 | set_gdbarch_deprecated_max_register_raw_size (gdbarch, MCORE_REG_SIZE); |
1105 | set_gdbarch_deprecated_max_register_virtual_size (gdbarch, MCORE_REG_SIZE); | |
4cfe2084 GS |
1106 | set_gdbarch_register_name (gdbarch, mcore_register_name); |
1107 | set_gdbarch_register_virtual_type (gdbarch, mcore_register_virtual_type); | |
1108 | set_gdbarch_register_virtual_size (gdbarch, mcore_register_size); | |
1109 | set_gdbarch_register_raw_size (gdbarch, mcore_register_size); | |
1110 | set_gdbarch_register_byte (gdbarch, mcore_register_byte); | |
4e0d9804 GS |
1111 | set_gdbarch_register_bytes (gdbarch, MCORE_REG_SIZE * MCORE_NUM_REGS); |
1112 | set_gdbarch_num_regs (gdbarch, MCORE_NUM_REGS); | |
1113 | set_gdbarch_pc_regnum (gdbarch, 64); | |
1114 | set_gdbarch_sp_regnum (gdbarch, 0); | |
1115 | set_gdbarch_fp_regnum (gdbarch, 0); | |
1116 | ||
1117 | /* Call Dummies: */ | |
4cfe2084 | 1118 | |
4cfe2084 GS |
1119 | set_gdbarch_call_dummy_words (gdbarch, call_dummy_words); |
1120 | set_gdbarch_sizeof_call_dummy_words (gdbarch, 0); | |
4cfe2084 | 1121 | set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos); |
6913c89a | 1122 | set_gdbarch_deprecated_saved_pc_after_call (gdbarch, mcore_saved_pc_after_call); |
4e0d9804 GS |
1123 | set_gdbarch_function_start_offset (gdbarch, 0); |
1124 | set_gdbarch_decr_pc_after_break (gdbarch, 0); | |
1125 | set_gdbarch_breakpoint_from_pc (gdbarch, mcore_breakpoint_from_pc); | |
28f617b3 | 1126 | set_gdbarch_deprecated_push_return_address (gdbarch, mcore_push_return_address); |
b81774d8 | 1127 | set_gdbarch_deprecated_push_arguments (gdbarch, mcore_push_arguments); |
4e0d9804 GS |
1128 | |
1129 | /* Frames: */ | |
1130 | ||
e9582e71 | 1131 | set_gdbarch_deprecated_init_extra_frame_info (gdbarch, mcore_init_extra_frame_info); |
618ce49f | 1132 | set_gdbarch_deprecated_frame_chain (gdbarch, mcore_frame_chain); |
f30ee0bc | 1133 | set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, mcore_frame_init_saved_regs); |
8bedc050 | 1134 | set_gdbarch_deprecated_frame_saved_pc (gdbarch, mcore_frame_saved_pc); |
ebba8386 | 1135 | set_gdbarch_deprecated_store_return_value (gdbarch, mcore_store_return_value); |
4e0d9804 GS |
1136 | set_gdbarch_deprecated_extract_return_value (gdbarch, |
1137 | mcore_extract_return_value); | |
4183d812 | 1138 | set_gdbarch_deprecated_store_struct_return (gdbarch, mcore_store_struct_return); |
4e0d9804 GS |
1139 | set_gdbarch_deprecated_extract_struct_value_address (gdbarch, |
1140 | mcore_extract_struct_value_address); | |
1141 | set_gdbarch_skip_prologue (gdbarch, mcore_skip_prologue); | |
1142 | set_gdbarch_frame_args_skip (gdbarch, 0); | |
1143 | set_gdbarch_frame_args_address (gdbarch, mcore_frame_args_address); | |
1144 | set_gdbarch_frame_locals_address (gdbarch, mcore_frame_locals_address); | |
1145 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); | |
749b82f6 | 1146 | set_gdbarch_deprecated_pop_frame (gdbarch, mcore_pop_frame); |
efdc1108 | 1147 | set_gdbarch_virtual_frame_pointer (gdbarch, mcore_virtual_frame_pointer); |
4e0d9804 GS |
1148 | |
1149 | /* Misc.: */ | |
1150 | ||
1151 | /* Stack grows down. */ | |
1152 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
efdc1108 GS |
1153 | set_gdbarch_use_struct_convention (gdbarch, mcore_use_struct_convention); |
1154 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); | |
1155 | /* MCore will never pass a sturcture by reference. It will always be split | |
1156 | between registers and stack. */ | |
1157 | set_gdbarch_reg_struct_has_addr (gdbarch, mcore_reg_struct_has_addr); | |
4cfe2084 | 1158 | |
6c0e89ed AC |
1159 | /* Should be using push_dummy_call. */ |
1160 | set_gdbarch_deprecated_dummy_write_sp (gdbarch, generic_target_write_sp); | |
1161 | ||
4cfe2084 GS |
1162 | return gdbarch; |
1163 | } | |
1164 | ||
1165 | static void | |
1166 | mcore_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file) | |
1167 | { | |
1168 | ||
1169 | } | |
1170 | ||
96baa820 | 1171 | void |
fba45db2 | 1172 | _initialize_mcore_tdep (void) |
96baa820 JM |
1173 | { |
1174 | extern int print_insn_mcore (bfd_vma, disassemble_info *); | |
4cfe2084 | 1175 | gdbarch_register (bfd_arch_mcore, mcore_gdbarch_init, mcore_dump_tdep); |
96baa820 JM |
1176 | tm_print_insn = print_insn_mcore; |
1177 | ||
1178 | #ifdef MCORE_DEBUG | |
1179 | add_show_from_set (add_set_cmd ("mcoredebug", no_class, | |
1180 | var_boolean, (char *) &mcore_debug, | |
1181 | "Set mcore debugging.\n", &setlist), | |
1182 | &showlist); | |
1183 | #endif | |
1184 | } |