* gdb.texinfo (Shell Commands): do not mention SHELL env var in
[deliverable/binutils-gdb.git] / gdb / mips-tdep.c
CommitLineData
7d9884b9 1/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
c2a0f1cb 2 Copyright 1988, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
bd5635a1
RP
3 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
4 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
6This file is part of GDB.
7
361bf6ee 8This program is free software; you can redistribute it and/or modify
bd5635a1 9it under the terms of the GNU General Public License as published by
361bf6ee
JG
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
bd5635a1 12
361bf6ee 13This program is distributed in the hope that it will be useful,
bd5635a1
RP
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
361bf6ee
JG
19along with this program; if not, write to the Free Software
20Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
bd5635a1 21
bd5635a1 22#include "defs.h"
bd5635a1
RP
23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "value.h"
27#include "gdbcmd.h"
ef08856f 28#include "language.h"
bd5635a1
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29
30#ifdef USG
31#include <sys/types.h>
32#endif
33
34#include <sys/param.h>
35#include <sys/dir.h>
36#include <signal.h>
37#include <sys/ioctl.h>
38
39#include "gdbcore.h"
62a469e1
SG
40#include "symfile.h"
41#include "objfiles.h"
bd5635a1
RP
42
43#ifndef MIPSMAGIC
44#ifdef MIPSEL
45#define MIPSMAGIC MIPSELMAGIC
46#else
47#define MIPSMAGIC MIPSEBMAGIC
48#endif
49#endif
50
51#define VM_MIN_ADDRESS (unsigned)0x400000
52
53#include <sys/user.h> /* After a.out.h */
54#include <sys/file.h>
55#include <sys/stat.h>
56
57\f
c2a0f1cb
ILT
58/* Some MIPS boards don't support floating point, so we permit the
59 user to turn it off. */
60int mips_fpu = 1;
61
3127785a
RP
62/* Heuristic_proc_start may hunt through the text section for a long
63 time across a 2400 baud serial line. Allows the user to limit this
64 search. */
65static unsigned int heuristic_fence_post = 0;
66
0f552c5f
JG
67#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
68#define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
69#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
70#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
71#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
72#define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
73#define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
74#define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
75#define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
76#define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
bd5635a1 77#define _PROC_MAGIC_ 0x0F0F0F0F
0f552c5f
JG
78#define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
79#define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
bd5635a1
RP
80
81struct linked_proc_info
82{
83 struct mips_extra_func_info info;
84 struct linked_proc_info *next;
dac4929a 85} *linked_proc_desc_table = NULL;
bd5635a1
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86
87\f
88#define READ_FRAME_REG(fi, regno) read_next_frame_reg((fi)->next, regno)
89
0f552c5f 90static int
bd5635a1
RP
91read_next_frame_reg(fi, regno)
92 FRAME fi;
93 int regno;
94{
e157305c
PS
95 /* If it is the frame for sigtramp we have a complete sigcontext
96 immediately below the frame and we get the saved registers from there.
97 If the stack layout for sigtramp changes we might have to change these
98 constants and the companion fixup_sigtramp in mipsread.c */
99#define SIGFRAME_BASE 0x12c /* sizeof(sigcontext) */
100#define SIGFRAME_PC_OFF (-SIGFRAME_BASE + 2 * 4)
101#define SIGFRAME_REGSAVE_OFF (-SIGFRAME_BASE + 3 * 4)
bd5635a1
RP
102 for (; fi; fi = fi->next)
103 if (in_sigtramp(fi->pc, 0)) {
bd5635a1
RP
104 int offset;
105 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
e157305c 106 else if (regno < 32) offset = SIGFRAME_REGSAVE_OFF + regno * 4;
bd5635a1
RP
107 else return 0;
108 return read_memory_integer(fi->frame + offset, 4);
109 }
110 else if (regno == SP_REGNUM) return fi->frame;
111 else if (fi->saved_regs->regs[regno])
112 return read_memory_integer(fi->saved_regs->regs[regno], 4);
113 return read_register(regno);
114}
115
116int
117mips_frame_saved_pc(frame)
118 FRAME frame;
119{
0f552c5f 120 mips_extra_func_info_t proc_desc = frame->proc_desc;
bd5635a1 121 int pcreg = proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM;
0f552c5f 122
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RP
123 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
124 return read_memory_integer(frame->frame - 4, 4);
0f552c5f 125
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RP
126 return read_next_frame_reg(frame, pcreg);
127}
128
129static struct mips_extra_func_info temp_proc_desc;
130static struct frame_saved_regs temp_saved_regs;
131
a8172eea
RP
132/* This fencepost looks highly suspicious to me. Removing it also
133 seems suspicious as it could affect remote debugging across serial
3127785a 134 lines. */
a8172eea 135
0f552c5f
JG
136static CORE_ADDR
137heuristic_proc_start(pc)
bd5635a1
RP
138 CORE_ADDR pc;
139{
bd5635a1 140 CORE_ADDR start_pc = pc;
3127785a 141 CORE_ADDR fence = start_pc - heuristic_fence_post;
0f552c5f
JG
142
143 if (start_pc == 0) return 0;
3127785a
RP
144
145 if (heuristic_fence_post == UINT_MAX
146 || fence < VM_MIN_ADDRESS)
147 fence = VM_MIN_ADDRESS;
0f552c5f 148
bd5635a1
RP
149 /* search back for previous return */
150 for (start_pc -= 4; ; start_pc -= 4)
a8172eea
RP
151 if (start_pc < fence)
152 {
3127785a
RP
153 /* It's not clear to me why we reach this point when
154 stop_soon_quietly, but with this test, at least we
155 don't print out warnings for every child forked (eg, on
156 decstation). 22apr93 rich@cygnus.com. */
157 if (!stop_soon_quietly)
158 {
159 if (fence == VM_MIN_ADDRESS)
160 warning("Hit beginning of text section without finding");
161 else
162 warning("Hit heuristic-fence-post without finding");
163
164 warning("enclosing function for pc 0x%x", pc);
165 }
166
a8172eea
RP
167 return 0;
168 }
bd5635a1
RP
169 else if (ABOUT_TO_RETURN(start_pc))
170 break;
171
172 start_pc += 8; /* skip return, and its delay slot */
173#if 0
174 /* skip nops (usually 1) 0 - is this */
175 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
176 start_pc += 4;
177#endif
178 return start_pc;
179}
180
0f552c5f 181static mips_extra_func_info_t
bd5635a1
RP
182heuristic_proc_desc(start_pc, limit_pc, next_frame)
183 CORE_ADDR start_pc, limit_pc;
184 FRAME next_frame;
185{
186 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
187 CORE_ADDR cur_pc;
188 int frame_size;
189 int has_frame_reg = 0;
190 int reg30; /* Value of $r30. Used by gcc for frame-pointer */
191 unsigned long reg_mask = 0;
192
193 if (start_pc == 0) return NULL;
194 bzero(&temp_proc_desc, sizeof(temp_proc_desc));
195 bzero(&temp_saved_regs, sizeof(struct frame_saved_regs));
a70dc898
RP
196 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
197
bd5635a1
RP
198 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
199 restart:
200 frame_size = 0;
201 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
202 unsigned long word;
203 int status;
204
a70dc898 205 status = read_memory_nobpt (cur_pc, (char *)&word, 4);
bd5635a1 206 if (status) memory_error (status, cur_pc);
5e2e79f8 207 SWAP_TARGET_AND_HOST (&word, sizeof (word));
bd5635a1
RP
208 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
209 frame_size += (-word) & 0xFFFF;
210 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
211 frame_size += (-word) & 0xFFFF;
212 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
213 int reg = (word & 0x001F0000) >> 16;
214 reg_mask |= 1 << reg;
215 temp_saved_regs.regs[reg] = sp + (short)word;
216 }
217 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
218 if ((unsigned short)word != frame_size)
219 reg30 = sp + (unsigned short)word;
220 else if (!has_frame_reg) {
221 int alloca_adjust;
222 has_frame_reg = 1;
223 reg30 = read_next_frame_reg(next_frame, 30);
224 alloca_adjust = reg30 - (sp + (unsigned short)word);
225 if (alloca_adjust > 0) {
226 /* FP > SP + frame_size. This may be because
227 /* of an alloca or somethings similar.
228 * Fix sp to "pre-alloca" value, and try again.
229 */
230 sp += alloca_adjust;
231 goto restart;
232 }
233 }
234 }
235 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
236 int reg = (word & 0x001F0000) >> 16;
237 reg_mask |= 1 << reg;
238 temp_saved_regs.regs[reg] = reg30 + (short)word;
239 }
240 }
241 if (has_frame_reg) {
242 PROC_FRAME_REG(&temp_proc_desc) = 30;
243 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
244 }
245 else {
246 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
247 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
248 }
249 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
250 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
251 return &temp_proc_desc;
252}
253
0f552c5f 254static mips_extra_func_info_t
bd5635a1
RP
255find_proc_desc(pc, next_frame)
256 CORE_ADDR pc;
257 FRAME next_frame;
258{
259 mips_extra_func_info_t proc_desc;
0f552c5f 260 struct block *b = block_for_pc(pc);
bd5635a1 261 struct symbol *sym =
dac4929a 262 b ? lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL) : NULL;
0f552c5f
JG
263
264 if (sym)
bd5635a1
RP
265 {
266 /* IF this is the topmost frame AND
267 * (this proc does not have debugging information OR
268 * the PC is in the procedure prologue)
be772100 269 * THEN create a "heuristic" proc_desc (by analyzing
bd5635a1
RP
270 * the actual code) to replace the "official" proc_desc.
271 */
0f552c5f 272 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
bd5635a1
RP
273 if (next_frame == NULL) {
274 struct symtab_and_line val;
275 struct symbol *proc_symbol =
276 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
0f552c5f 277
bd5635a1
RP
278 if (proc_symbol) {
279 val = find_pc_line (BLOCK_START
280 (SYMBOL_BLOCK_VALUE(proc_symbol)),
281 0);
282 val.pc = val.end ? val.end : pc;
283 }
284 if (!proc_symbol || pc < val.pc) {
285 mips_extra_func_info_t found_heuristic =
286 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
287 pc, next_frame);
288 if (found_heuristic) proc_desc = found_heuristic;
289 }
290 }
291 }
292 else
293 {
0f552c5f
JG
294 /* Is linked_proc_desc_table really necessary? It only seems to be used
295 by procedure call dummys. However, the procedures being called ought
296 to have their own proc_descs, and even if they don't,
297 heuristic_proc_desc knows how to create them! */
298
bd5635a1
RP
299 register struct linked_proc_info *link;
300 for (link = linked_proc_desc_table; link; link = link->next)
301 if (PROC_LOW_ADDR(&link->info) <= pc
302 && PROC_HIGH_ADDR(&link->info) > pc)
303 return &link->info;
304 proc_desc =
305 heuristic_proc_desc(heuristic_proc_start(pc), pc, next_frame);
306 }
307 return proc_desc;
308}
309
310mips_extra_func_info_t cached_proc_desc;
311
0f552c5f
JG
312FRAME_ADDR
313mips_frame_chain(frame)
bd5635a1
RP
314 FRAME frame;
315{
bd5635a1
RP
316 mips_extra_func_info_t proc_desc;
317 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
be772100 318
0f552c5f
JG
319 if (saved_pc == 0 || inside_entry_file (saved_pc))
320 return 0;
321
bd5635a1 322 proc_desc = find_proc_desc(saved_pc, frame);
0f552c5f
JG
323 if (!proc_desc)
324 return 0;
325
bd5635a1
RP
326 cached_proc_desc = proc_desc;
327 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
0f552c5f 328 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
329}
330
331void
332init_extra_frame_info(fci)
333 struct frame_info *fci;
334{
335 extern struct obstack frame_cache_obstack;
336 /* Use proc_desc calculated in frame_chain */
337 mips_extra_func_info_t proc_desc = fci->next ? cached_proc_desc :
338 find_proc_desc(fci->pc, fci->next);
0f552c5f 339
bd5635a1
RP
340 fci->saved_regs = (struct frame_saved_regs*)
341 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
342 bzero(fci->saved_regs, sizeof(struct frame_saved_regs));
343 fci->proc_desc =
0f552c5f 344 proc_desc == &temp_proc_desc ? 0 : proc_desc;
bd5635a1
RP
345 if (proc_desc)
346 {
347 int ireg;
348 CORE_ADDR reg_position;
349 unsigned long mask;
350 /* r0 bit means kernel trap */
351 int kernel_trap = PROC_REG_MASK(proc_desc) & 1;
352
c2a0f1cb
ILT
353 /* Fixup frame-pointer - only needed for top frame */
354 /* This may not be quite right, if proc has a real frame register */
355 if (fci->pc == PROC_LOW_ADDR(proc_desc))
356 fci->frame = read_register (SP_REGNUM);
357 else
358 fci->frame = READ_FRAME_REG(fci, PROC_FRAME_REG(proc_desc))
359 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
360
361 if (proc_desc == &temp_proc_desc)
362 *fci->saved_regs = temp_saved_regs;
363 else
364 {
365 /* find which general-purpose registers were saved */
366 reg_position = fci->frame + PROC_REG_OFFSET(proc_desc);
367 mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
368 for (ireg= 31; mask; --ireg, mask <<= 1)
369 if (mask & 0x80000000)
370 {
371 fci->saved_regs->regs[ireg] = reg_position;
372 reg_position -= 4;
373 }
374 /* find which floating-point registers were saved */
375 reg_position = fci->frame + PROC_FREG_OFFSET(proc_desc);
376 /* The freg_offset points to where the first *double* register is saved.
377 * So skip to the high-order word. */
378 reg_position += 4;
379 mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
380 for (ireg = 31; mask; --ireg, mask <<= 1)
381 if (mask & 0x80000000)
382 {
d747e0af 383 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
bd5635a1
RP
384 reg_position -= 4;
385 }
386 }
387
388 /* hack: if argument regs are saved, guess these contain args */
389 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
390 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
391 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
392 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
393 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
394
395 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
396 }
bd5635a1
RP
397}
398
a70dc898
RP
399/* MIPS stack frames are almost impenetrable. When execution stops,
400 we basically have to look at symbol information for the function
401 that we stopped in, which tells us *which* register (if any) is
402 the base of the frame pointer, and what offset from that register
403 the frame itself is at.
404
405 This presents a problem when trying to examine a stack in memory
406 (that isn't executing at the moment), using the "frame" command. We
407 don't have a PC, nor do we have any registers except SP.
408
409 This routine takes two arguments, SP and PC, and tries to make the
410 cached frames look as if these two arguments defined a frame on the
411 cache. This allows the rest of info frame to extract the important
412 arguments without difficulty. */
413
414FRAME
c2a0f1cb
ILT
415setup_arbitrary_frame (argc, argv)
416 int argc;
417 FRAME_ADDR *argv;
a70dc898 418{
c2a0f1cb
ILT
419 if (argc != 2)
420 error ("MIPS frame specifications require two arguments: sp and pc");
421
422 return create_new_frame (argv[0], argv[1]);
a70dc898
RP
423}
424
bd5635a1 425
0f552c5f
JG
426CORE_ADDR
427mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
bd5635a1
RP
428 int nargs;
429 value *args;
430 CORE_ADDR sp;
431 int struct_return;
432 CORE_ADDR struct_addr;
433{
434 CORE_ADDR buf;
435 register i;
436 int accumulate_size = struct_return ? 4 : 0;
437 struct mips_arg { char *contents; int len; int offset; };
438 struct mips_arg *mips_args =
439 (struct mips_arg*)alloca(nargs * sizeof(struct mips_arg));
440 register struct mips_arg *m_arg;
441 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
442 extern value value_arg_coerce();
443 value arg = value_arg_coerce (args[i]);
444 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
445 /* This entire mips-specific routine is because doubles must be aligned
446 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
447 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
448 * breaks their varargs implementation...). A correct solution
449 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
450 * in stdarg.h/varargs.h).
451 */
452 if (m_arg->len > 4) accumulate_size = (accumulate_size + 7) & -8;
453 m_arg->offset = accumulate_size;
454 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
455 m_arg->contents = VALUE_CONTENTS(arg);
456 }
457 accumulate_size = (accumulate_size + 7) & (-8);
458 if (accumulate_size < 16) accumulate_size = 16;
459 sp -= accumulate_size;
460 for (i = nargs; m_arg--, --i >= 0; )
461 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
462 if (struct_return) {
463 buf = struct_addr;
a70dc898
RP
464 write_memory(sp, (char *)&buf, sizeof(CORE_ADDR));
465 }
bd5635a1
RP
466 return sp;
467}
468
469/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
470#define MASK(i,j) ((1 << (j)+1)-1 ^ (1 << (i))-1)
471
472void
473mips_push_dummy_frame()
474{
475 int ireg;
476 struct linked_proc_info *link = (struct linked_proc_info*)
477 xmalloc(sizeof(struct linked_proc_info));
478 mips_extra_func_info_t proc_desc = &link->info;
479 CORE_ADDR sp = read_register (SP_REGNUM);
480 CORE_ADDR save_address;
481 REGISTER_TYPE buffer;
482 link->next = linked_proc_desc_table;
483 linked_proc_desc_table = link;
484#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
485#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
486#define GEN_REG_SAVE_COUNT 22
487#define FLOAT_REG_SAVE_MASK MASK(0,19)
488#define FLOAT_REG_SAVE_COUNT 20
489#define SPECIAL_REG_SAVE_COUNT 4
490 /*
491 * The registers we must save are all those not preserved across
492 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
493 * In addition, we must save the PC, and PUSH_FP_REGNUM.
494 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
495 *
496 * Dummy frame layout:
497 * (high memory)
498 * Saved PC
499 * Saved MMHI, MMLO, FPC_CSR
500 * Saved R31
501 * Saved R28
502 * ...
503 * Saved R1
504 * Saved D18 (i.e. F19, F18)
505 * ...
506 * Saved D0 (i.e. F1, F0)
c2a0f1cb 507 * CALL_DUMMY (subroutine stub; see tm-mips.h)
bd5635a1
RP
508 * Parameter build area (not yet implemented)
509 * (low memory)
510 */
511 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
c2a0f1cb 512 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
bd5635a1
RP
513 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
514 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
515 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
516 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
517 /* save general registers */
518 save_address = sp + PROC_REG_OFFSET(proc_desc);
519 for (ireg = 32; --ireg >= 0; )
520 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
521 {
522 buffer = read_register (ireg);
a70dc898 523 write_memory (save_address, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1
RP
524 save_address -= 4;
525 }
0b0d6c3f
PS
526 /* save floating-points registers starting with high order word */
527 save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
bd5635a1
RP
528 for (ireg = 32; --ireg >= 0; )
529 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
530 {
7d9884b9 531 buffer = read_register (ireg + FP0_REGNUM);
a70dc898 532 write_memory (save_address, (char *)&buffer, 4);
bd5635a1
RP
533 save_address -= 4;
534 }
535 write_register (PUSH_FP_REGNUM, sp);
536 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
537 PROC_FRAME_OFFSET(proc_desc) = 0;
538 buffer = read_register (PC_REGNUM);
a70dc898 539 write_memory (sp - 4, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 540 buffer = read_register (HI_REGNUM);
a70dc898 541 write_memory (sp - 8, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 542 buffer = read_register (LO_REGNUM);
a70dc898 543 write_memory (sp - 12, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb 544 buffer = read_register (mips_fpu ? FCRCS_REGNUM : ZERO_REGNUM);
a70dc898 545 write_memory (sp - 16, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb
ILT
546 sp -= 4 * (GEN_REG_SAVE_COUNT
547 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
548 + SPECIAL_REG_SAVE_COUNT);
bd5635a1
RP
549 write_register (SP_REGNUM, sp);
550 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
551 PROC_HIGH_ADDR(proc_desc) = sp;
552 SET_PROC_DESC_IS_DUMMY(proc_desc);
553 PROC_PC_REG(proc_desc) = RA_REGNUM;
554}
555
556void
557mips_pop_frame()
dac4929a
SG
558{
559 register int regnum;
bd5635a1
RP
560 FRAME frame = get_current_frame ();
561 CORE_ADDR new_sp = frame->frame;
dac4929a 562
a70dc898 563 mips_extra_func_info_t proc_desc = frame->proc_desc;
dac4929a
SG
564
565 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
566 if (proc_desc)
567 {
568 for (regnum = 32; --regnum >= 0; )
569 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
570 write_register (regnum,
571 read_memory_integer (frame->saved_regs->regs[regnum],
572 4));
573 for (regnum = 32; --regnum >= 0; )
574 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
575 write_register (regnum + FP0_REGNUM,
576 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
577 }
578 write_register (SP_REGNUM, new_sp);
579 flush_cached_frames ();
580 /* We let mips_init_extra_frame_info figure out the frame pointer */
581 set_current_frame (create_new_frame (0, read_pc ()));
582
bd5635a1
RP
583 if (PROC_DESC_IS_DUMMY(proc_desc))
584 {
dac4929a
SG
585 struct linked_proc_info *pi_ptr, *prev_ptr;
586
587 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
588 pi_ptr != NULL;
589 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
590 {
591 if (&pi_ptr->info == proc_desc)
592 break;
593 }
594
595 if (pi_ptr == NULL)
596 error ("Can't locate dummy extra frame info\n");
597
598 if (prev_ptr != NULL)
599 prev_ptr->next = pi_ptr->next;
600 else
601 linked_proc_desc_table = pi_ptr->next;
602
603 free (pi_ptr);
604
bd5635a1
RP
605 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
606 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
c2a0f1cb
ILT
607 if (mips_fpu)
608 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
bd5635a1 609 }
bd5635a1
RP
610}
611
0f552c5f 612static void
a70dc898 613mips_print_register (regnum, all)
bd5635a1
RP
614 int regnum, all;
615{
a70dc898 616 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE * 2]; /* *2 for doubles */
bd5635a1
RP
617 REGISTER_TYPE val;
618
5e2e79f8
FF
619 /* Get the data in raw format. */
620 if (read_relative_register_raw_bytes (regnum, raw_buffer))
621 {
622 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
623 return;
624 }
625
d747e0af
MT
626 /* If an even floating pointer register, also print as double. */
627 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
628 && !((regnum-FP0_REGNUM) & 1)) {
bd5635a1 629 read_relative_register_raw_bytes (regnum+1, raw_buffer+4);
d747e0af 630 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
bd5635a1
RP
631 val_print (builtin_type_double, raw_buffer, 0,
632 stdout, 0, 1, 0, Val_pretty_default);
d747e0af 633 printf_filtered ("); ");
bd5635a1
RP
634 }
635 fputs_filtered (reg_names[regnum], stdout);
636#ifndef NUMERIC_REG_NAMES
637 if (regnum < 32)
638 printf_filtered ("(r%d): ", regnum);
639 else
640#endif
641 printf_filtered (": ");
642
643 /* If virtual format is floating, print it that way. */
644 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
645 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
646 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
647 stdout, 0, 1, 0, Val_pretty_default);
648 }
649 /* Else print as integer in hex. */
650 else
651 {
652 long val;
653
654 bcopy (raw_buffer, &val, sizeof (long));
5e2e79f8 655 SWAP_TARGET_AND_HOST ((char *)&val, sizeof (long));
bd5635a1
RP
656 if (val == 0)
657 printf_filtered ("0");
658 else if (all)
d8b3b00e 659 printf_filtered (local_hex_format(), val);
bd5635a1 660 else
d8b3b00e 661 printf_filtered ("%s=%d", local_hex_string(val), val);
bd5635a1
RP
662 }
663}
664
d8b3b00e 665/* Replacement for generic do_registers_info. */
0f552c5f 666void
361bf6ee 667mips_do_registers_info (regnum, fpregs)
bd5635a1 668 int regnum;
361bf6ee 669 int fpregs;
bd5635a1
RP
670{
671 if (regnum != -1) {
672 mips_print_register (regnum, 0);
673 printf_filtered ("\n");
674 }
675 else {
676 for (regnum = 0; regnum < NUM_REGS; ) {
d8b3b00e
JG
677 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
678 regnum++;
679 continue;
680 }
bd5635a1
RP
681 mips_print_register (regnum, 1);
682 regnum++;
683 if ((regnum & 3) == 0 || regnum == NUM_REGS)
684 printf_filtered (";\n");
685 else
686 printf_filtered ("; ");
687 }
688 }
689}
690/* Return number of args passed to a frame. described by FIP.
691 Can return -1, meaning no way to tell. */
692
0f552c5f 693int
bd5635a1
RP
694mips_frame_num_args(fip)
695 FRAME fip;
696{
697#if 0
698 struct chain_info_t *p;
699
700 p = mips_find_cached_frame(FRAME_FP(fip));
701 if (p->valid)
702 return p->the_info.numargs;
703#endif
704 return -1;
705}
706
707\f
708/* Bad floats: Returns 0 if P points to a valid IEEE floating point number,
709 1 if P points to a denormalized number or a NaN. LEN says whether this is
710 a single-precision or double-precision float */
711#define SINGLE_EXP_BITS 8
712#define DOUBLE_EXP_BITS 11
713int
714isa_NAN(p, len)
715 int *p, len;
716{
717 int exponent;
718 if (len == 4)
719 {
720 exponent = *p;
721 exponent = exponent << 1 >> (32 - SINGLE_EXP_BITS - 1);
722 return ((exponent == -1) || (! exponent && *p));
723 }
724 else if (len == 8)
725 {
c2a0f1cb
ILT
726#if TARGET_BYTE_ORDER == BIG_ENDIAN
727 exponent = *p;
728#else
bd5635a1 729 exponent = *(p+1);
c2a0f1cb 730#endif
bd5635a1
RP
731 exponent = exponent << 1 >> (32 - DOUBLE_EXP_BITS - 1);
732 return ((exponent == -1) || (! exponent && *p * *(p+1)));
733 }
734 else return 1;
735}
407a8389 736\f
0b0d6c3f
PS
737/* To skip prologues, I use this predicate. Returns either PC
738 itself if the code at PC does not look like a function prologue;
739 otherwise returns an address that (if we're lucky) follows
740 the prologue. */
bd5635a1 741
be772100
JG
742CORE_ADDR
743mips_skip_prologue(pc)
bd5635a1
RP
744 CORE_ADDR pc;
745{
746 struct symbol *f;
747 struct block *b;
748 unsigned long inst;
d747e0af 749 int offset;
0b0d6c3f 750 int seen_sp_adjust = 0;
bd5635a1 751
e157305c
PS
752 /* Skip the typical prologue instructions. These are the stack adjustment
753 instruction and the instructions that save registers on the stack
754 or in the gcc frame. */
d747e0af
MT
755 for (offset = 0; offset < 100; offset += 4) {
756 inst = read_memory_integer(pc + offset, 4);
e157305c 757 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
0b0d6c3f 758 seen_sp_adjust = 1;
e157305c
PS
759 else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000))
760 continue; /* sw reg,n($sp) */
761 /* reg != $zero */
762 else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
763 continue;
764 else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000))
765 /* sx reg,n($s8) */
766 continue; /* reg != $zero */
767 else if (inst == 0x03A0F021) /* move $s8,$sp */
0b0d6c3f
PS
768 continue;
769 else
e157305c 770 break;
d747e0af 771 }
e157305c
PS
772 return pc + offset;
773
774/* FIXME schauer. The following code seems no longer necessary if we
775 always skip the typical prologue instructions. */
776
777#if 0
0b0d6c3f
PS
778 if (seen_sp_adjust)
779 return pc + offset;
bd5635a1
RP
780
781 /* Well, it looks like a frameless. Let's make sure.
782 Note that we are not called on the current PC,
783 but on the function`s start PC, and I have definitely
784 seen optimized code that adjusts the SP quite later */
785 b = block_for_pc(pc);
786 if (!b) return pc;
787
dac4929a 788 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
bd5635a1
RP
789 if (!f) return pc;
790 /* Ideally, I would like to use the adjusted info
791 from mips_frame_info(), but for all practical
792 purposes it will not matter (and it would require
793 a different definition of SKIP_PROLOGUE())
794
795 Actually, it would not hurt to skip the storing
796 of arguments on the stack as well. */
0f552c5f 797 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
bd5635a1
RP
798 return pc + 4;
799
800 return pc;
e157305c 801#endif
bd5635a1 802}
c2a0f1cb 803
3127785a
RP
804/* Let the user turn off floating point and set the fence post for
805 heuristic_proc_start. */
c2a0f1cb
ILT
806
807void
808_initialize_mips_tdep ()
809{
810 add_show_from_set
a8172eea 811 (add_set_cmd ("mipsfpu", class_support, var_boolean,
c2a0f1cb
ILT
812 (char *) &mips_fpu,
813 "Set use of floating point coprocessor.\n\
814Turn off to avoid using floating point instructions when calling functions\n\
815or dealing with return values.", &setlist),
816 &showlist);
3127785a
RP
817
818 add_show_from_set
819 (add_set_cmd ("heuristic-fence-post", class_support, var_uinteger,
820 (char *) &heuristic_fence_post,
821 "Set the distance searched for the start of a function.\n\
822Set number of bytes to be searched backward to find the beginning of a
823function without symbols.", &setlist),
824 &showlist);
c2a0f1cb 825}
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