* target.h: Add enum target_waitkind, enum target_signal, and
[deliverable/binutils-gdb.git] / gdb / mips-tdep.c
CommitLineData
7d9884b9 1/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
c2a0f1cb 2 Copyright 1988, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
bd5635a1
RP
3 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
4 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
6This file is part of GDB.
7
361bf6ee 8This program is free software; you can redistribute it and/or modify
bd5635a1 9it under the terms of the GNU General Public License as published by
361bf6ee
JG
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
bd5635a1 12
361bf6ee 13This program is distributed in the hope that it will be useful,
bd5635a1
RP
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
361bf6ee
JG
19along with this program; if not, write to the Free Software
20Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
bd5635a1 21
bd5635a1 22#include "defs.h"
bd5635a1
RP
23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "value.h"
27#include "gdbcmd.h"
ef08856f 28#include "language.h"
bd5635a1 29#include "gdbcore.h"
62a469e1
SG
30#include "symfile.h"
31#include "objfiles.h"
bd5635a1 32
ee5fb959
JK
33#include "opcode/mips.h"
34
bd5635a1 35#define VM_MIN_ADDRESS (unsigned)0x400000
bd5635a1 36\f
002a422b 37#if 0
ee5fb959 38static int mips_in_lenient_prologue PARAMS ((CORE_ADDR, CORE_ADDR));
002a422b 39#endif
ee5fb959 40
c2a0f1cb
ILT
41/* Some MIPS boards don't support floating point, so we permit the
42 user to turn it off. */
43int mips_fpu = 1;
44
3127785a
RP
45/* Heuristic_proc_start may hunt through the text section for a long
46 time across a 2400 baud serial line. Allows the user to limit this
47 search. */
48static unsigned int heuristic_fence_post = 0;
49
0f552c5f
JG
50#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
51#define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
52#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
53#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
54#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
55#define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
56#define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
57#define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
58#define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
59#define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
bd5635a1 60#define _PROC_MAGIC_ 0x0F0F0F0F
0f552c5f
JG
61#define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
62#define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
bd5635a1
RP
63
64struct linked_proc_info
65{
66 struct mips_extra_func_info info;
67 struct linked_proc_info *next;
dac4929a 68} *linked_proc_desc_table = NULL;
bd5635a1
RP
69
70\f
71#define READ_FRAME_REG(fi, regno) read_next_frame_reg((fi)->next, regno)
72
0f552c5f 73static int
bd5635a1
RP
74read_next_frame_reg(fi, regno)
75 FRAME fi;
76 int regno;
77{
e157305c
PS
78 /* If it is the frame for sigtramp we have a complete sigcontext
79 immediately below the frame and we get the saved registers from there.
80 If the stack layout for sigtramp changes we might have to change these
e03c0cc6 81 constants and the companion fixup_sigtramp in mdebugread.c */
1b71de8e 82#ifndef SIGFRAME_BASE
e157305c
PS
83#define SIGFRAME_BASE 0x12c /* sizeof(sigcontext) */
84#define SIGFRAME_PC_OFF (-SIGFRAME_BASE + 2 * 4)
85#define SIGFRAME_REGSAVE_OFF (-SIGFRAME_BASE + 3 * 4)
e03c0cc6 86#define SIGFRAME_REG_SIZE 4
1b71de8e 87#endif
bd5635a1
RP
88 for (; fi; fi = fi->next)
89 if (in_sigtramp(fi->pc, 0)) {
bd5635a1
RP
90 int offset;
91 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
e03c0cc6
ILT
92 else if (regno < 32) offset = (SIGFRAME_REGSAVE_OFF
93 + regno * SIGFRAME_REG_SIZE);
bd5635a1
RP
94 else return 0;
95 return read_memory_integer(fi->frame + offset, 4);
96 }
97 else if (regno == SP_REGNUM) return fi->frame;
98 else if (fi->saved_regs->regs[regno])
99 return read_memory_integer(fi->saved_regs->regs[regno], 4);
100 return read_register(regno);
101}
102
103int
104mips_frame_saved_pc(frame)
105 FRAME frame;
106{
0f552c5f 107 mips_extra_func_info_t proc_desc = frame->proc_desc;
bd5635a1 108 int pcreg = proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM;
0f552c5f 109
bd5635a1
RP
110 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
111 return read_memory_integer(frame->frame - 4, 4);
0f552c5f 112
bd5635a1
RP
113 return read_next_frame_reg(frame, pcreg);
114}
115
116static struct mips_extra_func_info temp_proc_desc;
117static struct frame_saved_regs temp_saved_regs;
118
a8172eea
RP
119/* This fencepost looks highly suspicious to me. Removing it also
120 seems suspicious as it could affect remote debugging across serial
3127785a 121 lines. */
a8172eea 122
0f552c5f
JG
123static CORE_ADDR
124heuristic_proc_start(pc)
bd5635a1
RP
125 CORE_ADDR pc;
126{
bd5635a1 127 CORE_ADDR start_pc = pc;
3127785a 128 CORE_ADDR fence = start_pc - heuristic_fence_post;
0f552c5f
JG
129
130 if (start_pc == 0) return 0;
3127785a
RP
131
132 if (heuristic_fence_post == UINT_MAX
133 || fence < VM_MIN_ADDRESS)
134 fence = VM_MIN_ADDRESS;
0f552c5f 135
bd5635a1
RP
136 /* search back for previous return */
137 for (start_pc -= 4; ; start_pc -= 4)
a8172eea
RP
138 if (start_pc < fence)
139 {
3127785a
RP
140 /* It's not clear to me why we reach this point when
141 stop_soon_quietly, but with this test, at least we
142 don't print out warnings for every child forked (eg, on
143 decstation). 22apr93 rich@cygnus.com. */
144 if (!stop_soon_quietly)
145 {
23d35572
JK
146 static int blurb_printed = 0;
147
3127785a
RP
148 if (fence == VM_MIN_ADDRESS)
149 warning("Hit beginning of text section without finding");
150 else
151 warning("Hit heuristic-fence-post without finding");
152
23d35572
JK
153 warning("enclosing function for address 0x%x", pc);
154 if (!blurb_printed)
155 {
156 printf_filtered ("\
157This warning occurs if you are debugging a function without any symbols\n\
158(for example, in a stripped executable). In that case, you may wish to\n\
159increase the size of the search with the `set heuristic-fence-post' command.\n\
160\n\
161Otherwise, you told GDB there was a function where there isn't one, or\n\
162(more likely) you have encountered a bug in GDB.\n");
163 blurb_printed = 1;
164 }
3127785a
RP
165 }
166
a8172eea
RP
167 return 0;
168 }
bd5635a1
RP
169 else if (ABOUT_TO_RETURN(start_pc))
170 break;
171
172 start_pc += 8; /* skip return, and its delay slot */
173#if 0
174 /* skip nops (usually 1) 0 - is this */
175 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
176 start_pc += 4;
177#endif
178 return start_pc;
179}
180
0f552c5f 181static mips_extra_func_info_t
bd5635a1
RP
182heuristic_proc_desc(start_pc, limit_pc, next_frame)
183 CORE_ADDR start_pc, limit_pc;
184 FRAME next_frame;
185{
186 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
187 CORE_ADDR cur_pc;
188 int frame_size;
189 int has_frame_reg = 0;
e03c0cc6 190 int reg30 = 0; /* Value of $r30. Used by gcc for frame-pointer */
bd5635a1
RP
191 unsigned long reg_mask = 0;
192
193 if (start_pc == 0) return NULL;
4ed97c9a
RP
194 memset(&temp_proc_desc, '\0', sizeof(temp_proc_desc));
195 memset(&temp_saved_regs, '\0', sizeof(struct frame_saved_regs));
a70dc898
RP
196 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
197
bd5635a1
RP
198 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
199 restart:
200 frame_size = 0;
201 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
34df79fc 202 char buf[4];
bd5635a1
RP
203 unsigned long word;
204 int status;
205
34df79fc
JK
206 status = read_memory_nobpt (cur_pc, buf, 4);
207 if (status) memory_error (status, cur_pc);
208 word = extract_unsigned_integer (buf, 4);
209
bd5635a1
RP
210 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
211 frame_size += (-word) & 0xFFFF;
212 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
213 frame_size += (-word) & 0xFFFF;
214 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
215 int reg = (word & 0x001F0000) >> 16;
216 reg_mask |= 1 << reg;
002a422b 217 temp_saved_regs.regs[reg] = sp + (word & 0xffff);
bd5635a1
RP
218 }
219 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
002a422b
JK
220 if ((word & 0xffff) != frame_size)
221 reg30 = sp + (word & 0xffff);
bd5635a1
RP
222 else if (!has_frame_reg) {
223 int alloca_adjust;
224 has_frame_reg = 1;
225 reg30 = read_next_frame_reg(next_frame, 30);
002a422b 226 alloca_adjust = reg30 - (sp + (word & 0xffff));
bd5635a1
RP
227 if (alloca_adjust > 0) {
228 /* FP > SP + frame_size. This may be because
e03c0cc6 229 * of an alloca or somethings similar.
bd5635a1
RP
230 * Fix sp to "pre-alloca" value, and try again.
231 */
232 sp += alloca_adjust;
233 goto restart;
234 }
235 }
236 }
237 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
238 int reg = (word & 0x001F0000) >> 16;
239 reg_mask |= 1 << reg;
002a422b 240 temp_saved_regs.regs[reg] = reg30 + (word & 0xffff);
bd5635a1
RP
241 }
242 }
243 if (has_frame_reg) {
244 PROC_FRAME_REG(&temp_proc_desc) = 30;
245 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
246 }
247 else {
248 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
249 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
250 }
251 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
252 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
253 return &temp_proc_desc;
254}
255
0f552c5f 256static mips_extra_func_info_t
bd5635a1
RP
257find_proc_desc(pc, next_frame)
258 CORE_ADDR pc;
259 FRAME next_frame;
260{
261 mips_extra_func_info_t proc_desc;
0f552c5f 262 struct block *b = block_for_pc(pc);
48be4c35
JK
263 struct symbol *sym;
264 CORE_ADDR startaddr;
265
266 find_pc_partial_function (pc, NULL, &startaddr, NULL);
267 if (b == NULL)
268 sym = NULL;
269 else
270 {
271 if (startaddr > BLOCK_START (b))
272 /* This is the "pathological" case referred to in a comment in
273 print_frame_info. It might be better to move this check into
274 symbol reading. */
275 sym = NULL;
276 else
277 sym = lookup_symbol (MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE,
278 0, NULL);
279 }
0f552c5f
JG
280
281 if (sym)
bd5635a1
RP
282 {
283 /* IF this is the topmost frame AND
284 * (this proc does not have debugging information OR
285 * the PC is in the procedure prologue)
be772100 286 * THEN create a "heuristic" proc_desc (by analyzing
bd5635a1
RP
287 * the actual code) to replace the "official" proc_desc.
288 */
0f552c5f 289 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
bd5635a1
RP
290 if (next_frame == NULL) {
291 struct symtab_and_line val;
292 struct symbol *proc_symbol =
293 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
0f552c5f 294
bd5635a1
RP
295 if (proc_symbol) {
296 val = find_pc_line (BLOCK_START
297 (SYMBOL_BLOCK_VALUE(proc_symbol)),
298 0);
299 val.pc = val.end ? val.end : pc;
300 }
301 if (!proc_symbol || pc < val.pc) {
302 mips_extra_func_info_t found_heuristic =
303 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
304 pc, next_frame);
305 if (found_heuristic) proc_desc = found_heuristic;
306 }
307 }
308 }
309 else
310 {
0f552c5f
JG
311 /* Is linked_proc_desc_table really necessary? It only seems to be used
312 by procedure call dummys. However, the procedures being called ought
313 to have their own proc_descs, and even if they don't,
314 heuristic_proc_desc knows how to create them! */
315
bd5635a1
RP
316 register struct linked_proc_info *link;
317 for (link = linked_proc_desc_table; link; link = link->next)
318 if (PROC_LOW_ADDR(&link->info) <= pc
319 && PROC_HIGH_ADDR(&link->info) > pc)
320 return &link->info;
23d35572 321
48be4c35
JK
322 if (startaddr == 0)
323 startaddr = heuristic_proc_start (pc);
324
bd5635a1 325 proc_desc =
48be4c35 326 heuristic_proc_desc (startaddr, pc, next_frame);
bd5635a1
RP
327 }
328 return proc_desc;
329}
330
331mips_extra_func_info_t cached_proc_desc;
332
0f552c5f
JG
333FRAME_ADDR
334mips_frame_chain(frame)
bd5635a1
RP
335 FRAME frame;
336{
bd5635a1
RP
337 mips_extra_func_info_t proc_desc;
338 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
be772100 339
0f552c5f
JG
340 if (saved_pc == 0 || inside_entry_file (saved_pc))
341 return 0;
342
bd5635a1 343 proc_desc = find_proc_desc(saved_pc, frame);
0f552c5f
JG
344 if (!proc_desc)
345 return 0;
346
bd5635a1 347 cached_proc_desc = proc_desc;
e797b4bc
JK
348
349 /* If no frame pointer and frame size is zero, we must be at end
350 of stack (or otherwise hosed). If we don't check frame size,
351 we loop forever if we see a zero size frame. */
352 if (PROC_FRAME_REG (proc_desc) == SP_REGNUM
3f528883 353 && PROC_FRAME_OFFSET (proc_desc) == 0
199b2450
TL
354 /* The previous frame from a sigtramp frame might be frameless
355 and have frame size zero. */
356 && !frame->signal_handler_caller)
bdef72d2
JK
357 return 0;
358 else
359 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
360 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
361}
362
363void
364init_extra_frame_info(fci)
365 struct frame_info *fci;
366{
367 extern struct obstack frame_cache_obstack;
368 /* Use proc_desc calculated in frame_chain */
ee5fb959
JK
369 mips_extra_func_info_t proc_desc =
370 fci->next ? cached_proc_desc : find_proc_desc(fci->pc, fci->next);
0f552c5f 371
bd5635a1
RP
372 fci->saved_regs = (struct frame_saved_regs*)
373 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
ee5fb959 374 memset (fci->saved_regs, 0, sizeof (struct frame_saved_regs));
bd5635a1 375 fci->proc_desc =
ee5fb959 376 proc_desc == &temp_proc_desc ? 0 : proc_desc;
bd5635a1
RP
377 if (proc_desc)
378 {
379 int ireg;
380 CORE_ADDR reg_position;
bd5635a1
RP
381 /* r0 bit means kernel trap */
382 int kernel_trap = PROC_REG_MASK(proc_desc) & 1;
383
c2a0f1cb
ILT
384 /* Fixup frame-pointer - only needed for top frame */
385 /* This may not be quite right, if proc has a real frame register */
2fcdae93 386 if (fci->pc == PROC_LOW_ADDR(proc_desc) && !PROC_DESC_IS_DUMMY(proc_desc))
c2a0f1cb
ILT
387 fci->frame = read_register (SP_REGNUM);
388 else
389 fci->frame = READ_FRAME_REG(fci, PROC_FRAME_REG(proc_desc))
390 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1 391
48be4c35 392 if (proc_desc == &temp_proc_desc)
ee5fb959 393 *fci->saved_regs = temp_saved_regs;
e03c0cc6 394 else
ee5fb959 395 {
e03c0cc6
ILT
396 /* What registers have been saved? Bitmasks. */
397 unsigned long gen_mask, float_mask;
398
399 gen_mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
400 float_mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
401
402 if (/* In any frame other than the innermost, we assume that all
403 registers have been saved. This assumes that all register
404 saves in a function happen before the first function
405 call. */
406 fci->next == NULL
407
408 /* In a dummy frame we know exactly where things are saved. */
409 && !PROC_DESC_IS_DUMMY (proc_desc)
410
411 /* Not sure exactly what kernel_trap means, but if it means
412 the kernel saves the registers without a prologue doing it,
413 we better not examine the prologue to see whether registers
414 have been saved yet. */
415 && !kernel_trap)
416 {
417 /* We need to figure out whether the registers that the proc_desc
418 claims are saved have been saved yet. */
419
420 CORE_ADDR addr;
421 int status;
422 char buf[4];
423 unsigned long inst;
424
425 /* Bitmasks; set if we have found a save for the register. */
426 unsigned long gen_save_found = 0;
427 unsigned long float_save_found = 0;
428
429 for (addr = PROC_LOW_ADDR (proc_desc);
430 addr < fci->pc && (gen_mask != gen_save_found
431 || float_mask != float_save_found);
432 addr += 4)
433 {
434 status = read_memory_nobpt (addr, buf, 4);
435 if (status)
436 memory_error (status, addr);
437 inst = extract_unsigned_integer (buf, 4);
438 if (/* sw reg,n($sp) */
439 (inst & 0xffe00000) == 0xafa00000
440
441 /* sw reg,n($r30) */
442 || (inst & 0xffe00000) == 0xafc00000)
443 {
444 /* It might be possible to use the instruction to
445 find the offset, rather than the code below which
446 is based on things being in a certain order in the
447 frame, but figuring out what the instruction's offset
448 is relative to might be a little tricky. */
449 int reg = (inst & 0x001f0000) >> 16;
450 gen_save_found |= (1 << reg);
451 }
452 else if (/* swc1 freg,n($sp) */
453 (inst & 0xffe00000) == 0xe7a00000
454
455 /* swc1 freg,n($r30) */
456 || (inst & 0xffe00000) == 0xe7c00000)
457 {
458 int reg = ((inst & 0x001f0000) >> 16);
459 float_save_found |= (1 << reg);
460 }
461 }
462 gen_mask = gen_save_found;
463 float_mask = float_save_found;
464 }
465
466 /* Fill in the offsets for the registers which gen_mask says
467 were saved. */
468 reg_position = fci->frame + PROC_REG_OFFSET (proc_desc);
469 for (ireg= 31; gen_mask; --ireg, gen_mask <<= 1)
470 if (gen_mask & 0x80000000)
bd5635a1 471 {
ee5fb959
JK
472 fci->saved_regs->regs[ireg] = reg_position;
473 reg_position -= 4;
bd5635a1 474 }
e03c0cc6
ILT
475 /* Fill in the offsets for the registers which float_mask says
476 were saved. */
477 reg_position = fci->frame + PROC_FREG_OFFSET (proc_desc);
ee5fb959
JK
478
479 /* The freg_offset points to where the first *double* register
480 is saved. So skip to the high-order word. */
bd5635a1 481 reg_position += 4;
e03c0cc6
ILT
482 for (ireg = 31; float_mask; --ireg, float_mask <<= 1)
483 if (float_mask & 0x80000000)
bd5635a1 484 {
ee5fb959
JK
485 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
486 reg_position -= 4;
bd5635a1 487 }
ee5fb959 488 }
bd5635a1
RP
489
490 /* hack: if argument regs are saved, guess these contain args */
491 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
492 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
493 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
494 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
495 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
496
497 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
498 }
bd5635a1
RP
499}
500
a70dc898
RP
501/* MIPS stack frames are almost impenetrable. When execution stops,
502 we basically have to look at symbol information for the function
503 that we stopped in, which tells us *which* register (if any) is
504 the base of the frame pointer, and what offset from that register
505 the frame itself is at.
506
507 This presents a problem when trying to examine a stack in memory
508 (that isn't executing at the moment), using the "frame" command. We
509 don't have a PC, nor do we have any registers except SP.
510
511 This routine takes two arguments, SP and PC, and tries to make the
512 cached frames look as if these two arguments defined a frame on the
513 cache. This allows the rest of info frame to extract the important
514 arguments without difficulty. */
515
516FRAME
c2a0f1cb
ILT
517setup_arbitrary_frame (argc, argv)
518 int argc;
519 FRAME_ADDR *argv;
a70dc898 520{
c2a0f1cb
ILT
521 if (argc != 2)
522 error ("MIPS frame specifications require two arguments: sp and pc");
523
524 return create_new_frame (argv[0], argv[1]);
a70dc898
RP
525}
526
bd5635a1 527
0f552c5f
JG
528CORE_ADDR
529mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
bd5635a1
RP
530 int nargs;
531 value *args;
532 CORE_ADDR sp;
533 int struct_return;
534 CORE_ADDR struct_addr;
535{
536 CORE_ADDR buf;
537 register i;
538 int accumulate_size = struct_return ? 4 : 0;
539 struct mips_arg { char *contents; int len; int offset; };
540 struct mips_arg *mips_args =
541 (struct mips_arg*)alloca(nargs * sizeof(struct mips_arg));
542 register struct mips_arg *m_arg;
543 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
544 extern value value_arg_coerce();
545 value arg = value_arg_coerce (args[i]);
546 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
547 /* This entire mips-specific routine is because doubles must be aligned
548 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
549 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
550 * breaks their varargs implementation...). A correct solution
551 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
552 * in stdarg.h/varargs.h).
553 */
554 if (m_arg->len > 4) accumulate_size = (accumulate_size + 7) & -8;
555 m_arg->offset = accumulate_size;
556 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
557 m_arg->contents = VALUE_CONTENTS(arg);
558 }
559 accumulate_size = (accumulate_size + 7) & (-8);
560 if (accumulate_size < 16) accumulate_size = 16;
561 sp -= accumulate_size;
562 for (i = nargs; m_arg--, --i >= 0; )
563 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
564 if (struct_return) {
565 buf = struct_addr;
a70dc898
RP
566 write_memory(sp, (char *)&buf, sizeof(CORE_ADDR));
567 }
bd5635a1
RP
568 return sp;
569}
570
571/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
e03c0cc6 572#define MASK(i,j) (((1 << ((j)+1))-1) ^ ((1 << (i))-1))
bd5635a1
RP
573
574void
575mips_push_dummy_frame()
576{
577 int ireg;
578 struct linked_proc_info *link = (struct linked_proc_info*)
579 xmalloc(sizeof(struct linked_proc_info));
580 mips_extra_func_info_t proc_desc = &link->info;
581 CORE_ADDR sp = read_register (SP_REGNUM);
582 CORE_ADDR save_address;
583 REGISTER_TYPE buffer;
584 link->next = linked_proc_desc_table;
585 linked_proc_desc_table = link;
586#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
587#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
588#define GEN_REG_SAVE_COUNT 22
589#define FLOAT_REG_SAVE_MASK MASK(0,19)
590#define FLOAT_REG_SAVE_COUNT 20
591#define SPECIAL_REG_SAVE_COUNT 4
592 /*
593 * The registers we must save are all those not preserved across
594 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
595 * In addition, we must save the PC, and PUSH_FP_REGNUM.
596 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
597 *
598 * Dummy frame layout:
599 * (high memory)
600 * Saved PC
601 * Saved MMHI, MMLO, FPC_CSR
602 * Saved R31
603 * Saved R28
604 * ...
605 * Saved R1
606 * Saved D18 (i.e. F19, F18)
607 * ...
608 * Saved D0 (i.e. F1, F0)
c2a0f1cb 609 * CALL_DUMMY (subroutine stub; see tm-mips.h)
bd5635a1
RP
610 * Parameter build area (not yet implemented)
611 * (low memory)
612 */
613 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
c2a0f1cb 614 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
bd5635a1
RP
615 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
616 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
617 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
618 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
619 /* save general registers */
620 save_address = sp + PROC_REG_OFFSET(proc_desc);
621 for (ireg = 32; --ireg >= 0; )
622 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
623 {
624 buffer = read_register (ireg);
a70dc898 625 write_memory (save_address, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1
RP
626 save_address -= 4;
627 }
0b0d6c3f
PS
628 /* save floating-points registers starting with high order word */
629 save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
bd5635a1
RP
630 for (ireg = 32; --ireg >= 0; )
631 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
632 {
7d9884b9 633 buffer = read_register (ireg + FP0_REGNUM);
a70dc898 634 write_memory (save_address, (char *)&buffer, 4);
bd5635a1
RP
635 save_address -= 4;
636 }
637 write_register (PUSH_FP_REGNUM, sp);
638 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
639 PROC_FRAME_OFFSET(proc_desc) = 0;
640 buffer = read_register (PC_REGNUM);
a70dc898 641 write_memory (sp - 4, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 642 buffer = read_register (HI_REGNUM);
a70dc898 643 write_memory (sp - 8, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 644 buffer = read_register (LO_REGNUM);
a70dc898 645 write_memory (sp - 12, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb 646 buffer = read_register (mips_fpu ? FCRCS_REGNUM : ZERO_REGNUM);
a70dc898 647 write_memory (sp - 16, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb
ILT
648 sp -= 4 * (GEN_REG_SAVE_COUNT
649 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
650 + SPECIAL_REG_SAVE_COUNT);
bd5635a1
RP
651 write_register (SP_REGNUM, sp);
652 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
653 PROC_HIGH_ADDR(proc_desc) = sp;
654 SET_PROC_DESC_IS_DUMMY(proc_desc);
655 PROC_PC_REG(proc_desc) = RA_REGNUM;
656}
657
658void
659mips_pop_frame()
dac4929a
SG
660{
661 register int regnum;
bd5635a1
RP
662 FRAME frame = get_current_frame ();
663 CORE_ADDR new_sp = frame->frame;
dac4929a 664
a70dc898 665 mips_extra_func_info_t proc_desc = frame->proc_desc;
dac4929a
SG
666
667 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
668 if (proc_desc)
669 {
670 for (regnum = 32; --regnum >= 0; )
671 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
672 write_register (regnum,
673 read_memory_integer (frame->saved_regs->regs[regnum],
674 4));
675 for (regnum = 32; --regnum >= 0; )
676 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
677 write_register (regnum + FP0_REGNUM,
678 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
679 }
680 write_register (SP_REGNUM, new_sp);
681 flush_cached_frames ();
682 /* We let mips_init_extra_frame_info figure out the frame pointer */
683 set_current_frame (create_new_frame (0, read_pc ()));
684
199b2450 685 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
bd5635a1 686 {
dac4929a
SG
687 struct linked_proc_info *pi_ptr, *prev_ptr;
688
689 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
690 pi_ptr != NULL;
691 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
692 {
693 if (&pi_ptr->info == proc_desc)
694 break;
695 }
696
697 if (pi_ptr == NULL)
698 error ("Can't locate dummy extra frame info\n");
699
700 if (prev_ptr != NULL)
701 prev_ptr->next = pi_ptr->next;
702 else
703 linked_proc_desc_table = pi_ptr->next;
704
705 free (pi_ptr);
706
bd5635a1
RP
707 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
708 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
c2a0f1cb
ILT
709 if (mips_fpu)
710 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
bd5635a1 711 }
bd5635a1
RP
712}
713
0f552c5f 714static void
a70dc898 715mips_print_register (regnum, all)
bd5635a1
RP
716 int regnum, all;
717{
48be4c35 718 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
bd5635a1 719
48be4c35
JK
720 /* Get the data in raw format. */
721 if (read_relative_register_raw_bytes (regnum, raw_buffer))
722 {
723 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
724 return;
725 }
726
727 /* If an even floating pointer register, also print as double. */
728 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
729 && !((regnum-FP0_REGNUM) & 1)) {
730 char dbuffer[MAX_REGISTER_RAW_SIZE];
731
732 read_relative_register_raw_bytes (regnum, dbuffer);
733 read_relative_register_raw_bytes (regnum+1, dbuffer+4);
ac8cf67d 734#ifdef REGISTER_CONVERT_TO_TYPE
48be4c35 735 REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer);
ac8cf67d 736#endif
48be4c35
JK
737 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
738 val_print (builtin_type_double, dbuffer, 0,
199b2450 739 gdb_stdout, 0, 1, 0, Val_pretty_default);
48be4c35
JK
740 printf_filtered ("); ");
741 }
199b2450 742 fputs_filtered (reg_names[regnum], gdb_stdout);
48be4c35
JK
743
744 /* The problem with printing numeric register names (r26, etc.) is that
745 the user can't use them on input. Probably the best solution is to
746 fix it so that either the numeric or the funky (a2, etc.) names
747 are accepted on input. */
748 if (regnum < 32)
749 printf_filtered ("(r%d): ", regnum);
750 else
751 printf_filtered (": ");
bd5635a1 752
48be4c35
JK
753 /* If virtual format is floating, print it that way. */
754 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
755 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
756 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
199b2450 757 gdb_stdout, 0, 1, 0, Val_pretty_default);
48be4c35
JK
758 }
759 /* Else print as integer in hex. */
760 else
761 {
762 long val;
bd5635a1 763
48be4c35
JK
764 val = extract_signed_integer (raw_buffer,
765 REGISTER_RAW_SIZE (regnum));
34df79fc 766
48be4c35
JK
767 if (val == 0)
768 printf_filtered ("0");
769 else if (all)
770 /* FIXME: We should be printing this in a fixed field width, so that
771 registers line up. */
772 printf_filtered (local_hex_format(), val);
773 else
199b2450 774 printf_filtered ("%s=%ld", local_hex_string(val), val);
48be4c35 775 }
bd5635a1
RP
776}
777
d8b3b00e 778/* Replacement for generic do_registers_info. */
0f552c5f 779void
361bf6ee 780mips_do_registers_info (regnum, fpregs)
bd5635a1 781 int regnum;
361bf6ee 782 int fpregs;
bd5635a1
RP
783{
784 if (regnum != -1) {
785 mips_print_register (regnum, 0);
786 printf_filtered ("\n");
787 }
788 else {
789 for (regnum = 0; regnum < NUM_REGS; ) {
d8b3b00e
JG
790 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
791 regnum++;
792 continue;
793 }
bd5635a1
RP
794 mips_print_register (regnum, 1);
795 regnum++;
796 if ((regnum & 3) == 0 || regnum == NUM_REGS)
797 printf_filtered (";\n");
798 else
799 printf_filtered ("; ");
800 }
801 }
802}
803/* Return number of args passed to a frame. described by FIP.
804 Can return -1, meaning no way to tell. */
805
0f552c5f 806int
bd5635a1
RP
807mips_frame_num_args(fip)
808 FRAME fip;
809{
810#if 0
811 struct chain_info_t *p;
812
813 p = mips_find_cached_frame(FRAME_FP(fip));
814 if (p->valid)
815 return p->the_info.numargs;
816#endif
817 return -1;
818}
407a8389 819\f
002a422b 820#if 0
427fec5d 821/* Is this a branch with a delay slot? */
ee5fb959
JK
822static int
823is_delayed (insn)
824 unsigned long insn;
825{
826 int i;
827 for (i = 0; i < NUMOPCODES; ++i)
828 if (mips_opcodes[i].pinfo != INSN_MACRO
829 && (insn & mips_opcodes[i].mask) == mips_opcodes[i].match)
830 break;
427fec5d
JK
831 return (i < NUMOPCODES
832 && (mips_opcodes[i].pinfo & (INSN_UNCOND_BRANCH_DELAY
833 | INSN_COND_BRANCH_DELAY
834 | INSN_COND_BRANCH_LIKELY)));
ee5fb959 835}
002a422b 836#endif
ee5fb959
JK
837
838/* To skip prologues, I use this predicate. Returns either PC itself
839 if the code at PC does not look like a function prologue; otherwise
840 returns an address that (if we're lucky) follows the prologue. If
841 LENIENT, then we must skip everything which is involved in setting
842 up the frame (it's OK to skip more, just so long as we don't skip
843 anything which might clobber the registers which are being saved.
844 We must skip more in the case where part of the prologue is in the
845 delay slot of a non-prologue instruction). */
bd5635a1 846
be772100 847CORE_ADDR
ee5fb959 848mips_skip_prologue (pc, lenient)
bd5635a1 849 CORE_ADDR pc;
ee5fb959 850 int lenient;
bd5635a1 851{
bd5635a1 852 unsigned long inst;
d747e0af 853 int offset;
0b0d6c3f 854 int seen_sp_adjust = 0;
bd5635a1 855
e157305c
PS
856 /* Skip the typical prologue instructions. These are the stack adjustment
857 instruction and the instructions that save registers on the stack
858 or in the gcc frame. */
ee5fb959
JK
859 for (offset = 0; offset < 100; offset += 4)
860 {
861 char buf[4];
862 int status;
863
864 status = read_memory_nobpt (pc + offset, buf, 4);
865 if (status)
866 memory_error (status, pc + offset);
867 inst = extract_unsigned_integer (buf, 4);
868
002a422b 869#if 0
ee5fb959
JK
870 if (lenient && is_delayed (inst))
871 continue;
002a422b 872#endif
ee5fb959 873
e157305c 874 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
0b0d6c3f 875 seen_sp_adjust = 1;
e157305c
PS
876 else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000))
877 continue; /* sw reg,n($sp) */
878 /* reg != $zero */
879 else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
880 continue;
881 else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000))
882 /* sx reg,n($s8) */
883 continue; /* reg != $zero */
884 else if (inst == 0x03A0F021) /* move $s8,$sp */
0b0d6c3f 885 continue;
1b71de8e
PS
886 else if ((inst & 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
887 continue;
e03c0cc6
ILT
888 else if ((inst & 0xffff0000) == 0x3c1c0000) /* lui $gp,n */
889 continue;
890 else if ((inst & 0xffff0000) == 0x279c0000) /* addiu $gp,$gp,n */
891 continue;
892 else if (inst == 0x0399e021 /* addu $gp,$gp,$t9 */
893 || inst == 0x033ce021) /* addu $gp,$t9,$gp */
894 continue;
0b0d6c3f 895 else
e157305c 896 break;
d747e0af 897 }
e157305c
PS
898 return pc + offset;
899
900/* FIXME schauer. The following code seems no longer necessary if we
901 always skip the typical prologue instructions. */
902
903#if 0
0b0d6c3f
PS
904 if (seen_sp_adjust)
905 return pc + offset;
bd5635a1
RP
906
907 /* Well, it looks like a frameless. Let's make sure.
908 Note that we are not called on the current PC,
909 but on the function`s start PC, and I have definitely
910 seen optimized code that adjusts the SP quite later */
911 b = block_for_pc(pc);
912 if (!b) return pc;
913
dac4929a 914 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
bd5635a1
RP
915 if (!f) return pc;
916 /* Ideally, I would like to use the adjusted info
917 from mips_frame_info(), but for all practical
918 purposes it will not matter (and it would require
919 a different definition of SKIP_PROLOGUE())
920
921 Actually, it would not hurt to skip the storing
922 of arguments on the stack as well. */
0f552c5f 923 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
bd5635a1
RP
924 return pc + 4;
925
926 return pc;
e157305c 927#endif
bd5635a1 928}
c2a0f1cb 929
002a422b
JK
930#if 0
931/* The lenient prologue stuff should be superceded by the code in
932 init_extra_frame_info which looks to see whether the stores mentioned
933 in the proc_desc have actually taken place. */
934
ee5fb959
JK
935/* Is address PC in the prologue (loosely defined) for function at
936 STARTADDR? */
937
938static int
939mips_in_lenient_prologue (startaddr, pc)
940 CORE_ADDR startaddr;
941 CORE_ADDR pc;
942{
943 CORE_ADDR end_prologue = mips_skip_prologue (startaddr, 1);
944 return pc >= startaddr && pc < end_prologue;
945}
002a422b 946#endif
ee5fb959 947
ac8cf67d
PS
948/* Given a return value in `regbuf' with a type `valtype',
949 extract and copy its value into `valbuf'. */
950void
951mips_extract_return_value (valtype, regbuf, valbuf)
952 struct type *valtype;
953 char regbuf[REGISTER_BYTES];
954 char *valbuf;
955{
956 int regnum;
957
958 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
959
960 memcpy (valbuf, regbuf + REGISTER_BYTE (regnum), TYPE_LENGTH (valtype));
961#ifdef REGISTER_CONVERT_TO_TYPE
962 REGISTER_CONVERT_TO_TYPE(regnum, valtype, valbuf);
963#endif
964}
965
966/* Given a return value in `regbuf' with a type `valtype',
967 write it's value into the appropriate register. */
968void
969mips_store_return_value (valtype, valbuf)
970 struct type *valtype;
971 char *valbuf;
972{
973 int regnum;
974 char raw_buffer[MAX_REGISTER_RAW_SIZE];
975
976 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
977 memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
978
979#ifdef REGISTER_CONVERT_FROM_TYPE
980 REGISTER_CONVERT_FROM_TYPE(regnum, valtype, raw_buffer);
981#endif
982
983 write_register_bytes(REGISTER_BYTE (regnum), raw_buffer, TYPE_LENGTH (valtype));
984}
985
e03c0cc6
ILT
986/* These exist in mdebugread.c. */
987extern CORE_ADDR sigtramp_address, sigtramp_end;
988extern void fixup_sigtramp PARAMS ((void));
989
990/* Exported procedure: Is PC in the signal trampoline code */
991
992int
993in_sigtramp (pc, ignore)
994 CORE_ADDR pc;
995 char *ignore; /* function name */
996{
997 if (sigtramp_address == 0)
998 fixup_sigtramp ();
999 return (pc >= sigtramp_address && pc < sigtramp_end);
1000}
1001
8b52d486 1002static void reinit_frame_cache_sfunc PARAMS ((char *, int,
427fec5d
JK
1003 struct cmd_list_element *));
1004
1005/* Just like reinit_frame_cache, but with the right arguments to be
1006 callable as an sfunc. */
1007static void
1008reinit_frame_cache_sfunc (args, from_tty, c)
1009 char *args;
1010 int from_tty;
1011 struct cmd_list_element *c;
1012{
1013 reinit_frame_cache ();
1014}
c2a0f1cb
ILT
1015
1016void
1017_initialize_mips_tdep ()
1018{
427fec5d
JK
1019 struct cmd_list_element *c;
1020
1021 /* Let the user turn off floating point and set the fence post for
1022 heuristic_proc_start. */
1023
c2a0f1cb 1024 add_show_from_set
a8172eea 1025 (add_set_cmd ("mipsfpu", class_support, var_boolean,
c2a0f1cb
ILT
1026 (char *) &mips_fpu,
1027 "Set use of floating point coprocessor.\n\
1028Turn off to avoid using floating point instructions when calling functions\n\
1029or dealing with return values.", &setlist),
1030 &showlist);
3127785a 1031
bdef72d2
JK
1032 /* We really would like to have both "0" and "unlimited" work, but
1033 command.c doesn't deal with that. So make it a var_zinteger
1034 because the user can always use "999999" or some such for unlimited. */
1035 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
427fec5d
JK
1036 (char *) &heuristic_fence_post,
1037 "\
23d35572
JK
1038Set the distance searched for the start of a function.\n\
1039If you are debugging a stripped executable, GDB needs to search through the\n\
1040program for the start of a function. This command sets the distance of the\n\
1041search. The only need to set it is when debugging a stripped executable.",
427fec5d
JK
1042 &setlist);
1043 /* We need to throw away the frame cache when we set this, since it
1044 might change our ability to get backtraces. */
1045 c->function.sfunc = reinit_frame_cache_sfunc;
1046 add_show_from_set (c, &showlist);
c2a0f1cb 1047}
This page took 0.187271 seconds and 4 git commands to generate.