* config/m68k/monitor.mt (TDEPFILE): Add remote-es.o.
[deliverable/binutils-gdb.git] / gdb / mips-tdep.c
CommitLineData
7d9884b9 1/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
c2a0f1cb 2 Copyright 1988, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
bd5635a1
RP
3 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
4 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
6This file is part of GDB.
7
361bf6ee 8This program is free software; you can redistribute it and/or modify
bd5635a1 9it under the terms of the GNU General Public License as published by
361bf6ee
JG
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
bd5635a1 12
361bf6ee 13This program is distributed in the hope that it will be useful,
bd5635a1
RP
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
361bf6ee
JG
19along with this program; if not, write to the Free Software
20Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
bd5635a1 21
bd5635a1 22#include "defs.h"
bd5635a1
RP
23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "value.h"
27#include "gdbcmd.h"
ef08856f 28#include "language.h"
bd5635a1 29#include "gdbcore.h"
62a469e1
SG
30#include "symfile.h"
31#include "objfiles.h"
bd5635a1 32
ee5fb959
JK
33#include "opcode/mips.h"
34
bd5635a1 35#define VM_MIN_ADDRESS (unsigned)0x400000
bd5635a1 36\f
002a422b 37#if 0
ee5fb959 38static int mips_in_lenient_prologue PARAMS ((CORE_ADDR, CORE_ADDR));
002a422b 39#endif
ee5fb959 40
c2a0f1cb
ILT
41/* Some MIPS boards don't support floating point, so we permit the
42 user to turn it off. */
43int mips_fpu = 1;
44
3127785a
RP
45/* Heuristic_proc_start may hunt through the text section for a long
46 time across a 2400 baud serial line. Allows the user to limit this
47 search. */
48static unsigned int heuristic_fence_post = 0;
49
0f552c5f
JG
50#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
51#define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
52#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
53#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
54#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
55#define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
56#define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
57#define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
58#define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
59#define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
bd5635a1 60#define _PROC_MAGIC_ 0x0F0F0F0F
0f552c5f
JG
61#define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
62#define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
bd5635a1
RP
63
64struct linked_proc_info
65{
66 struct mips_extra_func_info info;
67 struct linked_proc_info *next;
dac4929a 68} *linked_proc_desc_table = NULL;
bd5635a1
RP
69
70\f
71#define READ_FRAME_REG(fi, regno) read_next_frame_reg((fi)->next, regno)
72
0f552c5f 73static int
bd5635a1
RP
74read_next_frame_reg(fi, regno)
75 FRAME fi;
76 int regno;
77{
e157305c
PS
78 /* If it is the frame for sigtramp we have a complete sigcontext
79 immediately below the frame and we get the saved registers from there.
80 If the stack layout for sigtramp changes we might have to change these
e03c0cc6 81 constants and the companion fixup_sigtramp in mdebugread.c */
1b71de8e 82#ifndef SIGFRAME_BASE
e157305c
PS
83#define SIGFRAME_BASE 0x12c /* sizeof(sigcontext) */
84#define SIGFRAME_PC_OFF (-SIGFRAME_BASE + 2 * 4)
85#define SIGFRAME_REGSAVE_OFF (-SIGFRAME_BASE + 3 * 4)
5efd597b
PS
86#endif
87#ifndef SIGFRAME_REG_SIZE
e03c0cc6 88#define SIGFRAME_REG_SIZE 4
1b71de8e 89#endif
bd5635a1
RP
90 for (; fi; fi = fi->next)
91 if (in_sigtramp(fi->pc, 0)) {
bd5635a1
RP
92 int offset;
93 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
e03c0cc6
ILT
94 else if (regno < 32) offset = (SIGFRAME_REGSAVE_OFF
95 + regno * SIGFRAME_REG_SIZE);
bd5635a1
RP
96 else return 0;
97 return read_memory_integer(fi->frame + offset, 4);
98 }
99 else if (regno == SP_REGNUM) return fi->frame;
100 else if (fi->saved_regs->regs[regno])
101 return read_memory_integer(fi->saved_regs->regs[regno], 4);
102 return read_register(regno);
103}
104
105int
106mips_frame_saved_pc(frame)
107 FRAME frame;
108{
0f552c5f 109 mips_extra_func_info_t proc_desc = frame->proc_desc;
bd5635a1 110 int pcreg = proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM;
0f552c5f 111
bd5635a1
RP
112 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
113 return read_memory_integer(frame->frame - 4, 4);
0f552c5f 114
bd5635a1
RP
115 return read_next_frame_reg(frame, pcreg);
116}
117
118static struct mips_extra_func_info temp_proc_desc;
119static struct frame_saved_regs temp_saved_regs;
120
a8172eea
RP
121/* This fencepost looks highly suspicious to me. Removing it also
122 seems suspicious as it could affect remote debugging across serial
3127785a 123 lines. */
a8172eea 124
0f552c5f
JG
125static CORE_ADDR
126heuristic_proc_start(pc)
bd5635a1
RP
127 CORE_ADDR pc;
128{
bd5635a1 129 CORE_ADDR start_pc = pc;
3127785a 130 CORE_ADDR fence = start_pc - heuristic_fence_post;
0f552c5f
JG
131
132 if (start_pc == 0) return 0;
3127785a
RP
133
134 if (heuristic_fence_post == UINT_MAX
135 || fence < VM_MIN_ADDRESS)
136 fence = VM_MIN_ADDRESS;
0f552c5f 137
bd5635a1
RP
138 /* search back for previous return */
139 for (start_pc -= 4; ; start_pc -= 4)
a8172eea
RP
140 if (start_pc < fence)
141 {
3127785a
RP
142 /* It's not clear to me why we reach this point when
143 stop_soon_quietly, but with this test, at least we
144 don't print out warnings for every child forked (eg, on
145 decstation). 22apr93 rich@cygnus.com. */
146 if (!stop_soon_quietly)
147 {
23d35572
JK
148 static int blurb_printed = 0;
149
3127785a
RP
150 if (fence == VM_MIN_ADDRESS)
151 warning("Hit beginning of text section without finding");
152 else
153 warning("Hit heuristic-fence-post without finding");
154
23d35572
JK
155 warning("enclosing function for address 0x%x", pc);
156 if (!blurb_printed)
157 {
158 printf_filtered ("\
159This warning occurs if you are debugging a function without any symbols\n\
160(for example, in a stripped executable). In that case, you may wish to\n\
161increase the size of the search with the `set heuristic-fence-post' command.\n\
162\n\
163Otherwise, you told GDB there was a function where there isn't one, or\n\
164(more likely) you have encountered a bug in GDB.\n");
165 blurb_printed = 1;
166 }
3127785a
RP
167 }
168
a8172eea
RP
169 return 0;
170 }
bd5635a1
RP
171 else if (ABOUT_TO_RETURN(start_pc))
172 break;
173
174 start_pc += 8; /* skip return, and its delay slot */
175#if 0
176 /* skip nops (usually 1) 0 - is this */
177 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
178 start_pc += 4;
179#endif
180 return start_pc;
181}
182
0f552c5f 183static mips_extra_func_info_t
bd5635a1
RP
184heuristic_proc_desc(start_pc, limit_pc, next_frame)
185 CORE_ADDR start_pc, limit_pc;
186 FRAME next_frame;
187{
188 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
189 CORE_ADDR cur_pc;
190 int frame_size;
191 int has_frame_reg = 0;
e03c0cc6 192 int reg30 = 0; /* Value of $r30. Used by gcc for frame-pointer */
bd5635a1
RP
193 unsigned long reg_mask = 0;
194
195 if (start_pc == 0) return NULL;
4ed97c9a
RP
196 memset(&temp_proc_desc, '\0', sizeof(temp_proc_desc));
197 memset(&temp_saved_regs, '\0', sizeof(struct frame_saved_regs));
a70dc898
RP
198 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
199
bd5635a1
RP
200 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
201 restart:
202 frame_size = 0;
203 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
34df79fc 204 char buf[4];
bd5635a1
RP
205 unsigned long word;
206 int status;
207
34df79fc
JK
208 status = read_memory_nobpt (cur_pc, buf, 4);
209 if (status) memory_error (status, cur_pc);
210 word = extract_unsigned_integer (buf, 4);
211
bd5635a1
RP
212 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
213 frame_size += (-word) & 0xFFFF;
214 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
215 frame_size += (-word) & 0xFFFF;
216 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
217 int reg = (word & 0x001F0000) >> 16;
218 reg_mask |= 1 << reg;
002a422b 219 temp_saved_regs.regs[reg] = sp + (word & 0xffff);
bd5635a1
RP
220 }
221 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
002a422b
JK
222 if ((word & 0xffff) != frame_size)
223 reg30 = sp + (word & 0xffff);
bd5635a1
RP
224 else if (!has_frame_reg) {
225 int alloca_adjust;
226 has_frame_reg = 1;
227 reg30 = read_next_frame_reg(next_frame, 30);
002a422b 228 alloca_adjust = reg30 - (sp + (word & 0xffff));
bd5635a1
RP
229 if (alloca_adjust > 0) {
230 /* FP > SP + frame_size. This may be because
e03c0cc6 231 * of an alloca or somethings similar.
bd5635a1
RP
232 * Fix sp to "pre-alloca" value, and try again.
233 */
234 sp += alloca_adjust;
235 goto restart;
236 }
237 }
238 }
239 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
240 int reg = (word & 0x001F0000) >> 16;
241 reg_mask |= 1 << reg;
002a422b 242 temp_saved_regs.regs[reg] = reg30 + (word & 0xffff);
bd5635a1
RP
243 }
244 }
245 if (has_frame_reg) {
246 PROC_FRAME_REG(&temp_proc_desc) = 30;
247 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
248 }
249 else {
250 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
251 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
252 }
253 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
254 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
255 return &temp_proc_desc;
256}
257
0f552c5f 258static mips_extra_func_info_t
bd5635a1
RP
259find_proc_desc(pc, next_frame)
260 CORE_ADDR pc;
261 FRAME next_frame;
262{
263 mips_extra_func_info_t proc_desc;
0f552c5f 264 struct block *b = block_for_pc(pc);
48be4c35
JK
265 struct symbol *sym;
266 CORE_ADDR startaddr;
267
268 find_pc_partial_function (pc, NULL, &startaddr, NULL);
269 if (b == NULL)
270 sym = NULL;
271 else
272 {
273 if (startaddr > BLOCK_START (b))
274 /* This is the "pathological" case referred to in a comment in
275 print_frame_info. It might be better to move this check into
276 symbol reading. */
277 sym = NULL;
278 else
279 sym = lookup_symbol (MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE,
280 0, NULL);
281 }
0f552c5f
JG
282
283 if (sym)
bd5635a1
RP
284 {
285 /* IF this is the topmost frame AND
286 * (this proc does not have debugging information OR
287 * the PC is in the procedure prologue)
be772100 288 * THEN create a "heuristic" proc_desc (by analyzing
bd5635a1
RP
289 * the actual code) to replace the "official" proc_desc.
290 */
0f552c5f 291 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
bd5635a1
RP
292 if (next_frame == NULL) {
293 struct symtab_and_line val;
294 struct symbol *proc_symbol =
295 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
0f552c5f 296
bd5635a1
RP
297 if (proc_symbol) {
298 val = find_pc_line (BLOCK_START
299 (SYMBOL_BLOCK_VALUE(proc_symbol)),
300 0);
301 val.pc = val.end ? val.end : pc;
302 }
303 if (!proc_symbol || pc < val.pc) {
304 mips_extra_func_info_t found_heuristic =
305 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
306 pc, next_frame);
307 if (found_heuristic) proc_desc = found_heuristic;
308 }
309 }
310 }
311 else
312 {
0f552c5f
JG
313 /* Is linked_proc_desc_table really necessary? It only seems to be used
314 by procedure call dummys. However, the procedures being called ought
315 to have their own proc_descs, and even if they don't,
316 heuristic_proc_desc knows how to create them! */
317
bd5635a1
RP
318 register struct linked_proc_info *link;
319 for (link = linked_proc_desc_table; link; link = link->next)
320 if (PROC_LOW_ADDR(&link->info) <= pc
321 && PROC_HIGH_ADDR(&link->info) > pc)
322 return &link->info;
23d35572 323
48be4c35
JK
324 if (startaddr == 0)
325 startaddr = heuristic_proc_start (pc);
326
bd5635a1 327 proc_desc =
48be4c35 328 heuristic_proc_desc (startaddr, pc, next_frame);
bd5635a1
RP
329 }
330 return proc_desc;
331}
332
333mips_extra_func_info_t cached_proc_desc;
334
0f552c5f
JG
335FRAME_ADDR
336mips_frame_chain(frame)
bd5635a1
RP
337 FRAME frame;
338{
bd5635a1
RP
339 mips_extra_func_info_t proc_desc;
340 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
be772100 341
0f552c5f
JG
342 if (saved_pc == 0 || inside_entry_file (saved_pc))
343 return 0;
344
bd5635a1 345 proc_desc = find_proc_desc(saved_pc, frame);
0f552c5f
JG
346 if (!proc_desc)
347 return 0;
348
bd5635a1 349 cached_proc_desc = proc_desc;
e797b4bc
JK
350
351 /* If no frame pointer and frame size is zero, we must be at end
352 of stack (or otherwise hosed). If we don't check frame size,
353 we loop forever if we see a zero size frame. */
354 if (PROC_FRAME_REG (proc_desc) == SP_REGNUM
3f528883 355 && PROC_FRAME_OFFSET (proc_desc) == 0
199b2450
TL
356 /* The previous frame from a sigtramp frame might be frameless
357 and have frame size zero. */
358 && !frame->signal_handler_caller)
bdef72d2
JK
359 return 0;
360 else
361 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
362 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
363}
364
365void
366init_extra_frame_info(fci)
367 struct frame_info *fci;
368{
369 extern struct obstack frame_cache_obstack;
370 /* Use proc_desc calculated in frame_chain */
ee5fb959
JK
371 mips_extra_func_info_t proc_desc =
372 fci->next ? cached_proc_desc : find_proc_desc(fci->pc, fci->next);
0f552c5f 373
bd5635a1
RP
374 fci->saved_regs = (struct frame_saved_regs*)
375 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
ee5fb959 376 memset (fci->saved_regs, 0, sizeof (struct frame_saved_regs));
bd5635a1 377 fci->proc_desc =
ee5fb959 378 proc_desc == &temp_proc_desc ? 0 : proc_desc;
bd5635a1
RP
379 if (proc_desc)
380 {
381 int ireg;
382 CORE_ADDR reg_position;
bd5635a1
RP
383 /* r0 bit means kernel trap */
384 int kernel_trap = PROC_REG_MASK(proc_desc) & 1;
385
c2a0f1cb 386 /* Fixup frame-pointer - only needed for top frame */
5efd597b
PS
387 /* This may not be quite right, if proc has a real frame register.
388 Get the value of the frame relative sp, procedure might have been
389 interrupted by a signal at it's very start. */
2fcdae93 390 if (fci->pc == PROC_LOW_ADDR(proc_desc) && !PROC_DESC_IS_DUMMY(proc_desc))
5efd597b 391 fci->frame = READ_FRAME_REG(fci, SP_REGNUM);
c2a0f1cb
ILT
392 else
393 fci->frame = READ_FRAME_REG(fci, PROC_FRAME_REG(proc_desc))
394 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1 395
48be4c35 396 if (proc_desc == &temp_proc_desc)
ee5fb959 397 *fci->saved_regs = temp_saved_regs;
e03c0cc6 398 else
ee5fb959 399 {
e03c0cc6
ILT
400 /* What registers have been saved? Bitmasks. */
401 unsigned long gen_mask, float_mask;
402
403 gen_mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
404 float_mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
405
406 if (/* In any frame other than the innermost, we assume that all
407 registers have been saved. This assumes that all register
408 saves in a function happen before the first function
409 call. */
410 fci->next == NULL
411
412 /* In a dummy frame we know exactly where things are saved. */
413 && !PROC_DESC_IS_DUMMY (proc_desc)
414
415 /* Not sure exactly what kernel_trap means, but if it means
416 the kernel saves the registers without a prologue doing it,
417 we better not examine the prologue to see whether registers
418 have been saved yet. */
419 && !kernel_trap)
420 {
421 /* We need to figure out whether the registers that the proc_desc
422 claims are saved have been saved yet. */
423
424 CORE_ADDR addr;
425 int status;
426 char buf[4];
427 unsigned long inst;
428
429 /* Bitmasks; set if we have found a save for the register. */
430 unsigned long gen_save_found = 0;
431 unsigned long float_save_found = 0;
432
433 for (addr = PROC_LOW_ADDR (proc_desc);
434 addr < fci->pc && (gen_mask != gen_save_found
435 || float_mask != float_save_found);
436 addr += 4)
437 {
438 status = read_memory_nobpt (addr, buf, 4);
439 if (status)
440 memory_error (status, addr);
441 inst = extract_unsigned_integer (buf, 4);
442 if (/* sw reg,n($sp) */
443 (inst & 0xffe00000) == 0xafa00000
444
445 /* sw reg,n($r30) */
446 || (inst & 0xffe00000) == 0xafc00000)
447 {
448 /* It might be possible to use the instruction to
449 find the offset, rather than the code below which
450 is based on things being in a certain order in the
451 frame, but figuring out what the instruction's offset
452 is relative to might be a little tricky. */
453 int reg = (inst & 0x001f0000) >> 16;
454 gen_save_found |= (1 << reg);
455 }
456 else if (/* swc1 freg,n($sp) */
457 (inst & 0xffe00000) == 0xe7a00000
458
459 /* swc1 freg,n($r30) */
460 || (inst & 0xffe00000) == 0xe7c00000)
461 {
462 int reg = ((inst & 0x001f0000) >> 16);
463 float_save_found |= (1 << reg);
464 }
465 }
466 gen_mask = gen_save_found;
467 float_mask = float_save_found;
468 }
469
470 /* Fill in the offsets for the registers which gen_mask says
471 were saved. */
472 reg_position = fci->frame + PROC_REG_OFFSET (proc_desc);
473 for (ireg= 31; gen_mask; --ireg, gen_mask <<= 1)
474 if (gen_mask & 0x80000000)
bd5635a1 475 {
ee5fb959
JK
476 fci->saved_regs->regs[ireg] = reg_position;
477 reg_position -= 4;
bd5635a1 478 }
e03c0cc6
ILT
479 /* Fill in the offsets for the registers which float_mask says
480 were saved. */
481 reg_position = fci->frame + PROC_FREG_OFFSET (proc_desc);
ee5fb959
JK
482
483 /* The freg_offset points to where the first *double* register
484 is saved. So skip to the high-order word. */
bd5635a1 485 reg_position += 4;
e03c0cc6
ILT
486 for (ireg = 31; float_mask; --ireg, float_mask <<= 1)
487 if (float_mask & 0x80000000)
bd5635a1 488 {
ee5fb959
JK
489 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
490 reg_position -= 4;
bd5635a1 491 }
ee5fb959 492 }
bd5635a1
RP
493
494 /* hack: if argument regs are saved, guess these contain args */
495 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
496 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
497 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
498 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
499 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
500
501 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
502 }
bd5635a1
RP
503}
504
a70dc898
RP
505/* MIPS stack frames are almost impenetrable. When execution stops,
506 we basically have to look at symbol information for the function
507 that we stopped in, which tells us *which* register (if any) is
508 the base of the frame pointer, and what offset from that register
509 the frame itself is at.
510
511 This presents a problem when trying to examine a stack in memory
512 (that isn't executing at the moment), using the "frame" command. We
513 don't have a PC, nor do we have any registers except SP.
514
515 This routine takes two arguments, SP and PC, and tries to make the
516 cached frames look as if these two arguments defined a frame on the
517 cache. This allows the rest of info frame to extract the important
518 arguments without difficulty. */
519
520FRAME
c2a0f1cb
ILT
521setup_arbitrary_frame (argc, argv)
522 int argc;
523 FRAME_ADDR *argv;
a70dc898 524{
c2a0f1cb
ILT
525 if (argc != 2)
526 error ("MIPS frame specifications require two arguments: sp and pc");
527
528 return create_new_frame (argv[0], argv[1]);
a70dc898
RP
529}
530
bd5635a1 531
0f552c5f
JG
532CORE_ADDR
533mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
bd5635a1
RP
534 int nargs;
535 value *args;
536 CORE_ADDR sp;
537 int struct_return;
538 CORE_ADDR struct_addr;
539{
bd5635a1
RP
540 register i;
541 int accumulate_size = struct_return ? 4 : 0;
542 struct mips_arg { char *contents; int len; int offset; };
543 struct mips_arg *mips_args =
544 (struct mips_arg*)alloca(nargs * sizeof(struct mips_arg));
545 register struct mips_arg *m_arg;
546 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
547 extern value value_arg_coerce();
548 value arg = value_arg_coerce (args[i]);
549 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
550 /* This entire mips-specific routine is because doubles must be aligned
551 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
552 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
553 * breaks their varargs implementation...). A correct solution
554 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
555 * in stdarg.h/varargs.h).
556 */
557 if (m_arg->len > 4) accumulate_size = (accumulate_size + 7) & -8;
558 m_arg->offset = accumulate_size;
559 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
560 m_arg->contents = VALUE_CONTENTS(arg);
561 }
562 accumulate_size = (accumulate_size + 7) & (-8);
563 if (accumulate_size < 16) accumulate_size = 16;
564 sp -= accumulate_size;
565 for (i = nargs; m_arg--, --i >= 0; )
566 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
5efd597b
PS
567 if (struct_return)
568 {
569 char buf[TARGET_PTR_BIT / HOST_CHAR_BIT];
570
571 store_address (buf, sizeof buf, struct_addr);
572 write_memory (sp, buf, sizeof buf);
573 }
bd5635a1
RP
574 return sp;
575}
576
577/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
e03c0cc6 578#define MASK(i,j) (((1 << ((j)+1))-1) ^ ((1 << (i))-1))
bd5635a1
RP
579
580void
581mips_push_dummy_frame()
582{
5efd597b 583 char buffer[MAX_REGISTER_RAW_SIZE];
bd5635a1
RP
584 int ireg;
585 struct linked_proc_info *link = (struct linked_proc_info*)
586 xmalloc(sizeof(struct linked_proc_info));
587 mips_extra_func_info_t proc_desc = &link->info;
588 CORE_ADDR sp = read_register (SP_REGNUM);
589 CORE_ADDR save_address;
bd5635a1
RP
590 link->next = linked_proc_desc_table;
591 linked_proc_desc_table = link;
592#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
593#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
594#define GEN_REG_SAVE_COUNT 22
595#define FLOAT_REG_SAVE_MASK MASK(0,19)
596#define FLOAT_REG_SAVE_COUNT 20
597#define SPECIAL_REG_SAVE_COUNT 4
598 /*
599 * The registers we must save are all those not preserved across
600 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
601 * In addition, we must save the PC, and PUSH_FP_REGNUM.
602 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
603 *
604 * Dummy frame layout:
605 * (high memory)
606 * Saved PC
607 * Saved MMHI, MMLO, FPC_CSR
608 * Saved R31
609 * Saved R28
610 * ...
611 * Saved R1
612 * Saved D18 (i.e. F19, F18)
613 * ...
614 * Saved D0 (i.e. F1, F0)
c2a0f1cb 615 * CALL_DUMMY (subroutine stub; see tm-mips.h)
bd5635a1
RP
616 * Parameter build area (not yet implemented)
617 * (low memory)
618 */
619 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
c2a0f1cb 620 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
bd5635a1
RP
621 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
622 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
623 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
624 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
625 /* save general registers */
626 save_address = sp + PROC_REG_OFFSET(proc_desc);
627 for (ireg = 32; --ireg >= 0; )
628 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
629 {
5efd597b
PS
630 store_unsigned_integer (buffer, REGISTER_RAW_SIZE (ireg),
631 read_register (ireg));
632 write_memory (save_address, buffer, REGISTER_RAW_SIZE (ireg));
bd5635a1
RP
633 save_address -= 4;
634 }
0b0d6c3f
PS
635 /* save floating-points registers starting with high order word */
636 save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
bd5635a1
RP
637 for (ireg = 32; --ireg >= 0; )
638 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
639 {
5efd597b
PS
640 store_unsigned_integer (buffer, 4, read_register (ireg + FP0_REGNUM));
641 write_memory (save_address, buffer, 4);
bd5635a1
RP
642 save_address -= 4;
643 }
644 write_register (PUSH_FP_REGNUM, sp);
645 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
646 PROC_FRAME_OFFSET(proc_desc) = 0;
5efd597b
PS
647 store_unsigned_integer (buffer, REGISTER_RAW_SIZE (PC_REGNUM),
648 read_register (PC_REGNUM));
649 write_memory (sp - 4, buffer, REGISTER_RAW_SIZE (PC_REGNUM));
650 store_unsigned_integer (buffer, REGISTER_RAW_SIZE (HI_REGNUM),
651 read_register (HI_REGNUM));
652 write_memory (sp - 8, buffer, REGISTER_RAW_SIZE (HI_REGNUM));
653 store_unsigned_integer (buffer, REGISTER_RAW_SIZE (LO_REGNUM),
654 read_register (LO_REGNUM));
655 write_memory (sp - 12, buffer, REGISTER_RAW_SIZE (LO_REGNUM));
656 store_unsigned_integer
657 (buffer,
658 REGISTER_RAW_SIZE (FCRCS_REGNUM),
659 mips_fpu ? read_register (FCRCS_REGNUM) : 0);
660 write_memory (sp - 16, buffer, REGISTER_RAW_SIZE (FCRCS_REGNUM));
c2a0f1cb
ILT
661 sp -= 4 * (GEN_REG_SAVE_COUNT
662 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
663 + SPECIAL_REG_SAVE_COUNT);
bd5635a1
RP
664 write_register (SP_REGNUM, sp);
665 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
666 PROC_HIGH_ADDR(proc_desc) = sp;
667 SET_PROC_DESC_IS_DUMMY(proc_desc);
668 PROC_PC_REG(proc_desc) = RA_REGNUM;
669}
670
671void
672mips_pop_frame()
dac4929a
SG
673{
674 register int regnum;
bd5635a1
RP
675 FRAME frame = get_current_frame ();
676 CORE_ADDR new_sp = frame->frame;
dac4929a 677
a70dc898 678 mips_extra_func_info_t proc_desc = frame->proc_desc;
dac4929a
SG
679
680 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
681 if (proc_desc)
682 {
683 for (regnum = 32; --regnum >= 0; )
684 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
685 write_register (regnum,
686 read_memory_integer (frame->saved_regs->regs[regnum],
687 4));
688 for (regnum = 32; --regnum >= 0; )
689 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
690 write_register (regnum + FP0_REGNUM,
691 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
692 }
693 write_register (SP_REGNUM, new_sp);
694 flush_cached_frames ();
695 /* We let mips_init_extra_frame_info figure out the frame pointer */
696 set_current_frame (create_new_frame (0, read_pc ()));
697
199b2450 698 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
bd5635a1 699 {
dac4929a
SG
700 struct linked_proc_info *pi_ptr, *prev_ptr;
701
702 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
703 pi_ptr != NULL;
704 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
705 {
706 if (&pi_ptr->info == proc_desc)
707 break;
708 }
709
710 if (pi_ptr == NULL)
711 error ("Can't locate dummy extra frame info\n");
712
713 if (prev_ptr != NULL)
714 prev_ptr->next = pi_ptr->next;
715 else
716 linked_proc_desc_table = pi_ptr->next;
717
718 free (pi_ptr);
719
bd5635a1
RP
720 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
721 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
c2a0f1cb
ILT
722 if (mips_fpu)
723 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
bd5635a1 724 }
bd5635a1
RP
725}
726
0f552c5f 727static void
a70dc898 728mips_print_register (regnum, all)
bd5635a1
RP
729 int regnum, all;
730{
48be4c35 731 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
bd5635a1 732
48be4c35
JK
733 /* Get the data in raw format. */
734 if (read_relative_register_raw_bytes (regnum, raw_buffer))
735 {
736 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
737 return;
738 }
739
740 /* If an even floating pointer register, also print as double. */
741 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
742 && !((regnum-FP0_REGNUM) & 1)) {
743 char dbuffer[MAX_REGISTER_RAW_SIZE];
744
745 read_relative_register_raw_bytes (regnum, dbuffer);
746 read_relative_register_raw_bytes (regnum+1, dbuffer+4);
ac8cf67d 747#ifdef REGISTER_CONVERT_TO_TYPE
48be4c35 748 REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer);
ac8cf67d 749#endif
48be4c35
JK
750 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
751 val_print (builtin_type_double, dbuffer, 0,
199b2450 752 gdb_stdout, 0, 1, 0, Val_pretty_default);
48be4c35
JK
753 printf_filtered ("); ");
754 }
199b2450 755 fputs_filtered (reg_names[regnum], gdb_stdout);
48be4c35
JK
756
757 /* The problem with printing numeric register names (r26, etc.) is that
758 the user can't use them on input. Probably the best solution is to
759 fix it so that either the numeric or the funky (a2, etc.) names
760 are accepted on input. */
761 if (regnum < 32)
762 printf_filtered ("(r%d): ", regnum);
763 else
764 printf_filtered (": ");
bd5635a1 765
48be4c35
JK
766 /* If virtual format is floating, print it that way. */
767 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
768 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
769 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
199b2450 770 gdb_stdout, 0, 1, 0, Val_pretty_default);
48be4c35
JK
771 }
772 /* Else print as integer in hex. */
773 else
774 {
775 long val;
bd5635a1 776
48be4c35
JK
777 val = extract_signed_integer (raw_buffer,
778 REGISTER_RAW_SIZE (regnum));
34df79fc 779
48be4c35
JK
780 if (val == 0)
781 printf_filtered ("0");
782 else if (all)
783 /* FIXME: We should be printing this in a fixed field width, so that
784 registers line up. */
785 printf_filtered (local_hex_format(), val);
786 else
199b2450 787 printf_filtered ("%s=%ld", local_hex_string(val), val);
48be4c35 788 }
bd5635a1
RP
789}
790
d8b3b00e 791/* Replacement for generic do_registers_info. */
0f552c5f 792void
361bf6ee 793mips_do_registers_info (regnum, fpregs)
bd5635a1 794 int regnum;
361bf6ee 795 int fpregs;
bd5635a1
RP
796{
797 if (regnum != -1) {
798 mips_print_register (regnum, 0);
799 printf_filtered ("\n");
800 }
801 else {
802 for (regnum = 0; regnum < NUM_REGS; ) {
d8b3b00e
JG
803 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
804 regnum++;
805 continue;
806 }
bd5635a1
RP
807 mips_print_register (regnum, 1);
808 regnum++;
809 if ((regnum & 3) == 0 || regnum == NUM_REGS)
810 printf_filtered (";\n");
811 else
812 printf_filtered ("; ");
813 }
814 }
815}
816/* Return number of args passed to a frame. described by FIP.
817 Can return -1, meaning no way to tell. */
818
0f552c5f 819int
bd5635a1
RP
820mips_frame_num_args(fip)
821 FRAME fip;
822{
823#if 0
824 struct chain_info_t *p;
825
826 p = mips_find_cached_frame(FRAME_FP(fip));
827 if (p->valid)
828 return p->the_info.numargs;
829#endif
830 return -1;
831}
407a8389 832\f
002a422b 833#if 0
427fec5d 834/* Is this a branch with a delay slot? */
ee5fb959
JK
835static int
836is_delayed (insn)
837 unsigned long insn;
838{
839 int i;
840 for (i = 0; i < NUMOPCODES; ++i)
841 if (mips_opcodes[i].pinfo != INSN_MACRO
842 && (insn & mips_opcodes[i].mask) == mips_opcodes[i].match)
843 break;
427fec5d
JK
844 return (i < NUMOPCODES
845 && (mips_opcodes[i].pinfo & (INSN_UNCOND_BRANCH_DELAY
846 | INSN_COND_BRANCH_DELAY
847 | INSN_COND_BRANCH_LIKELY)));
ee5fb959 848}
002a422b 849#endif
ee5fb959
JK
850
851/* To skip prologues, I use this predicate. Returns either PC itself
852 if the code at PC does not look like a function prologue; otherwise
853 returns an address that (if we're lucky) follows the prologue. If
854 LENIENT, then we must skip everything which is involved in setting
855 up the frame (it's OK to skip more, just so long as we don't skip
856 anything which might clobber the registers which are being saved.
857 We must skip more in the case where part of the prologue is in the
858 delay slot of a non-prologue instruction). */
bd5635a1 859
be772100 860CORE_ADDR
ee5fb959 861mips_skip_prologue (pc, lenient)
bd5635a1 862 CORE_ADDR pc;
ee5fb959 863 int lenient;
bd5635a1 864{
bd5635a1 865 unsigned long inst;
d747e0af 866 int offset;
0b0d6c3f 867 int seen_sp_adjust = 0;
bd5635a1 868
e157305c
PS
869 /* Skip the typical prologue instructions. These are the stack adjustment
870 instruction and the instructions that save registers on the stack
871 or in the gcc frame. */
ee5fb959
JK
872 for (offset = 0; offset < 100; offset += 4)
873 {
874 char buf[4];
875 int status;
876
877 status = read_memory_nobpt (pc + offset, buf, 4);
878 if (status)
879 memory_error (status, pc + offset);
880 inst = extract_unsigned_integer (buf, 4);
881
002a422b 882#if 0
ee5fb959
JK
883 if (lenient && is_delayed (inst))
884 continue;
002a422b 885#endif
ee5fb959 886
e157305c 887 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
0b0d6c3f 888 seen_sp_adjust = 1;
e157305c
PS
889 else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000))
890 continue; /* sw reg,n($sp) */
891 /* reg != $zero */
892 else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
893 continue;
894 else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000))
895 /* sx reg,n($s8) */
896 continue; /* reg != $zero */
897 else if (inst == 0x03A0F021) /* move $s8,$sp */
0b0d6c3f 898 continue;
1b71de8e
PS
899 else if ((inst & 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
900 continue;
e03c0cc6
ILT
901 else if ((inst & 0xffff0000) == 0x3c1c0000) /* lui $gp,n */
902 continue;
903 else if ((inst & 0xffff0000) == 0x279c0000) /* addiu $gp,$gp,n */
904 continue;
905 else if (inst == 0x0399e021 /* addu $gp,$gp,$t9 */
906 || inst == 0x033ce021) /* addu $gp,$t9,$gp */
907 continue;
0b0d6c3f 908 else
e157305c 909 break;
d747e0af 910 }
e157305c
PS
911 return pc + offset;
912
913/* FIXME schauer. The following code seems no longer necessary if we
914 always skip the typical prologue instructions. */
915
916#if 0
0b0d6c3f
PS
917 if (seen_sp_adjust)
918 return pc + offset;
bd5635a1
RP
919
920 /* Well, it looks like a frameless. Let's make sure.
921 Note that we are not called on the current PC,
922 but on the function`s start PC, and I have definitely
923 seen optimized code that adjusts the SP quite later */
924 b = block_for_pc(pc);
925 if (!b) return pc;
926
dac4929a 927 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
bd5635a1
RP
928 if (!f) return pc;
929 /* Ideally, I would like to use the adjusted info
930 from mips_frame_info(), but for all practical
931 purposes it will not matter (and it would require
932 a different definition of SKIP_PROLOGUE())
933
934 Actually, it would not hurt to skip the storing
935 of arguments on the stack as well. */
0f552c5f 936 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
bd5635a1
RP
937 return pc + 4;
938
939 return pc;
e157305c 940#endif
bd5635a1 941}
c2a0f1cb 942
002a422b
JK
943#if 0
944/* The lenient prologue stuff should be superceded by the code in
945 init_extra_frame_info which looks to see whether the stores mentioned
946 in the proc_desc have actually taken place. */
947
ee5fb959
JK
948/* Is address PC in the prologue (loosely defined) for function at
949 STARTADDR? */
950
951static int
952mips_in_lenient_prologue (startaddr, pc)
953 CORE_ADDR startaddr;
954 CORE_ADDR pc;
955{
956 CORE_ADDR end_prologue = mips_skip_prologue (startaddr, 1);
957 return pc >= startaddr && pc < end_prologue;
958}
002a422b 959#endif
ee5fb959 960
ac8cf67d
PS
961/* Given a return value in `regbuf' with a type `valtype',
962 extract and copy its value into `valbuf'. */
963void
964mips_extract_return_value (valtype, regbuf, valbuf)
965 struct type *valtype;
966 char regbuf[REGISTER_BYTES];
967 char *valbuf;
968{
969 int regnum;
970
971 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
972
973 memcpy (valbuf, regbuf + REGISTER_BYTE (regnum), TYPE_LENGTH (valtype));
974#ifdef REGISTER_CONVERT_TO_TYPE
975 REGISTER_CONVERT_TO_TYPE(regnum, valtype, valbuf);
976#endif
977}
978
979/* Given a return value in `regbuf' with a type `valtype',
980 write it's value into the appropriate register. */
981void
982mips_store_return_value (valtype, valbuf)
983 struct type *valtype;
984 char *valbuf;
985{
986 int regnum;
987 char raw_buffer[MAX_REGISTER_RAW_SIZE];
988
989 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
990 memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
991
992#ifdef REGISTER_CONVERT_FROM_TYPE
993 REGISTER_CONVERT_FROM_TYPE(regnum, valtype, raw_buffer);
994#endif
995
996 write_register_bytes(REGISTER_BYTE (regnum), raw_buffer, TYPE_LENGTH (valtype));
997}
998
e03c0cc6
ILT
999/* These exist in mdebugread.c. */
1000extern CORE_ADDR sigtramp_address, sigtramp_end;
1001extern void fixup_sigtramp PARAMS ((void));
1002
1003/* Exported procedure: Is PC in the signal trampoline code */
1004
1005int
1006in_sigtramp (pc, ignore)
1007 CORE_ADDR pc;
1008 char *ignore; /* function name */
1009{
1010 if (sigtramp_address == 0)
1011 fixup_sigtramp ();
1012 return (pc >= sigtramp_address && pc < sigtramp_end);
1013}
1014
8b52d486 1015static void reinit_frame_cache_sfunc PARAMS ((char *, int,
427fec5d
JK
1016 struct cmd_list_element *));
1017
1018/* Just like reinit_frame_cache, but with the right arguments to be
1019 callable as an sfunc. */
1020static void
1021reinit_frame_cache_sfunc (args, from_tty, c)
1022 char *args;
1023 int from_tty;
1024 struct cmd_list_element *c;
1025{
1026 reinit_frame_cache ();
1027}
c2a0f1cb
ILT
1028
1029void
1030_initialize_mips_tdep ()
1031{
427fec5d
JK
1032 struct cmd_list_element *c;
1033
1034 /* Let the user turn off floating point and set the fence post for
1035 heuristic_proc_start. */
1036
c2a0f1cb 1037 add_show_from_set
a8172eea 1038 (add_set_cmd ("mipsfpu", class_support, var_boolean,
c2a0f1cb
ILT
1039 (char *) &mips_fpu,
1040 "Set use of floating point coprocessor.\n\
1041Turn off to avoid using floating point instructions when calling functions\n\
1042or dealing with return values.", &setlist),
1043 &showlist);
3127785a 1044
bdef72d2
JK
1045 /* We really would like to have both "0" and "unlimited" work, but
1046 command.c doesn't deal with that. So make it a var_zinteger
1047 because the user can always use "999999" or some such for unlimited. */
1048 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
427fec5d
JK
1049 (char *) &heuristic_fence_post,
1050 "\
23d35572
JK
1051Set the distance searched for the start of a function.\n\
1052If you are debugging a stripped executable, GDB needs to search through the\n\
1053program for the start of a function. This command sets the distance of the\n\
1054search. The only need to set it is when debugging a stripped executable.",
427fec5d
JK
1055 &setlist);
1056 /* We need to throw away the frame cache when we set this, since it
1057 might change our ability to get backtraces. */
1058 c->function.sfunc = reinit_frame_cache_sfunc;
1059 add_show_from_set (c, &showlist);
c2a0f1cb 1060}
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