Change the stream argument to _filtered to GDB_FILE *.
[deliverable/binutils-gdb.git] / gdb / mips-tdep.c
CommitLineData
7d9884b9 1/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
c2a0f1cb 2 Copyright 1988, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
bd5635a1
RP
3 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
4 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
6This file is part of GDB.
7
361bf6ee 8This program is free software; you can redistribute it and/or modify
bd5635a1 9it under the terms of the GNU General Public License as published by
361bf6ee
JG
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
bd5635a1 12
361bf6ee 13This program is distributed in the hope that it will be useful,
bd5635a1
RP
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
361bf6ee
JG
19along with this program; if not, write to the Free Software
20Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
bd5635a1 21
bd5635a1 22#include "defs.h"
bd5635a1
RP
23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "value.h"
27#include "gdbcmd.h"
ef08856f 28#include "language.h"
bd5635a1 29#include "gdbcore.h"
62a469e1
SG
30#include "symfile.h"
31#include "objfiles.h"
bd5635a1 32
ee5fb959
JK
33#include "opcode/mips.h"
34
bd5635a1 35#define VM_MIN_ADDRESS (unsigned)0x400000
bd5635a1 36\f
ee5fb959
JK
37static int mips_in_lenient_prologue PARAMS ((CORE_ADDR, CORE_ADDR));
38
c2a0f1cb
ILT
39/* Some MIPS boards don't support floating point, so we permit the
40 user to turn it off. */
41int mips_fpu = 1;
42
3127785a
RP
43/* Heuristic_proc_start may hunt through the text section for a long
44 time across a 2400 baud serial line. Allows the user to limit this
45 search. */
46static unsigned int heuristic_fence_post = 0;
47
0f552c5f
JG
48#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
49#define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
50#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
51#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
52#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
53#define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
54#define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
55#define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
56#define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
57#define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
bd5635a1 58#define _PROC_MAGIC_ 0x0F0F0F0F
0f552c5f
JG
59#define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
60#define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
bd5635a1
RP
61
62struct linked_proc_info
63{
64 struct mips_extra_func_info info;
65 struct linked_proc_info *next;
dac4929a 66} *linked_proc_desc_table = NULL;
bd5635a1
RP
67
68\f
69#define READ_FRAME_REG(fi, regno) read_next_frame_reg((fi)->next, regno)
70
0f552c5f 71static int
bd5635a1
RP
72read_next_frame_reg(fi, regno)
73 FRAME fi;
74 int regno;
75{
e157305c
PS
76 /* If it is the frame for sigtramp we have a complete sigcontext
77 immediately below the frame and we get the saved registers from there.
78 If the stack layout for sigtramp changes we might have to change these
79 constants and the companion fixup_sigtramp in mipsread.c */
1b71de8e 80#ifndef SIGFRAME_BASE
e157305c
PS
81#define SIGFRAME_BASE 0x12c /* sizeof(sigcontext) */
82#define SIGFRAME_PC_OFF (-SIGFRAME_BASE + 2 * 4)
83#define SIGFRAME_REGSAVE_OFF (-SIGFRAME_BASE + 3 * 4)
1b71de8e 84#endif
bd5635a1
RP
85 for (; fi; fi = fi->next)
86 if (in_sigtramp(fi->pc, 0)) {
bd5635a1
RP
87 int offset;
88 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
e157305c 89 else if (regno < 32) offset = SIGFRAME_REGSAVE_OFF + regno * 4;
bd5635a1
RP
90 else return 0;
91 return read_memory_integer(fi->frame + offset, 4);
92 }
93 else if (regno == SP_REGNUM) return fi->frame;
94 else if (fi->saved_regs->regs[regno])
95 return read_memory_integer(fi->saved_regs->regs[regno], 4);
96 return read_register(regno);
97}
98
99int
100mips_frame_saved_pc(frame)
101 FRAME frame;
102{
0f552c5f 103 mips_extra_func_info_t proc_desc = frame->proc_desc;
bd5635a1 104 int pcreg = proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM;
0f552c5f 105
bd5635a1
RP
106 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
107 return read_memory_integer(frame->frame - 4, 4);
0f552c5f 108
bd5635a1
RP
109 return read_next_frame_reg(frame, pcreg);
110}
111
112static struct mips_extra_func_info temp_proc_desc;
113static struct frame_saved_regs temp_saved_regs;
114
a8172eea
RP
115/* This fencepost looks highly suspicious to me. Removing it also
116 seems suspicious as it could affect remote debugging across serial
3127785a 117 lines. */
a8172eea 118
0f552c5f
JG
119static CORE_ADDR
120heuristic_proc_start(pc)
bd5635a1
RP
121 CORE_ADDR pc;
122{
bd5635a1 123 CORE_ADDR start_pc = pc;
3127785a 124 CORE_ADDR fence = start_pc - heuristic_fence_post;
0f552c5f
JG
125
126 if (start_pc == 0) return 0;
3127785a
RP
127
128 if (heuristic_fence_post == UINT_MAX
129 || fence < VM_MIN_ADDRESS)
130 fence = VM_MIN_ADDRESS;
0f552c5f 131
bd5635a1
RP
132 /* search back for previous return */
133 for (start_pc -= 4; ; start_pc -= 4)
a8172eea
RP
134 if (start_pc < fence)
135 {
3127785a
RP
136 /* It's not clear to me why we reach this point when
137 stop_soon_quietly, but with this test, at least we
138 don't print out warnings for every child forked (eg, on
139 decstation). 22apr93 rich@cygnus.com. */
140 if (!stop_soon_quietly)
141 {
23d35572
JK
142 static int blurb_printed = 0;
143
3127785a
RP
144 if (fence == VM_MIN_ADDRESS)
145 warning("Hit beginning of text section without finding");
146 else
147 warning("Hit heuristic-fence-post without finding");
148
23d35572
JK
149 warning("enclosing function for address 0x%x", pc);
150 if (!blurb_printed)
151 {
152 printf_filtered ("\
153This warning occurs if you are debugging a function without any symbols\n\
154(for example, in a stripped executable). In that case, you may wish to\n\
155increase the size of the search with the `set heuristic-fence-post' command.\n\
156\n\
157Otherwise, you told GDB there was a function where there isn't one, or\n\
158(more likely) you have encountered a bug in GDB.\n");
159 blurb_printed = 1;
160 }
3127785a
RP
161 }
162
a8172eea
RP
163 return 0;
164 }
bd5635a1
RP
165 else if (ABOUT_TO_RETURN(start_pc))
166 break;
167
168 start_pc += 8; /* skip return, and its delay slot */
169#if 0
170 /* skip nops (usually 1) 0 - is this */
171 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
172 start_pc += 4;
173#endif
174 return start_pc;
175}
176
0f552c5f 177static mips_extra_func_info_t
bd5635a1
RP
178heuristic_proc_desc(start_pc, limit_pc, next_frame)
179 CORE_ADDR start_pc, limit_pc;
180 FRAME next_frame;
181{
182 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
183 CORE_ADDR cur_pc;
184 int frame_size;
185 int has_frame_reg = 0;
186 int reg30; /* Value of $r30. Used by gcc for frame-pointer */
187 unsigned long reg_mask = 0;
188
189 if (start_pc == 0) return NULL;
4ed97c9a
RP
190 memset(&temp_proc_desc, '\0', sizeof(temp_proc_desc));
191 memset(&temp_saved_regs, '\0', sizeof(struct frame_saved_regs));
a70dc898
RP
192 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
193
bd5635a1
RP
194 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
195 restart:
196 frame_size = 0;
197 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
34df79fc 198 char buf[4];
bd5635a1
RP
199 unsigned long word;
200 int status;
201
34df79fc
JK
202 status = read_memory_nobpt (cur_pc, buf, 4);
203 if (status) memory_error (status, cur_pc);
204 word = extract_unsigned_integer (buf, 4);
205
bd5635a1
RP
206 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
207 frame_size += (-word) & 0xFFFF;
208 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
209 frame_size += (-word) & 0xFFFF;
210 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
211 int reg = (word & 0x001F0000) >> 16;
212 reg_mask |= 1 << reg;
213 temp_saved_regs.regs[reg] = sp + (short)word;
214 }
215 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
216 if ((unsigned short)word != frame_size)
217 reg30 = sp + (unsigned short)word;
218 else if (!has_frame_reg) {
219 int alloca_adjust;
220 has_frame_reg = 1;
221 reg30 = read_next_frame_reg(next_frame, 30);
222 alloca_adjust = reg30 - (sp + (unsigned short)word);
223 if (alloca_adjust > 0) {
224 /* FP > SP + frame_size. This may be because
225 /* of an alloca or somethings similar.
226 * Fix sp to "pre-alloca" value, and try again.
227 */
228 sp += alloca_adjust;
229 goto restart;
230 }
231 }
232 }
233 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
234 int reg = (word & 0x001F0000) >> 16;
235 reg_mask |= 1 << reg;
236 temp_saved_regs.regs[reg] = reg30 + (short)word;
237 }
238 }
239 if (has_frame_reg) {
240 PROC_FRAME_REG(&temp_proc_desc) = 30;
241 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
242 }
243 else {
244 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
245 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
246 }
247 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
248 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
249 return &temp_proc_desc;
250}
251
0f552c5f 252static mips_extra_func_info_t
bd5635a1
RP
253find_proc_desc(pc, next_frame)
254 CORE_ADDR pc;
255 FRAME next_frame;
256{
257 mips_extra_func_info_t proc_desc;
0f552c5f 258 struct block *b = block_for_pc(pc);
48be4c35
JK
259 struct symbol *sym;
260 CORE_ADDR startaddr;
261
262 find_pc_partial_function (pc, NULL, &startaddr, NULL);
263 if (b == NULL)
264 sym = NULL;
265 else
266 {
267 if (startaddr > BLOCK_START (b))
268 /* This is the "pathological" case referred to in a comment in
269 print_frame_info. It might be better to move this check into
270 symbol reading. */
271 sym = NULL;
272 else
273 sym = lookup_symbol (MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE,
274 0, NULL);
275 }
0f552c5f
JG
276
277 if (sym)
bd5635a1
RP
278 {
279 /* IF this is the topmost frame AND
280 * (this proc does not have debugging information OR
281 * the PC is in the procedure prologue)
be772100 282 * THEN create a "heuristic" proc_desc (by analyzing
bd5635a1
RP
283 * the actual code) to replace the "official" proc_desc.
284 */
0f552c5f 285 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
bd5635a1
RP
286 if (next_frame == NULL) {
287 struct symtab_and_line val;
288 struct symbol *proc_symbol =
289 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
0f552c5f 290
bd5635a1
RP
291 if (proc_symbol) {
292 val = find_pc_line (BLOCK_START
293 (SYMBOL_BLOCK_VALUE(proc_symbol)),
294 0);
295 val.pc = val.end ? val.end : pc;
296 }
297 if (!proc_symbol || pc < val.pc) {
298 mips_extra_func_info_t found_heuristic =
299 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
300 pc, next_frame);
301 if (found_heuristic) proc_desc = found_heuristic;
302 }
303 }
304 }
305 else
306 {
0f552c5f
JG
307 /* Is linked_proc_desc_table really necessary? It only seems to be used
308 by procedure call dummys. However, the procedures being called ought
309 to have their own proc_descs, and even if they don't,
310 heuristic_proc_desc knows how to create them! */
311
bd5635a1
RP
312 register struct linked_proc_info *link;
313 for (link = linked_proc_desc_table; link; link = link->next)
314 if (PROC_LOW_ADDR(&link->info) <= pc
315 && PROC_HIGH_ADDR(&link->info) > pc)
316 return &link->info;
23d35572 317
48be4c35
JK
318 if (startaddr == 0)
319 startaddr = heuristic_proc_start (pc);
320
bd5635a1 321 proc_desc =
48be4c35 322 heuristic_proc_desc (startaddr, pc, next_frame);
bd5635a1
RP
323 }
324 return proc_desc;
325}
326
327mips_extra_func_info_t cached_proc_desc;
328
0f552c5f
JG
329FRAME_ADDR
330mips_frame_chain(frame)
bd5635a1
RP
331 FRAME frame;
332{
bd5635a1
RP
333 mips_extra_func_info_t proc_desc;
334 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
be772100 335
0f552c5f
JG
336 if (saved_pc == 0 || inside_entry_file (saved_pc))
337 return 0;
338
bd5635a1 339 proc_desc = find_proc_desc(saved_pc, frame);
0f552c5f
JG
340 if (!proc_desc)
341 return 0;
342
bd5635a1 343 cached_proc_desc = proc_desc;
e797b4bc
JK
344
345 /* If no frame pointer and frame size is zero, we must be at end
346 of stack (or otherwise hosed). If we don't check frame size,
347 we loop forever if we see a zero size frame. */
348 if (PROC_FRAME_REG (proc_desc) == SP_REGNUM
3f528883 349 && PROC_FRAME_OFFSET (proc_desc) == 0
199b2450
TL
350 /* The previous frame from a sigtramp frame might be frameless
351 and have frame size zero. */
352 && !frame->signal_handler_caller)
bdef72d2
JK
353 return 0;
354 else
355 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
356 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
357}
358
359void
360init_extra_frame_info(fci)
361 struct frame_info *fci;
362{
363 extern struct obstack frame_cache_obstack;
364 /* Use proc_desc calculated in frame_chain */
ee5fb959
JK
365 mips_extra_func_info_t proc_desc =
366 fci->next ? cached_proc_desc : find_proc_desc(fci->pc, fci->next);
0f552c5f 367
bd5635a1
RP
368 fci->saved_regs = (struct frame_saved_regs*)
369 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
ee5fb959 370 memset (fci->saved_regs, 0, sizeof (struct frame_saved_regs));
bd5635a1 371 fci->proc_desc =
ee5fb959 372 proc_desc == &temp_proc_desc ? 0 : proc_desc;
bd5635a1
RP
373 if (proc_desc)
374 {
375 int ireg;
376 CORE_ADDR reg_position;
377 unsigned long mask;
378 /* r0 bit means kernel trap */
379 int kernel_trap = PROC_REG_MASK(proc_desc) & 1;
380
c2a0f1cb
ILT
381 /* Fixup frame-pointer - only needed for top frame */
382 /* This may not be quite right, if proc has a real frame register */
2fcdae93 383 if (fci->pc == PROC_LOW_ADDR(proc_desc) && !PROC_DESC_IS_DUMMY(proc_desc))
c2a0f1cb
ILT
384 fci->frame = read_register (SP_REGNUM);
385 else
386 fci->frame = READ_FRAME_REG(fci, PROC_FRAME_REG(proc_desc))
387 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1 388
ee5fb959
JK
389 /* If this is the innermost frame, and we are still in the
390 prologue (loosely defined), then the registers may not have
48be4c35 391 been saved yet. */
ee5fb959 392 if (fci->next == NULL
66fe7416 393 && !PROC_DESC_IS_DUMMY(proc_desc)
ee5fb959 394 && mips_in_lenient_prologue (PROC_LOW_ADDR (proc_desc), fci->pc))
48be4c35
JK
395 {
396 /* Can't just say that the registers are not saved, because they
397 might get clobbered halfway through the prologue.
398 heuristic_proc_desc already has the right code to figure out
399 exactly what has been saved, so use it. As far as I know we
400 could be doing this (as we do on the 68k, for example)
401 regardless of whether we are in the prologue; I'm leaving in
402 the check for being in the prologue only out of conservatism
403 (I'm not sure whether heuristic_proc_desc handles all cases,
404 for example).
405
406 This stuff is ugly (and getting uglier by the minute). Probably
407 the best way to clean it up is to ignore the proc_desc's from
408 the symbols altogher, and get all the information we need by
409 examining the prologue (provided we can make the prologue
410 examining code good enough to get all the cases...). */
411 proc_desc =
412 heuristic_proc_desc (PROC_LOW_ADDR (proc_desc),
413 fci->pc,
414 fci->next);
415 }
416
417 if (proc_desc == &temp_proc_desc)
ee5fb959 418 *fci->saved_regs = temp_saved_regs;
bd5635a1 419 else
ee5fb959 420 {
bd5635a1
RP
421 /* find which general-purpose registers were saved */
422 reg_position = fci->frame + PROC_REG_OFFSET(proc_desc);
423 mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
424 for (ireg= 31; mask; --ireg, mask <<= 1)
ee5fb959 425 if (mask & 0x80000000)
bd5635a1 426 {
ee5fb959
JK
427 fci->saved_regs->regs[ireg] = reg_position;
428 reg_position -= 4;
bd5635a1
RP
429 }
430 /* find which floating-point registers were saved */
431 reg_position = fci->frame + PROC_FREG_OFFSET(proc_desc);
ee5fb959
JK
432
433 /* The freg_offset points to where the first *double* register
434 is saved. So skip to the high-order word. */
bd5635a1
RP
435 reg_position += 4;
436 mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
437 for (ireg = 31; mask; --ireg, mask <<= 1)
ee5fb959 438 if (mask & 0x80000000)
bd5635a1 439 {
ee5fb959
JK
440 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
441 reg_position -= 4;
bd5635a1 442 }
ee5fb959 443 }
bd5635a1
RP
444
445 /* hack: if argument regs are saved, guess these contain args */
446 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
447 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
448 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
449 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
450 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
451
452 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
453 }
bd5635a1
RP
454}
455
a70dc898
RP
456/* MIPS stack frames are almost impenetrable. When execution stops,
457 we basically have to look at symbol information for the function
458 that we stopped in, which tells us *which* register (if any) is
459 the base of the frame pointer, and what offset from that register
460 the frame itself is at.
461
462 This presents a problem when trying to examine a stack in memory
463 (that isn't executing at the moment), using the "frame" command. We
464 don't have a PC, nor do we have any registers except SP.
465
466 This routine takes two arguments, SP and PC, and tries to make the
467 cached frames look as if these two arguments defined a frame on the
468 cache. This allows the rest of info frame to extract the important
469 arguments without difficulty. */
470
471FRAME
c2a0f1cb
ILT
472setup_arbitrary_frame (argc, argv)
473 int argc;
474 FRAME_ADDR *argv;
a70dc898 475{
c2a0f1cb
ILT
476 if (argc != 2)
477 error ("MIPS frame specifications require two arguments: sp and pc");
478
479 return create_new_frame (argv[0], argv[1]);
a70dc898
RP
480}
481
bd5635a1 482
0f552c5f
JG
483CORE_ADDR
484mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
bd5635a1
RP
485 int nargs;
486 value *args;
487 CORE_ADDR sp;
488 int struct_return;
489 CORE_ADDR struct_addr;
490{
491 CORE_ADDR buf;
492 register i;
493 int accumulate_size = struct_return ? 4 : 0;
494 struct mips_arg { char *contents; int len; int offset; };
495 struct mips_arg *mips_args =
496 (struct mips_arg*)alloca(nargs * sizeof(struct mips_arg));
497 register struct mips_arg *m_arg;
498 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
499 extern value value_arg_coerce();
500 value arg = value_arg_coerce (args[i]);
501 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
502 /* This entire mips-specific routine is because doubles must be aligned
503 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
504 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
505 * breaks their varargs implementation...). A correct solution
506 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
507 * in stdarg.h/varargs.h).
508 */
509 if (m_arg->len > 4) accumulate_size = (accumulate_size + 7) & -8;
510 m_arg->offset = accumulate_size;
511 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
512 m_arg->contents = VALUE_CONTENTS(arg);
513 }
514 accumulate_size = (accumulate_size + 7) & (-8);
515 if (accumulate_size < 16) accumulate_size = 16;
516 sp -= accumulate_size;
517 for (i = nargs; m_arg--, --i >= 0; )
518 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
519 if (struct_return) {
520 buf = struct_addr;
a70dc898
RP
521 write_memory(sp, (char *)&buf, sizeof(CORE_ADDR));
522 }
bd5635a1
RP
523 return sp;
524}
525
526/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
527#define MASK(i,j) ((1 << (j)+1)-1 ^ (1 << (i))-1)
528
529void
530mips_push_dummy_frame()
531{
532 int ireg;
533 struct linked_proc_info *link = (struct linked_proc_info*)
534 xmalloc(sizeof(struct linked_proc_info));
535 mips_extra_func_info_t proc_desc = &link->info;
536 CORE_ADDR sp = read_register (SP_REGNUM);
537 CORE_ADDR save_address;
538 REGISTER_TYPE buffer;
539 link->next = linked_proc_desc_table;
540 linked_proc_desc_table = link;
541#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
542#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
543#define GEN_REG_SAVE_COUNT 22
544#define FLOAT_REG_SAVE_MASK MASK(0,19)
545#define FLOAT_REG_SAVE_COUNT 20
546#define SPECIAL_REG_SAVE_COUNT 4
547 /*
548 * The registers we must save are all those not preserved across
549 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
550 * In addition, we must save the PC, and PUSH_FP_REGNUM.
551 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
552 *
553 * Dummy frame layout:
554 * (high memory)
555 * Saved PC
556 * Saved MMHI, MMLO, FPC_CSR
557 * Saved R31
558 * Saved R28
559 * ...
560 * Saved R1
561 * Saved D18 (i.e. F19, F18)
562 * ...
563 * Saved D0 (i.e. F1, F0)
c2a0f1cb 564 * CALL_DUMMY (subroutine stub; see tm-mips.h)
bd5635a1
RP
565 * Parameter build area (not yet implemented)
566 * (low memory)
567 */
568 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
c2a0f1cb 569 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
bd5635a1
RP
570 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
571 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
572 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
573 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
574 /* save general registers */
575 save_address = sp + PROC_REG_OFFSET(proc_desc);
576 for (ireg = 32; --ireg >= 0; )
577 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
578 {
579 buffer = read_register (ireg);
a70dc898 580 write_memory (save_address, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1
RP
581 save_address -= 4;
582 }
0b0d6c3f
PS
583 /* save floating-points registers starting with high order word */
584 save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
bd5635a1
RP
585 for (ireg = 32; --ireg >= 0; )
586 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
587 {
7d9884b9 588 buffer = read_register (ireg + FP0_REGNUM);
a70dc898 589 write_memory (save_address, (char *)&buffer, 4);
bd5635a1
RP
590 save_address -= 4;
591 }
592 write_register (PUSH_FP_REGNUM, sp);
593 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
594 PROC_FRAME_OFFSET(proc_desc) = 0;
595 buffer = read_register (PC_REGNUM);
a70dc898 596 write_memory (sp - 4, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 597 buffer = read_register (HI_REGNUM);
a70dc898 598 write_memory (sp - 8, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 599 buffer = read_register (LO_REGNUM);
a70dc898 600 write_memory (sp - 12, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb 601 buffer = read_register (mips_fpu ? FCRCS_REGNUM : ZERO_REGNUM);
a70dc898 602 write_memory (sp - 16, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb
ILT
603 sp -= 4 * (GEN_REG_SAVE_COUNT
604 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
605 + SPECIAL_REG_SAVE_COUNT);
bd5635a1
RP
606 write_register (SP_REGNUM, sp);
607 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
608 PROC_HIGH_ADDR(proc_desc) = sp;
609 SET_PROC_DESC_IS_DUMMY(proc_desc);
610 PROC_PC_REG(proc_desc) = RA_REGNUM;
611}
612
613void
614mips_pop_frame()
dac4929a
SG
615{
616 register int regnum;
bd5635a1
RP
617 FRAME frame = get_current_frame ();
618 CORE_ADDR new_sp = frame->frame;
dac4929a 619
a70dc898 620 mips_extra_func_info_t proc_desc = frame->proc_desc;
dac4929a
SG
621
622 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
623 if (proc_desc)
624 {
625 for (regnum = 32; --regnum >= 0; )
626 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
627 write_register (regnum,
628 read_memory_integer (frame->saved_regs->regs[regnum],
629 4));
630 for (regnum = 32; --regnum >= 0; )
631 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
632 write_register (regnum + FP0_REGNUM,
633 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
634 }
635 write_register (SP_REGNUM, new_sp);
636 flush_cached_frames ();
637 /* We let mips_init_extra_frame_info figure out the frame pointer */
638 set_current_frame (create_new_frame (0, read_pc ()));
639
199b2450 640 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
bd5635a1 641 {
dac4929a
SG
642 struct linked_proc_info *pi_ptr, *prev_ptr;
643
644 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
645 pi_ptr != NULL;
646 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
647 {
648 if (&pi_ptr->info == proc_desc)
649 break;
650 }
651
652 if (pi_ptr == NULL)
653 error ("Can't locate dummy extra frame info\n");
654
655 if (prev_ptr != NULL)
656 prev_ptr->next = pi_ptr->next;
657 else
658 linked_proc_desc_table = pi_ptr->next;
659
660 free (pi_ptr);
661
bd5635a1
RP
662 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
663 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
c2a0f1cb
ILT
664 if (mips_fpu)
665 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
bd5635a1 666 }
bd5635a1
RP
667}
668
0f552c5f 669static void
a70dc898 670mips_print_register (regnum, all)
bd5635a1
RP
671 int regnum, all;
672{
48be4c35
JK
673 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
674 REGISTER_TYPE val;
bd5635a1 675
48be4c35
JK
676 /* Get the data in raw format. */
677 if (read_relative_register_raw_bytes (regnum, raw_buffer))
678 {
679 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
680 return;
681 }
682
683 /* If an even floating pointer register, also print as double. */
684 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
685 && !((regnum-FP0_REGNUM) & 1)) {
686 char dbuffer[MAX_REGISTER_RAW_SIZE];
687
688 read_relative_register_raw_bytes (regnum, dbuffer);
689 read_relative_register_raw_bytes (regnum+1, dbuffer+4);
ac8cf67d 690#ifdef REGISTER_CONVERT_TO_TYPE
48be4c35 691 REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer);
ac8cf67d 692#endif
48be4c35
JK
693 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
694 val_print (builtin_type_double, dbuffer, 0,
199b2450 695 gdb_stdout, 0, 1, 0, Val_pretty_default);
48be4c35
JK
696 printf_filtered ("); ");
697 }
199b2450 698 fputs_filtered (reg_names[regnum], gdb_stdout);
48be4c35
JK
699
700 /* The problem with printing numeric register names (r26, etc.) is that
701 the user can't use them on input. Probably the best solution is to
702 fix it so that either the numeric or the funky (a2, etc.) names
703 are accepted on input. */
704 if (regnum < 32)
705 printf_filtered ("(r%d): ", regnum);
706 else
707 printf_filtered (": ");
bd5635a1 708
48be4c35
JK
709 /* If virtual format is floating, print it that way. */
710 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
711 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
712 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
199b2450 713 gdb_stdout, 0, 1, 0, Val_pretty_default);
48be4c35
JK
714 }
715 /* Else print as integer in hex. */
716 else
717 {
718 long val;
bd5635a1 719
48be4c35
JK
720 val = extract_signed_integer (raw_buffer,
721 REGISTER_RAW_SIZE (regnum));
34df79fc 722
48be4c35
JK
723 if (val == 0)
724 printf_filtered ("0");
725 else if (all)
726 /* FIXME: We should be printing this in a fixed field width, so that
727 registers line up. */
728 printf_filtered (local_hex_format(), val);
729 else
199b2450 730 printf_filtered ("%s=%ld", local_hex_string(val), val);
48be4c35 731 }
bd5635a1
RP
732}
733
d8b3b00e 734/* Replacement for generic do_registers_info. */
0f552c5f 735void
361bf6ee 736mips_do_registers_info (regnum, fpregs)
bd5635a1 737 int regnum;
361bf6ee 738 int fpregs;
bd5635a1
RP
739{
740 if (regnum != -1) {
741 mips_print_register (regnum, 0);
742 printf_filtered ("\n");
743 }
744 else {
745 for (regnum = 0; regnum < NUM_REGS; ) {
d8b3b00e
JG
746 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
747 regnum++;
748 continue;
749 }
bd5635a1
RP
750 mips_print_register (regnum, 1);
751 regnum++;
752 if ((regnum & 3) == 0 || regnum == NUM_REGS)
753 printf_filtered (";\n");
754 else
755 printf_filtered ("; ");
756 }
757 }
758}
759/* Return number of args passed to a frame. described by FIP.
760 Can return -1, meaning no way to tell. */
761
0f552c5f 762int
bd5635a1
RP
763mips_frame_num_args(fip)
764 FRAME fip;
765{
766#if 0
767 struct chain_info_t *p;
768
769 p = mips_find_cached_frame(FRAME_FP(fip));
770 if (p->valid)
771 return p->the_info.numargs;
772#endif
773 return -1;
774}
407a8389 775\f
427fec5d 776/* Is this a branch with a delay slot? */
ee5fb959
JK
777static int
778is_delayed (insn)
779 unsigned long insn;
780{
781 int i;
782 for (i = 0; i < NUMOPCODES; ++i)
783 if (mips_opcodes[i].pinfo != INSN_MACRO
784 && (insn & mips_opcodes[i].mask) == mips_opcodes[i].match)
785 break;
427fec5d
JK
786 return (i < NUMOPCODES
787 && (mips_opcodes[i].pinfo & (INSN_UNCOND_BRANCH_DELAY
788 | INSN_COND_BRANCH_DELAY
789 | INSN_COND_BRANCH_LIKELY)));
ee5fb959
JK
790}
791
792/* To skip prologues, I use this predicate. Returns either PC itself
793 if the code at PC does not look like a function prologue; otherwise
794 returns an address that (if we're lucky) follows the prologue. If
795 LENIENT, then we must skip everything which is involved in setting
796 up the frame (it's OK to skip more, just so long as we don't skip
797 anything which might clobber the registers which are being saved.
798 We must skip more in the case where part of the prologue is in the
799 delay slot of a non-prologue instruction). */
bd5635a1 800
be772100 801CORE_ADDR
ee5fb959 802mips_skip_prologue (pc, lenient)
bd5635a1 803 CORE_ADDR pc;
ee5fb959 804 int lenient;
bd5635a1
RP
805{
806 struct symbol *f;
807 struct block *b;
808 unsigned long inst;
d747e0af 809 int offset;
0b0d6c3f 810 int seen_sp_adjust = 0;
bd5635a1 811
e157305c
PS
812 /* Skip the typical prologue instructions. These are the stack adjustment
813 instruction and the instructions that save registers on the stack
814 or in the gcc frame. */
ee5fb959
JK
815 for (offset = 0; offset < 100; offset += 4)
816 {
817 char buf[4];
818 int status;
819
820 status = read_memory_nobpt (pc + offset, buf, 4);
821 if (status)
822 memory_error (status, pc + offset);
823 inst = extract_unsigned_integer (buf, 4);
824
825 if (lenient && is_delayed (inst))
826 continue;
827
e157305c 828 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
0b0d6c3f 829 seen_sp_adjust = 1;
e157305c
PS
830 else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000))
831 continue; /* sw reg,n($sp) */
832 /* reg != $zero */
833 else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
834 continue;
835 else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000))
836 /* sx reg,n($s8) */
837 continue; /* reg != $zero */
838 else if (inst == 0x03A0F021) /* move $s8,$sp */
0b0d6c3f 839 continue;
1b71de8e
PS
840 else if ((inst & 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
841 continue;
0b0d6c3f 842 else
e157305c 843 break;
d747e0af 844 }
e157305c
PS
845 return pc + offset;
846
847/* FIXME schauer. The following code seems no longer necessary if we
848 always skip the typical prologue instructions. */
849
850#if 0
0b0d6c3f
PS
851 if (seen_sp_adjust)
852 return pc + offset;
bd5635a1
RP
853
854 /* Well, it looks like a frameless. Let's make sure.
855 Note that we are not called on the current PC,
856 but on the function`s start PC, and I have definitely
857 seen optimized code that adjusts the SP quite later */
858 b = block_for_pc(pc);
859 if (!b) return pc;
860
dac4929a 861 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
bd5635a1
RP
862 if (!f) return pc;
863 /* Ideally, I would like to use the adjusted info
864 from mips_frame_info(), but for all practical
865 purposes it will not matter (and it would require
866 a different definition of SKIP_PROLOGUE())
867
868 Actually, it would not hurt to skip the storing
869 of arguments on the stack as well. */
0f552c5f 870 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
bd5635a1
RP
871 return pc + 4;
872
873 return pc;
e157305c 874#endif
bd5635a1 875}
c2a0f1cb 876
ee5fb959
JK
877/* Is address PC in the prologue (loosely defined) for function at
878 STARTADDR? */
879
880static int
881mips_in_lenient_prologue (startaddr, pc)
882 CORE_ADDR startaddr;
883 CORE_ADDR pc;
884{
885 CORE_ADDR end_prologue = mips_skip_prologue (startaddr, 1);
886 return pc >= startaddr && pc < end_prologue;
887}
888
ac8cf67d
PS
889/* Given a return value in `regbuf' with a type `valtype',
890 extract and copy its value into `valbuf'. */
891void
892mips_extract_return_value (valtype, regbuf, valbuf)
893 struct type *valtype;
894 char regbuf[REGISTER_BYTES];
895 char *valbuf;
896{
897 int regnum;
898
899 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
900
901 memcpy (valbuf, regbuf + REGISTER_BYTE (regnum), TYPE_LENGTH (valtype));
902#ifdef REGISTER_CONVERT_TO_TYPE
903 REGISTER_CONVERT_TO_TYPE(regnum, valtype, valbuf);
904#endif
905}
906
907/* Given a return value in `regbuf' with a type `valtype',
908 write it's value into the appropriate register. */
909void
910mips_store_return_value (valtype, valbuf)
911 struct type *valtype;
912 char *valbuf;
913{
914 int regnum;
915 char raw_buffer[MAX_REGISTER_RAW_SIZE];
916
917 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
918 memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
919
920#ifdef REGISTER_CONVERT_FROM_TYPE
921 REGISTER_CONVERT_FROM_TYPE(regnum, valtype, raw_buffer);
922#endif
923
924 write_register_bytes(REGISTER_BYTE (regnum), raw_buffer, TYPE_LENGTH (valtype));
925}
926
8b52d486 927static void reinit_frame_cache_sfunc PARAMS ((char *, int,
427fec5d
JK
928 struct cmd_list_element *));
929
930/* Just like reinit_frame_cache, but with the right arguments to be
931 callable as an sfunc. */
932static void
933reinit_frame_cache_sfunc (args, from_tty, c)
934 char *args;
935 int from_tty;
936 struct cmd_list_element *c;
937{
938 reinit_frame_cache ();
939}
c2a0f1cb
ILT
940
941void
942_initialize_mips_tdep ()
943{
427fec5d
JK
944 struct cmd_list_element *c;
945
946 /* Let the user turn off floating point and set the fence post for
947 heuristic_proc_start. */
948
c2a0f1cb 949 add_show_from_set
a8172eea 950 (add_set_cmd ("mipsfpu", class_support, var_boolean,
c2a0f1cb
ILT
951 (char *) &mips_fpu,
952 "Set use of floating point coprocessor.\n\
953Turn off to avoid using floating point instructions when calling functions\n\
954or dealing with return values.", &setlist),
955 &showlist);
3127785a 956
bdef72d2
JK
957 /* We really would like to have both "0" and "unlimited" work, but
958 command.c doesn't deal with that. So make it a var_zinteger
959 because the user can always use "999999" or some such for unlimited. */
960 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
427fec5d
JK
961 (char *) &heuristic_fence_post,
962 "\
23d35572
JK
963Set the distance searched for the start of a function.\n\
964If you are debugging a stripped executable, GDB needs to search through the\n\
965program for the start of a function. This command sets the distance of the\n\
966search. The only need to set it is when debugging a stripped executable.",
427fec5d
JK
967 &setlist);
968 /* We need to throw away the frame cache when we set this, since it
969 might change our ability to get backtraces. */
970 c->function.sfunc = reinit_frame_cache_sfunc;
971 add_show_from_set (c, &showlist);
c2a0f1cb 972}
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