Fri Mar 12 09:33:23 1993 Jim Kingdon (kingdon@cygnus.com)
[deliverable/binutils-gdb.git] / gdb / mips-tdep.c
CommitLineData
7d9884b9 1/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
c2a0f1cb 2 Copyright 1988, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
bd5635a1
RP
3 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
4 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
6This file is part of GDB.
7
361bf6ee 8This program is free software; you can redistribute it and/or modify
bd5635a1 9it under the terms of the GNU General Public License as published by
361bf6ee
JG
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
bd5635a1 12
361bf6ee 13This program is distributed in the hope that it will be useful,
bd5635a1
RP
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
361bf6ee
JG
19along with this program; if not, write to the Free Software
20Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
bd5635a1 21
bd5635a1 22#include "defs.h"
bd5635a1
RP
23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "value.h"
27#include "gdbcmd.h"
ef08856f 28#include "language.h"
bd5635a1
RP
29
30#ifdef USG
31#include <sys/types.h>
32#endif
33
34#include <sys/param.h>
35#include <sys/dir.h>
36#include <signal.h>
37#include <sys/ioctl.h>
38
39#include "gdbcore.h"
62a469e1
SG
40#include "symfile.h"
41#include "objfiles.h"
bd5635a1
RP
42
43#ifndef MIPSMAGIC
44#ifdef MIPSEL
45#define MIPSMAGIC MIPSELMAGIC
46#else
47#define MIPSMAGIC MIPSEBMAGIC
48#endif
49#endif
50
51#define VM_MIN_ADDRESS (unsigned)0x400000
52
53#include <sys/user.h> /* After a.out.h */
54#include <sys/file.h>
55#include <sys/stat.h>
56
57\f
c2a0f1cb
ILT
58/* Some MIPS boards don't support floating point, so we permit the
59 user to turn it off. */
60int mips_fpu = 1;
61
0f552c5f
JG
62#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
63#define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
64#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
65#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
66#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
67#define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
68#define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
69#define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
70#define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
71#define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
bd5635a1 72#define _PROC_MAGIC_ 0x0F0F0F0F
0f552c5f
JG
73#define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
74#define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
bd5635a1
RP
75
76struct linked_proc_info
77{
78 struct mips_extra_func_info info;
79 struct linked_proc_info *next;
dac4929a 80} *linked_proc_desc_table = NULL;
bd5635a1
RP
81
82\f
83#define READ_FRAME_REG(fi, regno) read_next_frame_reg((fi)->next, regno)
84
0f552c5f 85static int
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RP
86read_next_frame_reg(fi, regno)
87 FRAME fi;
88 int regno;
89{
90#define SIGFRAME_BASE sizeof(struct sigcontext)
91#define SIGFRAME_PC_OFF (-SIGFRAME_BASE+ 2*sizeof(int))
92#define SIGFRAME_SP_OFF (-SIGFRAME_BASE+32*sizeof(int))
93#define SIGFRAME_RA_OFF (-SIGFRAME_BASE+34*sizeof(int))
94 for (; fi; fi = fi->next)
95 if (in_sigtramp(fi->pc, 0)) {
96 /* No idea if this code works. --PB. */
97 int offset;
98 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
99 else if (regno == RA_REGNUM) offset = SIGFRAME_RA_OFF;
100 else if (regno == SP_REGNUM) offset = SIGFRAME_SP_OFF;
101 else return 0;
102 return read_memory_integer(fi->frame + offset, 4);
103 }
104 else if (regno == SP_REGNUM) return fi->frame;
105 else if (fi->saved_regs->regs[regno])
106 return read_memory_integer(fi->saved_regs->regs[regno], 4);
107 return read_register(regno);
108}
109
110int
111mips_frame_saved_pc(frame)
112 FRAME frame;
113{
0f552c5f 114 mips_extra_func_info_t proc_desc = frame->proc_desc;
bd5635a1 115 int pcreg = proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM;
0f552c5f 116
bd5635a1
RP
117 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
118 return read_memory_integer(frame->frame - 4, 4);
0f552c5f 119
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RP
120 return read_next_frame_reg(frame, pcreg);
121}
122
123static struct mips_extra_func_info temp_proc_desc;
124static struct frame_saved_regs temp_saved_regs;
125
0f552c5f
JG
126static CORE_ADDR
127heuristic_proc_start(pc)
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RP
128 CORE_ADDR pc;
129{
bd5635a1 130 CORE_ADDR start_pc = pc;
5e2e79f8 131 CORE_ADDR fence = start_pc - 200;
0f552c5f
JG
132
133 if (start_pc == 0) return 0;
bd5635a1 134 if (fence < VM_MIN_ADDRESS) fence = VM_MIN_ADDRESS;
0f552c5f 135
bd5635a1
RP
136 /* search back for previous return */
137 for (start_pc -= 4; ; start_pc -= 4)
138 if (start_pc < fence) return 0;
139 else if (ABOUT_TO_RETURN(start_pc))
140 break;
141
142 start_pc += 8; /* skip return, and its delay slot */
143#if 0
144 /* skip nops (usually 1) 0 - is this */
145 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
146 start_pc += 4;
147#endif
148 return start_pc;
149}
150
0f552c5f 151static mips_extra_func_info_t
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RP
152heuristic_proc_desc(start_pc, limit_pc, next_frame)
153 CORE_ADDR start_pc, limit_pc;
154 FRAME next_frame;
155{
156 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
157 CORE_ADDR cur_pc;
158 int frame_size;
159 int has_frame_reg = 0;
160 int reg30; /* Value of $r30. Used by gcc for frame-pointer */
161 unsigned long reg_mask = 0;
162
163 if (start_pc == 0) return NULL;
164 bzero(&temp_proc_desc, sizeof(temp_proc_desc));
165 bzero(&temp_saved_regs, sizeof(struct frame_saved_regs));
a70dc898
RP
166 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
167
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RP
168 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
169 restart:
170 frame_size = 0;
171 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
172 unsigned long word;
173 int status;
174
a70dc898 175 status = read_memory_nobpt (cur_pc, (char *)&word, 4);
bd5635a1 176 if (status) memory_error (status, cur_pc);
5e2e79f8 177 SWAP_TARGET_AND_HOST (&word, sizeof (word));
bd5635a1
RP
178 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
179 frame_size += (-word) & 0xFFFF;
180 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
181 frame_size += (-word) & 0xFFFF;
182 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
183 int reg = (word & 0x001F0000) >> 16;
184 reg_mask |= 1 << reg;
185 temp_saved_regs.regs[reg] = sp + (short)word;
186 }
187 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
188 if ((unsigned short)word != frame_size)
189 reg30 = sp + (unsigned short)word;
190 else if (!has_frame_reg) {
191 int alloca_adjust;
192 has_frame_reg = 1;
193 reg30 = read_next_frame_reg(next_frame, 30);
194 alloca_adjust = reg30 - (sp + (unsigned short)word);
195 if (alloca_adjust > 0) {
196 /* FP > SP + frame_size. This may be because
197 /* of an alloca or somethings similar.
198 * Fix sp to "pre-alloca" value, and try again.
199 */
200 sp += alloca_adjust;
201 goto restart;
202 }
203 }
204 }
205 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
206 int reg = (word & 0x001F0000) >> 16;
207 reg_mask |= 1 << reg;
208 temp_saved_regs.regs[reg] = reg30 + (short)word;
209 }
210 }
211 if (has_frame_reg) {
212 PROC_FRAME_REG(&temp_proc_desc) = 30;
213 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
214 }
215 else {
216 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
217 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
218 }
219 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
220 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
221 return &temp_proc_desc;
222}
223
0f552c5f 224static mips_extra_func_info_t
bd5635a1
RP
225find_proc_desc(pc, next_frame)
226 CORE_ADDR pc;
227 FRAME next_frame;
228{
229 mips_extra_func_info_t proc_desc;
0f552c5f 230 struct block *b = block_for_pc(pc);
bd5635a1 231 struct symbol *sym =
dac4929a 232 b ? lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL) : NULL;
0f552c5f
JG
233
234 if (sym)
bd5635a1
RP
235 {
236 /* IF this is the topmost frame AND
237 * (this proc does not have debugging information OR
238 * the PC is in the procedure prologue)
be772100 239 * THEN create a "heuristic" proc_desc (by analyzing
bd5635a1
RP
240 * the actual code) to replace the "official" proc_desc.
241 */
0f552c5f 242 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
bd5635a1
RP
243 if (next_frame == NULL) {
244 struct symtab_and_line val;
245 struct symbol *proc_symbol =
246 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
0f552c5f 247
bd5635a1
RP
248 if (proc_symbol) {
249 val = find_pc_line (BLOCK_START
250 (SYMBOL_BLOCK_VALUE(proc_symbol)),
251 0);
252 val.pc = val.end ? val.end : pc;
253 }
254 if (!proc_symbol || pc < val.pc) {
255 mips_extra_func_info_t found_heuristic =
256 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
257 pc, next_frame);
258 if (found_heuristic) proc_desc = found_heuristic;
259 }
260 }
261 }
262 else
263 {
0f552c5f
JG
264 /* Is linked_proc_desc_table really necessary? It only seems to be used
265 by procedure call dummys. However, the procedures being called ought
266 to have their own proc_descs, and even if they don't,
267 heuristic_proc_desc knows how to create them! */
268
bd5635a1
RP
269 register struct linked_proc_info *link;
270 for (link = linked_proc_desc_table; link; link = link->next)
271 if (PROC_LOW_ADDR(&link->info) <= pc
272 && PROC_HIGH_ADDR(&link->info) > pc)
273 return &link->info;
274 proc_desc =
275 heuristic_proc_desc(heuristic_proc_start(pc), pc, next_frame);
276 }
277 return proc_desc;
278}
279
280mips_extra_func_info_t cached_proc_desc;
281
0f552c5f
JG
282FRAME_ADDR
283mips_frame_chain(frame)
bd5635a1
RP
284 FRAME frame;
285{
bd5635a1
RP
286 mips_extra_func_info_t proc_desc;
287 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
be772100 288
0f552c5f
JG
289 if (saved_pc == 0 || inside_entry_file (saved_pc))
290 return 0;
291
bd5635a1 292 proc_desc = find_proc_desc(saved_pc, frame);
0f552c5f
JG
293 if (!proc_desc)
294 return 0;
295
bd5635a1
RP
296 cached_proc_desc = proc_desc;
297 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
0f552c5f 298 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
299}
300
301void
302init_extra_frame_info(fci)
303 struct frame_info *fci;
304{
305 extern struct obstack frame_cache_obstack;
306 /* Use proc_desc calculated in frame_chain */
307 mips_extra_func_info_t proc_desc = fci->next ? cached_proc_desc :
308 find_proc_desc(fci->pc, fci->next);
0f552c5f 309
bd5635a1
RP
310 fci->saved_regs = (struct frame_saved_regs*)
311 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
312 bzero(fci->saved_regs, sizeof(struct frame_saved_regs));
313 fci->proc_desc =
0f552c5f 314 proc_desc == &temp_proc_desc ? 0 : proc_desc;
bd5635a1
RP
315 if (proc_desc)
316 {
317 int ireg;
318 CORE_ADDR reg_position;
319 unsigned long mask;
320 /* r0 bit means kernel trap */
321 int kernel_trap = PROC_REG_MASK(proc_desc) & 1;
322
c2a0f1cb
ILT
323 /* Fixup frame-pointer - only needed for top frame */
324 /* This may not be quite right, if proc has a real frame register */
325 if (fci->pc == PROC_LOW_ADDR(proc_desc))
326 fci->frame = read_register (SP_REGNUM);
327 else
328 fci->frame = READ_FRAME_REG(fci, PROC_FRAME_REG(proc_desc))
329 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
330
331 if (proc_desc == &temp_proc_desc)
332 *fci->saved_regs = temp_saved_regs;
333 else
334 {
335 /* find which general-purpose registers were saved */
336 reg_position = fci->frame + PROC_REG_OFFSET(proc_desc);
337 mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
338 for (ireg= 31; mask; --ireg, mask <<= 1)
339 if (mask & 0x80000000)
340 {
341 fci->saved_regs->regs[ireg] = reg_position;
342 reg_position -= 4;
343 }
344 /* find which floating-point registers were saved */
345 reg_position = fci->frame + PROC_FREG_OFFSET(proc_desc);
346 /* The freg_offset points to where the first *double* register is saved.
347 * So skip to the high-order word. */
348 reg_position += 4;
349 mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
350 for (ireg = 31; mask; --ireg, mask <<= 1)
351 if (mask & 0x80000000)
352 {
d747e0af 353 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
bd5635a1
RP
354 reg_position -= 4;
355 }
356 }
357
358 /* hack: if argument regs are saved, guess these contain args */
359 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
360 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
361 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
362 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
363 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
364
365 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
366 }
bd5635a1
RP
367}
368
a70dc898
RP
369/* MIPS stack frames are almost impenetrable. When execution stops,
370 we basically have to look at symbol information for the function
371 that we stopped in, which tells us *which* register (if any) is
372 the base of the frame pointer, and what offset from that register
373 the frame itself is at.
374
375 This presents a problem when trying to examine a stack in memory
376 (that isn't executing at the moment), using the "frame" command. We
377 don't have a PC, nor do we have any registers except SP.
378
379 This routine takes two arguments, SP and PC, and tries to make the
380 cached frames look as if these two arguments defined a frame on the
381 cache. This allows the rest of info frame to extract the important
382 arguments without difficulty. */
383
384FRAME
c2a0f1cb
ILT
385setup_arbitrary_frame (argc, argv)
386 int argc;
387 FRAME_ADDR *argv;
a70dc898 388{
c2a0f1cb
ILT
389 if (argc != 2)
390 error ("MIPS frame specifications require two arguments: sp and pc");
391
392 return create_new_frame (argv[0], argv[1]);
a70dc898
RP
393}
394
bd5635a1 395
0f552c5f
JG
396CORE_ADDR
397mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
bd5635a1
RP
398 int nargs;
399 value *args;
400 CORE_ADDR sp;
401 int struct_return;
402 CORE_ADDR struct_addr;
403{
404 CORE_ADDR buf;
405 register i;
406 int accumulate_size = struct_return ? 4 : 0;
407 struct mips_arg { char *contents; int len; int offset; };
408 struct mips_arg *mips_args =
409 (struct mips_arg*)alloca(nargs * sizeof(struct mips_arg));
410 register struct mips_arg *m_arg;
411 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
412 extern value value_arg_coerce();
413 value arg = value_arg_coerce (args[i]);
414 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
415 /* This entire mips-specific routine is because doubles must be aligned
416 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
417 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
418 * breaks their varargs implementation...). A correct solution
419 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
420 * in stdarg.h/varargs.h).
421 */
422 if (m_arg->len > 4) accumulate_size = (accumulate_size + 7) & -8;
423 m_arg->offset = accumulate_size;
424 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
425 m_arg->contents = VALUE_CONTENTS(arg);
426 }
427 accumulate_size = (accumulate_size + 7) & (-8);
428 if (accumulate_size < 16) accumulate_size = 16;
429 sp -= accumulate_size;
430 for (i = nargs; m_arg--, --i >= 0; )
431 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
432 if (struct_return) {
433 buf = struct_addr;
a70dc898
RP
434 write_memory(sp, (char *)&buf, sizeof(CORE_ADDR));
435 }
bd5635a1
RP
436 return sp;
437}
438
439/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
440#define MASK(i,j) ((1 << (j)+1)-1 ^ (1 << (i))-1)
441
442void
443mips_push_dummy_frame()
444{
445 int ireg;
446 struct linked_proc_info *link = (struct linked_proc_info*)
447 xmalloc(sizeof(struct linked_proc_info));
448 mips_extra_func_info_t proc_desc = &link->info;
449 CORE_ADDR sp = read_register (SP_REGNUM);
450 CORE_ADDR save_address;
451 REGISTER_TYPE buffer;
452 link->next = linked_proc_desc_table;
453 linked_proc_desc_table = link;
454#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
455#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
456#define GEN_REG_SAVE_COUNT 22
457#define FLOAT_REG_SAVE_MASK MASK(0,19)
458#define FLOAT_REG_SAVE_COUNT 20
459#define SPECIAL_REG_SAVE_COUNT 4
460 /*
461 * The registers we must save are all those not preserved across
462 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
463 * In addition, we must save the PC, and PUSH_FP_REGNUM.
464 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
465 *
466 * Dummy frame layout:
467 * (high memory)
468 * Saved PC
469 * Saved MMHI, MMLO, FPC_CSR
470 * Saved R31
471 * Saved R28
472 * ...
473 * Saved R1
474 * Saved D18 (i.e. F19, F18)
475 * ...
476 * Saved D0 (i.e. F1, F0)
c2a0f1cb 477 * CALL_DUMMY (subroutine stub; see tm-mips.h)
bd5635a1
RP
478 * Parameter build area (not yet implemented)
479 * (low memory)
480 */
481 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
c2a0f1cb 482 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
bd5635a1
RP
483 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
484 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
485 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
486 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
487 /* save general registers */
488 save_address = sp + PROC_REG_OFFSET(proc_desc);
489 for (ireg = 32; --ireg >= 0; )
490 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
491 {
492 buffer = read_register (ireg);
a70dc898 493 write_memory (save_address, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1
RP
494 save_address -= 4;
495 }
496 /* save floating-points registers */
497 save_address = sp + PROC_FREG_OFFSET(proc_desc);
498 for (ireg = 32; --ireg >= 0; )
499 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
500 {
7d9884b9 501 buffer = read_register (ireg + FP0_REGNUM);
a70dc898 502 write_memory (save_address, (char *)&buffer, 4);
bd5635a1
RP
503 save_address -= 4;
504 }
505 write_register (PUSH_FP_REGNUM, sp);
506 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
507 PROC_FRAME_OFFSET(proc_desc) = 0;
508 buffer = read_register (PC_REGNUM);
a70dc898 509 write_memory (sp - 4, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 510 buffer = read_register (HI_REGNUM);
a70dc898 511 write_memory (sp - 8, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 512 buffer = read_register (LO_REGNUM);
a70dc898 513 write_memory (sp - 12, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb 514 buffer = read_register (mips_fpu ? FCRCS_REGNUM : ZERO_REGNUM);
a70dc898 515 write_memory (sp - 16, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb
ILT
516 sp -= 4 * (GEN_REG_SAVE_COUNT
517 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
518 + SPECIAL_REG_SAVE_COUNT);
bd5635a1
RP
519 write_register (SP_REGNUM, sp);
520 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
521 PROC_HIGH_ADDR(proc_desc) = sp;
522 SET_PROC_DESC_IS_DUMMY(proc_desc);
523 PROC_PC_REG(proc_desc) = RA_REGNUM;
524}
525
526void
527mips_pop_frame()
dac4929a
SG
528{
529 register int regnum;
bd5635a1
RP
530 FRAME frame = get_current_frame ();
531 CORE_ADDR new_sp = frame->frame;
dac4929a 532
a70dc898 533 mips_extra_func_info_t proc_desc = frame->proc_desc;
dac4929a
SG
534
535 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
536 if (proc_desc)
537 {
538 for (regnum = 32; --regnum >= 0; )
539 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
540 write_register (regnum,
541 read_memory_integer (frame->saved_regs->regs[regnum],
542 4));
543 for (regnum = 32; --regnum >= 0; )
544 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
545 write_register (regnum + FP0_REGNUM,
546 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
547 }
548 write_register (SP_REGNUM, new_sp);
549 flush_cached_frames ();
550 /* We let mips_init_extra_frame_info figure out the frame pointer */
551 set_current_frame (create_new_frame (0, read_pc ()));
552
bd5635a1
RP
553 if (PROC_DESC_IS_DUMMY(proc_desc))
554 {
dac4929a
SG
555 struct linked_proc_info *pi_ptr, *prev_ptr;
556
557 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
558 pi_ptr != NULL;
559 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
560 {
561 if (&pi_ptr->info == proc_desc)
562 break;
563 }
564
565 if (pi_ptr == NULL)
566 error ("Can't locate dummy extra frame info\n");
567
568 if (prev_ptr != NULL)
569 prev_ptr->next = pi_ptr->next;
570 else
571 linked_proc_desc_table = pi_ptr->next;
572
573 free (pi_ptr);
574
bd5635a1
RP
575 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
576 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
c2a0f1cb
ILT
577 if (mips_fpu)
578 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
bd5635a1 579 }
bd5635a1
RP
580}
581
0f552c5f 582static void
a70dc898 583mips_print_register (regnum, all)
bd5635a1
RP
584 int regnum, all;
585{
a70dc898 586 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE * 2]; /* *2 for doubles */
bd5635a1
RP
587 REGISTER_TYPE val;
588
5e2e79f8
FF
589 /* Get the data in raw format. */
590 if (read_relative_register_raw_bytes (regnum, raw_buffer))
591 {
592 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
593 return;
594 }
595
d747e0af
MT
596 /* If an even floating pointer register, also print as double. */
597 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
598 && !((regnum-FP0_REGNUM) & 1)) {
bd5635a1 599 read_relative_register_raw_bytes (regnum+1, raw_buffer+4);
d747e0af 600 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
bd5635a1
RP
601 val_print (builtin_type_double, raw_buffer, 0,
602 stdout, 0, 1, 0, Val_pretty_default);
d747e0af 603 printf_filtered ("); ");
bd5635a1
RP
604 }
605 fputs_filtered (reg_names[regnum], stdout);
606#ifndef NUMERIC_REG_NAMES
607 if (regnum < 32)
608 printf_filtered ("(r%d): ", regnum);
609 else
610#endif
611 printf_filtered (": ");
612
613 /* If virtual format is floating, print it that way. */
614 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
615 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
616 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
617 stdout, 0, 1, 0, Val_pretty_default);
618 }
619 /* Else print as integer in hex. */
620 else
621 {
622 long val;
623
624 bcopy (raw_buffer, &val, sizeof (long));
5e2e79f8 625 SWAP_TARGET_AND_HOST ((char *)&val, sizeof (long));
bd5635a1
RP
626 if (val == 0)
627 printf_filtered ("0");
628 else if (all)
d8b3b00e 629 printf_filtered (local_hex_format(), val);
bd5635a1 630 else
d8b3b00e 631 printf_filtered ("%s=%d", local_hex_string(val), val);
bd5635a1
RP
632 }
633}
634
d8b3b00e 635/* Replacement for generic do_registers_info. */
0f552c5f 636void
361bf6ee 637mips_do_registers_info (regnum, fpregs)
bd5635a1 638 int regnum;
361bf6ee 639 int fpregs;
bd5635a1
RP
640{
641 if (regnum != -1) {
642 mips_print_register (regnum, 0);
643 printf_filtered ("\n");
644 }
645 else {
646 for (regnum = 0; regnum < NUM_REGS; ) {
d8b3b00e
JG
647 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
648 regnum++;
649 continue;
650 }
bd5635a1
RP
651 mips_print_register (regnum, 1);
652 regnum++;
653 if ((regnum & 3) == 0 || regnum == NUM_REGS)
654 printf_filtered (";\n");
655 else
656 printf_filtered ("; ");
657 }
658 }
659}
660/* Return number of args passed to a frame. described by FIP.
661 Can return -1, meaning no way to tell. */
662
0f552c5f 663int
bd5635a1
RP
664mips_frame_num_args(fip)
665 FRAME fip;
666{
667#if 0
668 struct chain_info_t *p;
669
670 p = mips_find_cached_frame(FRAME_FP(fip));
671 if (p->valid)
672 return p->the_info.numargs;
673#endif
674 return -1;
675}
676
677\f
678/* Bad floats: Returns 0 if P points to a valid IEEE floating point number,
679 1 if P points to a denormalized number or a NaN. LEN says whether this is
680 a single-precision or double-precision float */
681#define SINGLE_EXP_BITS 8
682#define DOUBLE_EXP_BITS 11
683int
684isa_NAN(p, len)
685 int *p, len;
686{
687 int exponent;
688 if (len == 4)
689 {
690 exponent = *p;
691 exponent = exponent << 1 >> (32 - SINGLE_EXP_BITS - 1);
692 return ((exponent == -1) || (! exponent && *p));
693 }
694 else if (len == 8)
695 {
c2a0f1cb
ILT
696#if TARGET_BYTE_ORDER == BIG_ENDIAN
697 exponent = *p;
698#else
bd5635a1 699 exponent = *(p+1);
c2a0f1cb 700#endif
bd5635a1
RP
701 exponent = exponent << 1 >> (32 - DOUBLE_EXP_BITS - 1);
702 return ((exponent == -1) || (! exponent && *p * *(p+1)));
703 }
704 else return 1;
705}
407a8389 706\f
bd5635a1
RP
707/* To skip prologues, I use this predicate. Returns either PC
708 itself if the code at PC does not look like a function prologue,
709 PC+4 if it does (our caller does not need anything more fancy). */
710
be772100
JG
711CORE_ADDR
712mips_skip_prologue(pc)
bd5635a1
RP
713 CORE_ADDR pc;
714{
715 struct symbol *f;
716 struct block *b;
717 unsigned long inst;
d747e0af 718 int offset;
bd5635a1
RP
719
720 /* For -g modules and most functions anyways the
d747e0af
MT
721 first instruction adjusts the stack.
722 But we allow some number of stores before the stack adjustment.
723 (These are emitted by varags functions compiled by gcc-2.0. */
724 for (offset = 0; offset < 100; offset += 4) {
725 inst = read_memory_integer(pc + offset, 4);
726 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
727 return pc + offset + 4;
728 if ((inst & 0xFFE00000) != 0xAFA00000) /* sw reg,n($sp) */
729 break;
730 }
bd5635a1
RP
731
732 /* Well, it looks like a frameless. Let's make sure.
733 Note that we are not called on the current PC,
734 but on the function`s start PC, and I have definitely
735 seen optimized code that adjusts the SP quite later */
736 b = block_for_pc(pc);
737 if (!b) return pc;
738
dac4929a 739 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
bd5635a1
RP
740 if (!f) return pc;
741 /* Ideally, I would like to use the adjusted info
742 from mips_frame_info(), but for all practical
743 purposes it will not matter (and it would require
744 a different definition of SKIP_PROLOGUE())
745
746 Actually, it would not hurt to skip the storing
747 of arguments on the stack as well. */
0f552c5f 748 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
bd5635a1
RP
749 return pc + 4;
750
751 return pc;
752}
c2a0f1cb
ILT
753
754/* Let the user turn off floating point. */
755
756void
757_initialize_mips_tdep ()
758{
759 add_show_from_set
760 (add_set_cmd ("mips_fpu", class_support, var_boolean,
761 (char *) &mips_fpu,
762 "Set use of floating point coprocessor.\n\
763Turn off to avoid using floating point instructions when calling functions\n\
764or dealing with return values.", &setlist),
765 &showlist);
766}
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