try to make hppa opcode table, updated for gas, still be compatible with gdb
[deliverable/binutils-gdb.git] / gdb / mips-tdep.c
CommitLineData
7d9884b9 1/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
c2a0f1cb 2 Copyright 1988, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
bd5635a1
RP
3 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
4 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
6This file is part of GDB.
7
361bf6ee 8This program is free software; you can redistribute it and/or modify
bd5635a1 9it under the terms of the GNU General Public License as published by
361bf6ee
JG
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
bd5635a1 12
361bf6ee 13This program is distributed in the hope that it will be useful,
bd5635a1
RP
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
361bf6ee
JG
19along with this program; if not, write to the Free Software
20Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
bd5635a1 21
bd5635a1 22#include "defs.h"
bd5635a1
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23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "value.h"
27#include "gdbcmd.h"
ef08856f 28#include "language.h"
bd5635a1
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29
30#ifdef USG
31#include <sys/types.h>
32#endif
33
34#include <sys/param.h>
bd5635a1
RP
35#include <signal.h>
36#include <sys/ioctl.h>
37
38#include "gdbcore.h"
62a469e1
SG
39#include "symfile.h"
40#include "objfiles.h"
bd5635a1
RP
41
42#ifndef MIPSMAGIC
43#ifdef MIPSEL
44#define MIPSMAGIC MIPSELMAGIC
45#else
46#define MIPSMAGIC MIPSEBMAGIC
47#endif
48#endif
49
50#define VM_MIN_ADDRESS (unsigned)0x400000
51
52#include <sys/user.h> /* After a.out.h */
53#include <sys/file.h>
54#include <sys/stat.h>
55
56\f
c2a0f1cb
ILT
57/* Some MIPS boards don't support floating point, so we permit the
58 user to turn it off. */
59int mips_fpu = 1;
60
3127785a
RP
61/* Heuristic_proc_start may hunt through the text section for a long
62 time across a 2400 baud serial line. Allows the user to limit this
63 search. */
64static unsigned int heuristic_fence_post = 0;
65
0f552c5f
JG
66#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
67#define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
68#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
69#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
70#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
71#define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
72#define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
73#define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
74#define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
75#define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
bd5635a1 76#define _PROC_MAGIC_ 0x0F0F0F0F
0f552c5f
JG
77#define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
78#define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
bd5635a1
RP
79
80struct linked_proc_info
81{
82 struct mips_extra_func_info info;
83 struct linked_proc_info *next;
dac4929a 84} *linked_proc_desc_table = NULL;
bd5635a1
RP
85
86\f
87#define READ_FRAME_REG(fi, regno) read_next_frame_reg((fi)->next, regno)
88
0f552c5f 89static int
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RP
90read_next_frame_reg(fi, regno)
91 FRAME fi;
92 int regno;
93{
e157305c
PS
94 /* If it is the frame for sigtramp we have a complete sigcontext
95 immediately below the frame and we get the saved registers from there.
96 If the stack layout for sigtramp changes we might have to change these
97 constants and the companion fixup_sigtramp in mipsread.c */
98#define SIGFRAME_BASE 0x12c /* sizeof(sigcontext) */
99#define SIGFRAME_PC_OFF (-SIGFRAME_BASE + 2 * 4)
100#define SIGFRAME_REGSAVE_OFF (-SIGFRAME_BASE + 3 * 4)
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RP
101 for (; fi; fi = fi->next)
102 if (in_sigtramp(fi->pc, 0)) {
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RP
103 int offset;
104 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
e157305c 105 else if (regno < 32) offset = SIGFRAME_REGSAVE_OFF + regno * 4;
bd5635a1
RP
106 else return 0;
107 return read_memory_integer(fi->frame + offset, 4);
108 }
109 else if (regno == SP_REGNUM) return fi->frame;
110 else if (fi->saved_regs->regs[regno])
111 return read_memory_integer(fi->saved_regs->regs[regno], 4);
112 return read_register(regno);
113}
114
115int
116mips_frame_saved_pc(frame)
117 FRAME frame;
118{
0f552c5f 119 mips_extra_func_info_t proc_desc = frame->proc_desc;
bd5635a1 120 int pcreg = proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM;
0f552c5f 121
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RP
122 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
123 return read_memory_integer(frame->frame - 4, 4);
0f552c5f 124
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RP
125 return read_next_frame_reg(frame, pcreg);
126}
127
128static struct mips_extra_func_info temp_proc_desc;
129static struct frame_saved_regs temp_saved_regs;
130
a8172eea
RP
131/* This fencepost looks highly suspicious to me. Removing it also
132 seems suspicious as it could affect remote debugging across serial
3127785a 133 lines. */
a8172eea 134
0f552c5f
JG
135static CORE_ADDR
136heuristic_proc_start(pc)
bd5635a1
RP
137 CORE_ADDR pc;
138{
bd5635a1 139 CORE_ADDR start_pc = pc;
3127785a 140 CORE_ADDR fence = start_pc - heuristic_fence_post;
0f552c5f
JG
141
142 if (start_pc == 0) return 0;
3127785a
RP
143
144 if (heuristic_fence_post == UINT_MAX
145 || fence < VM_MIN_ADDRESS)
146 fence = VM_MIN_ADDRESS;
0f552c5f 147
bd5635a1
RP
148 /* search back for previous return */
149 for (start_pc -= 4; ; start_pc -= 4)
a8172eea
RP
150 if (start_pc < fence)
151 {
3127785a
RP
152 /* It's not clear to me why we reach this point when
153 stop_soon_quietly, but with this test, at least we
154 don't print out warnings for every child forked (eg, on
155 decstation). 22apr93 rich@cygnus.com. */
156 if (!stop_soon_quietly)
157 {
158 if (fence == VM_MIN_ADDRESS)
159 warning("Hit beginning of text section without finding");
160 else
161 warning("Hit heuristic-fence-post without finding");
162
163 warning("enclosing function for pc 0x%x", pc);
164 }
165
a8172eea
RP
166 return 0;
167 }
bd5635a1
RP
168 else if (ABOUT_TO_RETURN(start_pc))
169 break;
170
171 start_pc += 8; /* skip return, and its delay slot */
172#if 0
173 /* skip nops (usually 1) 0 - is this */
174 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
175 start_pc += 4;
176#endif
177 return start_pc;
178}
179
0f552c5f 180static mips_extra_func_info_t
bd5635a1
RP
181heuristic_proc_desc(start_pc, limit_pc, next_frame)
182 CORE_ADDR start_pc, limit_pc;
183 FRAME next_frame;
184{
185 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
186 CORE_ADDR cur_pc;
187 int frame_size;
188 int has_frame_reg = 0;
189 int reg30; /* Value of $r30. Used by gcc for frame-pointer */
190 unsigned long reg_mask = 0;
191
192 if (start_pc == 0) return NULL;
193 bzero(&temp_proc_desc, sizeof(temp_proc_desc));
194 bzero(&temp_saved_regs, sizeof(struct frame_saved_regs));
a70dc898
RP
195 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
196
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RP
197 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
198 restart:
199 frame_size = 0;
200 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
201 unsigned long word;
202 int status;
203
a70dc898 204 status = read_memory_nobpt (cur_pc, (char *)&word, 4);
bd5635a1 205 if (status) memory_error (status, cur_pc);
5e2e79f8 206 SWAP_TARGET_AND_HOST (&word, sizeof (word));
bd5635a1
RP
207 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
208 frame_size += (-word) & 0xFFFF;
209 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
210 frame_size += (-word) & 0xFFFF;
211 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
212 int reg = (word & 0x001F0000) >> 16;
213 reg_mask |= 1 << reg;
214 temp_saved_regs.regs[reg] = sp + (short)word;
215 }
216 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
217 if ((unsigned short)word != frame_size)
218 reg30 = sp + (unsigned short)word;
219 else if (!has_frame_reg) {
220 int alloca_adjust;
221 has_frame_reg = 1;
222 reg30 = read_next_frame_reg(next_frame, 30);
223 alloca_adjust = reg30 - (sp + (unsigned short)word);
224 if (alloca_adjust > 0) {
225 /* FP > SP + frame_size. This may be because
226 /* of an alloca or somethings similar.
227 * Fix sp to "pre-alloca" value, and try again.
228 */
229 sp += alloca_adjust;
230 goto restart;
231 }
232 }
233 }
234 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
235 int reg = (word & 0x001F0000) >> 16;
236 reg_mask |= 1 << reg;
237 temp_saved_regs.regs[reg] = reg30 + (short)word;
238 }
239 }
240 if (has_frame_reg) {
241 PROC_FRAME_REG(&temp_proc_desc) = 30;
242 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
243 }
244 else {
245 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
246 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
247 }
248 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
249 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
250 return &temp_proc_desc;
251}
252
0f552c5f 253static mips_extra_func_info_t
bd5635a1
RP
254find_proc_desc(pc, next_frame)
255 CORE_ADDR pc;
256 FRAME next_frame;
257{
258 mips_extra_func_info_t proc_desc;
0f552c5f 259 struct block *b = block_for_pc(pc);
bd5635a1 260 struct symbol *sym =
dac4929a 261 b ? lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL) : NULL;
0f552c5f
JG
262
263 if (sym)
bd5635a1
RP
264 {
265 /* IF this is the topmost frame AND
266 * (this proc does not have debugging information OR
267 * the PC is in the procedure prologue)
be772100 268 * THEN create a "heuristic" proc_desc (by analyzing
bd5635a1
RP
269 * the actual code) to replace the "official" proc_desc.
270 */
0f552c5f 271 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
bd5635a1
RP
272 if (next_frame == NULL) {
273 struct symtab_and_line val;
274 struct symbol *proc_symbol =
275 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
0f552c5f 276
bd5635a1
RP
277 if (proc_symbol) {
278 val = find_pc_line (BLOCK_START
279 (SYMBOL_BLOCK_VALUE(proc_symbol)),
280 0);
281 val.pc = val.end ? val.end : pc;
282 }
283 if (!proc_symbol || pc < val.pc) {
284 mips_extra_func_info_t found_heuristic =
285 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
286 pc, next_frame);
287 if (found_heuristic) proc_desc = found_heuristic;
288 }
289 }
290 }
291 else
292 {
0f552c5f
JG
293 /* Is linked_proc_desc_table really necessary? It only seems to be used
294 by procedure call dummys. However, the procedures being called ought
295 to have their own proc_descs, and even if they don't,
296 heuristic_proc_desc knows how to create them! */
297
bd5635a1
RP
298 register struct linked_proc_info *link;
299 for (link = linked_proc_desc_table; link; link = link->next)
300 if (PROC_LOW_ADDR(&link->info) <= pc
301 && PROC_HIGH_ADDR(&link->info) > pc)
302 return &link->info;
303 proc_desc =
304 heuristic_proc_desc(heuristic_proc_start(pc), pc, next_frame);
305 }
306 return proc_desc;
307}
308
309mips_extra_func_info_t cached_proc_desc;
310
0f552c5f
JG
311FRAME_ADDR
312mips_frame_chain(frame)
bd5635a1
RP
313 FRAME frame;
314{
bd5635a1
RP
315 mips_extra_func_info_t proc_desc;
316 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
be772100 317
0f552c5f
JG
318 if (saved_pc == 0 || inside_entry_file (saved_pc))
319 return 0;
320
bd5635a1 321 proc_desc = find_proc_desc(saved_pc, frame);
0f552c5f
JG
322 if (!proc_desc)
323 return 0;
324
bd5635a1
RP
325 cached_proc_desc = proc_desc;
326 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
0f552c5f 327 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
328}
329
330void
331init_extra_frame_info(fci)
332 struct frame_info *fci;
333{
334 extern struct obstack frame_cache_obstack;
335 /* Use proc_desc calculated in frame_chain */
336 mips_extra_func_info_t proc_desc = fci->next ? cached_proc_desc :
337 find_proc_desc(fci->pc, fci->next);
0f552c5f 338
bd5635a1
RP
339 fci->saved_regs = (struct frame_saved_regs*)
340 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
341 bzero(fci->saved_regs, sizeof(struct frame_saved_regs));
342 fci->proc_desc =
0f552c5f 343 proc_desc == &temp_proc_desc ? 0 : proc_desc;
bd5635a1
RP
344 if (proc_desc)
345 {
346 int ireg;
347 CORE_ADDR reg_position;
348 unsigned long mask;
349 /* r0 bit means kernel trap */
350 int kernel_trap = PROC_REG_MASK(proc_desc) & 1;
351
c2a0f1cb
ILT
352 /* Fixup frame-pointer - only needed for top frame */
353 /* This may not be quite right, if proc has a real frame register */
354 if (fci->pc == PROC_LOW_ADDR(proc_desc))
355 fci->frame = read_register (SP_REGNUM);
356 else
357 fci->frame = READ_FRAME_REG(fci, PROC_FRAME_REG(proc_desc))
358 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
359
360 if (proc_desc == &temp_proc_desc)
361 *fci->saved_regs = temp_saved_regs;
362 else
363 {
364 /* find which general-purpose registers were saved */
365 reg_position = fci->frame + PROC_REG_OFFSET(proc_desc);
366 mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
367 for (ireg= 31; mask; --ireg, mask <<= 1)
368 if (mask & 0x80000000)
369 {
370 fci->saved_regs->regs[ireg] = reg_position;
371 reg_position -= 4;
372 }
373 /* find which floating-point registers were saved */
374 reg_position = fci->frame + PROC_FREG_OFFSET(proc_desc);
375 /* The freg_offset points to where the first *double* register is saved.
376 * So skip to the high-order word. */
377 reg_position += 4;
378 mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
379 for (ireg = 31; mask; --ireg, mask <<= 1)
380 if (mask & 0x80000000)
381 {
d747e0af 382 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
bd5635a1
RP
383 reg_position -= 4;
384 }
385 }
386
387 /* hack: if argument regs are saved, guess these contain args */
388 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
389 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
390 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
391 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
392 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
393
394 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
395 }
bd5635a1
RP
396}
397
a70dc898
RP
398/* MIPS stack frames are almost impenetrable. When execution stops,
399 we basically have to look at symbol information for the function
400 that we stopped in, which tells us *which* register (if any) is
401 the base of the frame pointer, and what offset from that register
402 the frame itself is at.
403
404 This presents a problem when trying to examine a stack in memory
405 (that isn't executing at the moment), using the "frame" command. We
406 don't have a PC, nor do we have any registers except SP.
407
408 This routine takes two arguments, SP and PC, and tries to make the
409 cached frames look as if these two arguments defined a frame on the
410 cache. This allows the rest of info frame to extract the important
411 arguments without difficulty. */
412
413FRAME
c2a0f1cb
ILT
414setup_arbitrary_frame (argc, argv)
415 int argc;
416 FRAME_ADDR *argv;
a70dc898 417{
c2a0f1cb
ILT
418 if (argc != 2)
419 error ("MIPS frame specifications require two arguments: sp and pc");
420
421 return create_new_frame (argv[0], argv[1]);
a70dc898
RP
422}
423
bd5635a1 424
0f552c5f
JG
425CORE_ADDR
426mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
bd5635a1
RP
427 int nargs;
428 value *args;
429 CORE_ADDR sp;
430 int struct_return;
431 CORE_ADDR struct_addr;
432{
433 CORE_ADDR buf;
434 register i;
435 int accumulate_size = struct_return ? 4 : 0;
436 struct mips_arg { char *contents; int len; int offset; };
437 struct mips_arg *mips_args =
438 (struct mips_arg*)alloca(nargs * sizeof(struct mips_arg));
439 register struct mips_arg *m_arg;
440 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
441 extern value value_arg_coerce();
442 value arg = value_arg_coerce (args[i]);
443 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
444 /* This entire mips-specific routine is because doubles must be aligned
445 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
446 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
447 * breaks their varargs implementation...). A correct solution
448 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
449 * in stdarg.h/varargs.h).
450 */
451 if (m_arg->len > 4) accumulate_size = (accumulate_size + 7) & -8;
452 m_arg->offset = accumulate_size;
453 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
454 m_arg->contents = VALUE_CONTENTS(arg);
455 }
456 accumulate_size = (accumulate_size + 7) & (-8);
457 if (accumulate_size < 16) accumulate_size = 16;
458 sp -= accumulate_size;
459 for (i = nargs; m_arg--, --i >= 0; )
460 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
461 if (struct_return) {
462 buf = struct_addr;
a70dc898
RP
463 write_memory(sp, (char *)&buf, sizeof(CORE_ADDR));
464 }
bd5635a1
RP
465 return sp;
466}
467
468/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
469#define MASK(i,j) ((1 << (j)+1)-1 ^ (1 << (i))-1)
470
471void
472mips_push_dummy_frame()
473{
474 int ireg;
475 struct linked_proc_info *link = (struct linked_proc_info*)
476 xmalloc(sizeof(struct linked_proc_info));
477 mips_extra_func_info_t proc_desc = &link->info;
478 CORE_ADDR sp = read_register (SP_REGNUM);
479 CORE_ADDR save_address;
480 REGISTER_TYPE buffer;
481 link->next = linked_proc_desc_table;
482 linked_proc_desc_table = link;
483#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
484#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
485#define GEN_REG_SAVE_COUNT 22
486#define FLOAT_REG_SAVE_MASK MASK(0,19)
487#define FLOAT_REG_SAVE_COUNT 20
488#define SPECIAL_REG_SAVE_COUNT 4
489 /*
490 * The registers we must save are all those not preserved across
491 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
492 * In addition, we must save the PC, and PUSH_FP_REGNUM.
493 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
494 *
495 * Dummy frame layout:
496 * (high memory)
497 * Saved PC
498 * Saved MMHI, MMLO, FPC_CSR
499 * Saved R31
500 * Saved R28
501 * ...
502 * Saved R1
503 * Saved D18 (i.e. F19, F18)
504 * ...
505 * Saved D0 (i.e. F1, F0)
c2a0f1cb 506 * CALL_DUMMY (subroutine stub; see tm-mips.h)
bd5635a1
RP
507 * Parameter build area (not yet implemented)
508 * (low memory)
509 */
510 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
c2a0f1cb 511 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
bd5635a1
RP
512 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
513 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
514 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
515 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
516 /* save general registers */
517 save_address = sp + PROC_REG_OFFSET(proc_desc);
518 for (ireg = 32; --ireg >= 0; )
519 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
520 {
521 buffer = read_register (ireg);
a70dc898 522 write_memory (save_address, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1
RP
523 save_address -= 4;
524 }
0b0d6c3f
PS
525 /* save floating-points registers starting with high order word */
526 save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
bd5635a1
RP
527 for (ireg = 32; --ireg >= 0; )
528 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
529 {
7d9884b9 530 buffer = read_register (ireg + FP0_REGNUM);
a70dc898 531 write_memory (save_address, (char *)&buffer, 4);
bd5635a1
RP
532 save_address -= 4;
533 }
534 write_register (PUSH_FP_REGNUM, sp);
535 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
536 PROC_FRAME_OFFSET(proc_desc) = 0;
537 buffer = read_register (PC_REGNUM);
a70dc898 538 write_memory (sp - 4, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 539 buffer = read_register (HI_REGNUM);
a70dc898 540 write_memory (sp - 8, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 541 buffer = read_register (LO_REGNUM);
a70dc898 542 write_memory (sp - 12, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb 543 buffer = read_register (mips_fpu ? FCRCS_REGNUM : ZERO_REGNUM);
a70dc898 544 write_memory (sp - 16, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb
ILT
545 sp -= 4 * (GEN_REG_SAVE_COUNT
546 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
547 + SPECIAL_REG_SAVE_COUNT);
bd5635a1
RP
548 write_register (SP_REGNUM, sp);
549 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
550 PROC_HIGH_ADDR(proc_desc) = sp;
551 SET_PROC_DESC_IS_DUMMY(proc_desc);
552 PROC_PC_REG(proc_desc) = RA_REGNUM;
553}
554
555void
556mips_pop_frame()
dac4929a
SG
557{
558 register int regnum;
bd5635a1
RP
559 FRAME frame = get_current_frame ();
560 CORE_ADDR new_sp = frame->frame;
dac4929a 561
a70dc898 562 mips_extra_func_info_t proc_desc = frame->proc_desc;
dac4929a
SG
563
564 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
565 if (proc_desc)
566 {
567 for (regnum = 32; --regnum >= 0; )
568 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
569 write_register (regnum,
570 read_memory_integer (frame->saved_regs->regs[regnum],
571 4));
572 for (regnum = 32; --regnum >= 0; )
573 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
574 write_register (regnum + FP0_REGNUM,
575 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
576 }
577 write_register (SP_REGNUM, new_sp);
578 flush_cached_frames ();
579 /* We let mips_init_extra_frame_info figure out the frame pointer */
580 set_current_frame (create_new_frame (0, read_pc ()));
581
bd5635a1
RP
582 if (PROC_DESC_IS_DUMMY(proc_desc))
583 {
dac4929a
SG
584 struct linked_proc_info *pi_ptr, *prev_ptr;
585
586 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
587 pi_ptr != NULL;
588 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
589 {
590 if (&pi_ptr->info == proc_desc)
591 break;
592 }
593
594 if (pi_ptr == NULL)
595 error ("Can't locate dummy extra frame info\n");
596
597 if (prev_ptr != NULL)
598 prev_ptr->next = pi_ptr->next;
599 else
600 linked_proc_desc_table = pi_ptr->next;
601
602 free (pi_ptr);
603
bd5635a1
RP
604 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
605 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
c2a0f1cb
ILT
606 if (mips_fpu)
607 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
bd5635a1 608 }
bd5635a1
RP
609}
610
0f552c5f 611static void
a70dc898 612mips_print_register (regnum, all)
bd5635a1
RP
613 int regnum, all;
614{
ac8cf67d 615 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
bd5635a1
RP
616 REGISTER_TYPE val;
617
5e2e79f8
FF
618 /* Get the data in raw format. */
619 if (read_relative_register_raw_bytes (regnum, raw_buffer))
620 {
621 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
622 return;
623 }
624
d747e0af
MT
625 /* If an even floating pointer register, also print as double. */
626 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
627 && !((regnum-FP0_REGNUM) & 1)) {
ac8cf67d
PS
628 char dbuffer[MAX_REGISTER_RAW_SIZE];
629
630 read_relative_register_raw_bytes (regnum, dbuffer);
631 read_relative_register_raw_bytes (regnum+1, dbuffer+4);
632#ifdef REGISTER_CONVERT_TO_TYPE
633 REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer);
634#endif
d747e0af 635 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
ac8cf67d 636 val_print (builtin_type_double, dbuffer, 0,
bd5635a1 637 stdout, 0, 1, 0, Val_pretty_default);
d747e0af 638 printf_filtered ("); ");
bd5635a1
RP
639 }
640 fputs_filtered (reg_names[regnum], stdout);
641#ifndef NUMERIC_REG_NAMES
642 if (regnum < 32)
643 printf_filtered ("(r%d): ", regnum);
644 else
645#endif
646 printf_filtered (": ");
647
648 /* If virtual format is floating, print it that way. */
649 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
650 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
651 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
652 stdout, 0, 1, 0, Val_pretty_default);
653 }
654 /* Else print as integer in hex. */
655 else
656 {
657 long val;
658
659 bcopy (raw_buffer, &val, sizeof (long));
5e2e79f8 660 SWAP_TARGET_AND_HOST ((char *)&val, sizeof (long));
bd5635a1
RP
661 if (val == 0)
662 printf_filtered ("0");
663 else if (all)
d8b3b00e 664 printf_filtered (local_hex_format(), val);
bd5635a1 665 else
d8b3b00e 666 printf_filtered ("%s=%d", local_hex_string(val), val);
bd5635a1
RP
667 }
668}
669
d8b3b00e 670/* Replacement for generic do_registers_info. */
0f552c5f 671void
361bf6ee 672mips_do_registers_info (regnum, fpregs)
bd5635a1 673 int regnum;
361bf6ee 674 int fpregs;
bd5635a1
RP
675{
676 if (regnum != -1) {
677 mips_print_register (regnum, 0);
678 printf_filtered ("\n");
679 }
680 else {
681 for (regnum = 0; regnum < NUM_REGS; ) {
d8b3b00e
JG
682 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
683 regnum++;
684 continue;
685 }
bd5635a1
RP
686 mips_print_register (regnum, 1);
687 regnum++;
688 if ((regnum & 3) == 0 || regnum == NUM_REGS)
689 printf_filtered (";\n");
690 else
691 printf_filtered ("; ");
692 }
693 }
694}
695/* Return number of args passed to a frame. described by FIP.
696 Can return -1, meaning no way to tell. */
697
0f552c5f 698int
bd5635a1
RP
699mips_frame_num_args(fip)
700 FRAME fip;
701{
702#if 0
703 struct chain_info_t *p;
704
705 p = mips_find_cached_frame(FRAME_FP(fip));
706 if (p->valid)
707 return p->the_info.numargs;
708#endif
709 return -1;
710}
711
712\f
713/* Bad floats: Returns 0 if P points to a valid IEEE floating point number,
714 1 if P points to a denormalized number or a NaN. LEN says whether this is
715 a single-precision or double-precision float */
716#define SINGLE_EXP_BITS 8
717#define DOUBLE_EXP_BITS 11
718int
719isa_NAN(p, len)
720 int *p, len;
721{
722 int exponent;
723 if (len == 4)
724 {
725 exponent = *p;
726 exponent = exponent << 1 >> (32 - SINGLE_EXP_BITS - 1);
727 return ((exponent == -1) || (! exponent && *p));
728 }
729 else if (len == 8)
730 {
c2a0f1cb
ILT
731#if TARGET_BYTE_ORDER == BIG_ENDIAN
732 exponent = *p;
733#else
bd5635a1 734 exponent = *(p+1);
c2a0f1cb 735#endif
bd5635a1
RP
736 exponent = exponent << 1 >> (32 - DOUBLE_EXP_BITS - 1);
737 return ((exponent == -1) || (! exponent && *p * *(p+1)));
738 }
739 else return 1;
740}
407a8389 741\f
0b0d6c3f
PS
742/* To skip prologues, I use this predicate. Returns either PC
743 itself if the code at PC does not look like a function prologue;
744 otherwise returns an address that (if we're lucky) follows
745 the prologue. */
bd5635a1 746
be772100
JG
747CORE_ADDR
748mips_skip_prologue(pc)
bd5635a1
RP
749 CORE_ADDR pc;
750{
751 struct symbol *f;
752 struct block *b;
753 unsigned long inst;
d747e0af 754 int offset;
0b0d6c3f 755 int seen_sp_adjust = 0;
bd5635a1 756
e157305c
PS
757 /* Skip the typical prologue instructions. These are the stack adjustment
758 instruction and the instructions that save registers on the stack
759 or in the gcc frame. */
d747e0af
MT
760 for (offset = 0; offset < 100; offset += 4) {
761 inst = read_memory_integer(pc + offset, 4);
e157305c 762 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
0b0d6c3f 763 seen_sp_adjust = 1;
e157305c
PS
764 else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000))
765 continue; /* sw reg,n($sp) */
766 /* reg != $zero */
767 else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
768 continue;
769 else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000))
770 /* sx reg,n($s8) */
771 continue; /* reg != $zero */
772 else if (inst == 0x03A0F021) /* move $s8,$sp */
0b0d6c3f
PS
773 continue;
774 else
e157305c 775 break;
d747e0af 776 }
e157305c
PS
777 return pc + offset;
778
779/* FIXME schauer. The following code seems no longer necessary if we
780 always skip the typical prologue instructions. */
781
782#if 0
0b0d6c3f
PS
783 if (seen_sp_adjust)
784 return pc + offset;
bd5635a1
RP
785
786 /* Well, it looks like a frameless. Let's make sure.
787 Note that we are not called on the current PC,
788 but on the function`s start PC, and I have definitely
789 seen optimized code that adjusts the SP quite later */
790 b = block_for_pc(pc);
791 if (!b) return pc;
792
dac4929a 793 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
bd5635a1
RP
794 if (!f) return pc;
795 /* Ideally, I would like to use the adjusted info
796 from mips_frame_info(), but for all practical
797 purposes it will not matter (and it would require
798 a different definition of SKIP_PROLOGUE())
799
800 Actually, it would not hurt to skip the storing
801 of arguments on the stack as well. */
0f552c5f 802 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
bd5635a1
RP
803 return pc + 4;
804
805 return pc;
e157305c 806#endif
bd5635a1 807}
c2a0f1cb 808
ac8cf67d
PS
809/* Given a return value in `regbuf' with a type `valtype',
810 extract and copy its value into `valbuf'. */
811void
812mips_extract_return_value (valtype, regbuf, valbuf)
813 struct type *valtype;
814 char regbuf[REGISTER_BYTES];
815 char *valbuf;
816{
817 int regnum;
818
819 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
820
821 memcpy (valbuf, regbuf + REGISTER_BYTE (regnum), TYPE_LENGTH (valtype));
822#ifdef REGISTER_CONVERT_TO_TYPE
823 REGISTER_CONVERT_TO_TYPE(regnum, valtype, valbuf);
824#endif
825}
826
827/* Given a return value in `regbuf' with a type `valtype',
828 write it's value into the appropriate register. */
829void
830mips_store_return_value (valtype, valbuf)
831 struct type *valtype;
832 char *valbuf;
833{
834 int regnum;
835 char raw_buffer[MAX_REGISTER_RAW_SIZE];
836
837 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
838 memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
839
840#ifdef REGISTER_CONVERT_FROM_TYPE
841 REGISTER_CONVERT_FROM_TYPE(regnum, valtype, raw_buffer);
842#endif
843
844 write_register_bytes(REGISTER_BYTE (regnum), raw_buffer, TYPE_LENGTH (valtype));
845}
846
3127785a
RP
847/* Let the user turn off floating point and set the fence post for
848 heuristic_proc_start. */
c2a0f1cb
ILT
849
850void
851_initialize_mips_tdep ()
852{
853 add_show_from_set
a8172eea 854 (add_set_cmd ("mipsfpu", class_support, var_boolean,
c2a0f1cb
ILT
855 (char *) &mips_fpu,
856 "Set use of floating point coprocessor.\n\
857Turn off to avoid using floating point instructions when calling functions\n\
858or dealing with return values.", &setlist),
859 &showlist);
3127785a
RP
860
861 add_show_from_set
862 (add_set_cmd ("heuristic-fence-post", class_support, var_uinteger,
863 (char *) &heuristic_fence_post,
864 "Set the distance searched for the start of a function.\n\
ac8cf67d 865Set number of bytes to be searched backward to find the beginning of a\n\
3127785a
RP
866function without symbols.", &setlist),
867 &showlist);
c2a0f1cb 868}
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