* mipsread.c (fixup_sigtramp): Initialize pdr.adr, it is used by
[deliverable/binutils-gdb.git] / gdb / mips-tdep.c
CommitLineData
7d9884b9 1/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
c2a0f1cb 2 Copyright 1988, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
bd5635a1
RP
3 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
4 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
6This file is part of GDB.
7
361bf6ee 8This program is free software; you can redistribute it and/or modify
bd5635a1 9it under the terms of the GNU General Public License as published by
361bf6ee
JG
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
bd5635a1 12
361bf6ee 13This program is distributed in the hope that it will be useful,
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RP
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
361bf6ee
JG
19along with this program; if not, write to the Free Software
20Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
bd5635a1 21
bd5635a1 22#include "defs.h"
bd5635a1
RP
23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "value.h"
27#include "gdbcmd.h"
ef08856f 28#include "language.h"
bd5635a1 29#include "gdbcore.h"
62a469e1
SG
30#include "symfile.h"
31#include "objfiles.h"
bd5635a1 32
ee5fb959
JK
33#include "opcode/mips.h"
34
bd5635a1 35#define VM_MIN_ADDRESS (unsigned)0x400000
bd5635a1 36\f
ee5fb959
JK
37static int mips_in_lenient_prologue PARAMS ((CORE_ADDR, CORE_ADDR));
38
c2a0f1cb
ILT
39/* Some MIPS boards don't support floating point, so we permit the
40 user to turn it off. */
41int mips_fpu = 1;
42
3127785a
RP
43/* Heuristic_proc_start may hunt through the text section for a long
44 time across a 2400 baud serial line. Allows the user to limit this
45 search. */
46static unsigned int heuristic_fence_post = 0;
47
0f552c5f
JG
48#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
49#define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
50#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
51#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
52#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
53#define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
54#define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
55#define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
56#define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
57#define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
bd5635a1 58#define _PROC_MAGIC_ 0x0F0F0F0F
0f552c5f
JG
59#define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
60#define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
bd5635a1
RP
61
62struct linked_proc_info
63{
64 struct mips_extra_func_info info;
65 struct linked_proc_info *next;
dac4929a 66} *linked_proc_desc_table = NULL;
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67
68\f
69#define READ_FRAME_REG(fi, regno) read_next_frame_reg((fi)->next, regno)
70
0f552c5f 71static int
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RP
72read_next_frame_reg(fi, regno)
73 FRAME fi;
74 int regno;
75{
e157305c
PS
76 /* If it is the frame for sigtramp we have a complete sigcontext
77 immediately below the frame and we get the saved registers from there.
78 If the stack layout for sigtramp changes we might have to change these
79 constants and the companion fixup_sigtramp in mipsread.c */
1b71de8e 80#ifndef SIGFRAME_BASE
e157305c
PS
81#define SIGFRAME_BASE 0x12c /* sizeof(sigcontext) */
82#define SIGFRAME_PC_OFF (-SIGFRAME_BASE + 2 * 4)
83#define SIGFRAME_REGSAVE_OFF (-SIGFRAME_BASE + 3 * 4)
1b71de8e 84#endif
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RP
85 for (; fi; fi = fi->next)
86 if (in_sigtramp(fi->pc, 0)) {
bd5635a1
RP
87 int offset;
88 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
e157305c 89 else if (regno < 32) offset = SIGFRAME_REGSAVE_OFF + regno * 4;
bd5635a1
RP
90 else return 0;
91 return read_memory_integer(fi->frame + offset, 4);
92 }
93 else if (regno == SP_REGNUM) return fi->frame;
94 else if (fi->saved_regs->regs[regno])
95 return read_memory_integer(fi->saved_regs->regs[regno], 4);
96 return read_register(regno);
97}
98
99int
100mips_frame_saved_pc(frame)
101 FRAME frame;
102{
0f552c5f 103 mips_extra_func_info_t proc_desc = frame->proc_desc;
bd5635a1 104 int pcreg = proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM;
0f552c5f 105
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RP
106 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
107 return read_memory_integer(frame->frame - 4, 4);
0f552c5f 108
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109 return read_next_frame_reg(frame, pcreg);
110}
111
112static struct mips_extra_func_info temp_proc_desc;
113static struct frame_saved_regs temp_saved_regs;
114
a8172eea
RP
115/* This fencepost looks highly suspicious to me. Removing it also
116 seems suspicious as it could affect remote debugging across serial
3127785a 117 lines. */
a8172eea 118
0f552c5f
JG
119static CORE_ADDR
120heuristic_proc_start(pc)
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RP
121 CORE_ADDR pc;
122{
bd5635a1 123 CORE_ADDR start_pc = pc;
3127785a 124 CORE_ADDR fence = start_pc - heuristic_fence_post;
0f552c5f
JG
125
126 if (start_pc == 0) return 0;
3127785a
RP
127
128 if (heuristic_fence_post == UINT_MAX
129 || fence < VM_MIN_ADDRESS)
130 fence = VM_MIN_ADDRESS;
0f552c5f 131
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132 /* search back for previous return */
133 for (start_pc -= 4; ; start_pc -= 4)
a8172eea
RP
134 if (start_pc < fence)
135 {
3127785a
RP
136 /* It's not clear to me why we reach this point when
137 stop_soon_quietly, but with this test, at least we
138 don't print out warnings for every child forked (eg, on
139 decstation). 22apr93 rich@cygnus.com. */
140 if (!stop_soon_quietly)
141 {
23d35572
JK
142 static int blurb_printed = 0;
143
3127785a
RP
144 if (fence == VM_MIN_ADDRESS)
145 warning("Hit beginning of text section without finding");
146 else
147 warning("Hit heuristic-fence-post without finding");
148
23d35572
JK
149 warning("enclosing function for address 0x%x", pc);
150 if (!blurb_printed)
151 {
152 printf_filtered ("\
153This warning occurs if you are debugging a function without any symbols\n\
154(for example, in a stripped executable). In that case, you may wish to\n\
155increase the size of the search with the `set heuristic-fence-post' command.\n\
156\n\
157Otherwise, you told GDB there was a function where there isn't one, or\n\
158(more likely) you have encountered a bug in GDB.\n");
159 blurb_printed = 1;
160 }
3127785a
RP
161 }
162
a8172eea
RP
163 return 0;
164 }
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RP
165 else if (ABOUT_TO_RETURN(start_pc))
166 break;
167
168 start_pc += 8; /* skip return, and its delay slot */
169#if 0
170 /* skip nops (usually 1) 0 - is this */
171 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
172 start_pc += 4;
173#endif
174 return start_pc;
175}
176
0f552c5f 177static mips_extra_func_info_t
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178heuristic_proc_desc(start_pc, limit_pc, next_frame)
179 CORE_ADDR start_pc, limit_pc;
180 FRAME next_frame;
181{
182 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
183 CORE_ADDR cur_pc;
184 int frame_size;
185 int has_frame_reg = 0;
186 int reg30; /* Value of $r30. Used by gcc for frame-pointer */
187 unsigned long reg_mask = 0;
188
189 if (start_pc == 0) return NULL;
190 bzero(&temp_proc_desc, sizeof(temp_proc_desc));
191 bzero(&temp_saved_regs, sizeof(struct frame_saved_regs));
a70dc898
RP
192 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
193
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RP
194 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
195 restart:
196 frame_size = 0;
197 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
34df79fc 198 char buf[4];
bd5635a1
RP
199 unsigned long word;
200 int status;
201
34df79fc
JK
202 status = read_memory_nobpt (cur_pc, buf, 4);
203 if (status) memory_error (status, cur_pc);
204 word = extract_unsigned_integer (buf, 4);
205
bd5635a1
RP
206 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
207 frame_size += (-word) & 0xFFFF;
208 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
209 frame_size += (-word) & 0xFFFF;
210 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
211 int reg = (word & 0x001F0000) >> 16;
212 reg_mask |= 1 << reg;
213 temp_saved_regs.regs[reg] = sp + (short)word;
214 }
215 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
216 if ((unsigned short)word != frame_size)
217 reg30 = sp + (unsigned short)word;
218 else if (!has_frame_reg) {
219 int alloca_adjust;
220 has_frame_reg = 1;
221 reg30 = read_next_frame_reg(next_frame, 30);
222 alloca_adjust = reg30 - (sp + (unsigned short)word);
223 if (alloca_adjust > 0) {
224 /* FP > SP + frame_size. This may be because
225 /* of an alloca or somethings similar.
226 * Fix sp to "pre-alloca" value, and try again.
227 */
228 sp += alloca_adjust;
229 goto restart;
230 }
231 }
232 }
233 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
234 int reg = (word & 0x001F0000) >> 16;
235 reg_mask |= 1 << reg;
236 temp_saved_regs.regs[reg] = reg30 + (short)word;
237 }
238 }
239 if (has_frame_reg) {
240 PROC_FRAME_REG(&temp_proc_desc) = 30;
241 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
242 }
243 else {
244 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
245 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
246 }
247 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
248 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
249 return &temp_proc_desc;
250}
251
0f552c5f 252static mips_extra_func_info_t
bd5635a1
RP
253find_proc_desc(pc, next_frame)
254 CORE_ADDR pc;
255 FRAME next_frame;
256{
257 mips_extra_func_info_t proc_desc;
0f552c5f 258 struct block *b = block_for_pc(pc);
bd5635a1 259 struct symbol *sym =
dac4929a 260 b ? lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL) : NULL;
0f552c5f
JG
261
262 if (sym)
bd5635a1
RP
263 {
264 /* IF this is the topmost frame AND
265 * (this proc does not have debugging information OR
266 * the PC is in the procedure prologue)
be772100 267 * THEN create a "heuristic" proc_desc (by analyzing
bd5635a1
RP
268 * the actual code) to replace the "official" proc_desc.
269 */
0f552c5f 270 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
bd5635a1
RP
271 if (next_frame == NULL) {
272 struct symtab_and_line val;
273 struct symbol *proc_symbol =
274 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
0f552c5f 275
bd5635a1
RP
276 if (proc_symbol) {
277 val = find_pc_line (BLOCK_START
278 (SYMBOL_BLOCK_VALUE(proc_symbol)),
279 0);
280 val.pc = val.end ? val.end : pc;
281 }
282 if (!proc_symbol || pc < val.pc) {
283 mips_extra_func_info_t found_heuristic =
284 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
285 pc, next_frame);
286 if (found_heuristic) proc_desc = found_heuristic;
287 }
288 }
289 }
290 else
291 {
0f552c5f
JG
292 /* Is linked_proc_desc_table really necessary? It only seems to be used
293 by procedure call dummys. However, the procedures being called ought
294 to have their own proc_descs, and even if they don't,
295 heuristic_proc_desc knows how to create them! */
296
bd5635a1
RP
297 register struct linked_proc_info *link;
298 for (link = linked_proc_desc_table; link; link = link->next)
299 if (PROC_LOW_ADDR(&link->info) <= pc
300 && PROC_HIGH_ADDR(&link->info) > pc)
301 return &link->info;
23d35572 302
bd5635a1 303 proc_desc =
23d35572 304 heuristic_proc_desc (heuristic_proc_start (pc), pc, next_frame);
bd5635a1
RP
305 }
306 return proc_desc;
307}
308
309mips_extra_func_info_t cached_proc_desc;
310
0f552c5f
JG
311FRAME_ADDR
312mips_frame_chain(frame)
bd5635a1
RP
313 FRAME frame;
314{
bd5635a1
RP
315 mips_extra_func_info_t proc_desc;
316 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
be772100 317
0f552c5f
JG
318 if (saved_pc == 0 || inside_entry_file (saved_pc))
319 return 0;
320
bd5635a1 321 proc_desc = find_proc_desc(saved_pc, frame);
0f552c5f
JG
322 if (!proc_desc)
323 return 0;
324
bd5635a1
RP
325 cached_proc_desc = proc_desc;
326 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
0f552c5f 327 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
328}
329
330void
331init_extra_frame_info(fci)
332 struct frame_info *fci;
333{
334 extern struct obstack frame_cache_obstack;
335 /* Use proc_desc calculated in frame_chain */
ee5fb959
JK
336 mips_extra_func_info_t proc_desc =
337 fci->next ? cached_proc_desc : find_proc_desc(fci->pc, fci->next);
0f552c5f 338
bd5635a1
RP
339 fci->saved_regs = (struct frame_saved_regs*)
340 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
ee5fb959 341 memset (fci->saved_regs, 0, sizeof (struct frame_saved_regs));
bd5635a1 342 fci->proc_desc =
ee5fb959 343 proc_desc == &temp_proc_desc ? 0 : proc_desc;
bd5635a1
RP
344 if (proc_desc)
345 {
346 int ireg;
347 CORE_ADDR reg_position;
348 unsigned long mask;
349 /* r0 bit means kernel trap */
350 int kernel_trap = PROC_REG_MASK(proc_desc) & 1;
351
c2a0f1cb
ILT
352 /* Fixup frame-pointer - only needed for top frame */
353 /* This may not be quite right, if proc has a real frame register */
2fcdae93 354 if (fci->pc == PROC_LOW_ADDR(proc_desc) && !PROC_DESC_IS_DUMMY(proc_desc))
c2a0f1cb
ILT
355 fci->frame = read_register (SP_REGNUM);
356 else
357 fci->frame = READ_FRAME_REG(fci, PROC_FRAME_REG(proc_desc))
358 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1 359
ee5fb959
JK
360 /* If this is the innermost frame, and we are still in the
361 prologue (loosely defined), then the registers may not have
362 been saved yet. But they haven't been clobbered either, so
363 it's fine to say they have not been saved. */
364 if (fci->next == NULL
365 && mips_in_lenient_prologue (PROC_LOW_ADDR (proc_desc), fci->pc))
366 /* We already zeroed the saved regs. */
367 ;
368 else if (proc_desc == &temp_proc_desc)
369 *fci->saved_regs = temp_saved_regs;
bd5635a1 370 else
ee5fb959 371 {
bd5635a1
RP
372 /* find which general-purpose registers were saved */
373 reg_position = fci->frame + PROC_REG_OFFSET(proc_desc);
374 mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
375 for (ireg= 31; mask; --ireg, mask <<= 1)
ee5fb959 376 if (mask & 0x80000000)
bd5635a1 377 {
ee5fb959
JK
378 fci->saved_regs->regs[ireg] = reg_position;
379 reg_position -= 4;
bd5635a1
RP
380 }
381 /* find which floating-point registers were saved */
382 reg_position = fci->frame + PROC_FREG_OFFSET(proc_desc);
ee5fb959
JK
383
384 /* The freg_offset points to where the first *double* register
385 is saved. So skip to the high-order word. */
bd5635a1
RP
386 reg_position += 4;
387 mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
388 for (ireg = 31; mask; --ireg, mask <<= 1)
ee5fb959 389 if (mask & 0x80000000)
bd5635a1 390 {
ee5fb959
JK
391 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
392 reg_position -= 4;
bd5635a1 393 }
ee5fb959 394 }
bd5635a1
RP
395
396 /* hack: if argument regs are saved, guess these contain args */
397 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
398 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
399 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
400 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
401 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
402
403 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
404 }
bd5635a1
RP
405}
406
a70dc898
RP
407/* MIPS stack frames are almost impenetrable. When execution stops,
408 we basically have to look at symbol information for the function
409 that we stopped in, which tells us *which* register (if any) is
410 the base of the frame pointer, and what offset from that register
411 the frame itself is at.
412
413 This presents a problem when trying to examine a stack in memory
414 (that isn't executing at the moment), using the "frame" command. We
415 don't have a PC, nor do we have any registers except SP.
416
417 This routine takes two arguments, SP and PC, and tries to make the
418 cached frames look as if these two arguments defined a frame on the
419 cache. This allows the rest of info frame to extract the important
420 arguments without difficulty. */
421
422FRAME
c2a0f1cb
ILT
423setup_arbitrary_frame (argc, argv)
424 int argc;
425 FRAME_ADDR *argv;
a70dc898 426{
c2a0f1cb
ILT
427 if (argc != 2)
428 error ("MIPS frame specifications require two arguments: sp and pc");
429
430 return create_new_frame (argv[0], argv[1]);
a70dc898
RP
431}
432
bd5635a1 433
0f552c5f
JG
434CORE_ADDR
435mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
bd5635a1
RP
436 int nargs;
437 value *args;
438 CORE_ADDR sp;
439 int struct_return;
440 CORE_ADDR struct_addr;
441{
442 CORE_ADDR buf;
443 register i;
444 int accumulate_size = struct_return ? 4 : 0;
445 struct mips_arg { char *contents; int len; int offset; };
446 struct mips_arg *mips_args =
447 (struct mips_arg*)alloca(nargs * sizeof(struct mips_arg));
448 register struct mips_arg *m_arg;
449 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
450 extern value value_arg_coerce();
451 value arg = value_arg_coerce (args[i]);
452 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
453 /* This entire mips-specific routine is because doubles must be aligned
454 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
455 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
456 * breaks their varargs implementation...). A correct solution
457 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
458 * in stdarg.h/varargs.h).
459 */
460 if (m_arg->len > 4) accumulate_size = (accumulate_size + 7) & -8;
461 m_arg->offset = accumulate_size;
462 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
463 m_arg->contents = VALUE_CONTENTS(arg);
464 }
465 accumulate_size = (accumulate_size + 7) & (-8);
466 if (accumulate_size < 16) accumulate_size = 16;
467 sp -= accumulate_size;
468 for (i = nargs; m_arg--, --i >= 0; )
469 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
470 if (struct_return) {
471 buf = struct_addr;
a70dc898
RP
472 write_memory(sp, (char *)&buf, sizeof(CORE_ADDR));
473 }
bd5635a1
RP
474 return sp;
475}
476
477/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
478#define MASK(i,j) ((1 << (j)+1)-1 ^ (1 << (i))-1)
479
480void
481mips_push_dummy_frame()
482{
483 int ireg;
484 struct linked_proc_info *link = (struct linked_proc_info*)
485 xmalloc(sizeof(struct linked_proc_info));
486 mips_extra_func_info_t proc_desc = &link->info;
487 CORE_ADDR sp = read_register (SP_REGNUM);
488 CORE_ADDR save_address;
489 REGISTER_TYPE buffer;
490 link->next = linked_proc_desc_table;
491 linked_proc_desc_table = link;
492#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
493#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
494#define GEN_REG_SAVE_COUNT 22
495#define FLOAT_REG_SAVE_MASK MASK(0,19)
496#define FLOAT_REG_SAVE_COUNT 20
497#define SPECIAL_REG_SAVE_COUNT 4
498 /*
499 * The registers we must save are all those not preserved across
500 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
501 * In addition, we must save the PC, and PUSH_FP_REGNUM.
502 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
503 *
504 * Dummy frame layout:
505 * (high memory)
506 * Saved PC
507 * Saved MMHI, MMLO, FPC_CSR
508 * Saved R31
509 * Saved R28
510 * ...
511 * Saved R1
512 * Saved D18 (i.e. F19, F18)
513 * ...
514 * Saved D0 (i.e. F1, F0)
c2a0f1cb 515 * CALL_DUMMY (subroutine stub; see tm-mips.h)
bd5635a1
RP
516 * Parameter build area (not yet implemented)
517 * (low memory)
518 */
519 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
c2a0f1cb 520 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
bd5635a1
RP
521 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
522 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
523 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
524 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
525 /* save general registers */
526 save_address = sp + PROC_REG_OFFSET(proc_desc);
527 for (ireg = 32; --ireg >= 0; )
528 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
529 {
530 buffer = read_register (ireg);
a70dc898 531 write_memory (save_address, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1
RP
532 save_address -= 4;
533 }
0b0d6c3f
PS
534 /* save floating-points registers starting with high order word */
535 save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
bd5635a1
RP
536 for (ireg = 32; --ireg >= 0; )
537 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
538 {
7d9884b9 539 buffer = read_register (ireg + FP0_REGNUM);
a70dc898 540 write_memory (save_address, (char *)&buffer, 4);
bd5635a1
RP
541 save_address -= 4;
542 }
543 write_register (PUSH_FP_REGNUM, sp);
544 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
545 PROC_FRAME_OFFSET(proc_desc) = 0;
546 buffer = read_register (PC_REGNUM);
a70dc898 547 write_memory (sp - 4, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 548 buffer = read_register (HI_REGNUM);
a70dc898 549 write_memory (sp - 8, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 550 buffer = read_register (LO_REGNUM);
a70dc898 551 write_memory (sp - 12, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb 552 buffer = read_register (mips_fpu ? FCRCS_REGNUM : ZERO_REGNUM);
a70dc898 553 write_memory (sp - 16, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb
ILT
554 sp -= 4 * (GEN_REG_SAVE_COUNT
555 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
556 + SPECIAL_REG_SAVE_COUNT);
bd5635a1
RP
557 write_register (SP_REGNUM, sp);
558 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
559 PROC_HIGH_ADDR(proc_desc) = sp;
560 SET_PROC_DESC_IS_DUMMY(proc_desc);
561 PROC_PC_REG(proc_desc) = RA_REGNUM;
562}
563
564void
565mips_pop_frame()
dac4929a
SG
566{
567 register int regnum;
bd5635a1
RP
568 FRAME frame = get_current_frame ();
569 CORE_ADDR new_sp = frame->frame;
dac4929a 570
a70dc898 571 mips_extra_func_info_t proc_desc = frame->proc_desc;
dac4929a
SG
572
573 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
574 if (proc_desc)
575 {
576 for (regnum = 32; --regnum >= 0; )
577 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
578 write_register (regnum,
579 read_memory_integer (frame->saved_regs->regs[regnum],
580 4));
581 for (regnum = 32; --regnum >= 0; )
582 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
583 write_register (regnum + FP0_REGNUM,
584 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
585 }
586 write_register (SP_REGNUM, new_sp);
587 flush_cached_frames ();
588 /* We let mips_init_extra_frame_info figure out the frame pointer */
589 set_current_frame (create_new_frame (0, read_pc ()));
590
bd5635a1
RP
591 if (PROC_DESC_IS_DUMMY(proc_desc))
592 {
dac4929a
SG
593 struct linked_proc_info *pi_ptr, *prev_ptr;
594
595 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
596 pi_ptr != NULL;
597 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
598 {
599 if (&pi_ptr->info == proc_desc)
600 break;
601 }
602
603 if (pi_ptr == NULL)
604 error ("Can't locate dummy extra frame info\n");
605
606 if (prev_ptr != NULL)
607 prev_ptr->next = pi_ptr->next;
608 else
609 linked_proc_desc_table = pi_ptr->next;
610
611 free (pi_ptr);
612
bd5635a1
RP
613 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
614 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
c2a0f1cb
ILT
615 if (mips_fpu)
616 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
bd5635a1 617 }
bd5635a1
RP
618}
619
0f552c5f 620static void
a70dc898 621mips_print_register (regnum, all)
bd5635a1
RP
622 int regnum, all;
623{
ac8cf67d 624 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
bd5635a1
RP
625 REGISTER_TYPE val;
626
5e2e79f8
FF
627 /* Get the data in raw format. */
628 if (read_relative_register_raw_bytes (regnum, raw_buffer))
629 {
630 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
631 return;
632 }
633
d747e0af
MT
634 /* If an even floating pointer register, also print as double. */
635 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
636 && !((regnum-FP0_REGNUM) & 1)) {
ac8cf67d
PS
637 char dbuffer[MAX_REGISTER_RAW_SIZE];
638
639 read_relative_register_raw_bytes (regnum, dbuffer);
640 read_relative_register_raw_bytes (regnum+1, dbuffer+4);
641#ifdef REGISTER_CONVERT_TO_TYPE
642 REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer);
643#endif
d747e0af 644 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
ac8cf67d 645 val_print (builtin_type_double, dbuffer, 0,
bd5635a1 646 stdout, 0, 1, 0, Val_pretty_default);
d747e0af 647 printf_filtered ("); ");
bd5635a1
RP
648 }
649 fputs_filtered (reg_names[regnum], stdout);
650#ifndef NUMERIC_REG_NAMES
651 if (regnum < 32)
652 printf_filtered ("(r%d): ", regnum);
653 else
654#endif
655 printf_filtered (": ");
656
657 /* If virtual format is floating, print it that way. */
658 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
659 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
660 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
661 stdout, 0, 1, 0, Val_pretty_default);
662 }
663 /* Else print as integer in hex. */
664 else
665 {
666 long val;
667
34df79fc
JK
668 val = extract_signed_integer (raw_buffer,
669 REGISTER_RAW_SIZE (regnum));
670
bd5635a1
RP
671 if (val == 0)
672 printf_filtered ("0");
673 else if (all)
d8b3b00e 674 printf_filtered (local_hex_format(), val);
bd5635a1 675 else
d8b3b00e 676 printf_filtered ("%s=%d", local_hex_string(val), val);
bd5635a1
RP
677 }
678}
679
d8b3b00e 680/* Replacement for generic do_registers_info. */
0f552c5f 681void
361bf6ee 682mips_do_registers_info (regnum, fpregs)
bd5635a1 683 int regnum;
361bf6ee 684 int fpregs;
bd5635a1
RP
685{
686 if (regnum != -1) {
687 mips_print_register (regnum, 0);
688 printf_filtered ("\n");
689 }
690 else {
691 for (regnum = 0; regnum < NUM_REGS; ) {
d8b3b00e
JG
692 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
693 regnum++;
694 continue;
695 }
bd5635a1
RP
696 mips_print_register (regnum, 1);
697 regnum++;
698 if ((regnum & 3) == 0 || regnum == NUM_REGS)
699 printf_filtered (";\n");
700 else
701 printf_filtered ("; ");
702 }
703 }
704}
705/* Return number of args passed to a frame. described by FIP.
706 Can return -1, meaning no way to tell. */
707
0f552c5f 708int
bd5635a1
RP
709mips_frame_num_args(fip)
710 FRAME fip;
711{
712#if 0
713 struct chain_info_t *p;
714
715 p = mips_find_cached_frame(FRAME_FP(fip));
716 if (p->valid)
717 return p->the_info.numargs;
718#endif
719 return -1;
720}
407a8389 721\f
ee5fb959
JK
722/* Does this instruction involve use of a delay slot? */
723static int
724is_delayed (insn)
725 unsigned long insn;
726{
727 int i;
728 for (i = 0; i < NUMOPCODES; ++i)
729 if (mips_opcodes[i].pinfo != INSN_MACRO
730 && (insn & mips_opcodes[i].mask) == mips_opcodes[i].match)
731 break;
732 return i < NUMOPCODES && (mips_opcodes[i].pinfo & ANY_DELAY);
733}
734
735/* To skip prologues, I use this predicate. Returns either PC itself
736 if the code at PC does not look like a function prologue; otherwise
737 returns an address that (if we're lucky) follows the prologue. If
738 LENIENT, then we must skip everything which is involved in setting
739 up the frame (it's OK to skip more, just so long as we don't skip
740 anything which might clobber the registers which are being saved.
741 We must skip more in the case where part of the prologue is in the
742 delay slot of a non-prologue instruction). */
bd5635a1 743
be772100 744CORE_ADDR
ee5fb959 745mips_skip_prologue (pc, lenient)
bd5635a1 746 CORE_ADDR pc;
ee5fb959 747 int lenient;
bd5635a1
RP
748{
749 struct symbol *f;
750 struct block *b;
751 unsigned long inst;
d747e0af 752 int offset;
0b0d6c3f 753 int seen_sp_adjust = 0;
bd5635a1 754
e157305c
PS
755 /* Skip the typical prologue instructions. These are the stack adjustment
756 instruction and the instructions that save registers on the stack
757 or in the gcc frame. */
ee5fb959
JK
758 for (offset = 0; offset < 100; offset += 4)
759 {
760 char buf[4];
761 int status;
762
763 status = read_memory_nobpt (pc + offset, buf, 4);
764 if (status)
765 memory_error (status, pc + offset);
766 inst = extract_unsigned_integer (buf, 4);
767
768 if (lenient && is_delayed (inst))
769 continue;
770
e157305c 771 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
0b0d6c3f 772 seen_sp_adjust = 1;
e157305c
PS
773 else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000))
774 continue; /* sw reg,n($sp) */
775 /* reg != $zero */
776 else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
777 continue;
778 else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000))
779 /* sx reg,n($s8) */
780 continue; /* reg != $zero */
781 else if (inst == 0x03A0F021) /* move $s8,$sp */
0b0d6c3f 782 continue;
1b71de8e
PS
783 else if ((inst & 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
784 continue;
0b0d6c3f 785 else
e157305c 786 break;
d747e0af 787 }
e157305c
PS
788 return pc + offset;
789
790/* FIXME schauer. The following code seems no longer necessary if we
791 always skip the typical prologue instructions. */
792
793#if 0
0b0d6c3f
PS
794 if (seen_sp_adjust)
795 return pc + offset;
bd5635a1
RP
796
797 /* Well, it looks like a frameless. Let's make sure.
798 Note that we are not called on the current PC,
799 but on the function`s start PC, and I have definitely
800 seen optimized code that adjusts the SP quite later */
801 b = block_for_pc(pc);
802 if (!b) return pc;
803
dac4929a 804 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
bd5635a1
RP
805 if (!f) return pc;
806 /* Ideally, I would like to use the adjusted info
807 from mips_frame_info(), but for all practical
808 purposes it will not matter (and it would require
809 a different definition of SKIP_PROLOGUE())
810
811 Actually, it would not hurt to skip the storing
812 of arguments on the stack as well. */
0f552c5f 813 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
bd5635a1
RP
814 return pc + 4;
815
816 return pc;
e157305c 817#endif
bd5635a1 818}
c2a0f1cb 819
ee5fb959
JK
820/* Is address PC in the prologue (loosely defined) for function at
821 STARTADDR? */
822
823static int
824mips_in_lenient_prologue (startaddr, pc)
825 CORE_ADDR startaddr;
826 CORE_ADDR pc;
827{
828 CORE_ADDR end_prologue = mips_skip_prologue (startaddr, 1);
829 return pc >= startaddr && pc < end_prologue;
830}
831
ac8cf67d
PS
832/* Given a return value in `regbuf' with a type `valtype',
833 extract and copy its value into `valbuf'. */
834void
835mips_extract_return_value (valtype, regbuf, valbuf)
836 struct type *valtype;
837 char regbuf[REGISTER_BYTES];
838 char *valbuf;
839{
840 int regnum;
841
842 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
843
844 memcpy (valbuf, regbuf + REGISTER_BYTE (regnum), TYPE_LENGTH (valtype));
845#ifdef REGISTER_CONVERT_TO_TYPE
846 REGISTER_CONVERT_TO_TYPE(regnum, valtype, valbuf);
847#endif
848}
849
850/* Given a return value in `regbuf' with a type `valtype',
851 write it's value into the appropriate register. */
852void
853mips_store_return_value (valtype, valbuf)
854 struct type *valtype;
855 char *valbuf;
856{
857 int regnum;
858 char raw_buffer[MAX_REGISTER_RAW_SIZE];
859
860 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
861 memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
862
863#ifdef REGISTER_CONVERT_FROM_TYPE
864 REGISTER_CONVERT_FROM_TYPE(regnum, valtype, raw_buffer);
865#endif
866
867 write_register_bytes(REGISTER_BYTE (regnum), raw_buffer, TYPE_LENGTH (valtype));
868}
869
3127785a
RP
870/* Let the user turn off floating point and set the fence post for
871 heuristic_proc_start. */
c2a0f1cb
ILT
872
873void
874_initialize_mips_tdep ()
875{
876 add_show_from_set
a8172eea 877 (add_set_cmd ("mipsfpu", class_support, var_boolean,
c2a0f1cb
ILT
878 (char *) &mips_fpu,
879 "Set use of floating point coprocessor.\n\
880Turn off to avoid using floating point instructions when calling functions\n\
881or dealing with return values.", &setlist),
882 &showlist);
3127785a
RP
883
884 add_show_from_set
885 (add_set_cmd ("heuristic-fence-post", class_support, var_uinteger,
886 (char *) &heuristic_fence_post,
23d35572
JK
887 "\
888Set the distance searched for the start of a function.\n\
889If you are debugging a stripped executable, GDB needs to search through the\n\
890program for the start of a function. This command sets the distance of the\n\
891search. The only need to set it is when debugging a stripped executable.",
892 &setlist),
3127785a 893 &showlist);
c2a0f1cb 894}
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