Add missing newline in einfo message.
[deliverable/binutils-gdb.git] / gdb / mips-tdep.c
CommitLineData
7d9884b9 1/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
0434c1a0
PS
2 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994
3 Free Software Foundation, Inc.
bd5635a1
RP
4 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
5 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
6
7This file is part of GDB.
8
361bf6ee 9This program is free software; you can redistribute it and/or modify
bd5635a1 10it under the terms of the GNU General Public License as published by
361bf6ee
JG
11the Free Software Foundation; either version 2 of the License, or
12(at your option) any later version.
bd5635a1 13
361bf6ee 14This program is distributed in the hope that it will be useful,
bd5635a1
RP
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License
361bf6ee
JG
20along with this program; if not, write to the Free Software
21Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
bd5635a1 22
bd5635a1 23#include "defs.h"
bd5635a1
RP
24#include "frame.h"
25#include "inferior.h"
26#include "symtab.h"
27#include "value.h"
28#include "gdbcmd.h"
ef08856f 29#include "language.h"
bd5635a1 30#include "gdbcore.h"
62a469e1
SG
31#include "symfile.h"
32#include "objfiles.h"
bd5635a1 33
ee5fb959
JK
34#include "opcode/mips.h"
35
bd5635a1 36#define VM_MIN_ADDRESS (unsigned)0x400000
70126bf9
KH
37
38/* FIXME: Put this declaration in frame.h. */
39extern struct obstack frame_cache_obstack;
bd5635a1 40\f
002a422b 41#if 0
ee5fb959 42static int mips_in_lenient_prologue PARAMS ((CORE_ADDR, CORE_ADDR));
002a422b 43#endif
ee5fb959 44
c2a0f1cb
ILT
45/* Some MIPS boards don't support floating point, so we permit the
46 user to turn it off. */
47int mips_fpu = 1;
48
3127785a
RP
49/* Heuristic_proc_start may hunt through the text section for a long
50 time across a 2400 baud serial line. Allows the user to limit this
51 search. */
52static unsigned int heuristic_fence_post = 0;
53
0f552c5f
JG
54#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
55#define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
56#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
57#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
58#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
59#define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
60#define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
61#define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
62#define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
63#define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
bd5635a1 64#define _PROC_MAGIC_ 0x0F0F0F0F
0f552c5f
JG
65#define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
66#define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
bd5635a1
RP
67
68struct linked_proc_info
69{
70 struct mips_extra_func_info info;
71 struct linked_proc_info *next;
dac4929a 72} *linked_proc_desc_table = NULL;
bd5635a1
RP
73
74\f
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KH
75/* Guaranteed to set fci->saved_regs to some values (it never leaves it
76 NULL). */
77
78void
79mips_find_saved_regs (fci)
80 FRAME fci;
81{
82 int ireg;
83 CORE_ADDR reg_position;
84 /* r0 bit means kernel trap */
85 int kernel_trap;
86 /* What registers have been saved? Bitmasks. */
87 unsigned long gen_mask, float_mask;
88 mips_extra_func_info_t proc_desc;
89
90 fci->saved_regs = (struct frame_saved_regs *)
91 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
92 memset (fci->saved_regs, 0, sizeof (struct frame_saved_regs));
93
94 proc_desc = fci->proc_desc;
95 if (proc_desc == NULL)
96 /* I'm not sure how/whether this can happen. Normally when we can't
97 find a proc_desc, we "synthesize" one using heuristic_proc_desc
98 and set the saved_regs right away. */
99 return;
100
101 kernel_trap = PROC_REG_MASK(proc_desc) & 1;
102 gen_mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
103 float_mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
104
105 if (/* In any frame other than the innermost, we assume that all
106 registers have been saved. This assumes that all register
107 saves in a function happen before the first function
108 call. */
109 fci->next == NULL
110
111 /* In a dummy frame we know exactly where things are saved. */
112 && !PROC_DESC_IS_DUMMY (proc_desc)
113
114 /* Not sure exactly what kernel_trap means, but if it means
115 the kernel saves the registers without a prologue doing it,
116 we better not examine the prologue to see whether registers
117 have been saved yet. */
118 && !kernel_trap)
119 {
120 /* We need to figure out whether the registers that the proc_desc
121 claims are saved have been saved yet. */
122
123 CORE_ADDR addr;
124 int status;
125 char buf[4];
126 unsigned long inst;
127
128 /* Bitmasks; set if we have found a save for the register. */
129 unsigned long gen_save_found = 0;
130 unsigned long float_save_found = 0;
131
132 for (addr = PROC_LOW_ADDR (proc_desc);
133 addr < fci->pc /*&& (gen_mask != gen_save_found
134 || float_mask != float_save_found)*/;
135 addr += 4)
136 {
137 status = read_memory_nobpt (addr, buf, 4);
138 if (status)
139 memory_error (status, addr);
140 inst = extract_unsigned_integer (buf, 4);
141 if (/* sw reg,n($sp) */
142 (inst & 0xffe00000) == 0xafa00000
143
144 /* sw reg,n($r30) */
145 || (inst & 0xffe00000) == 0xafc00000
146
147 /* sd reg,n($sp) */
148 || (inst & 0xffe00000) == 0xffa00000)
149 {
150 /* It might be possible to use the instruction to
151 find the offset, rather than the code below which
152 is based on things being in a certain order in the
153 frame, but figuring out what the instruction's offset
154 is relative to might be a little tricky. */
155 int reg = (inst & 0x001f0000) >> 16;
156 gen_save_found |= (1 << reg);
157 }
158 else if (/* swc1 freg,n($sp) */
159 (inst & 0xffe00000) == 0xe7a00000
160
161 /* swc1 freg,n($r30) */
162 || (inst & 0xffe00000) == 0xe7c00000
163
164 /* sdc1 freg,n($sp) */
165 || (inst & 0xffe00000) == 0xf7a00000)
166
167 {
168 int reg = ((inst & 0x001f0000) >> 16);
169 float_save_found |= (1 << reg);
170 }
171 }
172 gen_mask = gen_save_found;
173 float_mask = float_save_found;
174 }
175
176 /* Fill in the offsets for the registers which gen_mask says
177 were saved. */
178 reg_position = fci->frame + PROC_REG_OFFSET (proc_desc);
179 for (ireg= 31; gen_mask; --ireg, gen_mask <<= 1)
180 if (gen_mask & 0x80000000)
181 {
182 fci->saved_regs->regs[ireg] = reg_position;
183 reg_position -= MIPS_REGSIZE;
184 }
185 /* Fill in the offsets for the registers which float_mask says
186 were saved. */
187 reg_position = fci->frame + PROC_FREG_OFFSET (proc_desc);
188
189 /* The freg_offset points to where the first *double* register
190 is saved. So skip to the high-order word. */
191 reg_position += 4;
192 for (ireg = 31; float_mask; --ireg, float_mask <<= 1)
193 if (float_mask & 0x80000000)
194 {
195 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
196 reg_position -= MIPS_REGSIZE;
197 }
198
199 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
200}
bd5635a1 201
0f552c5f 202static int
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RP
203read_next_frame_reg(fi, regno)
204 FRAME fi;
205 int regno;
206{
e157305c 207 /* If it is the frame for sigtramp we have a complete sigcontext
0434c1a0 208 somewhere above the frame and we get the saved registers from there.
e157305c 209 If the stack layout for sigtramp changes we might have to change these
e03c0cc6 210 constants and the companion fixup_sigtramp in mdebugread.c */
1b71de8e 211#ifndef SIGFRAME_BASE
0434c1a0
PS
212/* To satisfy alignment restrictions the sigcontext is located 4 bytes
213 above the sigtramp frame. */
214#define SIGFRAME_BASE 4
215#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4)
216#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 3 * 4)
5efd597b
PS
217#endif
218#ifndef SIGFRAME_REG_SIZE
e03c0cc6 219#define SIGFRAME_REG_SIZE 4
1b71de8e 220#endif
bd5635a1 221 for (; fi; fi = fi->next)
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KH
222 {
223 if (fi->signal_handler_caller)
224 {
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RP
225 int offset;
226 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
e03c0cc6
ILT
227 else if (regno < 32) offset = (SIGFRAME_REGSAVE_OFF
228 + regno * SIGFRAME_REG_SIZE);
bd5635a1 229 else return 0;
70126bf9
KH
230 return read_memory_integer(fi->frame + offset, MIPS_REGSIZE);
231 }
bd5635a1 232 else if (regno == SP_REGNUM) return fi->frame;
70126bf9
KH
233 else
234 {
235 if (fi->saved_regs == NULL)
236 mips_find_saved_regs (fi);
237 if (fi->saved_regs->regs[regno])
238 return read_memory_integer(fi->saved_regs->regs[regno], MIPS_REGSIZE);
239 }
240 }
241 return read_register (regno);
bd5635a1
RP
242}
243
244int
245mips_frame_saved_pc(frame)
246 FRAME frame;
247{
0f552c5f 248 mips_extra_func_info_t proc_desc = frame->proc_desc;
0434c1a0
PS
249 /* We have to get the saved pc from the sigcontext
250 if it is a signal handler frame. */
251 int pcreg = frame->signal_handler_caller ? PC_REGNUM
252 : (proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM);
0f552c5f 253
bd5635a1
RP
254 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
255 return read_memory_integer(frame->frame - 4, 4);
0f552c5f 256
bd5635a1
RP
257 return read_next_frame_reg(frame, pcreg);
258}
259
260static struct mips_extra_func_info temp_proc_desc;
261static struct frame_saved_regs temp_saved_regs;
262
a8172eea
RP
263/* This fencepost looks highly suspicious to me. Removing it also
264 seems suspicious as it could affect remote debugging across serial
3127785a 265 lines. */
a8172eea 266
0f552c5f
JG
267static CORE_ADDR
268heuristic_proc_start(pc)
bd5635a1
RP
269 CORE_ADDR pc;
270{
bd5635a1 271 CORE_ADDR start_pc = pc;
3127785a 272 CORE_ADDR fence = start_pc - heuristic_fence_post;
0f552c5f
JG
273
274 if (start_pc == 0) return 0;
3127785a
RP
275
276 if (heuristic_fence_post == UINT_MAX
277 || fence < VM_MIN_ADDRESS)
278 fence = VM_MIN_ADDRESS;
0f552c5f 279
bd5635a1
RP
280 /* search back for previous return */
281 for (start_pc -= 4; ; start_pc -= 4)
a8172eea
RP
282 if (start_pc < fence)
283 {
3127785a
RP
284 /* It's not clear to me why we reach this point when
285 stop_soon_quietly, but with this test, at least we
286 don't print out warnings for every child forked (eg, on
287 decstation). 22apr93 rich@cygnus.com. */
288 if (!stop_soon_quietly)
289 {
23d35572
JK
290 static int blurb_printed = 0;
291
3127785a
RP
292 if (fence == VM_MIN_ADDRESS)
293 warning("Hit beginning of text section without finding");
294 else
295 warning("Hit heuristic-fence-post without finding");
296
23d35572
JK
297 warning("enclosing function for address 0x%x", pc);
298 if (!blurb_printed)
299 {
300 printf_filtered ("\
301This warning occurs if you are debugging a function without any symbols\n\
302(for example, in a stripped executable). In that case, you may wish to\n\
303increase the size of the search with the `set heuristic-fence-post' command.\n\
304\n\
305Otherwise, you told GDB there was a function where there isn't one, or\n\
306(more likely) you have encountered a bug in GDB.\n");
307 blurb_printed = 1;
308 }
3127785a
RP
309 }
310
a8172eea
RP
311 return 0;
312 }
bd5635a1
RP
313 else if (ABOUT_TO_RETURN(start_pc))
314 break;
315
316 start_pc += 8; /* skip return, and its delay slot */
317#if 0
318 /* skip nops (usually 1) 0 - is this */
319 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
320 start_pc += 4;
321#endif
322 return start_pc;
323}
324
0f552c5f 325static mips_extra_func_info_t
bd5635a1
RP
326heuristic_proc_desc(start_pc, limit_pc, next_frame)
327 CORE_ADDR start_pc, limit_pc;
328 FRAME next_frame;
329{
330 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
331 CORE_ADDR cur_pc;
332 int frame_size;
333 int has_frame_reg = 0;
e03c0cc6 334 int reg30 = 0; /* Value of $r30. Used by gcc for frame-pointer */
bd5635a1
RP
335 unsigned long reg_mask = 0;
336
337 if (start_pc == 0) return NULL;
4ed97c9a
RP
338 memset(&temp_proc_desc, '\0', sizeof(temp_proc_desc));
339 memset(&temp_saved_regs, '\0', sizeof(struct frame_saved_regs));
a70dc898
RP
340 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
341
bd5635a1
RP
342 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
343 restart:
344 frame_size = 0;
345 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
34df79fc 346 char buf[4];
bd5635a1
RP
347 unsigned long word;
348 int status;
349
34df79fc
JK
350 status = read_memory_nobpt (cur_pc, buf, 4);
351 if (status) memory_error (status, cur_pc);
352 word = extract_unsigned_integer (buf, 4);
353
bd5635a1
RP
354 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
355 frame_size += (-word) & 0xFFFF;
356 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
357 frame_size += (-word) & 0xFFFF;
358 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
359 int reg = (word & 0x001F0000) >> 16;
360 reg_mask |= 1 << reg;
002a422b 361 temp_saved_regs.regs[reg] = sp + (word & 0xffff);
bd5635a1
RP
362 }
363 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
002a422b
JK
364 if ((word & 0xffff) != frame_size)
365 reg30 = sp + (word & 0xffff);
bd5635a1
RP
366 else if (!has_frame_reg) {
367 int alloca_adjust;
368 has_frame_reg = 1;
369 reg30 = read_next_frame_reg(next_frame, 30);
002a422b 370 alloca_adjust = reg30 - (sp + (word & 0xffff));
bd5635a1
RP
371 if (alloca_adjust > 0) {
372 /* FP > SP + frame_size. This may be because
e03c0cc6 373 * of an alloca or somethings similar.
bd5635a1
RP
374 * Fix sp to "pre-alloca" value, and try again.
375 */
376 sp += alloca_adjust;
377 goto restart;
378 }
379 }
380 }
381 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
382 int reg = (word & 0x001F0000) >> 16;
383 reg_mask |= 1 << reg;
002a422b 384 temp_saved_regs.regs[reg] = reg30 + (word & 0xffff);
bd5635a1
RP
385 }
386 }
387 if (has_frame_reg) {
388 PROC_FRAME_REG(&temp_proc_desc) = 30;
389 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
390 }
391 else {
392 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
393 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
394 }
395 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
396 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
397 return &temp_proc_desc;
398}
399
0f552c5f 400static mips_extra_func_info_t
bd5635a1
RP
401find_proc_desc(pc, next_frame)
402 CORE_ADDR pc;
403 FRAME next_frame;
404{
405 mips_extra_func_info_t proc_desc;
0f552c5f 406 struct block *b = block_for_pc(pc);
48be4c35
JK
407 struct symbol *sym;
408 CORE_ADDR startaddr;
409
410 find_pc_partial_function (pc, NULL, &startaddr, NULL);
411 if (b == NULL)
412 sym = NULL;
413 else
414 {
415 if (startaddr > BLOCK_START (b))
416 /* This is the "pathological" case referred to in a comment in
417 print_frame_info. It might be better to move this check into
418 symbol reading. */
419 sym = NULL;
420 else
421 sym = lookup_symbol (MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE,
422 0, NULL);
423 }
0f552c5f
JG
424
425 if (sym)
bd5635a1
RP
426 {
427 /* IF this is the topmost frame AND
428 * (this proc does not have debugging information OR
429 * the PC is in the procedure prologue)
be772100 430 * THEN create a "heuristic" proc_desc (by analyzing
bd5635a1
RP
431 * the actual code) to replace the "official" proc_desc.
432 */
0f552c5f 433 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
bd5635a1
RP
434 if (next_frame == NULL) {
435 struct symtab_and_line val;
436 struct symbol *proc_symbol =
437 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
0f552c5f 438
bd5635a1
RP
439 if (proc_symbol) {
440 val = find_pc_line (BLOCK_START
441 (SYMBOL_BLOCK_VALUE(proc_symbol)),
442 0);
443 val.pc = val.end ? val.end : pc;
444 }
445 if (!proc_symbol || pc < val.pc) {
446 mips_extra_func_info_t found_heuristic =
447 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
448 pc, next_frame);
449 if (found_heuristic) proc_desc = found_heuristic;
450 }
451 }
452 }
453 else
454 {
0f552c5f
JG
455 /* Is linked_proc_desc_table really necessary? It only seems to be used
456 by procedure call dummys. However, the procedures being called ought
457 to have their own proc_descs, and even if they don't,
458 heuristic_proc_desc knows how to create them! */
459
bd5635a1
RP
460 register struct linked_proc_info *link;
461 for (link = linked_proc_desc_table; link; link = link->next)
462 if (PROC_LOW_ADDR(&link->info) <= pc
463 && PROC_HIGH_ADDR(&link->info) > pc)
464 return &link->info;
23d35572 465
48be4c35
JK
466 if (startaddr == 0)
467 startaddr = heuristic_proc_start (pc);
468
bd5635a1 469 proc_desc =
48be4c35 470 heuristic_proc_desc (startaddr, pc, next_frame);
bd5635a1
RP
471 }
472 return proc_desc;
473}
474
475mips_extra_func_info_t cached_proc_desc;
476
0f552c5f
JG
477FRAME_ADDR
478mips_frame_chain(frame)
bd5635a1
RP
479 FRAME frame;
480{
bd5635a1
RP
481 mips_extra_func_info_t proc_desc;
482 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
be772100 483
0f552c5f
JG
484 if (saved_pc == 0 || inside_entry_file (saved_pc))
485 return 0;
486
bd5635a1 487 proc_desc = find_proc_desc(saved_pc, frame);
0f552c5f
JG
488 if (!proc_desc)
489 return 0;
490
bd5635a1 491 cached_proc_desc = proc_desc;
e797b4bc
JK
492
493 /* If no frame pointer and frame size is zero, we must be at end
494 of stack (or otherwise hosed). If we don't check frame size,
495 we loop forever if we see a zero size frame. */
496 if (PROC_FRAME_REG (proc_desc) == SP_REGNUM
3f528883 497 && PROC_FRAME_OFFSET (proc_desc) == 0
199b2450
TL
498 /* The previous frame from a sigtramp frame might be frameless
499 and have frame size zero. */
500 && !frame->signal_handler_caller)
bdef72d2
JK
501 return 0;
502 else
503 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
504 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
505}
506
507void
508init_extra_frame_info(fci)
509 struct frame_info *fci;
510{
bd5635a1 511 /* Use proc_desc calculated in frame_chain */
ee5fb959
JK
512 mips_extra_func_info_t proc_desc =
513 fci->next ? cached_proc_desc : find_proc_desc(fci->pc, fci->next);
0f552c5f 514
70126bf9 515 fci->saved_regs = NULL;
bd5635a1 516 fci->proc_desc =
ee5fb959 517 proc_desc == &temp_proc_desc ? 0 : proc_desc;
bd5635a1
RP
518 if (proc_desc)
519 {
c2a0f1cb 520 /* Fixup frame-pointer - only needed for top frame */
5efd597b
PS
521 /* This may not be quite right, if proc has a real frame register.
522 Get the value of the frame relative sp, procedure might have been
523 interrupted by a signal at it's very start. */
70126bf9
KH
524 if (fci->pc == PROC_LOW_ADDR (proc_desc)
525 && !PROC_DESC_IS_DUMMY (proc_desc))
526 fci->frame = read_next_frame_reg (fci->next, SP_REGNUM);
c2a0f1cb 527 else
70126bf9
KH
528 fci->frame =
529 read_next_frame_reg (fci->next, PROC_FRAME_REG (proc_desc))
530 + PROC_FRAME_OFFSET (proc_desc);
bd5635a1 531
48be4c35 532 if (proc_desc == &temp_proc_desc)
ee5fb959 533 {
70126bf9
KH
534 fci->saved_regs = (struct frame_saved_regs*)
535 obstack_alloc (&frame_cache_obstack,
536 sizeof (struct frame_saved_regs));
537 *fci->saved_regs = temp_saved_regs;
538 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
ee5fb959 539 }
bd5635a1
RP
540
541 /* hack: if argument regs are saved, guess these contain args */
542 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
543 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
544 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
545 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
546 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
bd5635a1 547 }
bd5635a1
RP
548}
549
a70dc898
RP
550/* MIPS stack frames are almost impenetrable. When execution stops,
551 we basically have to look at symbol information for the function
552 that we stopped in, which tells us *which* register (if any) is
553 the base of the frame pointer, and what offset from that register
554 the frame itself is at.
555
556 This presents a problem when trying to examine a stack in memory
557 (that isn't executing at the moment), using the "frame" command. We
558 don't have a PC, nor do we have any registers except SP.
559
560 This routine takes two arguments, SP and PC, and tries to make the
561 cached frames look as if these two arguments defined a frame on the
562 cache. This allows the rest of info frame to extract the important
563 arguments without difficulty. */
564
565FRAME
c2a0f1cb
ILT
566setup_arbitrary_frame (argc, argv)
567 int argc;
568 FRAME_ADDR *argv;
a70dc898 569{
c2a0f1cb
ILT
570 if (argc != 2)
571 error ("MIPS frame specifications require two arguments: sp and pc");
572
573 return create_new_frame (argv[0], argv[1]);
a70dc898
RP
574}
575
bd5635a1 576
0f552c5f
JG
577CORE_ADDR
578mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
bd5635a1
RP
579 int nargs;
580 value *args;
581 CORE_ADDR sp;
582 int struct_return;
583 CORE_ADDR struct_addr;
584{
bd5635a1 585 register i;
70126bf9 586 int accumulate_size = struct_return ? MIPS_REGSIZE : 0;
bd5635a1
RP
587 struct mips_arg { char *contents; int len; int offset; };
588 struct mips_arg *mips_args =
70126bf9 589 (struct mips_arg*)alloca((nargs + 4) * sizeof(struct mips_arg));
bd5635a1 590 register struct mips_arg *m_arg;
70126bf9
KH
591 int fake_args = 0;
592
bd5635a1
RP
593 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
594 extern value value_arg_coerce();
595 value arg = value_arg_coerce (args[i]);
596 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
597 /* This entire mips-specific routine is because doubles must be aligned
598 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
599 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
600 * breaks their varargs implementation...). A correct solution
601 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
602 * in stdarg.h/varargs.h).
70126bf9
KH
603 * On the 64 bit r4000 we always pass the first four arguments
604 * using eight bytes each, so that we can load them up correctly
605 * in CALL_DUMMY.
bd5635a1 606 */
70126bf9
KH
607 if (m_arg->len > 4)
608 accumulate_size = (accumulate_size + 7) & -8;
bd5635a1 609 m_arg->offset = accumulate_size;
bd5635a1 610 m_arg->contents = VALUE_CONTENTS(arg);
70126bf9
KH
611#ifndef GDB_TARGET_IS_MIPS64
612 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
613#else
614 if (accumulate_size >= 4 * MIPS_REGSIZE)
615 accumulate_size = (accumulate_size + m_arg->len + 3) &~ 4;
616 else
617 {
618 static char zeroes[8] = { 0 };
619 int len = m_arg->len;
620
621 if (len < 8)
622 {
623#if TARGET_BYTE_ORDER == BIG_ENDIAN
624 m_arg->offset += 8 - len;
625#endif
626 ++m_arg;
627 m_arg->len = 8 - len;
628 m_arg->contents = zeroes;
629#if TARGET_BYTE_ORDER == BIG_ENDIAN
630 m_arg->offset = accumulate_size;
631#else
632 m_arg->offset = accumulate_size + len;
633#endif
634 ++fake_args;
635 }
636 accumulate_size = (accumulate_size + len + 7) & ~8;
637 }
638#endif
bd5635a1
RP
639 }
640 accumulate_size = (accumulate_size + 7) & (-8);
70126bf9
KH
641 if (accumulate_size < 4 * MIPS_REGSIZE)
642 accumulate_size = 4 * MIPS_REGSIZE;
bd5635a1 643 sp -= accumulate_size;
70126bf9 644 for (i = nargs + fake_args; m_arg--, --i >= 0; )
bd5635a1 645 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
5efd597b
PS
646 if (struct_return)
647 {
648 char buf[TARGET_PTR_BIT / HOST_CHAR_BIT];
649
650 store_address (buf, sizeof buf, struct_addr);
651 write_memory (sp, buf, sizeof buf);
652 }
bd5635a1
RP
653 return sp;
654}
655
656/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
e03c0cc6 657#define MASK(i,j) (((1 << ((j)+1))-1) ^ ((1 << (i))-1))
bd5635a1
RP
658
659void
660mips_push_dummy_frame()
661{
5efd597b 662 char buffer[MAX_REGISTER_RAW_SIZE];
bd5635a1
RP
663 int ireg;
664 struct linked_proc_info *link = (struct linked_proc_info*)
665 xmalloc(sizeof(struct linked_proc_info));
666 mips_extra_func_info_t proc_desc = &link->info;
667 CORE_ADDR sp = read_register (SP_REGNUM);
668 CORE_ADDR save_address;
bd5635a1
RP
669 link->next = linked_proc_desc_table;
670 linked_proc_desc_table = link;
671#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
672#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
673#define GEN_REG_SAVE_COUNT 22
674#define FLOAT_REG_SAVE_MASK MASK(0,19)
675#define FLOAT_REG_SAVE_COUNT 20
676#define SPECIAL_REG_SAVE_COUNT 4
677 /*
678 * The registers we must save are all those not preserved across
679 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
680 * In addition, we must save the PC, and PUSH_FP_REGNUM.
681 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
682 *
683 * Dummy frame layout:
684 * (high memory)
685 * Saved PC
686 * Saved MMHI, MMLO, FPC_CSR
687 * Saved R31
688 * Saved R28
689 * ...
690 * Saved R1
691 * Saved D18 (i.e. F19, F18)
692 * ...
693 * Saved D0 (i.e. F1, F0)
c2a0f1cb 694 * CALL_DUMMY (subroutine stub; see tm-mips.h)
bd5635a1
RP
695 * Parameter build area (not yet implemented)
696 * (low memory)
697 */
698 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
c2a0f1cb 699 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
bd5635a1
RP
700 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
701 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
702 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
703 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
704 /* save general registers */
705 save_address = sp + PROC_REG_OFFSET(proc_desc);
706 for (ireg = 32; --ireg >= 0; )
707 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
708 {
5efd597b
PS
709 store_unsigned_integer (buffer, REGISTER_RAW_SIZE (ireg),
710 read_register (ireg));
711 write_memory (save_address, buffer, REGISTER_RAW_SIZE (ireg));
bd5635a1
RP
712 save_address -= 4;
713 }
0b0d6c3f
PS
714 /* save floating-points registers starting with high order word */
715 save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
bd5635a1
RP
716 for (ireg = 32; --ireg >= 0; )
717 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
718 {
5efd597b
PS
719 store_unsigned_integer (buffer, 4, read_register (ireg + FP0_REGNUM));
720 write_memory (save_address, buffer, 4);
bd5635a1
RP
721 save_address -= 4;
722 }
723 write_register (PUSH_FP_REGNUM, sp);
724 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
725 PROC_FRAME_OFFSET(proc_desc) = 0;
5efd597b
PS
726 store_unsigned_integer (buffer, REGISTER_RAW_SIZE (PC_REGNUM),
727 read_register (PC_REGNUM));
728 write_memory (sp - 4, buffer, REGISTER_RAW_SIZE (PC_REGNUM));
729 store_unsigned_integer (buffer, REGISTER_RAW_SIZE (HI_REGNUM),
730 read_register (HI_REGNUM));
731 write_memory (sp - 8, buffer, REGISTER_RAW_SIZE (HI_REGNUM));
732 store_unsigned_integer (buffer, REGISTER_RAW_SIZE (LO_REGNUM),
733 read_register (LO_REGNUM));
734 write_memory (sp - 12, buffer, REGISTER_RAW_SIZE (LO_REGNUM));
735 store_unsigned_integer
736 (buffer,
737 REGISTER_RAW_SIZE (FCRCS_REGNUM),
738 mips_fpu ? read_register (FCRCS_REGNUM) : 0);
739 write_memory (sp - 16, buffer, REGISTER_RAW_SIZE (FCRCS_REGNUM));
c2a0f1cb
ILT
740 sp -= 4 * (GEN_REG_SAVE_COUNT
741 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
742 + SPECIAL_REG_SAVE_COUNT);
bd5635a1
RP
743 write_register (SP_REGNUM, sp);
744 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
745 PROC_HIGH_ADDR(proc_desc) = sp;
746 SET_PROC_DESC_IS_DUMMY(proc_desc);
747 PROC_PC_REG(proc_desc) = RA_REGNUM;
748}
749
750void
751mips_pop_frame()
dac4929a
SG
752{
753 register int regnum;
bd5635a1
RP
754 FRAME frame = get_current_frame ();
755 CORE_ADDR new_sp = frame->frame;
dac4929a 756
a70dc898 757 mips_extra_func_info_t proc_desc = frame->proc_desc;
dac4929a
SG
758
759 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
70126bf9
KH
760 if (frame->saved_regs == NULL)
761 mips_find_saved_regs (frame);
dac4929a
SG
762 if (proc_desc)
763 {
764 for (regnum = 32; --regnum >= 0; )
765 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
766 write_register (regnum,
767 read_memory_integer (frame->saved_regs->regs[regnum],
768 4));
769 for (regnum = 32; --regnum >= 0; )
770 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
771 write_register (regnum + FP0_REGNUM,
772 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
773 }
774 write_register (SP_REGNUM, new_sp);
775 flush_cached_frames ();
776 /* We let mips_init_extra_frame_info figure out the frame pointer */
777 set_current_frame (create_new_frame (0, read_pc ()));
778
199b2450 779 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
bd5635a1 780 {
dac4929a
SG
781 struct linked_proc_info *pi_ptr, *prev_ptr;
782
783 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
784 pi_ptr != NULL;
785 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
786 {
787 if (&pi_ptr->info == proc_desc)
788 break;
789 }
790
791 if (pi_ptr == NULL)
792 error ("Can't locate dummy extra frame info\n");
793
794 if (prev_ptr != NULL)
795 prev_ptr->next = pi_ptr->next;
796 else
797 linked_proc_desc_table = pi_ptr->next;
798
799 free (pi_ptr);
800
bd5635a1
RP
801 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
802 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
c2a0f1cb
ILT
803 if (mips_fpu)
804 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
bd5635a1 805 }
bd5635a1
RP
806}
807
0f552c5f 808static void
a70dc898 809mips_print_register (regnum, all)
bd5635a1
RP
810 int regnum, all;
811{
48be4c35 812 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
bd5635a1 813
48be4c35
JK
814 /* Get the data in raw format. */
815 if (read_relative_register_raw_bytes (regnum, raw_buffer))
816 {
817 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
818 return;
819 }
820
821 /* If an even floating pointer register, also print as double. */
822 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
823 && !((regnum-FP0_REGNUM) & 1)) {
824 char dbuffer[MAX_REGISTER_RAW_SIZE];
825
826 read_relative_register_raw_bytes (regnum, dbuffer);
827 read_relative_register_raw_bytes (regnum+1, dbuffer+4);
ac8cf67d 828#ifdef REGISTER_CONVERT_TO_TYPE
48be4c35 829 REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer);
ac8cf67d 830#endif
48be4c35
JK
831 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
832 val_print (builtin_type_double, dbuffer, 0,
199b2450 833 gdb_stdout, 0, 1, 0, Val_pretty_default);
48be4c35
JK
834 printf_filtered ("); ");
835 }
199b2450 836 fputs_filtered (reg_names[regnum], gdb_stdout);
48be4c35
JK
837
838 /* The problem with printing numeric register names (r26, etc.) is that
839 the user can't use them on input. Probably the best solution is to
840 fix it so that either the numeric or the funky (a2, etc.) names
841 are accepted on input. */
842 if (regnum < 32)
843 printf_filtered ("(r%d): ", regnum);
844 else
845 printf_filtered (": ");
bd5635a1 846
48be4c35
JK
847 /* If virtual format is floating, print it that way. */
848 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
849 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
850 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
199b2450 851 gdb_stdout, 0, 1, 0, Val_pretty_default);
48be4c35
JK
852 }
853 /* Else print as integer in hex. */
854 else
855 {
856 long val;
bd5635a1 857
48be4c35
JK
858 val = extract_signed_integer (raw_buffer,
859 REGISTER_RAW_SIZE (regnum));
34df79fc 860
48be4c35
JK
861 if (val == 0)
862 printf_filtered ("0");
863 else if (all)
864 /* FIXME: We should be printing this in a fixed field width, so that
865 registers line up. */
866 printf_filtered (local_hex_format(), val);
867 else
199b2450 868 printf_filtered ("%s=%ld", local_hex_string(val), val);
48be4c35 869 }
bd5635a1
RP
870}
871
d8b3b00e 872/* Replacement for generic do_registers_info. */
0f552c5f 873void
361bf6ee 874mips_do_registers_info (regnum, fpregs)
bd5635a1 875 int regnum;
361bf6ee 876 int fpregs;
bd5635a1
RP
877{
878 if (regnum != -1) {
879 mips_print_register (regnum, 0);
880 printf_filtered ("\n");
881 }
882 else {
883 for (regnum = 0; regnum < NUM_REGS; ) {
d8b3b00e
JG
884 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
885 regnum++;
886 continue;
887 }
bd5635a1
RP
888 mips_print_register (regnum, 1);
889 regnum++;
890 if ((regnum & 3) == 0 || regnum == NUM_REGS)
891 printf_filtered (";\n");
892 else
893 printf_filtered ("; ");
894 }
895 }
896}
897/* Return number of args passed to a frame. described by FIP.
898 Can return -1, meaning no way to tell. */
899
0f552c5f 900int
bd5635a1
RP
901mips_frame_num_args(fip)
902 FRAME fip;
903{
904#if 0
905 struct chain_info_t *p;
906
907 p = mips_find_cached_frame(FRAME_FP(fip));
908 if (p->valid)
909 return p->the_info.numargs;
910#endif
911 return -1;
912}
407a8389 913\f
002a422b 914#if 0
427fec5d 915/* Is this a branch with a delay slot? */
ee5fb959
JK
916static int
917is_delayed (insn)
918 unsigned long insn;
919{
920 int i;
921 for (i = 0; i < NUMOPCODES; ++i)
922 if (mips_opcodes[i].pinfo != INSN_MACRO
923 && (insn & mips_opcodes[i].mask) == mips_opcodes[i].match)
924 break;
427fec5d
JK
925 return (i < NUMOPCODES
926 && (mips_opcodes[i].pinfo & (INSN_UNCOND_BRANCH_DELAY
927 | INSN_COND_BRANCH_DELAY
928 | INSN_COND_BRANCH_LIKELY)));
ee5fb959 929}
002a422b 930#endif
ee5fb959
JK
931
932/* To skip prologues, I use this predicate. Returns either PC itself
933 if the code at PC does not look like a function prologue; otherwise
934 returns an address that (if we're lucky) follows the prologue. If
935 LENIENT, then we must skip everything which is involved in setting
936 up the frame (it's OK to skip more, just so long as we don't skip
937 anything which might clobber the registers which are being saved.
938 We must skip more in the case where part of the prologue is in the
939 delay slot of a non-prologue instruction). */
bd5635a1 940
be772100 941CORE_ADDR
ee5fb959 942mips_skip_prologue (pc, lenient)
bd5635a1 943 CORE_ADDR pc;
ee5fb959 944 int lenient;
bd5635a1 945{
bd5635a1 946 unsigned long inst;
d747e0af 947 int offset;
0b0d6c3f 948 int seen_sp_adjust = 0;
bd5635a1 949
e157305c
PS
950 /* Skip the typical prologue instructions. These are the stack adjustment
951 instruction and the instructions that save registers on the stack
952 or in the gcc frame. */
ee5fb959
JK
953 for (offset = 0; offset < 100; offset += 4)
954 {
955 char buf[4];
956 int status;
957
958 status = read_memory_nobpt (pc + offset, buf, 4);
959 if (status)
960 memory_error (status, pc + offset);
961 inst = extract_unsigned_integer (buf, 4);
962
002a422b 963#if 0
ee5fb959
JK
964 if (lenient && is_delayed (inst))
965 continue;
002a422b 966#endif
ee5fb959 967
e157305c 968 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
0b0d6c3f 969 seen_sp_adjust = 1;
e157305c
PS
970 else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000))
971 continue; /* sw reg,n($sp) */
972 /* reg != $zero */
973 else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
974 continue;
975 else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000))
976 /* sx reg,n($s8) */
977 continue; /* reg != $zero */
978 else if (inst == 0x03A0F021) /* move $s8,$sp */
0b0d6c3f 979 continue;
1b71de8e
PS
980 else if ((inst & 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
981 continue;
e03c0cc6
ILT
982 else if ((inst & 0xffff0000) == 0x3c1c0000) /* lui $gp,n */
983 continue;
984 else if ((inst & 0xffff0000) == 0x279c0000) /* addiu $gp,$gp,n */
985 continue;
986 else if (inst == 0x0399e021 /* addu $gp,$gp,$t9 */
987 || inst == 0x033ce021) /* addu $gp,$t9,$gp */
988 continue;
0b0d6c3f 989 else
e157305c 990 break;
d747e0af 991 }
e157305c
PS
992 return pc + offset;
993
994/* FIXME schauer. The following code seems no longer necessary if we
995 always skip the typical prologue instructions. */
996
997#if 0
0b0d6c3f
PS
998 if (seen_sp_adjust)
999 return pc + offset;
bd5635a1
RP
1000
1001 /* Well, it looks like a frameless. Let's make sure.
1002 Note that we are not called on the current PC,
1003 but on the function`s start PC, and I have definitely
1004 seen optimized code that adjusts the SP quite later */
1005 b = block_for_pc(pc);
1006 if (!b) return pc;
1007
dac4929a 1008 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
bd5635a1
RP
1009 if (!f) return pc;
1010 /* Ideally, I would like to use the adjusted info
1011 from mips_frame_info(), but for all practical
1012 purposes it will not matter (and it would require
1013 a different definition of SKIP_PROLOGUE())
1014
1015 Actually, it would not hurt to skip the storing
1016 of arguments on the stack as well. */
0f552c5f 1017 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
bd5635a1
RP
1018 return pc + 4;
1019
1020 return pc;
e157305c 1021#endif
bd5635a1 1022}
c2a0f1cb 1023
002a422b
JK
1024#if 0
1025/* The lenient prologue stuff should be superceded by the code in
1026 init_extra_frame_info which looks to see whether the stores mentioned
1027 in the proc_desc have actually taken place. */
1028
ee5fb959
JK
1029/* Is address PC in the prologue (loosely defined) for function at
1030 STARTADDR? */
1031
1032static int
1033mips_in_lenient_prologue (startaddr, pc)
1034 CORE_ADDR startaddr;
1035 CORE_ADDR pc;
1036{
1037 CORE_ADDR end_prologue = mips_skip_prologue (startaddr, 1);
1038 return pc >= startaddr && pc < end_prologue;
1039}
002a422b 1040#endif
ee5fb959 1041
ac8cf67d
PS
1042/* Given a return value in `regbuf' with a type `valtype',
1043 extract and copy its value into `valbuf'. */
1044void
1045mips_extract_return_value (valtype, regbuf, valbuf)
1046 struct type *valtype;
1047 char regbuf[REGISTER_BYTES];
1048 char *valbuf;
1049{
1050 int regnum;
1051
1052 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
1053
1054 memcpy (valbuf, regbuf + REGISTER_BYTE (regnum), TYPE_LENGTH (valtype));
1055#ifdef REGISTER_CONVERT_TO_TYPE
1056 REGISTER_CONVERT_TO_TYPE(regnum, valtype, valbuf);
1057#endif
1058}
1059
1060/* Given a return value in `regbuf' with a type `valtype',
1061 write it's value into the appropriate register. */
1062void
1063mips_store_return_value (valtype, valbuf)
1064 struct type *valtype;
1065 char *valbuf;
1066{
1067 int regnum;
1068 char raw_buffer[MAX_REGISTER_RAW_SIZE];
1069
1070 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
1071 memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
1072
1073#ifdef REGISTER_CONVERT_FROM_TYPE
1074 REGISTER_CONVERT_FROM_TYPE(regnum, valtype, raw_buffer);
1075#endif
1076
1077 write_register_bytes(REGISTER_BYTE (regnum), raw_buffer, TYPE_LENGTH (valtype));
1078}
1079
e03c0cc6
ILT
1080/* These exist in mdebugread.c. */
1081extern CORE_ADDR sigtramp_address, sigtramp_end;
1082extern void fixup_sigtramp PARAMS ((void));
1083
1084/* Exported procedure: Is PC in the signal trampoline code */
1085
1086int
1087in_sigtramp (pc, ignore)
1088 CORE_ADDR pc;
1089 char *ignore; /* function name */
1090{
1091 if (sigtramp_address == 0)
1092 fixup_sigtramp ();
1093 return (pc >= sigtramp_address && pc < sigtramp_end);
1094}
1095
8b52d486 1096static void reinit_frame_cache_sfunc PARAMS ((char *, int,
427fec5d
JK
1097 struct cmd_list_element *));
1098
1099/* Just like reinit_frame_cache, but with the right arguments to be
1100 callable as an sfunc. */
1101static void
1102reinit_frame_cache_sfunc (args, from_tty, c)
1103 char *args;
1104 int from_tty;
1105 struct cmd_list_element *c;
1106{
1107 reinit_frame_cache ();
1108}
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1109
1110void
1111_initialize_mips_tdep ()
1112{
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1113 struct cmd_list_element *c;
1114
1115 /* Let the user turn off floating point and set the fence post for
1116 heuristic_proc_start. */
1117
c2a0f1cb 1118 add_show_from_set
a8172eea 1119 (add_set_cmd ("mipsfpu", class_support, var_boolean,
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1120 (char *) &mips_fpu,
1121 "Set use of floating point coprocessor.\n\
1122Turn off to avoid using floating point instructions when calling functions\n\
1123or dealing with return values.", &setlist),
1124 &showlist);
3127785a 1125
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1126 /* We really would like to have both "0" and "unlimited" work, but
1127 command.c doesn't deal with that. So make it a var_zinteger
1128 because the user can always use "999999" or some such for unlimited. */
1129 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
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1130 (char *) &heuristic_fence_post,
1131 "\
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1132Set the distance searched for the start of a function.\n\
1133If you are debugging a stripped executable, GDB needs to search through the\n\
1134program for the start of a function. This command sets the distance of the\n\
1135search. The only need to set it is when debugging a stripped executable.",
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1136 &setlist);
1137 /* We need to throw away the frame cache when we set this, since it
1138 might change our ability to get backtraces. */
1139 c->function.sfunc = reinit_frame_cache_sfunc;
1140 add_show_from_set (c, &showlist);
c2a0f1cb 1141}
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