* serial.h (serial_fdopen): Make parameter const to match
[deliverable/binutils-gdb.git] / gdb / mips-tdep.c
CommitLineData
7d9884b9 1/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
c2a0f1cb 2 Copyright 1988, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
bd5635a1
RP
3 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
4 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
6This file is part of GDB.
7
361bf6ee 8This program is free software; you can redistribute it and/or modify
bd5635a1 9it under the terms of the GNU General Public License as published by
361bf6ee
JG
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
bd5635a1 12
361bf6ee 13This program is distributed in the hope that it will be useful,
bd5635a1
RP
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
361bf6ee
JG
19along with this program; if not, write to the Free Software
20Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
bd5635a1 21
bd5635a1 22#include "defs.h"
bd5635a1
RP
23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "value.h"
27#include "gdbcmd.h"
ef08856f 28#include "language.h"
bd5635a1 29#include "gdbcore.h"
62a469e1
SG
30#include "symfile.h"
31#include "objfiles.h"
bd5635a1 32
ee5fb959
JK
33#include "opcode/mips.h"
34
bd5635a1 35#define VM_MIN_ADDRESS (unsigned)0x400000
bd5635a1 36\f
002a422b 37#if 0
ee5fb959 38static int mips_in_lenient_prologue PARAMS ((CORE_ADDR, CORE_ADDR));
002a422b 39#endif
ee5fb959 40
c2a0f1cb
ILT
41/* Some MIPS boards don't support floating point, so we permit the
42 user to turn it off. */
43int mips_fpu = 1;
44
3127785a
RP
45/* Heuristic_proc_start may hunt through the text section for a long
46 time across a 2400 baud serial line. Allows the user to limit this
47 search. */
48static unsigned int heuristic_fence_post = 0;
49
0f552c5f
JG
50#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
51#define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
52#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
53#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
54#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
55#define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
56#define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
57#define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
58#define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
59#define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
bd5635a1 60#define _PROC_MAGIC_ 0x0F0F0F0F
0f552c5f
JG
61#define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
62#define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
bd5635a1
RP
63
64struct linked_proc_info
65{
66 struct mips_extra_func_info info;
67 struct linked_proc_info *next;
dac4929a 68} *linked_proc_desc_table = NULL;
bd5635a1
RP
69
70\f
71#define READ_FRAME_REG(fi, regno) read_next_frame_reg((fi)->next, regno)
72
0f552c5f 73static int
bd5635a1
RP
74read_next_frame_reg(fi, regno)
75 FRAME fi;
76 int regno;
77{
e157305c
PS
78 /* If it is the frame for sigtramp we have a complete sigcontext
79 immediately below the frame and we get the saved registers from there.
80 If the stack layout for sigtramp changes we might have to change these
81 constants and the companion fixup_sigtramp in mipsread.c */
1b71de8e 82#ifndef SIGFRAME_BASE
e157305c
PS
83#define SIGFRAME_BASE 0x12c /* sizeof(sigcontext) */
84#define SIGFRAME_PC_OFF (-SIGFRAME_BASE + 2 * 4)
85#define SIGFRAME_REGSAVE_OFF (-SIGFRAME_BASE + 3 * 4)
1b71de8e 86#endif
bd5635a1
RP
87 for (; fi; fi = fi->next)
88 if (in_sigtramp(fi->pc, 0)) {
bd5635a1
RP
89 int offset;
90 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
e157305c 91 else if (regno < 32) offset = SIGFRAME_REGSAVE_OFF + regno * 4;
bd5635a1
RP
92 else return 0;
93 return read_memory_integer(fi->frame + offset, 4);
94 }
95 else if (regno == SP_REGNUM) return fi->frame;
96 else if (fi->saved_regs->regs[regno])
97 return read_memory_integer(fi->saved_regs->regs[regno], 4);
98 return read_register(regno);
99}
100
101int
102mips_frame_saved_pc(frame)
103 FRAME frame;
104{
0f552c5f 105 mips_extra_func_info_t proc_desc = frame->proc_desc;
bd5635a1 106 int pcreg = proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM;
0f552c5f 107
bd5635a1
RP
108 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
109 return read_memory_integer(frame->frame - 4, 4);
0f552c5f 110
bd5635a1
RP
111 return read_next_frame_reg(frame, pcreg);
112}
113
114static struct mips_extra_func_info temp_proc_desc;
115static struct frame_saved_regs temp_saved_regs;
116
a8172eea
RP
117/* This fencepost looks highly suspicious to me. Removing it also
118 seems suspicious as it could affect remote debugging across serial
3127785a 119 lines. */
a8172eea 120
0f552c5f
JG
121static CORE_ADDR
122heuristic_proc_start(pc)
bd5635a1
RP
123 CORE_ADDR pc;
124{
bd5635a1 125 CORE_ADDR start_pc = pc;
3127785a 126 CORE_ADDR fence = start_pc - heuristic_fence_post;
0f552c5f
JG
127
128 if (start_pc == 0) return 0;
3127785a
RP
129
130 if (heuristic_fence_post == UINT_MAX
131 || fence < VM_MIN_ADDRESS)
132 fence = VM_MIN_ADDRESS;
0f552c5f 133
bd5635a1
RP
134 /* search back for previous return */
135 for (start_pc -= 4; ; start_pc -= 4)
a8172eea
RP
136 if (start_pc < fence)
137 {
3127785a
RP
138 /* It's not clear to me why we reach this point when
139 stop_soon_quietly, but with this test, at least we
140 don't print out warnings for every child forked (eg, on
141 decstation). 22apr93 rich@cygnus.com. */
142 if (!stop_soon_quietly)
143 {
23d35572
JK
144 static int blurb_printed = 0;
145
3127785a
RP
146 if (fence == VM_MIN_ADDRESS)
147 warning("Hit beginning of text section without finding");
148 else
149 warning("Hit heuristic-fence-post without finding");
150
23d35572
JK
151 warning("enclosing function for address 0x%x", pc);
152 if (!blurb_printed)
153 {
154 printf_filtered ("\
155This warning occurs if you are debugging a function without any symbols\n\
156(for example, in a stripped executable). In that case, you may wish to\n\
157increase the size of the search with the `set heuristic-fence-post' command.\n\
158\n\
159Otherwise, you told GDB there was a function where there isn't one, or\n\
160(more likely) you have encountered a bug in GDB.\n");
161 blurb_printed = 1;
162 }
3127785a
RP
163 }
164
a8172eea
RP
165 return 0;
166 }
bd5635a1
RP
167 else if (ABOUT_TO_RETURN(start_pc))
168 break;
169
170 start_pc += 8; /* skip return, and its delay slot */
171#if 0
172 /* skip nops (usually 1) 0 - is this */
173 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
174 start_pc += 4;
175#endif
176 return start_pc;
177}
178
0f552c5f 179static mips_extra_func_info_t
bd5635a1
RP
180heuristic_proc_desc(start_pc, limit_pc, next_frame)
181 CORE_ADDR start_pc, limit_pc;
182 FRAME next_frame;
183{
184 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
185 CORE_ADDR cur_pc;
186 int frame_size;
187 int has_frame_reg = 0;
188 int reg30; /* Value of $r30. Used by gcc for frame-pointer */
189 unsigned long reg_mask = 0;
190
191 if (start_pc == 0) return NULL;
4ed97c9a
RP
192 memset(&temp_proc_desc, '\0', sizeof(temp_proc_desc));
193 memset(&temp_saved_regs, '\0', sizeof(struct frame_saved_regs));
a70dc898
RP
194 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
195
bd5635a1
RP
196 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
197 restart:
198 frame_size = 0;
199 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
34df79fc 200 char buf[4];
bd5635a1
RP
201 unsigned long word;
202 int status;
203
34df79fc
JK
204 status = read_memory_nobpt (cur_pc, buf, 4);
205 if (status) memory_error (status, cur_pc);
206 word = extract_unsigned_integer (buf, 4);
207
bd5635a1
RP
208 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
209 frame_size += (-word) & 0xFFFF;
210 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
211 frame_size += (-word) & 0xFFFF;
212 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
213 int reg = (word & 0x001F0000) >> 16;
214 reg_mask |= 1 << reg;
002a422b 215 temp_saved_regs.regs[reg] = sp + (word & 0xffff);
bd5635a1
RP
216 }
217 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
002a422b
JK
218 if ((word & 0xffff) != frame_size)
219 reg30 = sp + (word & 0xffff);
bd5635a1
RP
220 else if (!has_frame_reg) {
221 int alloca_adjust;
222 has_frame_reg = 1;
223 reg30 = read_next_frame_reg(next_frame, 30);
002a422b 224 alloca_adjust = reg30 - (sp + (word & 0xffff));
bd5635a1
RP
225 if (alloca_adjust > 0) {
226 /* FP > SP + frame_size. This may be because
227 /* of an alloca or somethings similar.
228 * Fix sp to "pre-alloca" value, and try again.
229 */
230 sp += alloca_adjust;
231 goto restart;
232 }
233 }
234 }
235 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
236 int reg = (word & 0x001F0000) >> 16;
237 reg_mask |= 1 << reg;
002a422b 238 temp_saved_regs.regs[reg] = reg30 + (word & 0xffff);
bd5635a1
RP
239 }
240 }
241 if (has_frame_reg) {
242 PROC_FRAME_REG(&temp_proc_desc) = 30;
243 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
244 }
245 else {
246 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
247 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
248 }
249 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
250 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
251 return &temp_proc_desc;
252}
253
0f552c5f 254static mips_extra_func_info_t
bd5635a1
RP
255find_proc_desc(pc, next_frame)
256 CORE_ADDR pc;
257 FRAME next_frame;
258{
259 mips_extra_func_info_t proc_desc;
0f552c5f 260 struct block *b = block_for_pc(pc);
48be4c35
JK
261 struct symbol *sym;
262 CORE_ADDR startaddr;
263
264 find_pc_partial_function (pc, NULL, &startaddr, NULL);
265 if (b == NULL)
266 sym = NULL;
267 else
268 {
269 if (startaddr > BLOCK_START (b))
270 /* This is the "pathological" case referred to in a comment in
271 print_frame_info. It might be better to move this check into
272 symbol reading. */
273 sym = NULL;
274 else
275 sym = lookup_symbol (MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE,
276 0, NULL);
277 }
0f552c5f
JG
278
279 if (sym)
bd5635a1
RP
280 {
281 /* IF this is the topmost frame AND
282 * (this proc does not have debugging information OR
283 * the PC is in the procedure prologue)
be772100 284 * THEN create a "heuristic" proc_desc (by analyzing
bd5635a1
RP
285 * the actual code) to replace the "official" proc_desc.
286 */
0f552c5f 287 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
bd5635a1
RP
288 if (next_frame == NULL) {
289 struct symtab_and_line val;
290 struct symbol *proc_symbol =
291 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
0f552c5f 292
bd5635a1
RP
293 if (proc_symbol) {
294 val = find_pc_line (BLOCK_START
295 (SYMBOL_BLOCK_VALUE(proc_symbol)),
296 0);
297 val.pc = val.end ? val.end : pc;
298 }
299 if (!proc_symbol || pc < val.pc) {
300 mips_extra_func_info_t found_heuristic =
301 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
302 pc, next_frame);
303 if (found_heuristic) proc_desc = found_heuristic;
304 }
305 }
306 }
307 else
308 {
0f552c5f
JG
309 /* Is linked_proc_desc_table really necessary? It only seems to be used
310 by procedure call dummys. However, the procedures being called ought
311 to have their own proc_descs, and even if they don't,
312 heuristic_proc_desc knows how to create them! */
313
bd5635a1
RP
314 register struct linked_proc_info *link;
315 for (link = linked_proc_desc_table; link; link = link->next)
316 if (PROC_LOW_ADDR(&link->info) <= pc
317 && PROC_HIGH_ADDR(&link->info) > pc)
318 return &link->info;
23d35572 319
48be4c35
JK
320 if (startaddr == 0)
321 startaddr = heuristic_proc_start (pc);
322
bd5635a1 323 proc_desc =
48be4c35 324 heuristic_proc_desc (startaddr, pc, next_frame);
bd5635a1
RP
325 }
326 return proc_desc;
327}
328
329mips_extra_func_info_t cached_proc_desc;
330
0f552c5f
JG
331FRAME_ADDR
332mips_frame_chain(frame)
bd5635a1
RP
333 FRAME frame;
334{
bd5635a1
RP
335 mips_extra_func_info_t proc_desc;
336 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
be772100 337
0f552c5f
JG
338 if (saved_pc == 0 || inside_entry_file (saved_pc))
339 return 0;
340
bd5635a1 341 proc_desc = find_proc_desc(saved_pc, frame);
0f552c5f
JG
342 if (!proc_desc)
343 return 0;
344
bd5635a1 345 cached_proc_desc = proc_desc;
e797b4bc
JK
346
347 /* If no frame pointer and frame size is zero, we must be at end
348 of stack (or otherwise hosed). If we don't check frame size,
349 we loop forever if we see a zero size frame. */
350 if (PROC_FRAME_REG (proc_desc) == SP_REGNUM
3f528883 351 && PROC_FRAME_OFFSET (proc_desc) == 0
199b2450
TL
352 /* The previous frame from a sigtramp frame might be frameless
353 and have frame size zero. */
354 && !frame->signal_handler_caller)
bdef72d2
JK
355 return 0;
356 else
357 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
358 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
359}
360
361void
362init_extra_frame_info(fci)
363 struct frame_info *fci;
364{
365 extern struct obstack frame_cache_obstack;
366 /* Use proc_desc calculated in frame_chain */
ee5fb959
JK
367 mips_extra_func_info_t proc_desc =
368 fci->next ? cached_proc_desc : find_proc_desc(fci->pc, fci->next);
0f552c5f 369
bd5635a1
RP
370 fci->saved_regs = (struct frame_saved_regs*)
371 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
ee5fb959 372 memset (fci->saved_regs, 0, sizeof (struct frame_saved_regs));
bd5635a1 373 fci->proc_desc =
ee5fb959 374 proc_desc == &temp_proc_desc ? 0 : proc_desc;
bd5635a1
RP
375 if (proc_desc)
376 {
377 int ireg;
378 CORE_ADDR reg_position;
379 unsigned long mask;
380 /* r0 bit means kernel trap */
381 int kernel_trap = PROC_REG_MASK(proc_desc) & 1;
382
c2a0f1cb
ILT
383 /* Fixup frame-pointer - only needed for top frame */
384 /* This may not be quite right, if proc has a real frame register */
2fcdae93 385 if (fci->pc == PROC_LOW_ADDR(proc_desc) && !PROC_DESC_IS_DUMMY(proc_desc))
c2a0f1cb
ILT
386 fci->frame = read_register (SP_REGNUM);
387 else
388 fci->frame = READ_FRAME_REG(fci, PROC_FRAME_REG(proc_desc))
389 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1 390
48be4c35 391 if (proc_desc == &temp_proc_desc)
ee5fb959 392 *fci->saved_regs = temp_saved_regs;
002a422b
JK
393 else if (/* In any frame other than the innermost, we assume that all
394 registers have been saved. This assumes that all register
395 saves in a function happen before the first function
396 call. */
397 fci->next != NULL
398
399 /* In a dummy frame we know exactly where things are saved. */
400 || PROC_DESC_IS_DUMMY (proc_desc)
401
402 /* Not sure exactly what kernel_trap means, but if it means
403 the kernel saves the registers without a prologue doing it,
404 we better not examine the prologue to see whether registers
405 have been saved yet. */
406 || kernel_trap)
ee5fb959 407 {
002a422b
JK
408 /* All the registers which will be saved have been saved, so we
409 can believe the proc_desc. */
410
bd5635a1
RP
411 /* find which general-purpose registers were saved */
412 reg_position = fci->frame + PROC_REG_OFFSET(proc_desc);
413 mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
414 for (ireg= 31; mask; --ireg, mask <<= 1)
ee5fb959 415 if (mask & 0x80000000)
bd5635a1 416 {
ee5fb959
JK
417 fci->saved_regs->regs[ireg] = reg_position;
418 reg_position -= 4;
bd5635a1
RP
419 }
420 /* find which floating-point registers were saved */
421 reg_position = fci->frame + PROC_FREG_OFFSET(proc_desc);
ee5fb959
JK
422
423 /* The freg_offset points to where the first *double* register
424 is saved. So skip to the high-order word. */
bd5635a1
RP
425 reg_position += 4;
426 mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
427 for (ireg = 31; mask; --ireg, mask <<= 1)
ee5fb959 428 if (mask & 0x80000000)
bd5635a1 429 {
ee5fb959
JK
430 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
431 reg_position -= 4;
bd5635a1 432 }
ee5fb959 433 }
002a422b
JK
434 else
435 {
436 /* We need to figure out whether the registers that the proc_desc
437 claims are saved have been saved yet. */
438
439 CORE_ADDR addr;
440 int status;
441 char buf[4];
442 unsigned long inst;
443 /* Bitmasks; set if the proc_desc claims the register is saved and we
444 haven't found a save instruction for it yet. */
445 unsigned long gen_mask, float_mask;
446
447 gen_mask = PROC_REG_MASK (proc_desc);
448 float_mask = PROC_FREG_MASK (proc_desc);
449
450 for (addr = PROC_LOW_ADDR (proc_desc);
451 addr < fci->pc && (gen_mask | float_mask);
452 addr += 4)
453 {
454 status = read_memory_nobpt (addr, buf, 4);
455 if (status)
456 memory_error (status, addr);
457 inst = extract_unsigned_integer (buf, 4);
458 if (/* sw reg,n($sp) */
459 (inst & 0xffe00000) == 0xafa00000
460
461 /* sw reg,n($r30) */
462 || (inst & 0xffe00000) == 0xafc00000)
463 {
464 /* We assume that all saves are relative to the
465 PROC_FRAME_REG, which is what we used to set up
466 ->frame. */
467 int reg = (inst & 0x001f0000) >> 16;
468 if (gen_mask & (1 << reg))
469 fci->saved_regs.regs[reg] = fci->frame + (inst & 0xffff);
470 gen_mask &= ~(1 << reg);
471 }
472 else if (/* swc1 freg,n($sp) */
473 (inst & 0xffe00000) == 0xe7a00000
474
475 /* swc1 freg,n($r30) */
476 (inst & 0xffe00000) == 0xe7c00000)
477 {
478 int reg = ((inst & 0x001f0000) >> 16);
479 if (float_mask & (1 << reg))
480 fci->saved_regs.regs[FP0_REGNUM + reg]
481 = fci->frame + (inst & 0xffff);
482 float_mask &= ~(1 << reg);
483 }
484 }
485 }
bd5635a1
RP
486
487 /* hack: if argument regs are saved, guess these contain args */
488 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
489 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
490 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
491 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
492 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
493
494 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
495 }
bd5635a1
RP
496}
497
a70dc898
RP
498/* MIPS stack frames are almost impenetrable. When execution stops,
499 we basically have to look at symbol information for the function
500 that we stopped in, which tells us *which* register (if any) is
501 the base of the frame pointer, and what offset from that register
502 the frame itself is at.
503
504 This presents a problem when trying to examine a stack in memory
505 (that isn't executing at the moment), using the "frame" command. We
506 don't have a PC, nor do we have any registers except SP.
507
508 This routine takes two arguments, SP and PC, and tries to make the
509 cached frames look as if these two arguments defined a frame on the
510 cache. This allows the rest of info frame to extract the important
511 arguments without difficulty. */
512
513FRAME
c2a0f1cb
ILT
514setup_arbitrary_frame (argc, argv)
515 int argc;
516 FRAME_ADDR *argv;
a70dc898 517{
c2a0f1cb
ILT
518 if (argc != 2)
519 error ("MIPS frame specifications require two arguments: sp and pc");
520
521 return create_new_frame (argv[0], argv[1]);
a70dc898
RP
522}
523
bd5635a1 524
0f552c5f
JG
525CORE_ADDR
526mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
bd5635a1
RP
527 int nargs;
528 value *args;
529 CORE_ADDR sp;
530 int struct_return;
531 CORE_ADDR struct_addr;
532{
533 CORE_ADDR buf;
534 register i;
535 int accumulate_size = struct_return ? 4 : 0;
536 struct mips_arg { char *contents; int len; int offset; };
537 struct mips_arg *mips_args =
538 (struct mips_arg*)alloca(nargs * sizeof(struct mips_arg));
539 register struct mips_arg *m_arg;
540 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
541 extern value value_arg_coerce();
542 value arg = value_arg_coerce (args[i]);
543 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
544 /* This entire mips-specific routine is because doubles must be aligned
545 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
546 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
547 * breaks their varargs implementation...). A correct solution
548 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
549 * in stdarg.h/varargs.h).
550 */
551 if (m_arg->len > 4) accumulate_size = (accumulate_size + 7) & -8;
552 m_arg->offset = accumulate_size;
553 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
554 m_arg->contents = VALUE_CONTENTS(arg);
555 }
556 accumulate_size = (accumulate_size + 7) & (-8);
557 if (accumulate_size < 16) accumulate_size = 16;
558 sp -= accumulate_size;
559 for (i = nargs; m_arg--, --i >= 0; )
560 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
561 if (struct_return) {
562 buf = struct_addr;
a70dc898
RP
563 write_memory(sp, (char *)&buf, sizeof(CORE_ADDR));
564 }
bd5635a1
RP
565 return sp;
566}
567
568/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
569#define MASK(i,j) ((1 << (j)+1)-1 ^ (1 << (i))-1)
570
571void
572mips_push_dummy_frame()
573{
574 int ireg;
575 struct linked_proc_info *link = (struct linked_proc_info*)
576 xmalloc(sizeof(struct linked_proc_info));
577 mips_extra_func_info_t proc_desc = &link->info;
578 CORE_ADDR sp = read_register (SP_REGNUM);
579 CORE_ADDR save_address;
580 REGISTER_TYPE buffer;
581 link->next = linked_proc_desc_table;
582 linked_proc_desc_table = link;
583#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
584#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
585#define GEN_REG_SAVE_COUNT 22
586#define FLOAT_REG_SAVE_MASK MASK(0,19)
587#define FLOAT_REG_SAVE_COUNT 20
588#define SPECIAL_REG_SAVE_COUNT 4
589 /*
590 * The registers we must save are all those not preserved across
591 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
592 * In addition, we must save the PC, and PUSH_FP_REGNUM.
593 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
594 *
595 * Dummy frame layout:
596 * (high memory)
597 * Saved PC
598 * Saved MMHI, MMLO, FPC_CSR
599 * Saved R31
600 * Saved R28
601 * ...
602 * Saved R1
603 * Saved D18 (i.e. F19, F18)
604 * ...
605 * Saved D0 (i.e. F1, F0)
c2a0f1cb 606 * CALL_DUMMY (subroutine stub; see tm-mips.h)
bd5635a1
RP
607 * Parameter build area (not yet implemented)
608 * (low memory)
609 */
610 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
c2a0f1cb 611 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
bd5635a1
RP
612 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
613 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
614 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
615 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
616 /* save general registers */
617 save_address = sp + PROC_REG_OFFSET(proc_desc);
618 for (ireg = 32; --ireg >= 0; )
619 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
620 {
621 buffer = read_register (ireg);
a70dc898 622 write_memory (save_address, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1
RP
623 save_address -= 4;
624 }
0b0d6c3f
PS
625 /* save floating-points registers starting with high order word */
626 save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
bd5635a1
RP
627 for (ireg = 32; --ireg >= 0; )
628 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
629 {
7d9884b9 630 buffer = read_register (ireg + FP0_REGNUM);
a70dc898 631 write_memory (save_address, (char *)&buffer, 4);
bd5635a1
RP
632 save_address -= 4;
633 }
634 write_register (PUSH_FP_REGNUM, sp);
635 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
636 PROC_FRAME_OFFSET(proc_desc) = 0;
637 buffer = read_register (PC_REGNUM);
a70dc898 638 write_memory (sp - 4, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 639 buffer = read_register (HI_REGNUM);
a70dc898 640 write_memory (sp - 8, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 641 buffer = read_register (LO_REGNUM);
a70dc898 642 write_memory (sp - 12, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb 643 buffer = read_register (mips_fpu ? FCRCS_REGNUM : ZERO_REGNUM);
a70dc898 644 write_memory (sp - 16, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb
ILT
645 sp -= 4 * (GEN_REG_SAVE_COUNT
646 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
647 + SPECIAL_REG_SAVE_COUNT);
bd5635a1
RP
648 write_register (SP_REGNUM, sp);
649 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
650 PROC_HIGH_ADDR(proc_desc) = sp;
651 SET_PROC_DESC_IS_DUMMY(proc_desc);
652 PROC_PC_REG(proc_desc) = RA_REGNUM;
653}
654
655void
656mips_pop_frame()
dac4929a
SG
657{
658 register int regnum;
bd5635a1
RP
659 FRAME frame = get_current_frame ();
660 CORE_ADDR new_sp = frame->frame;
dac4929a 661
a70dc898 662 mips_extra_func_info_t proc_desc = frame->proc_desc;
dac4929a
SG
663
664 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
665 if (proc_desc)
666 {
667 for (regnum = 32; --regnum >= 0; )
668 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
669 write_register (regnum,
670 read_memory_integer (frame->saved_regs->regs[regnum],
671 4));
672 for (regnum = 32; --regnum >= 0; )
673 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
674 write_register (regnum + FP0_REGNUM,
675 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
676 }
677 write_register (SP_REGNUM, new_sp);
678 flush_cached_frames ();
679 /* We let mips_init_extra_frame_info figure out the frame pointer */
680 set_current_frame (create_new_frame (0, read_pc ()));
681
199b2450 682 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
bd5635a1 683 {
dac4929a
SG
684 struct linked_proc_info *pi_ptr, *prev_ptr;
685
686 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
687 pi_ptr != NULL;
688 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
689 {
690 if (&pi_ptr->info == proc_desc)
691 break;
692 }
693
694 if (pi_ptr == NULL)
695 error ("Can't locate dummy extra frame info\n");
696
697 if (prev_ptr != NULL)
698 prev_ptr->next = pi_ptr->next;
699 else
700 linked_proc_desc_table = pi_ptr->next;
701
702 free (pi_ptr);
703
bd5635a1
RP
704 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
705 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
c2a0f1cb
ILT
706 if (mips_fpu)
707 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
bd5635a1 708 }
bd5635a1
RP
709}
710
0f552c5f 711static void
a70dc898 712mips_print_register (regnum, all)
bd5635a1
RP
713 int regnum, all;
714{
48be4c35
JK
715 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
716 REGISTER_TYPE val;
bd5635a1 717
48be4c35
JK
718 /* Get the data in raw format. */
719 if (read_relative_register_raw_bytes (regnum, raw_buffer))
720 {
721 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
722 return;
723 }
724
725 /* If an even floating pointer register, also print as double. */
726 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
727 && !((regnum-FP0_REGNUM) & 1)) {
728 char dbuffer[MAX_REGISTER_RAW_SIZE];
729
730 read_relative_register_raw_bytes (regnum, dbuffer);
731 read_relative_register_raw_bytes (regnum+1, dbuffer+4);
ac8cf67d 732#ifdef REGISTER_CONVERT_TO_TYPE
48be4c35 733 REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer);
ac8cf67d 734#endif
48be4c35
JK
735 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
736 val_print (builtin_type_double, dbuffer, 0,
199b2450 737 gdb_stdout, 0, 1, 0, Val_pretty_default);
48be4c35
JK
738 printf_filtered ("); ");
739 }
199b2450 740 fputs_filtered (reg_names[regnum], gdb_stdout);
48be4c35
JK
741
742 /* The problem with printing numeric register names (r26, etc.) is that
743 the user can't use them on input. Probably the best solution is to
744 fix it so that either the numeric or the funky (a2, etc.) names
745 are accepted on input. */
746 if (regnum < 32)
747 printf_filtered ("(r%d): ", regnum);
748 else
749 printf_filtered (": ");
bd5635a1 750
48be4c35
JK
751 /* If virtual format is floating, print it that way. */
752 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
753 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
754 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
199b2450 755 gdb_stdout, 0, 1, 0, Val_pretty_default);
48be4c35
JK
756 }
757 /* Else print as integer in hex. */
758 else
759 {
760 long val;
bd5635a1 761
48be4c35
JK
762 val = extract_signed_integer (raw_buffer,
763 REGISTER_RAW_SIZE (regnum));
34df79fc 764
48be4c35
JK
765 if (val == 0)
766 printf_filtered ("0");
767 else if (all)
768 /* FIXME: We should be printing this in a fixed field width, so that
769 registers line up. */
770 printf_filtered (local_hex_format(), val);
771 else
199b2450 772 printf_filtered ("%s=%ld", local_hex_string(val), val);
48be4c35 773 }
bd5635a1
RP
774}
775
d8b3b00e 776/* Replacement for generic do_registers_info. */
0f552c5f 777void
361bf6ee 778mips_do_registers_info (regnum, fpregs)
bd5635a1 779 int regnum;
361bf6ee 780 int fpregs;
bd5635a1
RP
781{
782 if (regnum != -1) {
783 mips_print_register (regnum, 0);
784 printf_filtered ("\n");
785 }
786 else {
787 for (regnum = 0; regnum < NUM_REGS; ) {
d8b3b00e
JG
788 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
789 regnum++;
790 continue;
791 }
bd5635a1
RP
792 mips_print_register (regnum, 1);
793 regnum++;
794 if ((regnum & 3) == 0 || regnum == NUM_REGS)
795 printf_filtered (";\n");
796 else
797 printf_filtered ("; ");
798 }
799 }
800}
801/* Return number of args passed to a frame. described by FIP.
802 Can return -1, meaning no way to tell. */
803
0f552c5f 804int
bd5635a1
RP
805mips_frame_num_args(fip)
806 FRAME fip;
807{
808#if 0
809 struct chain_info_t *p;
810
811 p = mips_find_cached_frame(FRAME_FP(fip));
812 if (p->valid)
813 return p->the_info.numargs;
814#endif
815 return -1;
816}
407a8389 817\f
002a422b 818#if 0
427fec5d 819/* Is this a branch with a delay slot? */
ee5fb959
JK
820static int
821is_delayed (insn)
822 unsigned long insn;
823{
824 int i;
825 for (i = 0; i < NUMOPCODES; ++i)
826 if (mips_opcodes[i].pinfo != INSN_MACRO
827 && (insn & mips_opcodes[i].mask) == mips_opcodes[i].match)
828 break;
427fec5d
JK
829 return (i < NUMOPCODES
830 && (mips_opcodes[i].pinfo & (INSN_UNCOND_BRANCH_DELAY
831 | INSN_COND_BRANCH_DELAY
832 | INSN_COND_BRANCH_LIKELY)));
ee5fb959 833}
002a422b 834#endif
ee5fb959
JK
835
836/* To skip prologues, I use this predicate. Returns either PC itself
837 if the code at PC does not look like a function prologue; otherwise
838 returns an address that (if we're lucky) follows the prologue. If
839 LENIENT, then we must skip everything which is involved in setting
840 up the frame (it's OK to skip more, just so long as we don't skip
841 anything which might clobber the registers which are being saved.
842 We must skip more in the case where part of the prologue is in the
843 delay slot of a non-prologue instruction). */
bd5635a1 844
be772100 845CORE_ADDR
ee5fb959 846mips_skip_prologue (pc, lenient)
bd5635a1 847 CORE_ADDR pc;
ee5fb959 848 int lenient;
bd5635a1
RP
849{
850 struct symbol *f;
851 struct block *b;
852 unsigned long inst;
d747e0af 853 int offset;
0b0d6c3f 854 int seen_sp_adjust = 0;
bd5635a1 855
e157305c
PS
856 /* Skip the typical prologue instructions. These are the stack adjustment
857 instruction and the instructions that save registers on the stack
858 or in the gcc frame. */
ee5fb959
JK
859 for (offset = 0; offset < 100; offset += 4)
860 {
861 char buf[4];
862 int status;
863
864 status = read_memory_nobpt (pc + offset, buf, 4);
865 if (status)
866 memory_error (status, pc + offset);
867 inst = extract_unsigned_integer (buf, 4);
868
002a422b 869#if 0
ee5fb959
JK
870 if (lenient && is_delayed (inst))
871 continue;
002a422b 872#endif
ee5fb959 873
e157305c 874 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
0b0d6c3f 875 seen_sp_adjust = 1;
e157305c
PS
876 else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000))
877 continue; /* sw reg,n($sp) */
878 /* reg != $zero */
879 else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
880 continue;
881 else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000))
882 /* sx reg,n($s8) */
883 continue; /* reg != $zero */
884 else if (inst == 0x03A0F021) /* move $s8,$sp */
0b0d6c3f 885 continue;
1b71de8e
PS
886 else if ((inst & 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
887 continue;
0b0d6c3f 888 else
e157305c 889 break;
d747e0af 890 }
e157305c
PS
891 return pc + offset;
892
893/* FIXME schauer. The following code seems no longer necessary if we
894 always skip the typical prologue instructions. */
895
896#if 0
0b0d6c3f
PS
897 if (seen_sp_adjust)
898 return pc + offset;
bd5635a1
RP
899
900 /* Well, it looks like a frameless. Let's make sure.
901 Note that we are not called on the current PC,
902 but on the function`s start PC, and I have definitely
903 seen optimized code that adjusts the SP quite later */
904 b = block_for_pc(pc);
905 if (!b) return pc;
906
dac4929a 907 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
bd5635a1
RP
908 if (!f) return pc;
909 /* Ideally, I would like to use the adjusted info
910 from mips_frame_info(), but for all practical
911 purposes it will not matter (and it would require
912 a different definition of SKIP_PROLOGUE())
913
914 Actually, it would not hurt to skip the storing
915 of arguments on the stack as well. */
0f552c5f 916 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
bd5635a1
RP
917 return pc + 4;
918
919 return pc;
e157305c 920#endif
bd5635a1 921}
c2a0f1cb 922
002a422b
JK
923#if 0
924/* The lenient prologue stuff should be superceded by the code in
925 init_extra_frame_info which looks to see whether the stores mentioned
926 in the proc_desc have actually taken place. */
927
ee5fb959
JK
928/* Is address PC in the prologue (loosely defined) for function at
929 STARTADDR? */
930
931static int
932mips_in_lenient_prologue (startaddr, pc)
933 CORE_ADDR startaddr;
934 CORE_ADDR pc;
935{
936 CORE_ADDR end_prologue = mips_skip_prologue (startaddr, 1);
937 return pc >= startaddr && pc < end_prologue;
938}
002a422b 939#endif
ee5fb959 940
ac8cf67d
PS
941/* Given a return value in `regbuf' with a type `valtype',
942 extract and copy its value into `valbuf'. */
943void
944mips_extract_return_value (valtype, regbuf, valbuf)
945 struct type *valtype;
946 char regbuf[REGISTER_BYTES];
947 char *valbuf;
948{
949 int regnum;
950
951 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
952
953 memcpy (valbuf, regbuf + REGISTER_BYTE (regnum), TYPE_LENGTH (valtype));
954#ifdef REGISTER_CONVERT_TO_TYPE
955 REGISTER_CONVERT_TO_TYPE(regnum, valtype, valbuf);
956#endif
957}
958
959/* Given a return value in `regbuf' with a type `valtype',
960 write it's value into the appropriate register. */
961void
962mips_store_return_value (valtype, valbuf)
963 struct type *valtype;
964 char *valbuf;
965{
966 int regnum;
967 char raw_buffer[MAX_REGISTER_RAW_SIZE];
968
969 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
970 memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
971
972#ifdef REGISTER_CONVERT_FROM_TYPE
973 REGISTER_CONVERT_FROM_TYPE(regnum, valtype, raw_buffer);
974#endif
975
976 write_register_bytes(REGISTER_BYTE (regnum), raw_buffer, TYPE_LENGTH (valtype));
977}
978
8b52d486 979static void reinit_frame_cache_sfunc PARAMS ((char *, int,
427fec5d
JK
980 struct cmd_list_element *));
981
982/* Just like reinit_frame_cache, but with the right arguments to be
983 callable as an sfunc. */
984static void
985reinit_frame_cache_sfunc (args, from_tty, c)
986 char *args;
987 int from_tty;
988 struct cmd_list_element *c;
989{
990 reinit_frame_cache ();
991}
c2a0f1cb
ILT
992
993void
994_initialize_mips_tdep ()
995{
427fec5d
JK
996 struct cmd_list_element *c;
997
998 /* Let the user turn off floating point and set the fence post for
999 heuristic_proc_start. */
1000
c2a0f1cb 1001 add_show_from_set
a8172eea 1002 (add_set_cmd ("mipsfpu", class_support, var_boolean,
c2a0f1cb
ILT
1003 (char *) &mips_fpu,
1004 "Set use of floating point coprocessor.\n\
1005Turn off to avoid using floating point instructions when calling functions\n\
1006or dealing with return values.", &setlist),
1007 &showlist);
3127785a 1008
bdef72d2
JK
1009 /* We really would like to have both "0" and "unlimited" work, but
1010 command.c doesn't deal with that. So make it a var_zinteger
1011 because the user can always use "999999" or some such for unlimited. */
1012 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
427fec5d
JK
1013 (char *) &heuristic_fence_post,
1014 "\
23d35572
JK
1015Set the distance searched for the start of a function.\n\
1016If you are debugging a stripped executable, GDB needs to search through the\n\
1017program for the start of a function. This command sets the distance of the\n\
1018search. The only need to set it is when debugging a stripped executable.",
427fec5d
JK
1019 &setlist);
1020 /* We need to throw away the frame cache when we set this, since it
1021 might change our ability to get backtraces. */
1022 c->function.sfunc = reinit_frame_cache_sfunc;
1023 add_show_from_set (c, &showlist);
c2a0f1cb 1024}
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