[deliverable/binutils-gdb.git] / gdb / mipsnbsd-tdep.c

/* Target-dependent code for NetBSD/mips.

   Copyright (C) 2002, 2003, 2004, 2006, 2007 Free Software Foundation, Inc.

   Contributed by Wasabi Systems, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 51 Franklin Street, Fifth Floor,
   Boston, MA 02110-1301, USA.  */

#include "defs.h"
#include "gdbcore.h"
#include "regcache.h"
#include "regset.h"
#include "target.h"
#include "value.h"
#include "osabi.h"

#include "gdb_assert.h"
#include "gdb_string.h"

#include "nbsd-tdep.h"
#include "mipsnbsd-tdep.h"
#include "mips-tdep.h"

#include "solib-svr4.h"

/* Shorthand for some register numbers used below.  */
#define MIPS_PC_REGNUM  MIPS_EMBED_PC_REGNUM
#define MIPS_FP0_REGNUM MIPS_EMBED_FP0_REGNUM
#define MIPS_FSR_REGNUM MIPS_EMBED_FP0_REGNUM + 32

/* Core file support.  */

/* Number of registers in `struct reg' from <machine/reg.h>.  */
#define MIPSNBSD_NUM_GREGS	38

/* Number of registers in `struct fpreg' from <machine/reg.h>.  */
#define MIPSNBSD_NUM_FPREGS	33

/* Supply register REGNUM from the buffer specified by FPREGS and LEN
   in the floating-point register set REGSET to register cache
   REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */

static void
mipsnbsd_supply_fpregset (const struct regset *regset,
			  struct regcache *regcache,
			  int regnum, const void *fpregs, size_t len)
{
  size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
  const char *regs = fpregs;
  int i;

  gdb_assert (len >= MIPSNBSD_NUM_FPREGS * regsize);

  for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
    {
      if (regnum == i || regnum == -1)
	regcache_raw_supply (regcache, i,
			     regs + (i - MIPS_FP0_REGNUM) * regsize);
    }
}

/* Supply register REGNUM from the buffer specified by GREGS and LEN
   in the general-purpose register set REGSET to register cache
   REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */

static void
mipsnbsd_supply_gregset (const struct regset *regset,
			 struct regcache *regcache, int regnum,
			 const void *gregs, size_t len)
{
  size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
  const char *regs = gregs;
  int i;

  gdb_assert (len >= MIPSNBSD_NUM_GREGS * regsize);

  for (i = 0; i <= MIPS_PC_REGNUM; i++)
    {
      if (regnum == i || regnum == -1)
	regcache_raw_supply (regcache, i, regs + i * regsize);
    }

  if (len >= (MIPSNBSD_NUM_GREGS + MIPSNBSD_NUM_FPREGS) * regsize)
    {
      regs += MIPSNBSD_NUM_GREGS * regsize;
      len -= MIPSNBSD_NUM_GREGS * regsize;
      mipsnbsd_supply_fpregset (regset, regcache, regnum, regs, len);
    }
}

/* NetBSD/mips register sets.  */

static struct regset mipsnbsd_gregset =
{
  NULL,
  mipsnbsd_supply_gregset
};

static struct regset mipsnbsd_fpregset =
{
  NULL,
  mipsnbsd_supply_fpregset
};

/* Return the appropriate register set for the core section identified
   by SECT_NAME and SECT_SIZE.  */

static const struct regset *
mipsnbsd_regset_from_core_section (struct gdbarch *gdbarch,
				   const char *sect_name, size_t sect_size)
{
  size_t regsize = mips_isa_regsize (gdbarch);
  
  if (strcmp (sect_name, ".reg") == 0
      && sect_size >= MIPSNBSD_NUM_GREGS * regsize)
    return &mipsnbsd_gregset;

  if (strcmp (sect_name, ".reg2") == 0
      && sect_size >= MIPSNBSD_NUM_FPREGS * regsize)
    return &mipsnbsd_fpregset;

  return NULL;
}
\f

/* Conveniently, GDB uses the same register numbering as the
   ptrace register structure used by NetBSD/mips.  */

void
mipsnbsd_supply_reg (struct regcache *regcache, const char *regs, int regno)
{
  int i;

  for (i = 0; i <= PC_REGNUM; i++)
    {
      if (regno == i || regno == -1)
	{
	  if (gdbarch_cannot_fetch_register (current_gdbarch, i))
	    regcache_raw_supply (regcache, i, NULL);
	  else
            regcache_raw_supply (regcache, i,
				 regs + (i * mips_isa_regsize (current_gdbarch)));
        }
    }
}

void
mipsnbsd_fill_reg (const struct regcache *regcache, char *regs, int regno)
{
  int i;

  for (i = 0; i <= PC_REGNUM; i++)
    if ((regno == i || regno == -1)
	&& ! gdbarch_cannot_store_register (current_gdbarch, i))
      regcache_raw_collect (regcache, i,
			    regs + (i * mips_isa_regsize (current_gdbarch)));
}

void
mipsnbsd_supply_fpreg (struct regcache *regcache, const char *fpregs, int regno)
{
  int i;

  for (i = FP0_REGNUM;
       i <= mips_regnum (current_gdbarch)->fp_implementation_revision;
       i++)
    {
      if (regno == i || regno == -1)
	{
	  if (gdbarch_cannot_fetch_register (current_gdbarch, i))
	    regcache_raw_supply (regcache, i, NULL);
	  else
            regcache_raw_supply (regcache, i,
				 fpregs + ((i - FP0_REGNUM) * mips_isa_regsize (current_gdbarch)));
	}
    }
}

void
mipsnbsd_fill_fpreg (const struct regcache *regcache, char *fpregs, int regno)
{
  int i;

  for (i = FP0_REGNUM; i <= mips_regnum (current_gdbarch)->fp_control_status;
       i++)
    if ((regno == i || regno == -1) 
	&& ! gdbarch_cannot_store_register (current_gdbarch, i))
      regcache_raw_collect (regcache, i,
			    fpregs + ((i - FP0_REGNUM) * mips_isa_regsize (current_gdbarch)));
}

/* Under NetBSD/mips, signal handler invocations can be identified by the
   designated code sequence that is used to return from a signal handler.
   In particular, the return address of a signal handler points to the
   following code sequence:

	addu	a0, sp, 16
	li	v0, 295			# __sigreturn14
	syscall
   
   Each instruction has a unique encoding, so we simply attempt to match
   the instruction the PC is pointing to with any of the above instructions.
   If there is a hit, we know the offset to the start of the designated
   sequence and can then check whether we really are executing in the
   signal trampoline.  If not, -1 is returned, otherwise the offset from the
   start of the return sequence is returned.  */

#define RETCODE_NWORDS	3
#define RETCODE_SIZE	(RETCODE_NWORDS * 4)

static const unsigned char sigtramp_retcode_mipsel[RETCODE_SIZE] =
{
  0x10, 0x00, 0xa4, 0x27,	/* addu a0, sp, 16 */
  0x27, 0x01, 0x02, 0x24,	/* li v0, 295 */
  0x0c, 0x00, 0x00, 0x00,	/* syscall */
};

static const unsigned char sigtramp_retcode_mipseb[RETCODE_SIZE] =
{
  0x27, 0xa4, 0x00, 0x10,	/* addu a0, sp, 16 */
  0x24, 0x02, 0x01, 0x27,	/* li v0, 295 */
  0x00, 0x00, 0x00, 0x0c,	/* syscall */
};

static LONGEST
mipsnbsd_sigtramp_offset (struct frame_info *next_frame)
{
  CORE_ADDR pc = frame_pc_unwind (next_frame);
  const char *retcode = gdbarch_byte_order (current_gdbarch)
			== BFD_ENDIAN_BIG ? sigtramp_retcode_mipseb :
			sigtramp_retcode_mipsel;
  unsigned char ret[RETCODE_SIZE], w[4];
  LONGEST off;
  int i;

  if (!safe_frame_unwind_memory (next_frame, pc, w, sizeof (w)))
    return -1;

  for (i = 0; i < RETCODE_NWORDS; i++)
    {
      if (memcmp (w, retcode + (i * 4), 4) == 0)
	break;
    }
  if (i == RETCODE_NWORDS)
    return -1;

  off = i * 4;
  pc -= off;

  if (!safe_frame_unwind_memory (next_frame, pc, ret, sizeof (ret)))
    return -1;

  if (memcmp (ret, retcode, RETCODE_SIZE) == 0)
    return off;

  return -1;
}

/* Figure out where the longjmp will land.  We expect that we have
   just entered longjmp and haven't yet setup the stack frame, so the
   args are still in the argument regs.  MIPS_A0_REGNUM points at the
   jmp_buf structure from which we extract the PC that we will land
   at.  The PC is copied into *pc.  This routine returns true on
   success.  */

#define NBSD_MIPS_JB_PC			(2 * 4)
#define NBSD_MIPS_JB_ELEMENT_SIZE	mips_isa_regsize (current_gdbarch)
#define NBSD_MIPS_JB_OFFSET		(NBSD_MIPS_JB_PC * \
					 NBSD_MIPS_JB_ELEMENT_SIZE)

static int
mipsnbsd_get_longjmp_target (CORE_ADDR *pc)
{
  CORE_ADDR jb_addr;
  char *buf;

  buf = alloca (NBSD_MIPS_JB_ELEMENT_SIZE);

  jb_addr = read_register (MIPS_A0_REGNUM);

  if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET, buf,
  			  NBSD_MIPS_JB_ELEMENT_SIZE))
    return 0;

  *pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE);

  return 1;
}

static int
mipsnbsd_cannot_fetch_register (int regno)
{
  return (regno == MIPS_ZERO_REGNUM
	  || regno == mips_regnum (current_gdbarch)->fp_implementation_revision);
}

static int
mipsnbsd_cannot_store_register (int regno)
{
  return (regno == MIPS_ZERO_REGNUM
	  || regno == mips_regnum (current_gdbarch)->fp_implementation_revision);
}

/* Shared library support.  */

/* NetBSD/mips uses a slightly different `struct link_map' than the
   other NetBSD platforms.  */

static struct link_map_offsets *
mipsnbsd_ilp32_fetch_link_map_offsets (void)
{
  static struct link_map_offsets lmo;
  static struct link_map_offsets *lmp = NULL;

  if (lmp == NULL) 
    {
      lmp = &lmo;

      lmo.r_version_offset = 0;
      lmo.r_version_size = 4;
      lmo.r_map_offset = 4;
      lmo.r_ldsomap_offset = -1;

      /* Everything we need is in the first 24 bytes.  */
      lmo.link_map_size = 24;
      lmo.l_addr_offset = 4;
      lmo.l_name_offset = 8;
      lmo.l_ld_offset = 12;
      lmo.l_next_offset = 16;
      lmo.l_prev_offset = 20;
    }

  return lmp;
}

static struct link_map_offsets *
mipsnbsd_lp64_fetch_link_map_offsets (void)
{
  static struct link_map_offsets lmo;
  static struct link_map_offsets *lmp = NULL;

  if (lmp == NULL)
    {
      lmp = &lmo;

      lmo.r_version_offset = 0;
      lmo.r_version_size = 4;
      lmo.r_map_offset = 8;
      lmo.r_ldsomap_offset = -1;

      /* Everything we need is in the first 40 bytes.  */
      lmo.link_map_size = 48;
      lmo.l_addr_offset = 0;
      lmo.l_name_offset = 16; 
      lmo.l_ld_offset = 24;
      lmo.l_next_offset = 32;
      lmo.l_prev_offset = 40;
    }

  return lmp;
}
\f

static void
mipsnbsd_init_abi (struct gdbarch_info info,
                   struct gdbarch *gdbarch)
{
  set_gdbarch_regset_from_core_section
    (gdbarch, mipsnbsd_regset_from_core_section);

  set_gdbarch_get_longjmp_target (gdbarch, mipsnbsd_get_longjmp_target);

  set_gdbarch_cannot_fetch_register (gdbarch, mipsnbsd_cannot_fetch_register);
  set_gdbarch_cannot_store_register (gdbarch, mipsnbsd_cannot_store_register);

  set_gdbarch_software_single_step (gdbarch, mips_software_single_step);

  /* NetBSD/mips has SVR4-style shared libraries.  */
  set_solib_svr4_fetch_link_map_offsets
    (gdbarch, (gdbarch_ptr_bit (gdbarch) == 32 ?
	       mipsnbsd_ilp32_fetch_link_map_offsets :
	       mipsnbsd_lp64_fetch_link_map_offsets));
}
\f

static enum gdb_osabi
mipsnbsd_core_osabi_sniffer (bfd *abfd)
{
  if (strcmp (bfd_get_target (abfd), "netbsd-core") == 0)
    return GDB_OSABI_NETBSD_ELF;

  return GDB_OSABI_UNKNOWN;
}

void
_initialize_mipsnbsd_tdep (void)
{
  gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_NETBSD_ELF,
			  mipsnbsd_init_abi);
}
Commit	Line	Data
d1180b0f MK	1	/* Target-dependent code for NetBSD/mips.
d1180b0f MK	2
6aba47ca	3	Copyright (C) 2002, 2003, 2004, 2006, 2007 Free Software Foundation, Inc.
e4cd0d6a	4
45888261 JT	5	Contributed by Wasabi Systems, Inc.
	6
	7	This file is part of GDB.
	8
	9	This program is free software; you can redistribute it and/or modify
	10	it under the terms of the GNU General Public License as published by
	11	the Free Software Foundation; either version 2 of the License, or
	12	(at your option) any later version.
	13
	14	This program is distributed in the hope that it will be useful,
	15	but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	GNU General Public License for more details.
	18
	19	You should have received a copy of the GNU General Public License
	20	along with this program; if not, write to the Free Software
197e01b6 EZ	21	Foundation, Inc., 51 Franklin Street, Fifth Floor,
197e01b6 EZ	22	Boston, MA 02110-1301, USA. */
45888261 JT	23
	24	#include "defs.h"
	25	#include "gdbcore.h"
	26	#include "regcache.h"
d1180b0f	27	#include "regset.h"
45888261 JT	28	#include "target.h"
	29	#include "value.h"
	30	#include "osabi.h"
	31
d1180b0f	32	#include "gdb_assert.h"
4c7d22cb MK	33	#include "gdb_string.h"
4c7d22cb MK	34
3d9b49b0	35	#include "nbsd-tdep.h"
45888261	36	#include "mipsnbsd-tdep.h"
1777c7b4	37	#include "mips-tdep.h"
45888261 JT	38
	39	#include "solib-svr4.h"
	40
d1180b0f MK	41	/* Shorthand for some register numbers used below. */
	42	#define MIPS_PC_REGNUM MIPS_EMBED_PC_REGNUM
	43	#define MIPS_FP0_REGNUM MIPS_EMBED_FP0_REGNUM
	44	#define MIPS_FSR_REGNUM MIPS_EMBED_FP0_REGNUM + 32
	45
	46	/* Core file support. */
	47
	48	/* Number of registers in `struct reg' from <machine/reg.h>. */
	49	#define MIPSNBSD_NUM_GREGS 38
	50
	51	/* Number of registers in `struct fpreg' from <machine/reg.h>. */
	52	#define MIPSNBSD_NUM_FPREGS 33
	53
	54	/* Supply register REGNUM from the buffer specified by FPREGS and LEN
	55	in the floating-point register set REGSET to register cache
	56	REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
	57
	58	static void
	59	mipsnbsd_supply_fpregset (const struct regset *regset,
	60	struct regcache *regcache,
	61	int regnum, const void *fpregs, size_t len)
	62	{
	63	size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
	64	const char *regs = fpregs;
	65	int i;
	66
	67	gdb_assert (len >= MIPSNBSD_NUM_FPREGS * regsize);
	68
	69	for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
	70	{
	71	if (regnum == i \|\| regnum == -1)
	72	regcache_raw_supply (regcache, i,
	73	regs + (i - MIPS_FP0_REGNUM) * regsize);
	74	}
	75	}
	76
	77	/* Supply register REGNUM from the buffer specified by GREGS and LEN
	78	in the general-purpose register set REGSET to register cache
	79	REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
	80
	81	static void
	82	mipsnbsd_supply_gregset (const struct regset *regset,
	83	struct regcache *regcache, int regnum,
	84	const void *gregs, size_t len)
	85	{
	86	size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
	87	const char *regs = gregs;
	88	int i;
	89
	90	gdb_assert (len >= MIPSNBSD_NUM_GREGS * regsize);
	91
	92	for (i = 0; i <= MIPS_PC_REGNUM; i++)
	93	{
	94	if (regnum == i \|\| regnum == -1)
	95	regcache_raw_supply (regcache, i, regs + i * regsize);
	96	}
	97
	98	if (len >= (MIPSNBSD_NUM_GREGS + MIPSNBSD_NUM_FPREGS) * regsize)
	99	{
	100	regs += MIPSNBSD_NUM_GREGS * regsize;
	101	len -= MIPSNBSD_NUM_GREGS * regsize;
	102	mipsnbsd_supply_fpregset (regset, regcache, regnum, regs, len);
	103	}
	104	}
105
106	/* NetBSD/mips register sets. */
107
108	static struct regset mipsnbsd_gregset =
109	{
110	NULL,
111	mipsnbsd_supply_gregset
112	};
113
114	static struct regset mipsnbsd_fpregset =
115	{
116	NULL,
117	mipsnbsd_supply_fpregset
118	};
119
120	/* Return the appropriate register set for the core section identified
121	by SECT_NAME and SECT_SIZE. */
122
123	static const struct regset *
124	mipsnbsd_regset_from_core_section (struct gdbarch *gdbarch,
125	const char *sect_name, size_t sect_size)
126	{
127	size_t regsize = mips_isa_regsize (gdbarch);
128
129	if (strcmp (sect_name, ".reg") == 0
130	&& sect_size >= MIPSNBSD_NUM_GREGS * regsize)
131	return &mipsnbsd_gregset;
132
133	if (strcmp (sect_name, ".reg2") == 0
134	&& sect_size >= MIPSNBSD_NUM_FPREGS * regsize)
135	return &mipsnbsd_fpregset;
136
137	return NULL;
138	}
139	\f
140
45888261 JT	141	/* Conveniently, GDB uses the same register numbering as the
	142	ptrace register structure used by NetBSD/mips. */
	143
	144	void
28f5035f	145	mipsnbsd_supply_reg (struct regcache regcache, const char regs, int regno)
45888261 JT	146	{
	147	int i;
	148
	149	for (i = 0; i <= PC_REGNUM; i++)
	150	{
	151	if (regno == i \|\| regno == -1)
	152	{
8d4c1ba3	153	if (gdbarch_cannot_fetch_register (current_gdbarch, i))
28f5035f	154	regcache_raw_supply (regcache, i, NULL);
45888261	155	else
28f5035f	156	regcache_raw_supply (regcache, i,
23a6d369	157	regs + (i * mips_isa_regsize (current_gdbarch)));
45888261 JT	158	}
	159	}
	160	}
	161
	162	void
28f5035f	163	mipsnbsd_fill_reg (const struct regcache regcache, char regs, int regno)
45888261 JT	164	{
	165	int i;
	166
	167	for (i = 0; i <= PC_REGNUM; i++)
8d4c1ba3 UW	168	if ((regno == i \|\| regno == -1)
8d4c1ba3 UW	169	&& ! gdbarch_cannot_store_register (current_gdbarch, i))
28f5035f	170	regcache_raw_collect (regcache, i,
822c9732	171	regs + (i * mips_isa_regsize (current_gdbarch)));
45888261 JT	172	}
	173
	174	void
28f5035f	175	mipsnbsd_supply_fpreg (struct regcache regcache, const char fpregs, int regno)
45888261 JT	176	{
	177	int i;
	178
56cea623 AC	179	for (i = FP0_REGNUM;
	180	i <= mips_regnum (current_gdbarch)->fp_implementation_revision;
	181	i++)
45888261 JT	182	{
	183	if (regno == i \|\| regno == -1)
	184	{
8d4c1ba3	185	if (gdbarch_cannot_fetch_register (current_gdbarch, i))
28f5035f	186	regcache_raw_supply (regcache, i, NULL);
45888261	187	else
28f5035f	188	regcache_raw_supply (regcache, i,
23a6d369	189	fpregs + ((i - FP0_REGNUM) * mips_isa_regsize (current_gdbarch)));
45888261 JT	190	}
	191	}
	192	}
	193
	194	void
28f5035f	195	mipsnbsd_fill_fpreg (const struct regcache regcache, char fpregs, int regno)
45888261 JT	196	{
	197	int i;
	198
56cea623 AC	199	for (i = FP0_REGNUM; i <= mips_regnum (current_gdbarch)->fp_control_status;
56cea623 AC	200	i++)
8d4c1ba3 UW	201	if ((regno == i \|\| regno == -1)
8d4c1ba3 UW	202	&& ! gdbarch_cannot_store_register (current_gdbarch, i))
28f5035f	203	regcache_raw_collect (regcache, i,
822c9732	204	fpregs + ((i - FP0_REGNUM) * mips_isa_regsize (current_gdbarch)));
45888261 JT	205	}
45888261 JT	206
45888261 JT	207	/* Under NetBSD/mips, signal handler invocations can be identified by the
	208	designated code sequence that is used to return from a signal handler.
	209	In particular, the return address of a signal handler points to the
	210	following code sequence:
	211
	212	addu a0, sp, 16
	213	li v0, 295 # __sigreturn14
	214	syscall
	215
	216	Each instruction has a unique encoding, so we simply attempt to match
	217	the instruction the PC is pointing to with any of the above instructions.
	218	If there is a hit, we know the offset to the start of the designated
	219	sequence and can then check whether we really are executing in the
	220	signal trampoline. If not, -1 is returned, otherwise the offset from the
	221	start of the return sequence is returned. */
	222
	223	#define RETCODE_NWORDS 3
	224	#define RETCODE_SIZE (RETCODE_NWORDS * 4)
	225
	226	static const unsigned char sigtramp_retcode_mipsel[RETCODE_SIZE] =
	227	{
	228	0x10, 0x00, 0xa4, 0x27, /* addu a0, sp, 16 */
	229	0x27, 0x01, 0x02, 0x24, /* li v0, 295 */
	230	0x0c, 0x00, 0x00, 0x00, /* syscall */
	231	};
	232
	233	static const unsigned char sigtramp_retcode_mipseb[RETCODE_SIZE] =
	234	{
	235	0x27, 0xa4, 0x00, 0x10, /* addu a0, sp, 16 */
	236	0x24, 0x02, 0x01, 0x27, /* li v0, 295 */
	237	0x00, 0x00, 0x00, 0x0c, /* syscall */
	238	};
	239
	240	static LONGEST
4c7d22cb	241	mipsnbsd_sigtramp_offset (struct frame_info *next_frame)
45888261	242	{
4c7d22cb	243	CORE_ADDR pc = frame_pc_unwind (next_frame);
4c6b5505 UW	244	const char *retcode = gdbarch_byte_order (current_gdbarch)
	245	== BFD_ENDIAN_BIG ? sigtramp_retcode_mipseb :
	246	sigtramp_retcode_mipsel;
45888261 JT	247	unsigned char ret[RETCODE_SIZE], w[4];
	248	LONGEST off;
	249	int i;
	250
4c7d22cb	251	if (!safe_frame_unwind_memory (next_frame, pc, w, sizeof (w)))
45888261 JT	252	return -1;
	253
	254	for (i = 0; i < RETCODE_NWORDS; i++)
	255	{
	256	if (memcmp (w, retcode + (i * 4), 4) == 0)
	257	break;
	258	}
	259	if (i == RETCODE_NWORDS)
	260	return -1;
	261
	262	off = i * 4;
	263	pc -= off;
	264
4c7d22cb	265	if (!safe_frame_unwind_memory (next_frame, pc, ret, sizeof (ret)))
45888261 JT	266	return -1;
	267
	268	if (memcmp (ret, retcode, RETCODE_SIZE) == 0)
	269	return off;
	270
	271	return -1;
	272	}
	273
45888261	274	/* Figure out where the longjmp will land. We expect that we have
4c7d22cb MK	275	just entered longjmp and haven't yet setup the stack frame, so the
4c7d22cb MK	276	args are still in the argument regs. MIPS_A0_REGNUM points at the
45888261 JT	277	jmp_buf structure from which we extract the PC that we will land
	278	at. The PC is copied into *pc. This routine returns true on
	279	success. */
	280
	281	#define NBSD_MIPS_JB_PC (2 * 4)
1b13c4f6	282	#define NBSD_MIPS_JB_ELEMENT_SIZE mips_isa_regsize (current_gdbarch)
45888261 JT	283	#define NBSD_MIPS_JB_OFFSET (NBSD_MIPS_JB_PC * \
	284	NBSD_MIPS_JB_ELEMENT_SIZE)
	285
	286	static int
	287	mipsnbsd_get_longjmp_target (CORE_ADDR *pc)
	288	{
	289	CORE_ADDR jb_addr;
	290	char *buf;
	291
	292	buf = alloca (NBSD_MIPS_JB_ELEMENT_SIZE);
	293
4c7d22cb	294	jb_addr = read_register (MIPS_A0_REGNUM);
45888261 JT	295
	296	if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET, buf,
	297	NBSD_MIPS_JB_ELEMENT_SIZE))
	298	return 0;
	299
7c0b4a20	300	*pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE);
45888261 JT	301
	302	return 1;
	303	}
	304
	305	static int
	306	mipsnbsd_cannot_fetch_register (int regno)
	307	{
4c7d22cb	308	return (regno == MIPS_ZERO_REGNUM
56cea623	309	\|\| regno == mips_regnum (current_gdbarch)->fp_implementation_revision);
45888261 JT	310	}
	311
	312	static int
	313	mipsnbsd_cannot_store_register (int regno)
	314	{
4c7d22cb	315	return (regno == MIPS_ZERO_REGNUM
56cea623	316	\|\| regno == mips_regnum (current_gdbarch)->fp_implementation_revision);
45888261 JT	317	}
45888261 JT	318
fabe86c8 MK	319	/* Shared library support. */
	320
	321	/* NetBSD/mips uses a slightly different `struct link_map' than the
45888261	322	other NetBSD platforms. */
fabe86c8	323
45888261	324	static struct link_map_offsets *
fabe86c8	325	mipsnbsd_ilp32_fetch_link_map_offsets (void)
45888261 JT	326	{
	327	static struct link_map_offsets lmo;
	328	static struct link_map_offsets *lmp = NULL;
	329
	330	if (lmp == NULL)
	331	{
	332	lmp = &lmo;
	333
e4cd0d6a MK	334	lmo.r_version_offset = 0;
e4cd0d6a MK	335	lmo.r_version_size = 4;
45888261	336	lmo.r_map_offset = 4;
e4cd0d6a	337	lmo.r_ldsomap_offset = -1;
45888261	338
fabe86c8	339	/* Everything we need is in the first 24 bytes. */
45888261	340	lmo.link_map_size = 24;
4c7d22cb	341	lmo.l_addr_offset = 4;
45888261	342	lmo.l_name_offset = 8;
cc10cae3	343	lmo.l_ld_offset = 12;
45888261	344	lmo.l_next_offset = 16;
45888261	345	lmo.l_prev_offset = 20;
45888261 JT	346	}
	347
	348	return lmp;
	349	}
	350
	351	static struct link_map_offsets *
fabe86c8	352	mipsnbsd_lp64_fetch_link_map_offsets (void)
45888261 JT	353	{
	354	static struct link_map_offsets lmo;
	355	static struct link_map_offsets *lmp = NULL;
	356
	357	if (lmp == NULL)
	358	{
	359	lmp = &lmo;
	360
e4cd0d6a MK	361	lmo.r_version_offset = 0;
	362	lmo.r_version_size = 4;
	363	lmo.r_map_offset = 8;
	364	lmo.r_ldsomap_offset = -1;
45888261	365
fabe86c8	366	/* Everything we need is in the first 40 bytes. */
45888261	367	lmo.link_map_size = 48;
45888261	368	lmo.l_addr_offset = 0;
45888261	369	lmo.l_name_offset = 16;
cc10cae3	370	lmo.l_ld_offset = 24;
45888261	371	lmo.l_next_offset = 32;
45888261	372	lmo.l_prev_offset = 40;
45888261 JT	373	}
	374
	375	return lmp;
	376	}
fabe86c8	377	\f
45888261 JT	378
	379	static void
	380	mipsnbsd_init_abi (struct gdbarch_info info,
	381	struct gdbarch *gdbarch)
	382	{
d1180b0f MK	383	set_gdbarch_regset_from_core_section
	384	(gdbarch, mipsnbsd_regset_from_core_section);
	385
45888261 JT	386	set_gdbarch_get_longjmp_target (gdbarch, mipsnbsd_get_longjmp_target);
	387
	388	set_gdbarch_cannot_fetch_register (gdbarch, mipsnbsd_cannot_fetch_register);
	389	set_gdbarch_cannot_store_register (gdbarch, mipsnbsd_cannot_store_register);
	390
	391	set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
	392
fabe86c8 MK	393	/* NetBSD/mips has SVR4-style shared libraries. */
	394	set_solib_svr4_fetch_link_map_offsets
	395	(gdbarch, (gdbarch_ptr_bit (gdbarch) == 32 ?
	396	mipsnbsd_ilp32_fetch_link_map_offsets :
	397	mipsnbsd_lp64_fetch_link_map_offsets));
45888261	398	}
d1180b0f MK	399	\f
	400
	401	static enum gdb_osabi
	402	mipsnbsd_core_osabi_sniffer (bfd *abfd)
	403	{
	404	if (strcmp (bfd_get_target (abfd), "netbsd-core") == 0)
	405	return GDB_OSABI_NETBSD_ELF;
	406
	407	return GDB_OSABI_UNKNOWN;
	408	}
45888261 JT	409
	410	void
	411	_initialize_mipsnbsd_tdep (void)
	412	{
05816f70	413	gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_NETBSD_ELF,
45888261	414	mipsnbsd_init_abi);
45888261	415	}